Class / Patent application number | Description | Number of patent applications / Date published |
330310000 | Including plural stages cascaded | 61 |
20080231374 | POWER EFFICIENT MULTISTAGE AMPLIFIER AND DESIGN METHOD - A multistage amplifier and design method are disclosed. The multistage amplifier has a plurality of amplifier stages, each stage having an amplifier designed and biased to operate at or near the amplifier's power added efficiency (PAE) peak. The PAE peak of each of the amplifier is at or near the amplifiers linear-compression transition region, providing a multistage power amplifier that is power efficient and has desirable amplitude to amplitude and amplitude to phase power transfer characteristics. The amplifier is designed by matching the output impedance of a final stage with a load. Amplifier stages are iteratively designed from the last stage to the first. At each stage, an amplifier and drive circuit are designed. The drive circuit and amplifier are designed to provide each stage with output impedance matched to the input impedance of the following stage and to operate at or near the PAE peak of the amplifier. | 09-25-2008 |
20080258821 | CMOS TRIPLE-BAND RF VGA AND POWER AMPLIFIER IN LINEAR TRANSMITTER - Methods and systems for amplifying signals are provided. Embodiments include a three-to-one multiplexer, a multiband RF variable gain amplifier (VGA), a multiband power amplifier driver (PAD), and a one-to three multiplexer. The three-to-one multiplexer receives three input signals from an RF frequency source and outputs an output signal corresponding one input signal. The multiband RF VGA receives the output signal of the three-to-one multiplexer, provides a first level of amplification to the signal received from the three-to-one multiplexer, and outputs an amplified version of the signal. The multiband PAD receives the signal output by the multiband RF variable gain amplifier and provides a second level of amplification to the signal and outputs an amplified version of the signal. The one-to-three multiplexer receives a signal output by the multiband PAD produces three output signals that correspond to each of the three input signals. | 10-23-2008 |
20080265997 | Power Amplifier for Amplifying High-Frequency (H.F.) Signals - An H.F. power amplifier is disclosed having a plurality of branches ( | 10-30-2008 |
20080315957 | ULTRA-WIDEBAND LOW NOISE AMPLIFIER AND AMPLIFICATION METHOD THEREOF - An ultra wideband low noise amplifier (UWB LNA) and amplification method thereof, providing a substantially achieved bandwidth extension by pole-zero cancellation and utilized to transform input impedance matching up to 50 ohm for gaining low noise figure. The ultra-wideband low noise amplifier is composed of a capacitive-feedback amplifier, a resistive-feedback amplifier, an inductive-feedback amplifier, and a buffer amplifier. | 12-25-2008 |
20090295487 | POWER EFFICIENT MULTISTAGE AMPLIFIER AND DESIGN METHOD - A multistage amplifier and design method are disclosed. The multistage amplifier has a plurality of amplifier stages, each stage having an amplifier designed and biased to operate at or near the amplifier's power added efficiency (PAE) peak. The PAE peak of each of the amplifier is at or near the amplifiers linear-compression transition region, providing a multistage power amplifier that is power efficient and has desirable amplitude to amplitude and amplitude to phase power transfer characteristics. The amplifier is designed by matching the output impedance of a final stage with a load. Amplifier stages are iteratively designed from the last stage to the first. At each stage, an amplifier and drive circuit are designed. The drive circuit and amplifier are designed to provide each stage with output impedance matched to the input impedance of the following stage and to operate at or near the PAE peak of the amplifier. | 12-03-2009 |
20100019853 | AMPLIFICATION STAGE - There is provided an amplifier that comprises a plurality of amplifier stages arranged in a cascade; and a frequency-dependent load associated with the output of at least one of the plurality of amplifier stages, the frequency dependent load being adapted to reduce a voltage or current offset in the output of said at least one amplifier stage. | 01-28-2010 |
20100109785 | AMPLIFIER CIRCUIT - An amplifier circuit includes a first amplifying section for amplifying a signal, and a second amplifying section for amplifying the signal amplified by the first amplifying section. A capacitive element connects the output of the first amplifying section to the input of the second amplifying section. When power is applied to the amplifier circuit, a bypass circuit causes the electric current flowing from a first power supply toward the input of the second amplifying section through the first amplifying section and the capacitive element to be bypassed to a second power supply. | 05-06-2010 |
20100127783 | SWITCHING LOW NOISE AMPLIFIER - Disclosed are embodiments of an integrated circuit device, method and design structure for selectively amplifying one of multiple received input signals. The embodiments incorporate at least two first stage transistors and a single second stage transistor. The first stage transistors are adapted to receive input signals from the same or different input signal sources and are each electrically coupled to the second stage transistor. A control circuit design is adapted to individually turn on a selected first stage transistor in conjunction with the second stage transistor, thereby activating a corresponding one of the cascode amplifiers and allowing the input signal received by the selected first stage transistor to be separately amplified. | 05-27-2010 |
20100164632 | POWER AMPLIFIER - A radio frequency power amplifier has first and second amplifier stages coupled in series, one of which is operated in class F and the other is operated in inverse class F; an envelope detector adapted to detect an envelope of the input signal; a power supply coupled to supply an electrical supply voltage to the first and second amplifier stages, wherein the electrical supply voltage is controlled to follow the envelope of the input signal. Such amplifier makes it possible to maintain class F and inverse class F operation, respectively, of the first and second amplifier stages independent on the input signal. Preferably, this is done by controlling the electrical supply voltage so that the saturation levels of the first and second amplifier stages follow the envelope of the input signal. | 07-01-2010 |
20100194481 | RF POWER AMPLIFIER AND RF POWER MODULE USING THE SAME - The RF power amplifier circuit including multiple amplification stages has a previous-stage amplifier, a next-stage amplifier and a controller. The previous-stage amplifier responds to an RF transmission input signal. The next-stage amplifier responds to an amplification signal output by the previous-stage amplifier. In response to an output-power-control voltage, the controller controls the former- and next-stage amplifiers in quiescent current and gain. In response to the output-power-control voltage, the quiescent current and gain of the previous-stage amplifier are continuously changed according to a first continuous function, whereas those of the next-stage amplifier are continuously changed according to a second continuous function. The second continuous function is higher than the first continuous function by at least one in degree. The RF power amplifier circuit brings about the effect that the drop of the power added efficiency in low and middle power modes is relieved. | 08-05-2010 |
20100214024 | LOW DISSIPATION AMPLIFIER - A low dissipation, low distortion amplifier includes a driver amplifier stage and a main output stage, with a plurality of impedance networks providing, among other things, feedback paths from outputs of the driver and main output stages to the input of the driver stage. The impedance networks also provide coupling paths from the outputs of the driver and main output stages to the load. The impedance networks can all be formed of resistors, capacitors, or network combinations thereof. An additional feedback path can be added from the load to the driver stage to flatten out the frequency response at low frequencies. The driver and main output stages may be operated in Class AB and B modes respectively, and/or in Class G or H modes. An intermediate amplifier driver stage may be added between the driver and main output stages. | 08-26-2010 |
20100231305 | SEMICONDUCTOR DEVICE FOR SIGNAL AMPLIFICATION - A semiconductor device for transmitting-signal amplification which has a fine resolution, a high dynamic range, a small occupied area, and low power consumption, is realized. An input signal amplitude is reduced every one half by a ladder network, and a transconductance amplifier stage is arranged corresponding to each node of the ladder network. An output of the transconductance amplifier stage is coupled to an output signal line in common. According to a control word WC< | 09-16-2010 |
20100253436 | AMPLIFIER - An amplifier is realized by a distributed-constant-type amplifier including an input-side transmission line and an output-side transmission line, and a plurality of unit circuits coupled between the input-side transmission line and the output-side transmission line, in which each of the plurality of unit circuits is formed by including an amplification circuit having a gain equal to or greater than one. | 10-07-2010 |
20100277243 | PASSIVE SPECTRUM CONTROL FOR PULSED RF POWER AMPLIFIERS - A multi-stage RF power amplifier including passive circuitry for frequency spectrum control. In one example, a multi-stage RF power amplifier includes a first RF power transistor, a second RF power transistor, and a passive combination bandpass filter and impedance matching network coupled between the first RF power transistor and the second RF power transistor. | 11-04-2010 |
20100315167 | Inter-Stage Matching Network to Enhance Common Mode Stability - An amplifier has a first transistor, a second transistor, a third transistor and a fourth transistor, a first transformation network having first and second grounds and a second transformation network having third and fourth grounds. The amplifier has a collector of the first transistor operatively connected to a base of the third transistor by the first transformation network, a collector of the second transistor operatively connected to a base of the fourth transistor by the second transformation network, the first ground and the third ground are electrically connected to each other, the second ground and the fourth ground are electrically connected to each other, the emitters of the first and of the second transistors are electrically connected to the first ground and the third ground, and the second ground and the fourth ground are electrically connected to the emitters of the third and of the fourth transistors. | 12-16-2010 |
20100315168 | CASCODE CMOS RF POWER AMPLIFIER WITH PROGRAMMABLE FEEDBACK CASCODE BIAS UNDER MULTIPLE SUPPLY VOLTAGES - A Radio Frequency (RF) cascode power amplifier operates with differing battery supply voltages. A transconductance stage has a transistor with an RF signal input at its gate. A cascode stage has at least one cascode transistor, the cascode stage coupled in series with the transconductance stage between a battery voltage node and ground, the cascode stage having an RF signal output at the battery voltage node and at least one bias input to the at least one cascode transistor. Cascode bias feedback circuitry applies fixed bias voltage(s) to the at least one two bias inputs for a low battery voltage and applies feedback bias voltage(s) to the at least two bias inputs for a high battery voltage, the feedback bias voltage(s) based upon a voltage of the battery voltage node. More than two differing battery supply voltages are supported. | 12-16-2010 |
20100327980 | HETEROJUNCTION BIPOLAR TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME, AND POWER AMPLIFIER USING THE SAME - A heterojunction bipolar transistor with InGaP as the emitter layer and capable of both reliable electrical conduction and thermal stability wherein a GaAs layer is inserted between the InGaP emitter layer and AlGaAs ballast resistance layer, to prevent holes reverse-injected from the base layer from diffusing and reaching the AlGaAs ballast resistance layer. | 12-30-2010 |
20110006848 | AMPLIFIER CIRCUIT - An amplifier circuit includes three amplifier units connected in series. The first amplifier unit includes an input connector for inputting signals and a first transistor amplifier module connected to the input connector. The second amplifier unit includes a notch-filter circuit, a main filter circuit and a second transistor amplifier module. The notch-filter circuit allows only signals in a predetermined frequency to be transmitted from the first transistor amplifier module to the second transistor amplifier module and amplified. The main filter circuit filters signals in frequencies different from the predetermined frequency. The third amplifier unit includes a third transistor amplifier module and an output connector for outputting amplified signals. | 01-13-2011 |
20110063036 | OPERATIONAL AMPLIFIER - A multi-stage amplification type class-AB operational amplifier disclosed includes an amplification stage having plural amplification sections formed in multiple stages, and a class-AB output stage having a bias section and an output section, in which an input signal input to the amplification stage is sequentially amplified by the plural amplification sections, and further amplified by the bias section and the output section of the class-AB output stage. A positive supply voltage applied to the amplification stage is different from a positive supply voltage applied to the class-AB output stage, and a negative supply voltage applied to the amplification stage is different from a negative supply voltage applied to the class-AB output stage. | 03-17-2011 |
20110187460 | CMOS power amplifiers having integrated one-time programmable (OTP) memories - CMOS power amplifiers (PAs) are disclosed having one or more integrated one-time programming (OTP) memories that are utilized to control at least in part operation of the CMOS PAs. The integrated OTP memories within the CMOS power amplifiers (PAs) allow adjustments, such as one-time factory trimming, of CMOS PA integrated circuits to optimize or improve performance. With this capability, for example, the tuning and biasing of stages within a multi-stage amplifier within a CMOS PA can be measured during factory test and adjusted by setting one or more bits in the OTP memories, as desired. Further, the operation of other circuitry within the PA can also be controlled at least in part with parameter settings stored in the OTP memories. | 08-04-2011 |
20110187461 | POWER AMPLIFIER - According to one embodiment, a variable attenuator is arranged in an input stage, a plurality of transistors are cascaded on the later part of this variable attenuator, temperature sensors are arranged in the vicinity of two or more of the plurality of transistors to detect temperatures, the amount of gain change of the plurality of transistors is calculated from the temperature detection results individually obtained by the temperature sensors, the variable attenuator is controlled in such a manner as to reduce the amount gain change so that the input signal level can be controlled, and thereby the gain that tends to vary in accordance with temperature changes can be stabilized. | 08-04-2011 |
20110316636 | DIGITAL TUNABLE INTER-STAGE MATCHING CIRCUIT - A tunable inter-stage matching circuit that can improve performance is described. In an exemplary design, an apparatus comprises a driver amplifier and a power amplifier. The apparatus may further include an inter-stage matching circuit tunable in discrete steps for matching impedances between the driver amplifier and the power amplifier. The tunable inter-stage matching circuit may include a bank of capacitors, each capacitor of the bank coupled in series with a switch for coupling the capacitor to a ground voltage. | 12-29-2011 |
20110316637 | AMPLIFIER MODULE WITH MULTIPLE OPERATING MODES - An amplifier module with multiple operating modes is described. In an exemplary design, an apparatus includes a plurality of amplifiers. The apparatus may also include a plurality of switches, each switch coupled to an output of an associated amplifier in the plurality of amplifiers and configured to provide an amplified signal in a first mode and bypass the associated amplifier and provide an associated bypass signal in a second mode. Further, the apparatus may include an output circuit including a plurality of matching circuits, each matching circuit coupled to an associated amplifier in the plurality of amplifiers and an associated switch in the plurality of switches. | 12-29-2011 |
20120001697 | DIFFERENTIAL AMPLIFIER STAGE WITH INTEGRATED OFFSET CANCELLATION CIRCUIT - A differential amplifier stage and method for offset cancellation include an amplifier having an input and an output. An internal offset cancellation circuit has an input for receiving a control signal to control offset cancellation in the amplifier. The offset cancellation circuit is integrated with the amplifier but isolated from the input and the output of the amplifier, and, in accordance with its isolation, an impedance of the stage is unaffected by the offset cancellation circuit. | 01-05-2012 |
20120056681 | SIGNAL AMPLIFICATION CIRCUITS FOR RECEIVING/TRANSMITTING SIGNALS ACCORDING TO INPUT SIGNAL - One exemplary signal amplification circuit used for processing an input signal includes an input stage, a plurality of output stages, and a selecting stage. The input stage has an input node for receiving the input signal and an output node for outputting an intermediate signal. The output stages are coupled to a plurality of output ports of the signal amplification circuit, respectively. Each of the output stages generates a corresponding processed signal to a corresponding output port according to a gain and a signal derived from the intermediate signal of the input stage when enabled. The selecting stage is arranged for selectively coupling the output node of the input stage to at least one of the output stages. | 03-08-2012 |
20120081184 | HIGH IMPEDANCE MICROWAVE ELECTRONICS - High impedance, high frequency nanoscale device electronics configured to interface with low impedance loads include an impedance transforming stage constructed of multiple nanoscale devices, such as carbon nanotube field-effect transistors. In an embodiment of the present invention, an impedance transforming output stage of a multistage amplifier is configured to drive a 50 ohm transmission line with unity voltage gain using multiple carbon nanotube field-effect transistors in parallel. In a further embodiment, a receiver provided for an electronically steered receive array is a monolithic, lumped-element system formed from nanoscale devices and configured to interface with the external electrical systems via a single transmission line. | 04-05-2012 |
20120161880 | TECHNIQUES ON INPUT TRANSFORMER TO PUSH THE OP1dB HIGHER IN POWER AMPLIFIER DESIGN - A power amplifier includes a first transistor and a first inductor disposed between the first transistor and a voltage source. A first node between the first transistor and the first inductor is an output node. The power amplifier further includes a second inductor disposed between the first transistor and ground The power amplifier further includes a third inductor coupled to a gate of the first transistor and configured as a first AC input. The power amplifier further includes a first phase conditioner inductively coupled to the second inductor and the third inductor and configured to set phases of AC signals across the first inductor and the second inductor in phase. The second inductor is configured to release energy into the first inductor to raise a voltage of the AC signal and raise a power output at the output node. | 06-28-2012 |
20120182075 | APPARATUS AND METHOD FOR MILLER COMPENSATION FOR MULTI-STAGE AMPLIFIER - An amplifier circuit includes a first amplifier stage having a first output node; a second amplifier stage having a second output node; and a compensation block electrically coupled between the first and second output nodes. The compensation block has a compensation capacitor electrically coupled to the first node and electrically connectable to the second node, and has an impedance electrically connectable to the compensation capacitor. The compensation capacitor is electrically coupled via a switch to the impedance such that the compensation capacitor can contribute a zero to shunt branch formed by the compensation capacitor and impedance when the compensation capacitor is disconnected from the second node. | 07-19-2012 |
20120206208 | WIDE BAND LNA WITH NOISE CANCELING - Techniques to improve low noise amplifiers (LNAs) with noise canceling are described. LNA includes a first and a second amplifier which work together to noise cancel the noise generated at an input stage circuit. The input stage circuit receives an RF signal and is characterized by a first node and a second node. The first amplifier converts a noise voltage at the first node into a first noise current at an output of the first amplifier. The second amplifier is directly coupled to the output of the first amplifier and provides noise canceling by summing the first noise current with a second noise current generated by the second amplifier as a function of the noise voltage at the second node. The proposed techniques eliminate the need for large ac coupling capacitors and reduce the die size occupied by the LNA. | 08-16-2012 |
20120274406 | LOW NOISE-LINEAR POWER DISTRIBUTED AMPLIFIER - The present disclosure describes a distributed amplifier (DA) that includes active device cells within sections that are configured to provide an input gate termination that is conducive for relatively low noise and high linearity operation. A section adjacent to an output of the DA is configured to effectively terminate the impedance of an input transmission line of the DA. Each active device cell includes transistors coupled in a cascode configuration that thermally distributes a junction temperature among the transistors. In this manner, noise generated by a common source transistor of the cascode configuration is minimized. The transistors coupled in the cascode configuration may be fabricated using gallium nitride (GaN) technology to reduce physical size of the DA and to further reduce noise. | 11-01-2012 |
20120319781 | Receiver Circuits for Differential and Single-Ended Signals - Receiver circuits for differential and single-ended signals are disclosed. In some embodiments, a receiver may include a first amplifier configured to receive a first signal of a differential pair of signals at a first input and a second signal of the differential pair of signals at a second input when operating in differential mode. The receiver may also include a second amplifier coupled to the first amplifier, where the second amplifier is configured to receive a reference signal at a third input and a single-ended signal at the first input when operating in single-ended mode. In some embodiments, several receivers may be used, for example, to process a differential clock signal and one or more single-ended data signals referenced to the clock signal and/or differential data signals referenced to a single-ended clock signal. In some embodiments, the delays of each signal propagating through each respective receiver may be independently adjusted. | 12-20-2012 |
20120319782 | CLASS E POWER AMPLIFIER - The present invention includes a class-E power amplifier, comprising a driver stage (DS) including a first power amplifier with transistors, to which an input signal is inputted; a main stage (MS), including a second power amplifier with transistors, whose input is connected to the output of the DS; and a first LC resonator whose one end is connected to the output of the DS and the other end to the ground as an AC equivalent circuit and a second LC resonator whose one end is connected to the input of the MS and the other end to the ground as an AC equivalent circuit. In accordance with the present invention, as the voltage stress is reduced on the CMOS class-E power amplifier, the application of the high power supply voltage may be allowed and therefore the load impedance may be high while the same efficiency is maintained. | 12-20-2012 |
20130009711 | READ OUT INTEGRATED CIRCUIT - According to one embodiment, a circuit comprises a Capacitive Trans-Impedance Amplifier (CTIA) configured to receive a current pulse at an input and convert the current pulse to a voltage step. The voltage step is directed to a first signal path and a second signal path. When the voltage step exceeds a first threshold, the first signal path directs an enable pulse to the second signal path. The second signal path generates an output pulse when the voltage step exceeds a second threshold and the enable pulse is enabled. The second signal path comprises a first, a second, and a third amplifier to increase detection of the voltage step by the second signal path. | 01-10-2013 |
20130106521 | Operational Amplifying Device | 05-02-2013 |
20130141170 | AMPLIFIER INDUCTOR SHARING FOR INDUCTIVE PEAKING - A method of sharing inductors for inductive peaking of an amplifier having at least two stages includes calculating a single stage inductance of a single stage of the at least two stages for inductive peaking in order to have a stable impulse response. A shared inductance is calculated for inductive peaking by dividing the single stage inductance by a number of stages of the at least two stages. At least two inductors having the shared inductance are shared among the at least two stages for inductive peaking. | 06-06-2013 |
20130187718 | AMPLIFIER CIRCUIT AND METHOD FOR IMPROVING THE DYNAMIC RANGE THEREOF - The invention provides an amplifier circuit. In one embodiment, the amplifier circuit includes a first class-AB amplifier and a second class-AB amplifier. The first class-AB amplifier amplifies an input signal to generate the first output signal. The second class-AB amplifier amplifies the first output signal to generate a final output signal on an output node. When the power of the input signal is greater than a threshold level, the second class-AB amplifier is in a turned-off state during a turned-on duration period of the first class-AB amplifier, and the first class-AB amplifier is in a turned-off state during a turned-on duration period of the second-class AB amplifier. | 07-25-2013 |
20130249639 | FOLDED CASCODE AMPLIFIER WITH AN ENHANCED SLEW RATE - The present invention is directed to a folded cascode amplifier with an enhanced slew rate, which includes a folded cascode amplifying circuit, a first input circuit and a second input circuit. The second input circuit has an electricity type opposite to that of the first input circuit. The first input circuit is connected, via its driving nodes, to the folded cascode amplifying circuit, and the second input circuit is connected, via its driving nodes, to crossover nodes of the first input circuit. | 09-26-2013 |
20130257545 | POWER AMPLIFIER INCLUDING VARIABLE CAPACITOR CIRCUIT - A power amplifier includes first and second amplification stages. The first amplification stage is configured to amplify a radio frequency (RF) input signal. The second amplification stage includes at least one transistor configured to amplify an output of the first amplification stage, the second amplification stage being configured to have a capacitance between a gate of the at least one transistor and a first power supply voltage. The capacitance automatically varies with amplitude of the output of the first amplification stage. | 10-03-2013 |
20140077886 | SYSTEM AND METHOD FOR ASSEMBLING A VOLTAGE AMPLIFIER - A voltage amplifier is provided that includes a first row and a second row each having a respective first or second plurality of capacitors arranged collinearly. First row capacitors comprise first terminals and second row capacitors comprise second terminals. The first row and second row are parallel to each other along longitudinal and lateral axes. A third row has a first plurality of diodes and a fourth row has a second plurality of diodes, each row positioned cross-wise to the first row and located above the first and second rows along the vertical axis. The first diodes are positioned parallel to each other along the longitudinal and lateral axes, and the second diodes are parallel to each other along the longitudinal and lateral axes and positioned cross-wise to and above the first plurality along the vertical axis. Diodes and capacitors are directly and physically connected using respective electrical leads. | 03-20-2014 |
20140085009 | AMPLIFIER INDUCTOR SHARING FOR INDUCTIVE PEAKING AND METHOD THEREFOR - A method of sharing inductors for inductive peaking of an amplifier includes calculating a single stage inductance of a single stage for inductive peaking in order to have a stable impulse response. The method further includes determining a number of stages for shared inductance for inductive peaking. The method further includes sharing at least two inductors having the shared inductance among the determined number of stages for inductive peaking. | 03-27-2014 |
20140132358 | CASCODE AMPLIFIER - A cascode amplifier includes: first transistors; second transistors cascode-connected with respective first transistors; a first line connected at spaced points to control terminals of the first transistors; a second line connected at spaced points to control terminals of the second transistors; and a capacitance connected between one end of the second line and ground. The second line includes at least two lines connected in parallel with each other. | 05-15-2014 |
20140340160 | SEMICONDUCTOR POWER AMPLIFIER - A semiconductor power amplifier comprises an input-side amplifier for inputting and amplifying an input signal, a balanced amplifier which is connected to an output terminal of the input-side amplifier, comprises two hybrid couplers and a plurality of power amplifiers, passes the input signal, and converts a reflective wave into thermal energy, and an output-side amplifier which is connected to an output terminal of the balanced amplifier and amplifies an output signal. | 11-20-2014 |
20150048892 | LOW-NOISE CURRENT SOURCE - In one example embodiment, a current source is provided to limit noise and offset. In one embodiment, a source transistor is provided, with current sourced at the drain. A feedback network runs from the source node to the gate. The feedback network produces voltage gain by a transconductance, such as a transistor. Appropriate capacitors are also provided, and two pairs of switches are disposed to provide offset cancellation by toggling between gain and clamp modes in the switched capacitor architecture. | 02-19-2015 |
20150357323 | Radio Frequency and Microwave Devices and Methods of Use - Radio frequency and microwave devices and methods of use are provided herein. According to some embodiments, the present technology may comprise an ohmic layer for use in a field effect transistor that includes a plurality of strips disposed on a substrate, the plurality of strips comprising alternating source strips and drain strips, with adjacent strips being spaced apart from one another to form a series of channels, a gate finger segment disposed in each of the series of channels, and a plurality of gate finger pads disposed in an alternating pattern around a periphery of the plurality of strips such that each gate finger segment is associated with two gate finger pads. | 12-10-2015 |
20150357975 | Hardware-Efficient Compensator For Outphasing Power Amplifiers - Digital compensators for use in outphasing-based power amplification systems (e.g., Linear Amplification using Nonlinear Components (LINC) amplifiers and Asymmetric Multilevel Outphasing (AMO) amplifiers) include a short memory nonlinear portion and a long memory linear time invariant (LTI) portion. In various embodiments, compensators are provided that are of relatively low complexity and that are capable of operation at throughputs exceeding a Gigasample per second. | 12-10-2015 |
20160056768 | AMPLIFIER - An amplifier includes: a first transistor that includes a first main electrode, a second main electrode, and a first control electrode, a first input signal being input to the first main electrode, a first output signal being output from the second main electrode; a reference potential line that is disposed on a signal line connected to the second main electrode with an insulator interposed therebetween; a first capacitor that is disposed between the first control electrode and the reference potential line; and a first phase shifter configured to shift a phase of a first return current such that the phase of the first return current which flows from the second main electrode to the first control electrode via the reference potential line and the first capacitor has a phase difference, which is greater than 90 degrees and less than 270 degrees, from the phase of the first input signal. | 02-25-2016 |
20160155830 | COMPOUND SEMICONDUCTOR DEVICE | 06-02-2016 |
20170237402 | RF AMPLIFIER TO INCREASE GAIN USING TRANSFORMER | 08-17-2017 |
330311000 | Having different configurations | 13 |
20080204149 | CRYOGENIC RECEIVING AMPLIFIER AND AMPLIFYING MEHTOD - The present invention discloses a cryogenic receiving amplifier using a gallium nitride high electron mobility transistor (GaN HEMT) as an amplifying device in a cryogenic temperature environment. The cryogenic receiving amplifier includes an input matching circuit which makes an impedance matching between a gate of the amplifying device and an outside of an input terminal, a gate biasing circuit which applies a DC voltage to the gate of the amplifying device, an output matching circuit which makes an impedance matching between a drain of the amplifying device and an outside of an output terminal, and a drain biasing circuit which applies a DC voltage to the drain of the amplifying device. The cooled temperature is preferably set to 150 K or below, and the GaN HEMT may be illuminated with light of a blue LED. | 08-28-2008 |
20080297262 | Increased gain high-frequency amplifier - In general, in one aspect, the disclosure describes an amplifier that includes a first transistor coupled to ground and a second transistor coupled to the first transistor and a supply voltage. A voltage biasing circuit is used to provide biased voltages to the first and second transistors. An inductor coupled between the voltage biasing circuit and the second transistor. | 12-04-2008 |
20090002078 | PREAMPLIFIER AND OPTICAL RECEIVING DEVICE INCLUDING THE SAME - A preamplifier includes a single-ended amplifier, a differential amplifier, an operational amplifier, and a clipping circuit. The single-ended amplifier converts an input current signal into a voltage signal, outputs an amplified voltage signal according to a preset amplification gain. The differential amplifier includes first and second differential inputs, and outputs a negative-phase signal and a positive-phase signal. The amplified voltage signal is applied to the first differential input of the differential amplifier. The operational amplifier includes first and second inputs which respectively receive the negative-phase signal and the positive-phase signal, where an output of the operational amplifier is applied to the second differential input of the differential amplifier. The clipping circuit clips an amplitude of the negative-phase signal output by the differential amplifier. | 01-01-2009 |
20090045879 | Amplifier and Method for Operating the Same - An amplifier includes an input terminal, an output terminal, a cascode circuit with a first and a second transistor serially coupled between an output terminal and a terminal of a predefined potential with a control terminal of the first transistor being coupled to the input terminal, a first bipolar transistor having a collector/emitter path, forming a series circuit coupled to the terminal of a predefined potential with the first transistor, a power supply circuit for providing power supply voltages over a cascode circuit and a series circuit and a second bipolar transistor coupled between the output terminal and the terminal of the predefined potential with bases of the first bipolar transistor and the second bipolar transistor being coupled to each other and a current source. | 02-19-2009 |
20090121791 | WIDEBAND LOW NOISE AMPLIFIERS - A wideband low noise amplifier. The wideband low noise amplifier comprises an amplifier, an output device, and an inductor. The amplifier amplifies an input signal received from an input node, and outputs the amplified signal to an output node. The output device is coupled to a first voltage and the output node. The peaking inductor is coupled between the amplifier and the output device. | 05-14-2009 |
20090134942 | RADIO FREQUENCY AMPLIFIER WITH CONSTANT GAIN SETTING - Radio frequency amplifier with constant gain setting. A circuitry that includes triple well connected MOSFETs is employed to eliminate body effects therein. The voltage gain as presented herein, being implemented using a ratio of certain elements within the circuitry, is immune to variations in temperature, power supply voltage, and process variations. One implementation employs an array of selectable MOSFETs to allow for more than one gain setting to be provided by the amplifier. Such an amplifier has a variable/selectable gain setting. An appropriately placed MOSFET is employed to provide the desired input impedance (e.g., 50Ω). This design can be implemented using multiple n-channel metal oxide semiconductor field-effect transistors (N-MOSFETs) (some of which are triple well connected) and p-channel metal oxide semiconductor field-effect transistors (P-MOSFETs), or alternatively using P-MOSFETs and N-MOSFETs. | 05-28-2009 |
20090167440 | Low Noise Amplifier - The invention teaches an amplifier ( | 07-02-2009 |
20090179706 | Capacitor Gain-Boost Circuit - A circuit is disclosed that comprises a capacitor gain-boost circuit and an amplifier coupled to capacitor gain-boost circuit. A capacitor gain-boost circuit comprises of capacitor, gain-boost amplifier and biasing circuit. The gain-boost amplifier and capacitor provides optimum biasing operation and performance. Accordingly, through the use of capacitor gain-boost circuit, the supply voltage range and power consumption of an amplifier is optimized while the gain of amplifier is improved. | 07-16-2009 |
20110043288 | Rail-to-rail Miller compensation method without feed forward path - A rail-to-rail Miller compensation method without feed forward path includes forming a first compensation branch including a first amplifier, wherein an input of the first amplifier is electrically connected with an output of a second stage gain amplifier, the second stage gain amplifier is electrically connected the first stage gain amplifier in series forming an operational amplifier; and forming a second compensation branch including a second amplifier, wherein a dual relation is provided between an input stage of the first amplifier and that of the second amplifier, namely, if the input stage of the first amplifier is N-type, the input stage of the second amplifier is P-type, and vice versa. The present invention is capable of achieving the rail-to-rail output range without affecting the system stability. The N-type and P-type inputs are simultaneously applied to the input of the amplifier of the compensation branches. | 02-24-2011 |
20130043955 | SIGNAL AMPLIFICATION CIRCUITS FOR RECEIVING/TRANSMITTING SIGNALS ACCORDING TO INPUT SIGNAL - An exemplary signal amplification circuit includes an input stage, a plurality of output stages and a selecting stage. The input stage has an input node for receiving an input signal and an output node for outputting an intermediate signal. The output stages are coupled to a plurality of output ports of the signal amplification circuit, respectively. Each output stage generates a corresponding processed signal to a corresponding output port according to a gain and the intermediate signal when enabled. The selecting stage selectively couples the output node of the input stage to at least one of the output stages. The signal amplification circuit outputs a first number of processed signal(s) when operated under a first operational mode, and outputs a second number of processed signal(s) when operated under a second operational mode. | 02-21-2013 |
20130229237 | HIGH-FREQUENCY AMPLIFIER - A high-frequency amplifier includes: a first transistor having a source connected to ground; a second transistor forming a cascode circuit with the first transistor; a series circuit connected between a gate of the second transistor and the ground, the series circuit being formed by a first resistive element and a series resonant circuit connected in series with each other; and a second resistive element connected in parallel to the series circuit. The high-frequency amplifier can achieve low distortion characteristics while ensuring operational stability in a wide band. | 09-05-2013 |
20140085010 | OPERATIONAL AMPLIFIER MODULE AND METHOD FOR ENHANCING DRIVING CAPABILITY OF OPERATIONAL AMPLIFIER CIRCUIT - An operational amplifier module including an operational amplifier circuit and a comparator circuit is provided. The operational amplifier circuit includes an input stage circuit and an output stage circuit. The input stage circuit receives an input signal. The output stage circuit is coupled to the input stage circuit for enhancing the driving capability of the input signal. The comparator circuit is coupled to the output stage circuit for receiving the input signal. The comparator circuit determines whether the input signal changes so as to output an enable control signal to the output stage circuit to enhance the driving capability of the operational amplifier circuit. Furthermore, a method for enhancing the driving capability of the foregoing operational amplifier circuit is also provided. | 03-27-2014 |
20140210560 | TRIPLE CASCODE POWER AMPLIFIER - A triple cascode power amplifier is provided. The triple cascode power amplifier includes a first-stage transistor pair, a second-stage transistor pair and a third-stage transistor pair. The first-stage transistor pair comprises two first-stage transistors that respectively receive two dynamic bias voltages with opposite polarities. The second-stage transistor pair is coupled with the first-stage transistor pair to form a first node and comprise two second-stage transistors coupled with each other to form a second node. The third-stage transistor pair is coupled with the second-stage transistor pair and comprises two third-stage transistors for outputting a differential signal. The first-stage transistor pair and the second-stage transistor pair are low voltage components while the third-stage transistor pair is a high voltage component. The power amplifier transforms the differential signal into a single-ended signal for output. | 07-31-2014 |