Entries |
Document | Title | Date |
20080204147 | Method and System for Power Amplifier (PA) With On-Package Matching Transformer - Aspects of a system for a power amplifier with an on-package matching transformer may include a DC/DC converter that enables generation of a bias voltage level within an IC die based on an amplitude of an input signal to a PA circuit within the IC die. The bias voltage level may be applied to a transformer, which is external to the IC die but internal to an IC package containing the IC die and/or a circuit board containing the IC package. One or more amplifier bias voltage levels, derived from the bias voltage level applied to the transformer, may be applied to the PA circuit. | 08-28-2008 |
20080231372 | DYNAMIC BIASING AMPLIFIER APPARATUS, DYNAMIC BIASING APPARATUS AND METHOD - A dynamic biasing amplifier apparatus, and dynamic biasing apparatus, and method are disclosed. The dynamic biasing amplifier apparatus includes a comparator unit, a dynamic bias generator unit, and an amplifier unit. The amplifier unit receives an input signal and output an output signal based on at least a bias voltage. The comparator unit compares the positive and negative input signals of the amplifier unit. The dynamic bias generator unit generates and adjusts the bias voltage in accordance with the comparing result of the comparator unit. Therefore, the dynamic bias generator unit controls the amplifier unit to operate in a low static current mode when the input signal is in steady state; and the dynamic bias generator unit controls the amplifier unit to operate in a high dynamic current mode when the input signal is in transition state. | 09-25-2008 |
20080238553 | POWER AMPLIFYING DEVICE HAVING LINEARIZER - There is provided a power amplifying device having a linearizer in which a bias circuit has an initial impedance set when initially operated, then the impedance is varied according to a level of an input signal and the input signal is amplified in a broad range from a low level region to a high level region, thereby improving linearity of an output signal. The power amplifying device including: an amplifying unit receiving a bias power source and amplifying an input signal; a bias unit varying the bias power source according to a set impedance to provide to the amplifying unit; and an impedance setting unit setting the impedance of the bias unit in response to a preset control voltage when the bias unit is initially operated and re-setting the impedance of the bias unit according to a level of the input signal of the amplifying unit after initial operation of the bias unit. | 10-02-2008 |
20080278242 | Amplifier - An amplifier has a self-bias circuit to generate the bias voltage for the input of the amplifying circuit in the amplifier, thereby simplifying the circuit complexity to reduce the size and cost of the amplifier. | 11-13-2008 |
20080297259 | Configurable, Variable Gain LNA for Multi-Band RF Receiver - A configurable LNA architecture for a multi-band RF receiver front end comprises a bank of LNAs, each optimized to a different frequency band, wherein each LNA has a configurable topology. Each LNA comprises a plurality of amplifier stages, each stage including an RF transistor having a different width. The transistor widths in adjacent amplifier stages may be binary weighted, or may be sized to achieve a constant gain step. By selectively enabling and disabling RF transistors, the effective transistor width of the LNA can be controlled with a fine granularity. A DAC generates a bias voltage with a small quantization step, additionally providing a fine granularity of gain control. The LNAs are protected by overvoltage protection circuits which shield transistors from a supply voltage in excess of their breakdown voltage. A source degeneration inductor presents a real resistance at inputs of the LNAs, without introducing thermal noise. | 12-04-2008 |
20080303598 | CIRCUIT AND METHOD FOR REDUCING BIAS NOISE IN AMPLIFIER CIRCUITS - An amplifier circuit and method for reducing bias noise is disclosed. The amplifier circuit includes a passive biasing source for supplying a desired bias signal to the amplifier and an active biasing source for energizing the passive biasing source to supply the desired bias signal. The amplifier circuit also includes a decoupler for selectively decoupling the active biasing source from the passive biasing source when the amplifier is configured for amplifying an input signal so that the amplifier remains isolated from electronic noise produced by the active biasing source while still being supplied the desired bias signal by the passive source. | 12-11-2008 |
20090015337 | DEVICE AND METHOD FOR BIASING A TRANSISTOR AMPLIFIER - A device for use in biasing a transistor amplifier with a DC-voltage signal, the transistor amplifier including:
| 01-15-2009 |
20090033425 | Method and System for a Highly Efficient Power Amplifier Utilizing Dynamic Biasing and Predistortion - Aspects of a method and system for a highly efficient power amplifier (PA) utilizing dynamic biasing and predistortion are presented. Aspects of the system may include a processor that enables computation of a value of a variable bias component of a bias current based on a bias slope value and an amplitude of an envelope input signal. The processor may enable computation of a value of the bias current based on the selected constant bias current component value and the variable bias current component value. A PA may enable generation of an output signal in response to a generated baseband signal by utilizing the bias current to amplify an amplifier input signal. The bias current may be generated based on the envelope input signal. A feedback signal may be generated based on the output signal, which may be used to predistort a subsequent baseband signal. | 02-05-2009 |
20090066422 | DYNAMICALLY CONTROLLED OUTPUT SLEW RATE PAD DRIVER - Disclosed is a dynamically controlled, output slew rate pad driver that generates a controlled voltage on an interface node of an interface circuit, such as an input circuit, an output circuit, or a combined input/output circuit, to control the process of slewing the controlled voltage on the interface node. The slewing occurs substantially independently of capacitive loads connected to the interface node. Prior to initiation of the slewing process, an initial charge is generated on a storage capacitor. The storage capacitor is then connected to the gate of a driver transistor to charge the input parasitic gate capacitance of the driver transistor to approximately a gate threshold voltage of the driver transistor. A constant current source is also provided that is applied to the input of an integrating amplifier and an integrating capacitor that is connected to the interface node. The constant current is integrated to provide a controlled, slewed voltage on the interface node by charging the integrating capacitor with a constant current from the constant current source. | 03-12-2009 |
20090085669 | Method and apparatus to enhance linearity and efficiency in an RF power amplifier - Dynamic biasing techniques are used to enhance both linearity and efficiency within a transistor power amplifier. In at least one embodiment, as the power level being processed by a transistor increases toward a saturation point, a transistor is moved from class B or class AB operation toward class A operation. This increases the linearity of operation (because class A operation is typically highly linear) without a corresponding decrease in efficiency (because efficiency typically peaks near saturation). Similarly, as the power level decreases from the saturation point, the transistor is moved from class A or class AB operation toward class B operation. This increases the efficiency (because class B operation is more efficient than class A or AB), while having little effect on linearity (because operation is moving away from saturation). | 04-02-2009 |
20090108941 | TRANSCONDUCTANCE COMPENSATING BIAS CIRCUIT AND AMPLIFIER - A transconductance compensating bias circuit is disclosed that includes a first field-effect transistor (FET) having a first electrode, a second electrode, and a gate connected to the first electrode, wherein a reference current flows through the first and second electrodes; a second FET having a first electrode, a second electrode, and a gate connected to the gate of the first FET, wherein a bias current flows through the first and second electrodes; a resistor connected to the second electrode of the first or second FET; and a comparison part configured to output a signal corresponding to the result of comparison of the first potential of the first electrode of the first FET and the second potential of the first electrode of the second FET. The reference current and the bias current are controlled by the output signal of the comparison part so as to equalize the first and second potentials. | 04-30-2009 |
20090146740 | Average power efficiency enhancement and linearity improvement of microwave power amplifiers - A biasing circuit is used to provide low distortion and high efficiency operation of a microwave power amplifier. The biasing circuit utilizes the nonlinear rectified current of a microwave diode or transistor for biasing the amplifying transistor self-adaptively. The biasing current not only reduces the DC bias power during low-power operation and increases self-adaptively during high-power operation, but also manipulates the intermodulation distortion minimum dynamically. Meanwhile, the biasing circuit distorts the input signals with positive gain and negative phase deviations. Therefore, the average power efficiency of the operation is enhanced, the linearity of the input-output characteristic is improved and the radiated level of adjacent channel power is suppressed. | 06-11-2009 |
20090160558 | RF AMPLIFIER - Provided is a radio frequency (RF) amplifier. The RF amplifier includes an amplification circuit amplifying an RF signal, a bias voltage generation circuit supplying a bias voltage of the amplification circuit, and a first bias resistor connected between the amplification circuit ad the bias voltage generation circuit, and having a predetermined resistance allowing the bias voltage to be affected by the RF signal. | 06-25-2009 |
20090184770 | DEVICE AND METHOD FOR BIASING A TRANSISTOR AMPLIFIER - Provided is circuitry for biasing a transistor amplifier with a DC-voltage signal, the transistor amplifier having a first input terminal, a second input terminal, and an output terminal coupled to the second input terminal. The circuitry includes a sensor capacitor connected to the first input terminal and an impedance transistor arranged in parallel with said capacitor, the transistor and capacitor forming a low-pass filter. The circuitry also includes a biasing circuit configured to controllably vary a DC-voltage signal for operatively biasing the amplifier, the biasing circuit including a cascaded current arrangement configured to subdivide a reference current into smaller currents for selectively generating voltage potentials for biasing the impedance transistor to adjustably filter a noise component of the DC-voltage signal via the low-pass filter before the DC-voltage signal is provided to the first input terminal. | 07-23-2009 |
20090195318 | Self Regulating Biasing Circuit - A disclosed self regulating biasing circuit (SRBC) includes an unregulated node that couples to an unregulated power supply that produces a supply voltage. An impedance element of the SRBC carries an unregulated current having a nominal component and a variance component between an unregulated node and a regulated node. A detection circuit connected between the unregulated node and a third node detects a variance component of a supply voltage and generates a detection current based on the variance component. A compensation circuit connected to the third node draws a compensation current, based on the detection current, from the regulated node. The SRBC is designed wherein the compensation current is approximately equal to the variance component of the unregulated current. The regulated node may be connected to a control terminal of a transistor to be biased. | 08-06-2009 |
20090195319 | Large Time Constant Steering Circuit and Instrumentation Amplifier Implementing Same - The present invention relates to a large time constant steering circuit for slowly changing a voltage on a node between at least two discrete voltage levels. The present invention further relates to a slow steering current DAC comprising said large time constant steering circuit. The present invention further relates to an instrumentation amplifier device comprising a current balancing instrumentation amplifier for amplifying an input signal to an amplified output signal and a DC servo-loop for removing a DC-component from the input signal. The present invention further relates to an EEG acquisition ASIC comprising said instrumentation amplifier device. | 08-06-2009 |
20090206934 | AMPLIFIER AUTO BIASING - This disclosure relates to monitoring signal overshoot of an amplifier generated signal and automatically adjusting a quiescent current of the amplifier as a function of the monitored signal overshoot. | 08-20-2009 |
20090243729 | CONTROLLING OVERLOAD OF A TRANSIMPEDANCE AMPLIFIER IN AN OPTICAL TRANSCEIVER - Briefly, in accordance with one or more embodiments, a transimpedance amplifier of an optical transceiver or the like has a feedback element in a feedback arrangement and is capable of receiving an electrical current from an optical-to-electrical converter to generate an output voltage in response to the electrical current. A control circuit coupled to the feedback element is capable of providing a control signal to control a bias current of the transimpedance amplifier to maintain DC current flowing through the feedback element at or near zero by changing the bias current in response to the control circuit detecting a non-zero DC current flowing through the feedback element. | 10-01-2009 |
20090251220 | RADIO-FREQUENCY POWER AMPLIFIER - A bias circuit operable to supply a bias current to a first transistor includes: a second transistor having a collector terminal connected to a first power supply; a first resistance element having one end connected to an emitter terminal of the second transistor and having the other end connected to a base terminal of the first transistor; a second resistance element having one end connected to the emitter terminal of the second transistor and having the other end connected to ground potential; at least one third resistance element provided between a base terminal of the second transistor and a second power supply; and a plurality of temperature compensation circuits connected to the base terminal of the second transistor which are operable to control a base potential of the second transistor so that the potential falls as a temperature rises. | 10-08-2009 |
20090284317 | SOURCE DRIVER OF A DISPLAY, OPERATIONAL AMPLIFIER, AND METHOD FOR CONTROLLING THE OPERATIONAL AMPLIFIER THEREOF - A source driver of a display includes a digital-to-analog converter, an output switch, and an operational amplifier. The operational amplifier is coupled to digital-to-analog converter for driving at least a date line of the display according to the analog pixel signal via the output switch. The operational amplifier receives a bias current, wherein the bias current is boosted only when the output switch is turned off. | 11-19-2009 |
20090295486 | OPERATIONAL AMPLIFIER HAVING ADJUSTABLE BIAS CURRENT AND RELATED SOURCE DRIVER OF DISPLAY THEREOF - An operational amplifier includes an amplifying circuit and a bais current generating circuit. The bias current generating circuit generates a bias current to the amplifying circuit. The amplifying circuit comprises a current adjusting unit and a current mirror. The current adjusting circuit has a storage element, receives a reference current and generating a passing current. The passing current is gradually adjusted utilizing the storage element according to a control signal. The current mirror receives the passing current to generate the bias current. | 12-03-2009 |
20090302949 | BIAS CIRCUIT AND AMPLIFIER USING THE SAME - A bias circuit including: a first current source which generates a first current; a second current source which generates a second current having a temperature-to-output current characteristic that an output current characteristic increases or decreases with a change in temperature to intersect with that of the first current; a first current-voltage conversion circuit which converts the first current to a first voltage; a second current-voltage conversion circuit which has an input terminal and converts a current inputted into the input terminal to a second voltage; a comparison circuit which compares the first voltage and the second voltage and generates a third current according to a result of the comparison; an addition unit which adds the third current to the second current and inputs a resulting current to the input terminal; and a voltage-current conversion circuit which converts the second voltage to a fourth current for bias. | 12-10-2009 |
20090309663 | POWER AMPLIFIERS HAVING IMPROVED PROTECTION AGAINST AVALANCHE CURRENT - A power amplifier for use in a radio frequency (RF) transmitter or other device exhibits improved protection from voltage standing wave ratio (VSWR) issues emanating from avalanche currents. The amplifier circuit includes a power transistor having a base terminal, and a mirror transistor having a collector terminal and a base terminal. The base terminal is coupled to the collector terminal of the mirror transistor to thereby provide a bias current to the base terminal of the mirror transistor. The base terminal is also coupled to the base terminal of the power transistor to thereby form a base bias feed node for a current mirror arrangement. A static or variable impedance is coupled to the base bias feed node to sink current and to thereby maintain the proper bias current at the base terminal of the mirror transistor to thereby continue operation of the mirror transistor while avalanche conditions exist. | 12-17-2009 |
20100013560 | SYSTEM AND METHOD FOR REDUCING FLICKER NOISE FROM CMOS AMPLIFIERS - A technique is provided for acquiring data with reduced correlated low frequency noise interference via a data acquisition circuit. The data acquisition circuit includes a plurality of data channels comprising a plurality of amplifiers and a biasing circuit for providing bias voltages to the plurality of amplifiers. The biasing circuit is configured to generate the bias voltages and establish a relationship between the bias voltages so as to reduce correlated low frequency noise in the plurality of amplifiers. | 01-21-2010 |
20100019852 | Bias Circuit with a Feedback Path and a Method for Providing a Biasing Signal - Embodiments of the invention show a bias circuit for providing a biasing signal at a bias connection. The bias circuit includes a bias transistor and a feedback node, wherein the feedback node is coupled to a control terminal of the bias transistor via a first impedance element. The feedback node is furthermore coupled to the bias connection via a second impedance element. The control terminal of the bias transistor is coupled to the bias connection via a bypass-coupling path, which bypasses the first impedance element and the second impedance element, such that there is a feedback path via the bypass-coupling path and via the bias transistor from the bias connection to the feedback node. | 01-28-2010 |
20100026390 | DETECTOR CIRCUIT AND SYSTEM FOR A WIRELESS COMMUNICATION - Provided are a detector circuit which has a simple circuit configuration, is capable of indicating an accurate power according to a load fluctuation of a radio frequency power amplifier or a difference in a modulation mode, and can be easily incorporated in the radio frequency power amplifier, and a wireless communication system using the detector circuit. The detector circuit 10 includes a detecting resistor 11 for detecting a part of a current flowing from a bias circuit 6, and a current-voltage conversion circuit 12 for converting a current obtained through the detecting resistor 11 into a voltage. A current supplied from the bias circuit 6 to the amplifying transistor 1 is detected, so that an output current from the amplifying transistor 1 fluctuates when a load on the radio frequency power amplifier fluctuates, and an input current and a current from the bias circuit fluctuate in proportion to the output current from the amplifying transistor 1, whereby an outputted detection voltage can follow a load fluctuation on the radio frequency power amplifier. | 02-04-2010 |
20100026391 | AMPLIFIER - There is provided a method and apparatus for maintaining a bias current (I | 02-04-2010 |
20100045386 | AMPLIFIER CIRCUIT - The invention relates to a circuit arrangement ( | 02-25-2010 |
20100052793 | Resonant operating mode for a transistor - The PN junctions of a transistor are biased for operation in the active mode but an initial flow of current reverses the bias of the base-emitter junction causing the transistor to conduct a resonant current with a voltage less than the forward junction voltage of said base-emitter. | 03-04-2010 |
20100052794 | METHOD AND SYSTEM FOR IMPROVING EFFICIENCY OVER POWER CONTROL FOR LINEAR AND CLASS AB POWER AMPLIFIERS - Aspects of a system for improving efficiency over power control for linear and class AB power amplifiers may include a current source circuit that enables determination of a bias current level for a PA circuit within an IC die based on an amplitude of an input modulation signal. The PA circuit may enable generation of an output signal based on a differential input signal and the input modulation signal to the current source circuit. A generated bias voltage may be applied to a transformer external to the IC die, but internal to an IC package containing the IC die and/or a circuit board containing the IC package. One or more amplifier bias voltage levels may be applied to the PA circuit wherein the amplifier bias voltage levels may be derived from the generated bias voltage level and/or the determined bias current level. | 03-04-2010 |
20100060360 | SWITCH-LESS BIDIRECTIONAL AMPLIFIER - A bi-directional amplifier, transceiver, integrated circuit, mobile unit, telecommunication infrastructure for amplification of signals received or signals to be transmitted in a communication circuit and a method for bi-directional amplification comprising amplifying signals in a bi-directional amplifier and directing a signal between two or more different paths comprising at least one first biased semiconductor amplification element coupled to a at least one first impedance matching network, at least one second biased semiconductor amplification element coupled to a second impedance matching network, a first device for biasing the at least one first biased semiconductor amplification element and a second device for biasing the at least one second biased semiconductor amplification element where the direction of signal amplification in said bi-directional amplifier is controlled by the first or second device for biasing the at least one first or second biased semiconductor amplification element. | 03-11-2010 |
20100060361 | BIAS BALANCING CIRCUIT - The invention discloses a bias balancing circuit. The bias balancing circuit is used for balancing an output voltage outputted by an amplifier module. The amplifier module has a variable gain. The bias balancing circuit comprises a comparator and a voltage selector. The comparator is used for comparing the output voltage and a reference voltage, to generate a comparison signal. The voltage selector is used for generating a selected voltage according to the comparison signal. When the variable gain is changed to result in an offset from the output voltage to the reference voltage, the bias balancing circuit is capable of balancing the output voltage toward the reference voltage by the selected voltage. | 03-11-2010 |
20100066453 | AMPLIFIER WITH COMPENSATED GATE BIAS - An amplifier circuit has an amplifier stage ( | 03-18-2010 |
20100066454 | HIGH-POWER COMMON-BASE AMPLIFIER EMPLOYING CURRENT SOURCE OUTPUT BIAS - A common-base amplifier for a bipolar junction transistor or a heterojunction bipolar transistor employs an active current source output biasing to provide for improved power output in a power saturation region providing increased power for a given transistor area such as may be advantageous in mobile radio transmitters or the like. | 03-18-2010 |
20100085120 | ADAPTIVE BIAS TECHNIQUE FOR FIELD EFFECT TRANSISTOR - A power amplifier includes a LDMOS transistor having a source, a drain, a control gate and a shielding electrode positioned between the control gate and the drain, and means for adaptively biasing the drain and shielding electrode power information for a RF signal. | 04-08-2010 |
20100097147 | GATE BIAS CIRCUIT - Multiple unit transistors each having the same gate length are arranged in a gate-lengthwise direction to form a group of unit transistors. At least one unit transistor included in the group of unit transistors is used as a part of a gate bias circuit and acts as unit transistor ( | 04-22-2010 |
20100109779 | HYBRID CLASS AB SUPER FOLLOWER - Various embodiments of a hybrid class AB super follower circuit are provided. One embodiment is a follower circuit comprising: an input node for receiving an input voltage signal; an output node for driving a capacitive load based on the input voltage signal; a transistor M | 05-06-2010 |
20100109780 | Flexible Dynamic Range Amplifier - An amplifying device ( | 05-06-2010 |
20100109781 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device includes: an amplifier circuit which respectively has one or more input terminals and one or more output terminals; a replica circuit which has the same DC characteristics as those of the amplifier circuit; a reference voltage generation circuit which is connected to a bias terminal of the replica circuit, and which generates a predetermined reference voltage at the bias terminal; and a feedback circuit which takes a difference between the reference voltage generated at the bias terminal of the replica circuit and the voltage generated at a bias terminal of the amplifier circuit, and which performs feedback control by providing negative feedback of the difference to the bias terminal of the amplifier circuit so that the voltage generated at the bias terminal of the amplifier circuit is made equal to the reference voltage generated at the bias terminal of the replica circuit. | 05-06-2010 |
20100109782 | FET BIAS CIRCUIT - A FET bias circuit applies a bias voltage that is not adjusted separately to an amplifying element FET of a FET amplifying circuit. In the FET bias circuit is provided a monitor element FET m having a gate connected to the gate of the amplifying element FET a and a source connected to the source of the amplifying element FET a, respectively, and having a drain current with respect to the bias voltage substantially proportional to the drain current of the amplifying element FET a. In the FET bias circuit is further provided a fixed bias circuit for applying the bias voltage so that the amplifying element FET a enters a predetermined operating class by applying a bias voltage to the monitor element FET m so that a drain current flowing to the monitor element FET m enters a predetermined operating class. | 05-06-2010 |
20100127781 | RADIO FREQUENCY POWER AMPLIFIER - A radio frequency signal is input to the bases of transistors via respective capacitors, is amplified, and is output from the collectors of the transistors. The emitter of each transistor is grounded. A bias current input from a bias circuit is supplied to the bases of the transistors via respective resistors both during low-output operation and during high-output operation. The collectors of the transistors are connected via an impedance circuit to a bias voltage input terminal. Therefore, during high-output operation, a direct current offset voltage is generated by the impedance circuit based on a portion of a radio frequency signal output from the collectors, thereby further increasing the bias current. | 05-27-2010 |
20100148878 | AMPLIFIER WITH DITHER - An analog amplifier includes at least one signal path. Each of the at least one signal path extends between an input and an output and includes a load device coupled to the output and a transistor coupled to the input. The analog amplifier further includes a dither current source selectively coupled to one of the at least one signal path. The dither current source is capable of supplying dither current to the load device of the selected signal path directly by bypassing the transistor of the selected signal path. | 06-17-2010 |
20100164629 | METHOD AND SYSTEM FOR A HIGHLY EFFICIENT POWER AMPLIFIER UTILIZING DYNAMIC BAISING AND PREDISTORTION - Aspects of a method and system for a highly efficient power amplifier (PA) utilizing dynamic biasing and predistortion are presented. Aspects of the system may include a processor that enables computation of a value of a variable bias component of a bias current based on a bias slope value and an amplitude of an envelope input signal. The processor may enable computation of a value of the bias current based on the selected constant bias current component value and the variable bias current component value. A PA may enable generation of an output signal in response to a generated baseband signal by utilizing the bias current to amplify an amplifier input signal. The bias current may be generated based on the envelope input signal. A feedback signal may be generated based on the output signal, which may be used to predistort a subsequent baseband signal. | 07-01-2010 |
20100188155 | CLOSED LOOP RAMP UP FOR POP AND CLICK REDUCTION IN AN AMPLIFIER - To reduce pop or click during turn-on, a method and apparatus are provided. Initially, a plurality of current sources in the amplifier is actuated. The amplifier is transitioned from an off-state to an on-state in a class B amplifier mode by de-coupling each input node of an output stage of the amplifier from a voltage rail, and the amplifier is transitioned from the on-state in the class B amplifier mode to an on-state in a class AB amplifier mode by actuating at least a portion of an intermediate circuit in the amplifier. | 07-29-2010 |
20100207692 | BIAS CIRCUIT AND CONTROL METHOD FOR BIAS CIRCUIT - A bias circuit for applying a bias voltage to a nonlinear amplification circuit, including a constant-current source; and a first, second, third, and fourth transistors, wherein a current mirror circuit is configured by the first transistor and the second transistor, and the bias voltage is outputted from the drain of the second transistor, gate lengths and gate widths of the first and second transistor are the same, gate lengths of the first to fourth transistor are the same, and gate lengths and gate widths of the first, second, third, and fourth transistor are configured so that k | 08-19-2010 |
20100214022 | BI-DIRECTIONAL AND ADJUSTABLE CURRENT SOURCE - A Bi-Directional and Adjustable Current Source (“BACS”) for providing an amplifier input with a voltage signal that is linear, where an output of the BACS and the amplifier input are shunted with a capacitor, is described. The BACS may include a first switch in signal communication with a high voltage reference and a first current source in signal communication with the first switch. The BACS may also include a second switch in signal communication with a low voltage reference and a second current source in signal communication with the second switch. The BACS may further include a directional current element in signal communication with both the first current source, the second current source, the output of the BACS, the amplifier input, and the capacitor, where the directional current element is configured to prevent current flow from the output BACS to the first current source. | 08-26-2010 |
20100231303 | METHOD AND SYSTEM FOR POWER AMPLIFIER (PA) WITH ON-PACKAGE MATCHING TRANSFORMER - Aspects of a system for a power amplifier with an on-package matching transformer may include a DC/DC converter that enables generation of a bias voltage level within an IC die based on an amplitude of an input signal to a PA circuit within the IC die. The bias voltage level may be applied to a transformer, which is external to the IC die but internal to an IC package containing the IC die and/or a circuit board containing the IC package. One or more amplifier bias voltage levels, derived from the bias voltage level applied to the transformer, may be applied to the PA circuit. | 09-16-2010 |
20100237950 | TRANSCONDUCTANCE BIAS CIRCUIT, AMPLIFIER AND METHOD - Methods, circuits and apparatus for biasing an amplifier to maintain consistent operational characteristics over variations in fabrication processes and operational temperature conditions are disclosed. A bias is determined by first comparing output voltages of replica circuits of the amplifier during an offset canceling phase. The output voltages are differently driven by an offset induced by a first reference current and the offset is canceled in response to the first comparing step. The output voltages are secondly compared during a calibration phase and a calibration bias current is adjusted in response to the second comparing step. The amplifier bias is determined based on the calibration bias current. The process is periodically repeated in response to operational variations. | 09-23-2010 |
20100264991 | SWITCHED CAPACITOR VOLTAGE CONVERTER FOR A POWER AMPLIFIER - A voltage converter includes a plurality of capacitors and corresponding first switch elements, the capacitors coupled in series and arranged to each charge to a voltage level during a first clock period, the voltage level determined by a supply voltage level, the number of capacitors and a value of each capacitor; and a plurality of second switch elements configured to cause the plurality of capacitors to be connected in parallel and to discharge into an output capacitor during a second clock period, the output capacitor charged to a discrete voltage output level so that the output capacitor provides the discrete voltage output level, wherein the discrete voltage output level is less than the supply voltage level and wherein the discrete voltage output level is used to develop a bias signal that is supplied to a power amplifier element. | 10-21-2010 |
20100271135 | CMOS RF POWER AMPLIFIER WITH LDMOS BIAS CIRCUIT FOR LARGE SUPPLY VOLTAGES - Bias circuitry that may be used within a communications or other device includes a first current mirror having first and second transistors with sources coupled to ground and operable to receive a reference current at a drain of first transistor. A second current mirror has first and second transistors with drains coupled to a battery voltage supply. A third current mirror has first and second transistors with drains coupled to sources of the first and second transistors of the second current mirror, respectively. A biasing transistor couples between the second transistor of the first current mirror and the first transistor of the third current mirror and operable to receive a tuning input voltage at its gate. A resistive element coupled between the second transistor of the third current mirror and ground produces a bias voltage produced at a connection of the resistive element and the second transistor of the third current mirror. | 10-28-2010 |
20100277242 | DC Series-Fed Amplifier Array - There is disclosed an amplifier module which may include a plurality of N circuit devices, each of which may have at least two stages of amplification. Each circuit device may additionally have a DC input power terminal, a DC power return terminal, and at least one bias voltage terminal. The DC power terminals of the N circuit devices may be connected in series. A bias voltage network may have at least N taps, and each of the N taps may be connected to a bias voltage terminal of a corresponding one of the N circuit devices. | 11-04-2010 |
20100301948 | Low Noise Amplifier and Mixer - A low noise amplifier (LNA) system with controllable linearity and noise figure versus power consumption is provided. The system comprises two control inputs for tuning. One input controls an effective transistor width, and the other input controls bias current. Changes to the effective transistor width alter a gain that is applied to a signal, and changes to the bias current alter a power consumption of the system. For more stringent signal specifications, an impedance matched inductive degeneration variation of the LNA is provided. | 12-02-2010 |
20100301949 | INTERNAL POWER SUPPLY CIRCUIT, SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - To provide an internal power supply circuit that supplies a power supply voltage to an internal circuit of a semiconductor device via an internal power supply wiring, the internal power supply circuit includes a plurality of power supply units connected in common to the internal power supply wiring and an internal-power-supply control circuit that selects either activation or deactivation with regard to at least a part of the power supply units. | 12-02-2010 |
20100308921 | LEAKAGE CURRENT REDUCTION IN A POWER REGULATOR - A regulator with decreased leakage and low loss for a power amplifier is described. Switching circuitry is used to connect the regulator input bias to a bias control voltage when the power amplifier is to be operated in an on condition or to a voltage generator when the power amplifier is to be operated in an off condition. | 12-09-2010 |
20100327978 | TEMPERATURE COMPENSATED SELF-BIAS DARLINGTON PAIR AMPLIFIER - A Darlington pair amplifier includes a temperature compensation device. In one case, the device is a resistor connected in series between: (a) an intermediate node of two bias resistors for the Darlington pair, and (b) the control terminal of the Darlington pair. In another case, the device is a second, smaller, Darlington pair connected in series with the two bias resistors for the first Darlington pair. In still another case, the device is a combination of: (1) a resistor connected in series between: (a) an intermediate node of the two bias resistors for the Darlington pair, and (b) the control terminal of the Darlington pair; and (2) a second, smaller, Darlington pair connected in series with the two bias resistors for the first Darlington pair. | 12-30-2010 |
20110012682 | ELECTRONIC CIRCUIT WITH CASCODE AMPLIFIER - An electronic circuit has an amplifier with an amplifying transistor ( | 01-20-2011 |
20110018638 | SPLIT-BIASED CURRENT SCALABLE BUFFER - Disclosed are circuits, techniques and methods for buffering a high frequency signal for transmission over an integrated circuit. In one particular implementation, a plurality of amplification circuits are individually biased for amplifying a signal from a voltage controlled oscillator and/or digitally controlled oscillator to provide a local oscillator signal on a device. | 01-27-2011 |
20110018639 | POWER AMPLIFIER BIAS CIRCUIT - A power amplifier and bias circuit includes a combination circuit in which a voltage drive bias circuit and a current drive bias circuit are connected in a parallel relationship with each other. The power amplifier bias circuit also includes an idle current control circuit which uses the collector voltage of amplifier transistors. When the collector voltage of the amplifier transistors is lower than the threshold voltage of a first transistor (approximately 1.3 V), the first transistor is turned off. At that time, since the reference voltage (2.4-2.5 V) is higher than the voltage for turning on both a second transistor and a diode (namely, approximately 1.3 V plus 0.7 V), a current flows and the first transistor turns on. As a result, a current is drawn from the bases of the amplifier transistors to GND through two resistances, so that the idle currents of the amplifier transistors decrease. | 01-27-2011 |
20110025422 | POWER AMPLIFIER BIAS CURRENT MONITOR AND CONTROL MECHANISM - Techniques for monitoring and controlling bias current of amplifiers are described. In an exemplary design, an apparatus may include an amplifier and a bias circuit. The amplifier may include at least one transistor coupled to an inductor. The bias circuit may generate at least one bias voltage for the at least one transistor in the amplifier to obtain a target bias current for the amplifier. The bias circuit may generate the at least one bias voltage based on a voltage across the inductor in the amplifier, or a current through a current mirror formed with one of the at least one transistor in the amplifier, or a gate-to-source voltage of one of the at least one transistor in the amplifier, or a voltage in a replica circuit replicating the amplifier, or a current applied to the amplifier with a switched mode power supply disabled. | 02-03-2011 |
20110037521 | POWER AMPLIFIER HAVING DEPLETION MODE HIGH ELECTRON MOBILITY TRANSISTOR - Provided is a power amplifier including: a depletion mode high electron mobility transistor (D-mode HEMT) configured to amplify a signal inputted to a gate terminal and output the amplified signal through a drain terminal; an input matching circuit configured to serially ground the gate terminal; and a DC bias circuit connected between the drain terminal and a ground. Through the foregoing configuration, the HEMT may be biased only by a single DC bias circuit without any biasing means to provide a negative voltage. Also, superior matching characteristic may be provided in various operation frequency bands through a shunt inductor and a choke inductor. | 02-17-2011 |
20110043287 | ADAPTIVE BIAS CIRCUIT AND SYSTEM THEREOF - An adaptive bias circuit which provides a more sensitive adaptive bias current with respect to power level is used for biasing an electronic circuit. The adaptive bias circuit has a first transistor coupled to a power supply, a voltage bias circuit coupled to the first transistor and the power supply biasing the first transistor, and a first power coupling module coupled to the first transistor and the electronic circuit for coupling a portion of input signal power to the first transistor. A second transistor is coupled to the first transistor and the power supply to increase the current gain of the adaptive bias circuit, and a second current coupling module is coupled to the second transistor and the electronic circuit to provide adaptive bias current to the electronic circuit. | 02-24-2011 |
20110074512 | CIRCUIT AND METHOD FOR BIASING A GALLIUM ARSENIDE (GaAs) POWER AMPLIFIER - A circuit for biasing a gallium arsenide (GaAs) power amplifier includes a reference voltage generator circuit implemented in a gallium arsenide (GaAs) material system, a field effect transistor (FET) bias circuit implemented in the gallium arsenide material system and adapted to receive an output of the reference voltage generator circuit and adapted to provide an output to a radio frequency (RF) amplifier stage. | 03-31-2011 |
20110084767 | Active bias control circuit for an amplifier and method of power up sequencing the same - An active bias control circuit for an amplifier includes a low dropout regulator for providing a regulated voltage to provide an input current to the amplifier, and a current sense circuit responsive to the low dropout regulator for sensing a scaled down replica of the input current to the amplifier. An amplifier control circuit adjusts a control voltage to the amplifier in response to the sensed, scaled down replica of the input current to regulate the input current to the amplifier. A method for power up sequencing an amplifier for an active bias control circuit for the amplifier is also disclosed. | 04-14-2011 |
20110090011 | POWER AMPLIFIER - An adaptive bias power amplifier including an amplifier, a signal coupler, a power detector and a bias control circuit is provided. The signal coupler is connected to an input terminal of the amplifier. The power detector is connected to the signal coupler, and detects an input power of the amplifier via the signal coupler. The bias control circuit is connected to an output terminal of the power detector and the input terminal of the amplifier. The bias control circuit adjusts a gate bias of the amplifier in accordance with a detecting result of the power detector. | 04-21-2011 |
20110090012 | CIRCUIT AND METHOD FOR RADIO FREQUENCY AMPLIFIER - A radio frequency amplifier circuit includes a substrate that is capable of receiving a substrate bias voltage. The source of a transistor is capable of receiving a source bias voltage. The drain of the transistor is capable of receiving a drain bias voltage. The gate of the transistor is located between the source and the drain. A radio frequency input signal is coupled to the gate. A substrate bias circuit provides the substrate bias voltage. The substrate bias voltage and the source bias voltage forward bias the first diode formed by the source and the substrate. The substrate bias voltage and the drain bias voltage reverse bias the second diode formed by the drain and the substrate. | 04-21-2011 |
20110090013 | FIELD-EFFECT TRANSISTOR AMPLIFIER - A field-effect transistor amplifier is provided, which can maintain excellent RF characteristics and, at the same time, can improve current variation. The field-effect transistor amplifier according to the present invention comprises a field-effect transistor which amplifies an input signal supplied to a gate terminal thereof and outputs the amplified signal from a drain terminal thereof, and a self-bias circuit coupled to a source terminal of the field-effect transistor. The self-bias circuit comprises a resistor, a capacitor, and an adjusting circuit which adjusts RF (high frequency) characteristics and DC (direct current) characteristics. The resistor, the capacitor, and the adjusting circuit are coupled in parallel with each other, and one end of each of them is coupled to the source terminal and the other end is coupled to a ground. | 04-21-2011 |
20110090014 | Switched active bias control and power-on sequencing circuit for an amplifier - An active bias control circuit for an amplifier includes a switch responsive to a supply voltage for providing an input current to the input of the amplifier, and a current sense circuit coupled to the switch for sensing a scaled down replica of the input current to the amplifier. A first amplifier control circuit is responsive to the current sense circuit for adjusting a first control voltage to the amplifier in response to the sensed, scaled down replica of the input current to regulate the input current to the amplifier. Circuitry for power up sequencing an amplifier for an active bias control circuit for the amplifier is also disclosed. | 04-21-2011 |
20110156819 | Low-Noise High Efficiency Bias Generation Circuits and Method - A bias generation method or apparatus defined by any one or any practical combination of numerous features that contribute to low noise and/or high efficiency biasing, including: having a charge pump control clock output with a waveform having limited harmonic content or distortion compared to a sine wave; having a ring oscillator to generating a charge pump clock that includes inverters current limited by cascode devices and achieves substantially rail-to-rail output amplitude; having a differential ring oscillator with optional startup and/or phase locking features to produce two phase outputs suitably matched and in adequate phase opposition; having a ring oscillator of less than five stages generating a charge pump clock; capacitively coupling the clock output(s) to some or all of the charge transfer capacitor switches; biasing an FET, which is capacitively coupled to a drive signal, to a bias voltage via an “active bias resistor” circuit that conducts between output terminals only during portions of a waveform appearing between the terminals, and/or wherein the bias voltage is generated by switching a small capacitance at cycles of said waveform. A charge pump for the bias generation may include a regulating feed back loop including an OTA that is also suitable for other uses, the OTA having a ratio-control input that controls a current mirror ratio in a differential amplifier over a continuous range, and optionally has differential outputs including an inverting output produced by a second differential amplifier that optionally includes a variable ratio current mirror controlled by the same ratio-control input. The ratio-control input may therefore control a common mode voltage of the differential outputs of the OTA. A control loop around the OTA may be configured to control the ratio of one or more variable ratio current mirrors, which may particularly control the output common mode voltage, and may control it such that the inverting output level tracks the non-inverting output level to cause the amplifier to function as a high-gain integrator. | 06-30-2011 |
20110175681 | RADIO FREQUENCY POWER AMPLIFIER AND WIRELESS COMMUNICATION DEVICE INCLUDING THE SAME - To provide a radio frequency power amplifier that realizes a favorable high-frequency characteristic without using an isolator and also achieves low power consumption. The radio frequency power amplifier includes: a power amplifier which amplifies a radio frequency signal; a voltage supplying unit which supplies a collector voltage to the power amplifier; a current supplying unit which supplies a bias current to the power amplifier; and a bias current detecting unit which detects the bias current. The voltage supplying unit has a control unit which sets the power supply voltage at: a first voltage when the detected bias current is lower than a bias-current reference value; and a second voltage lower than the first voltage when the detected bias current is higher than the bias-current reference value. | 07-21-2011 |
20110187459 | EMITTER-FOLLOWER TYPE BIAS CIRCUIT - An emitter-follower bias circuit supplying a bias voltage to the base of an amplification transistor includes: a depletion mode FET boosting a reference voltage; and an emitter-follower circuit generating the bias voltage in response to the reference voltage boosted by the depletion mode FET. | 08-04-2011 |
20110193635 | WIDE BAND LNA WITH NOISE CANCELING - Techniques to improve low noise amplifiers (LNAs) with noise canceling are described. LNA includes a first and a second amplifier which work together to noise cancel the noise generated at an input stage circuit. The input stage circuit receives an RF signal and is characterized by a first node and a second node. The first amplifier converts a noise voltage at the first node into a first noise current at an output of the first amplifier. The second amplifier is directly coupled to the output of the first amplifier and provides noise canceling by summing the first noise current with a second noise current generated by the second amplifier as a function of the noise voltage at the second node. The proposed techniques eliminate the need for large ac coupling capacitors and reduce the die size occupied by the LNA. The elimination of ac coupling capacitors between amplification stages of the LNA allows current reuse resulting in reduced current consumption. | 08-11-2011 |
20110193636 | LINEARIZATION CIRCUITS AND METHODS FOR POWER AMPLIFICATION - Linearization circuits of the invention are used in conjunction with power amplification circuits that comprise a power amplifier core. Exemplary linearization circuits comprise a replica of the power amplifier core. In operation, the linearization produces an envelope signal from an RF signal. The envelope signal is used to control the replica to produce an analog output signal which represents the inverse of the AM to AM distortion of the power amplifier core. The linearization circuit then biases the RF signal with the inverted non-linear signal of the replica to control the power amplifier core. The power amplifier core and the replica thereof can be defined on the same semiconductor die so both respond to process variables similarly. | 08-11-2011 |
20110204981 | BIAS CIRCUIT AND AMPLIFIER PROVIDING CONSTANT OUTPUT CURRENT FOR A RANGE OF COMMON MODE INPUTS - Bias circuits, amplifiers and methods are provided, such as those for providing bias signals over a range of common mode inputs for an amplifier to output a constant current. One example of a bias circuit is configured to generate a bias signal having a voltage magnitude according to a reference signal. The reference signal is indicative of a common mode input level of an input signal of the amplifier circuit and the bias circuit is further configured to adjust the bias signal over a range of common mode input levels. An amplifier receiving the bias signal is configured to generate an output signal in response to an input signal and drive an output current based on the voltage magnitude of the bias signal provided by the bias circuit. | 08-25-2011 |
20110227654 | POWER AMPLIFYING APPARATUS AND POWER AMPLIFYING METHOD - A power amplifying apparatus according to an embodiment includes a first amplifying unit having a first amplifying element to amplify an input signal, a second amplifying unit having a second amplifying element to amplify an output signal from the first amplifying unit; and a bias supply unit giving bias values to the first amplifying element and the second amplifying element, respectively, the bias values causing the first amplifying element and the second amplifying element to operate in a non-linear region. | 09-22-2011 |
20110234322 | APPARATUS AND METHOD FOR REDUCING CURRENT NOISE - An input bias current cancellation circuit includes reference transistors placed in series and a current summation network. The current summation network can be configured to sum the base currents of the reference transistors to produce a summed current. A current mirror can be provided to attenuate the summed current to produce input bias cancellation currents. The input bias cancellation currents can be provided to the base inputs of an input bipolar differential pair, thereby reducing input current noise. | 09-29-2011 |
20110241783 | DETECTOR CIRCUIT AND SYSTEM FOR A WIRELESS COMMUNICATION - Provided are a detector circuit which has a simple circuit configuration, is capable of indicating an accurate power according to a load fluctuation of a radio frequency power amplifier or a difference in a modulation mode, and can be easily incorporated in the radio frequency power amplifier, and a wireless communication system using the detector circuit. The detector circuit | 10-06-2011 |
20110254630 | POWER AMPLIFIER PROTECTION - A power amplifier, for example a class-E switching power amplifier, and corresponding method, comprising: a plurality of power transistors ( | 10-20-2011 |
20110260798 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device includes: a substrate which has a first conductivity type and in which a first amplifier area and a second amplifier area are defined; a first well which has a second conductivity type, a first pocket well which has the first conductivity type and is separated from the first well, and a first deep well which has the second conductivity type, surrounds the first pocket well, and is separated from the first well; and a second well which has the second conductivity type, a second pocket well which has the first conductivity type and is separated from the second well, and a second deep well which has the second conductivity type, surrounds the second pocket well, and is separated from the second well The first well, the first pocket well, and the first deep well are formed in the first amplifier area of the substrate, and the second well, the second pocket well, and the second deep well are formed in the second amplifier area of the substrate. | 10-27-2011 |
20110279185 | METHOD AND SYSTEM FOR PROVIDING AUTOMATIC GATE BIAS FOR FIELD EFFECT TRANSISTORS - The present invention provides a feedback gate bias circuit for use in radio frequency amplifiers to more effectively control operation of LDFET, GaNFET, GaAsFET, and JFET type transistors used in such circuits. The invention provides a transistor gate bias circuit that senses drain current and automatically adjusts or biases the gate voltage to maintain drain current independently of temperature, time, input drive, frequency, as well as from device to device variations. The invention provides additional circuits to provide temperature compensation, RF power monitoring and drain current control, RF output power leveler, high power gain block, and optional digital control of various functions. | 11-17-2011 |
20110298545 | RF POWER AMPLIFIER DEVICE AND OPERATING METHOD THEREOF - An RF power amplifier device includes a driver stage amplifier, a first RF amplifier, a second RF amplifier and a DC voltage converter operated by first, second and third external power supply voltages. The output of the driver stage amplifier is supplied to the inputs of the first and second RF amplifiers. An effective device size of the first RF amplifier is set to a device size larger than that of the second RF amplifier. The third external power supply voltage is supplied to the DC voltage converter, so that the DC voltage converter generates a fourth operating power supply voltage corresponding to a low voltage and supplies it to an output terminal of the second RF amplifier. An output terminal of the first RF amplifier can be supplied with the second external power supply voltage without via the DC voltage converter. | 12-08-2011 |
20110304401 | Bi-Directional and Adjustable Current Source - A Bi-Directional and Adjustable Current Source (“BACS”) for providing an input voltage to a mute/standby control pin of a power stage integrated circuit (“IC”) of an amplifier input with a voltage signal that is linear, where an output of the BACS and the input to the control pin are shunted with a capacitor, is described. The BACS may include a first switch in signal communication with a high voltage reference and a first current source in signal communication with the first switch. The BACS may also include a second switch in signal communication with a low voltage reference and a second current source in signal communication with the second switch. The BACS may further include a directional current element in signal communication with both the first current source, the second current source, the output of the BACS, the input to the control pin, and the capacitor, where the directional current element is configured to prevent current flow from the output BACS to the first current source. | 12-15-2011 |
20110316634 | HIGH SPEED LOW POWER MULTIPLE STANDARD AND SUPPLY OUTPUT DRIVER - A multi-mode driver and method therefore includes a plurality of amplifiers, an adjustable load block, and adjustable current supply circuitry that selectively adjusts current magnitudes supplied to at least one of the plurality of amplifiers. The multi-mode driver can operate in a KR mode with a higher voltage supply, an SR4 mode with the higher voltage supply, and an SFI mode with a lower voltage supply. To support these modes, the multi-mode driver selectively operates a plurality of amplifiers, adjusts current magnitudes supplied to the amplifiers, and selectively adjusts an adjustable load. Thus, the multi-mode driver is operable to selectively and efficiently produce high swing and low swing output signals and to efficiently operate with any one of a plurality of supplies. The driver includes selectable loads and parallel-coupled amplifier devices that are selected based on mode. | 12-29-2011 |
20110316635 | TRIPLET TRANSCONDUCTOR - To reduce a knee voltage of a Darlington amplifier, a negative voltage is applied by a depletion mode FET between the emitter of one amplifying transistor and the base of another amplifying transistor to provide a reduced potential, which reduces the knee voltage of the Darlington amplifier. Reducing the knee voltage of the Darlington amplifier decreases the size of a saturation region thereby increasing the linearity of the Darlington amplifier. | 12-29-2011 |
20120001696 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device constituting an inverting amplifier employs a cascode current source as a current source. In the semiconductor integrated circuit device, a high-potential-side transistor of the cascode current source and a low-potential-side transistor constituting an amplification portion are shared. The configuration can not only make an output impedance of the cascode current source high and improve current source characteristics but also make a minimum potential at a minimum potential point of the amplification portion low and ensure a sufficient power supply voltage margin. | 01-05-2012 |
20120032744 | POWER AMPLIFIER - A power amplifier comprises: an amplifier transistor; a bias circuit supplying bias current to the amplifier transistor; and a collector voltage terminal connected to a collector of the amplifier transistor. The bias circuit includes: a reference voltage terminal into which a reference voltage is input; a power terminal connected to a power source; a transistor having a control terminal connected to the reference voltage terminal, a first terminal connected to the power terminal, and a second terminal that is grounded. The transistor supplies a bias current corresponding to the reference voltage to the amplifier transistor; a variable capacitor connected between the first terminal and a grounding point; and a logic circuit controlling capacitance of the variable capacitor. | 02-09-2012 |
20120044022 | DYNAMIC DEVICE SWITCHING (DDS) OF AN IN-PHASE RF PA STAGE AND A QUADRATURE-PHASE RF PA STAGE - An in-phase radio frequency (RF) power amplifier (PA) stage and a quadrature-phase RF PA stage are disclosed. The in-phase RF PA stage includes a first group of arrays of amplifying transistor elements and the quadrature-phase RF PA stage includes a second group of arrays of amplifying transistor elements. A group of array bias signals is based on a selected one of a group of DDS operating modes. Each of the group of array bias signals is a current signal. The in-phase RF PA stage biases at least one of the first group of arrays of amplifying transistor elements based on the group of array bias signals. Similarly, the quadrature-phase RF PA stage biases at least one of the second group of arrays of amplifying transistor elements based on the group of array bias signals. | 02-23-2012 |
20120056677 | APPARATUS AND METHOD FOR A TUNABLE MULTI-MODE MULTI-BAND POWER AMPLIFIER MODULE - An apparatus and method amplify a signal for use in a wireless network. The apparatus includes a power amplifier, an envelope modulator, a tunable matching network (TMN), and a controller. The power amplifier outputs the signal at an output power. The envelope modulator controls a bias setting for the power amplifier. The TMN includes a plurality of immittance elements. The controller is operably connected the envelope modulator and the TMN. The controller identifies a desired value for the output power of the power amplifier, controls the output power of the power amplifier by modifying the bias setting of the power amplifier, and sets a number of the plurality of immittance elements based on the bias setting of the power amplifier. | 03-08-2012 |
20120056678 | POWER AMPLIFIER AND METHOD FOR CONTROLLING POWER AMPLIFIER - A power amplifier includes a first transistor, a second transistor and a bias voltage generator. The first transistor includes a gate electrode, a first electrode and a second electrode, where the gate electrode is coupled to a signal input terminal of the power amplifier. The second transistor includes a gate electrode, first electrode and a second electrode, where the second electrode of the second transistor is connected to the first electrode of the first transistor, and the first electrode of the second transistor is coupled to a signal output terminal of the power amplifier. The bias voltage generator is coupled to the second transistor, and is utilized for generating a bias voltage to bias the electrode of the second transistor, where the bias voltage is less than a supply voltage of the power amplifier. | 03-08-2012 |
20120056679 | SPLIT CURRENT CURRENT DIGITAL-TO-ANALOG CONVERTER (IDAC) FOR DYNAMIC DEVICE SWITCHING (DDS) OF AN RF PA STAGE - A split current current digital-to-analog converter (IDAC) and a radio frequency (RF) power amplifier (PA) stage are disclosed. The split current IDAC operates in a selected one of a group of DDS operating modes and provides a group of array bias signals based on the selected one of the group of DDS operating modes. Each of the group of array bias signals is a current signal. The RF PA stage includes a group of arrays of amplifying transistor elements. The RF PA stage biases at least one of the group of arrays of amplifying transistor elements based on the group of array bias signals. Further, the RF PA stage receives and amplifies an RF stage input signal to provide an RF stage output signal using at least one of the group of arrays of amplifying transistor elements that is biased. | 03-08-2012 |
20120062321 | POWER AMPLIFIER - A power amplifier comprises: an amplifying transistor for amplifying an input signal; a reference voltage generating circuit which generates a reference voltage; a bias circuit generating a bias voltage based on the reference voltage and supplying the bias voltage to the amplifying transistor; and a booster elevating an enable voltage input from outside and outputting the enable voltage. The reference voltage generating circuit is turned ON/OFF in correspondence with an output voltage of the booster. The booster includes: an enable terminal to which the enable voltage is applied; a power source terminal connected to a power source; a transistor having a control electrode connected to the enable terminal, a first electrode connected to the power source terminal, and a second electrode that is grounded; and a FET resistor connected between the first electrode of the transistor and the power source terminal. A gate electrode of the FET resistor is open. | 03-15-2012 |
20120062322 | Power Amplifier With Transistor Input Mismatching - A power amplifier includes an input module. The input module includes a transformer and is configured to receive a radio frequency signal and generate output signals. Impedance transformation modules each of which having an output impedance and configured to receive a respective one of the output signals from the transformer. Switch modules each of which comprising a transistor and connected to an output of one of the impedance transformation modules. The transistor has an input impedance and outputs an amplified signal. Each of the output impedances is mismatched relative to a respective one of the input impedances. | 03-15-2012 |
20120068772 | FIELD MODULATING PLATE AND CIRCUIT - Consistent with various example embodiments, a field-controlling electrode applies a negative bias, relative to a source/drain electrode, increase voltage breakdown. The field-controlling electrode is located over a channel region and between source and drain electrodes, and adjacent a gate electrode. The field electrode shapes a field in a portion of the channel region laterally between the gate electrode and one of the source/drain electrodes, in response to a negative bias applied thereto. | 03-22-2012 |
20120075023 | HYBRID RECONFIGURABLE MULTI-BANDS MULTI-MODES POWER AMPLIFIER MODULE - The present invention provides a single chain power amplifier for a multi-mode and/or multi band wireless communication. The power amplifier comprise switchable input, inter-stage and output matching networks as well as active periphery adjustable driver stage power device and power stage power device. Switches and bias are configured for each frequency band and/or wireless communication standard. A driver stage power device, switches, control and bias circuitry, input matching, inter-stage matching and a part of output matching is fabricated on CMOS Silicon On Insulator process (SOI), while a power stage power device maybe fabricated by Gallium Arsenide (GaAs) processing. | 03-29-2012 |
20120086514 | MEMS OSCILLATOR - A piezoresistive MEMS oscillator uses an output circuit to control the voltage across the resonator body. This results in a DC bias of the resonator. A current path is provided between the output of the output circuit and the resonator body such that changes in current through or voltage across the resonator body, resulting from changes in resistance of the resonator body, are coupled to the output. This arrangement uses the bias current flowing through the resonator to derive the output. In this way, the same DC current is used to provide the required DC resonator bias and to drive the output circuit to its DC operating point. The benefit of this arrangement is a reduced power-consumption. | 04-12-2012 |
20120092075 | POWER AMPLIFICATION SYSTEMS AND METHODS - A power amplifier system includes a power amplifier element that provides a power output signal in response to a bias signal, and a voltage converter. The voltage converter provides at least one discrete voltage output level to the power amplifier element, where the discrete voltage output level is used to develop the bias signal. | 04-19-2012 |
20120112839 | AMPLIFIER, APPARATUS AND METHOD FOR CONTROLLING AMPLIFIER IN COMMUNICATION SYSTEM - An apparatus for controlling an amplifier in a communication system includes a first shifter, a generating unit, a second shifter, and a switching bias unit. The first shifter is configured to level-shift a switching voltage of an amplifier to a first voltage. The generating unit is configured to invert the first voltage and output a second voltage. The second shifter is configured to level-shift the second voltage to a third voltage. The switching bias unit is configured to receive the third voltage and output a bias voltage for a gate switching operation of the amplifier to the amplifier. | 05-10-2012 |
20120112840 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device constituting an inverting amplifier employs a cascode current source as a current source. In the semiconductor integrated circuit device, a high-potential-side transistor of the cascode current source and a low-potential-side transistor constituting an amplification portion are shared. The configuration can not only make an output impedance of the cascode current source high and improve current source characteristics but also make a minimum potential at a minimum potential point of the amplification portion low and ensure a sufficient power supply voltage margin. | 05-10-2012 |
20120139642 | Bias Point Setting for Third Order Linearity Optimization of Class A Amplifier - An actual linear amplifier distorts an input signal, such as an RF signal, and generates third order intermodulation (IM3) products. In an embodiment of a Class A amplifier, the linear amplifier is a bipolar, common emitter-configured (CE) transistor using a cascode transistor to provide a fixed collector bias voltage to the CE transistor. The CE transistor has a transconductance vs. base-emitter voltage (V | 06-07-2012 |
20120139643 | Output Stage of a Power Amplifier Having a Switched-Bulk Biasing and Adaptive Biasing - A power amplifier (PA) using switched-bulk biasing to minimize the risk of output stage snapback effect is disclosed. An adaptive biasing of the output stage prevents device breakdown while accommodating large voltage swings. These protection techniques can be applied to all types of cascode configurations of a PA, including single-ended, differential, quadrature, segmented and any combination thereto. | 06-07-2012 |
20120139644 | DUAL USE TRANSISTOR - A circuit for amplifying radio frequency signals comprising: a terminal for connection to an antenna; a common amplifier arranged in a common-gate configuration between a first node and said terminal; a transmit amplifier operable to amplify a radio frequency signal present at an input node and provide the amplified signal to said first node; and a receive amplifier operable to amplify a radio frequency signal present at said first node and provide the amplified signal to an output node; wherein the circuit is operable in two modes: in a receive mode, the common and receive amplifiers being configured so as to together form a receive cascode for amplifying radio frequency signals received at the terminal; and in a transmit mode, the common and transmit amplifiers being configured so as to together form a transmit cascode for amplifying radio frequency signals applied at the input node. | 06-07-2012 |
20120146733 | POWER AMPLIFIER - A power amplifier includes an input matching circuit, an amplifier transistor for amplifying an input signal received through the input matching circuit, an element for varying the collector voltage of the amplifier transistor, a bias circuit for varying the idle current in the amplifier transistor, and a compensation circuit for varying capacitance of the input matching circuit to maintain the phase shift and the input reflection in the power amplifier constant when the collector voltage and the idle current are varied, to prevent a decrease in the efficiency of the power amplifier due to changes in the output power of the amplifier transistor. | 06-14-2012 |
20120146734 | APPARATUS AND METHODS FOR BIASING A POWER AMPLIFIER - Apparatus and methods for biasing a power amplifier are disclosed. In one embodiment, a power amplifier system includes a power amplifier configured to amplify a radio frequency (RF) signal and a bias control circuit for generating a bias current for the power amplifier. The bias control circuit is configured to receive an envelope of the RF signal and to change an amplitude of the bias current based at least in part on the envelope. | 06-14-2012 |
20120161877 | PA BIAS POWER SUPPLY EFFICIENCY OPTIMIZATION - A charge pump of a PA bias power supply, PA bias circuitry, and a process to optimize efficiency of the PA bias power supply are disclosed. The charge pump operates in one of multiple bias supply pump operating modes, which include at least a bias supply pump-up operating mode and a bias supply bypass operating mode. The process prevents selection of the bias supply bypass operating mode unless a DC power supply voltage is adequate to allow the PA bias circuitry to provide minimum output regulation voltage at a specified current. Otherwise, the bias supply pump-up operating mode is selected. The charge pump operates more efficiently in the bias supply bypass operating mode than in the bias supply pump-up operating mode; therefore, selection of the bias supply bypass operating mode, when possible, increases efficiency. | 06-28-2012 |
20120161878 | POWER AMPLIFIER CONTROL CIRCUIT - This disclosure provides systems, apparatus, and methods for switching a portion of a power amplifier on and off during different modes of operation. In one aspect, a control circuit can include separate switches to provide bias currents to different portions of a power amplifier. The control circuit can include another switch to electrically connect outputs of the separate switches in a first mode of operation (for example, a high power mode) and electrically isolate the outputs of the separate switches in a second mode of operation (for example, a low power mode). In some implementations, a circuit element, such as a field effect transistor or a diode, can turn off one of the separate switches in the second mode. Alternatively or additionally, another circuit element, such as a field effect transistor or a diode, can prevent a power amplifier portion from turning on in the second mode. | 06-28-2012 |
20120188020 | LINEAR VOLTAGE-CONTROLLED CURRENT SOURCE - Embodiments of circuits, methods and systems for a voltage-controlled current source are disclosed. In some embodiments, the voltage-controlled current source may be a three-terminal device having separated gate structures. Other embodiments may also be described and claimed. | 07-26-2012 |
20120194276 | Low Noise Amplifiers Including Group III Nitride Based High Electron Mobility Transistors - A low noise amplifier includes a first Group III-nitride based transistor and a second Group III-nitride based transistor coupled to the first Group III-nitride based transistor. The first Group III-nitride based transistor is configured to provide a first stage of amplification to an input signal, and the second Group III-nitride based transistor is configured to provide a second stage of amplification to the input signal. | 08-02-2012 |
20120200360 | POWER AMPLIFIER WITH DYNAMICALLY ADDED SUPPLY VOLTAGES - An amplifier for amplifying a radio signal to a defined power output level is presented, wherein the amplifier comprises an amplifier input port, an amplifier output port, a first transistor for amplifying the radio signal received at a first transistor control input, wherein a first transistor output of the first transistor is supplied by a first power source; a at least second transistor for supplying the first transistor from a at least second power supply source. The at least second power supply source is added by the at least second transistor as a function of the power output level of the amplifier. | 08-09-2012 |
20120223776 | POWER SUPPLY CONTROLLER FOR A MULTI-GAIN STEP RF POWER AMPLIFIER - A power supply controller controls the power supply voltage provided to a multi-gain step RF power amplifier to increase the efficiency of the RF power amplifier when the different gains of the RF power amplifier are selected and, thereby, reduce the power consumed by the multi-gain step RF power amplifier. | 09-06-2012 |
20120229218 | CIRCUIT FOR COMPENSATING BASE CURRENT OF TRANSISTOR AND AMPLIFIER CIRCUIT PROVIDED WITH THE SAME - According to one embodiment, a circuit for compensating fluctuation of a base current of a transistor is presented. The transistor has a base connected with an input terminal. The compensation circuit is provided with a first transistor, a current mirror circuit and a second transistor. The current mirror circuit mirrors a current which is supplied to a base of the first transistor. Further, the current mirror circuit supplies the obtained mirror current to the base of the transistor to be compensated. A base of the second transistor is connected with the input terminal electrically. The second transistor causes an early effect in the first transistor. | 09-13-2012 |
20120235750 | AMPLIFICATION DEVICE HAVING COMPENSATION FOR A LOCAL THERMAL MEMORY EFFECT - In one embodiment, an amplification device has a temperature differential sensing circuit that reduces a local thermal memory effect. The amplification device may include an amplification circuit and biasing circuitry. The amplification device is operable to receive an input signal and generate and amplified output signal. The biasing circuitry generates a biasing signal that sets the quiescent operating level of the amplified output signal. The temperature differential sensing circuit provides a bias level adjustment signal that adjusts the biasing signal to maintain the quiescent operating level of the amplified output signal at a desired level. | 09-20-2012 |
20120242411 | OPERATIONAL AMPLIFIER - An operational amplifier providing an output voltage signal to drive a load in response to an input voltage signal is provided. The operational amplifier includes a first input stage and a second input stage, a second stage and an output enable switch. The first input stage provides a first intermediate signal according to the voltages of an input and an output voltage signals in a transitional state. The second input stage provides a second intermediate signal according to the input and the output voltage signals in a steady state. The second stage provides the output voltage signal to an output node according to the first and the second intermediate signals in the transitional and the steady states respectively. The output enable switch is enabled in an output enable period to drive the load with the output voltage signal. | 09-27-2012 |
20120242412 | Auto Bias - An auto bias system, device and/or method for automatically controlling the bias or quiescent point of at least one vacuum tube including separating bias current flow from signal current flow for controlling the bias/quiescent point by algorithmically adjusting the grid bias voltage whilst monitoring the cathode current to establish the correct bias current. | 09-27-2012 |
20120256691 | OSCILLATOR AND INPUT-OUTPUT DEVICE AND METHOD OF CONTROLLING THE SAME - A semiconductor device according to an exemplary aspect of the invention is capable of being selectively switched between an oscillation circuit and a signal input-output circuit, and includes first and second external connecting terminals that are connectable to an oscillation device; an inverting amplifier an input side of which is electrically connected to the first external connecting terminal through a coupling capacitor and an output side of which is electrically connected to the second external connecting terminal; a feedback resistor connected to the input side and the output side of the inverting amplifier; a bias stabilization circuit that stabilizes a bias applied to the coupling capacitor; a first signal input-output portion connected to the first external connecting terminal; and a second signal input-output portion connected to the second external connecting terminal. | 10-11-2012 |
20120286877 | POWER AMPLIFIER - There is provided a power amplifier including an amplifying unit having at least two cascode amplifiers connected in parallel to amplify an input signal; and a bias supply unit supplying bias power to a common gate node of the two cascode amplifiers, and removing a signal of a pre-set frequency band corresponding to a baseband at the common gate node by controlling impedance of the common gate node. | 11-15-2012 |
20120286878 | APPARATUS AND METHODS FOR ELECTRONIC AMPLIFICATION - Apparatus and methods for electronic amplification are disclosed herein. In certain implementations, an amplifier is provided for amplifying a RF signal, and the amplifier includes a first transistor and a second transistor electrically connected in a Darlington configuration. The first and second transistors can be, for example, bipolar or field effect transistors and the first transistor can amplify an input signal and provide the amplified input signal to the second transistor. The first and second transistors are electrically connected to a power low node such as a ground node through first and second bias circuits, respectively. In certain implementations, the first transistor includes an inductor disposed in the path from the first transistor to the power low voltage. By including the inductor in the path from the first transistor to the ground node, the third order distortion of the amplifier can be improved. | 11-15-2012 |
20120293266 | Power Amplifiers with Improved Efficiency Over Power Control - Aspects of a system for improving efficiency over power control for linear and class AB power amplifiers may include a current source circuit that enables determination of a bias current level for a PA circuit within an IC die based on an amplitude of an input modulation signal. The PA circuit may enable generation of an output signal based on a differential input signal and the input modulation signal to the current source circuit. A generated bias voltage may be applied to a transformer external to the IC die, but internal to an IC package containing the IC die and/or a circuit board containing the IC package. One or more amplifier bias voltage levels may be applied to the PA circuit wherein the amplifier bias voltage levels may be derived from the generated bias voltage level and/or the determined bias current level. | 11-22-2012 |
20120293267 | LNA CIRCUIT FOR USE IN A LOW-COST RECEIVER CIRCUIT - A low-noise amplifier (LNA) includes an input terminal for receiving an input signal, an output terminal for providing an output signal related to the input signal. The LNA further includes a first transistor having a first source coupled to the input terminal through the first capacitor, a first gate configured to receive a first direct current (DC) bias signal, and a first drain coupled to the output terminal. The LNA also includes a second transistor having a second source coupled to the input terminal through the second capacitor, a second gate configured to receive a second DC bias signal, and a second drain coupled to the output terminal. | 11-22-2012 |
20120299658 | High efficiency, high frequency amplifiers - The invention is an improvement in microwave and millimeter wave amplifiers. Capacitors are connected in parallel with the source and drain terminals of all of the amplifying elements in a series of such elements except the first, compensating for current leakage due to gate capacitance. This results in improved synchronism of the amplifying elements, and improved overall efficiency and circuit performance. | 11-29-2012 |
20120299659 | EFFICIENCY IMPROVEMENT OF DOHERTY POWER AMPLIFIER USING SUPPLY SWITCHING AND DIGITALLY CONTROLLED GATE BIAS MODULATION OF PEAKING AMPLIFIER - An apparatus for amplifying a signal is provided. The apparatus includes a carrier transistor, a peaking transistor, a controller, and a power supply switching unit, wherein the controller controls the power supply switching unit to switch between two or more power supplies and wherein the power supply switching unit provides power from one of the two or more power supplies to the peaking transistor. | 11-29-2012 |
20120299660 | SELECTING PA BIAS LEVELS OF RF PA CIRCUITRY DURING A MULTISLOT BURST - Power amplifier (PA) control circuitry and PA bias circuitry are disclosed. During one slot of a multislot transmit burst from radio frequency (RF) PA circuitry, the PA control circuitry selects one PA bias level of the RF PA circuitry and the RF PA circuitry has one output power level. The RF PA circuitry has a next output power level during an adjacent next slot of the multislot transmit burst. If the one output power level exceeds the next output power level by more than a power drop limit, then the PA control circuitry maintains the one PA bias level during the adjacent next slot. If the one output power level significantly exceeds the next output power level, but by less than the power drop limit, then the PA control circuitry selects a next PA bias level, which is less than the one PA bias level, during the adjacent next slot. | 11-29-2012 |
20120299661 | PA BIAS POWER SUPPLY UNDERSHOOT COMPENSATION - A charge pump of a power amplifier (PA) bias power supply and a process to prevent undershoot disruption of a bias power supply signal of the PA bias power supply are disclosed. The charge pump operates in one of multiple bias supply pump operating modes, which include at least a bias supply pump-up operating mode and a bias supply bypass operating mode. The process prevents selection of the bias supply pump-up operating mode from the bias supply bypass operating mode before charge pump circuitry in the charge pump is capable of providing adequate voltage to prevent undershoot disruption of the bias power supply signal. | 11-29-2012 |
20120306578 | RF AMPLIFIER WITH OPEN CIRCUIT OUTPUT OFF-STATE - A method of operating an amplifier output of an amplifier as a signal switch, the method including coupling a gate of a switch transistor of the amplifier to a switch signal line, coupling a gate of an amplifier transistor of the amplifier to a gate signal line, and controlling impedance of the amplifier by manipulating gate bias voltages of the transistors via the signal lines. | 12-06-2012 |
20120306579 | POWER AMPLIFIER - A power amplifier includes: an amplifying element having a base into which input signals are inputted, a collector to which a collector voltage is applied, and an emitter; and a bias circuit supplying a bias current to the base of the amplifying element. The bias circuit includes a bias current lowering circuit which lowers the bias current when the collector voltage is lower than a prescribed threshold value. | 12-06-2012 |
20120326792 | SYSTEMATIC INTERMODULATION DISTORTION CALIBRATION FOR A DIFFERENTIAL LNA - Systematic IM2 calibration for a differential LNA is disclosed. In an aspect, an apparatus includes an amplifier configured to output an amplified signal having a level of systematic pre-mixer IM2 distortion, a detector configured to detect the level of the systematic pre-mixer IM2 distortion in the amplified signal, and a bias signal generator configured to generate at least one bias signal configured to adjust the amplifier to reduce the level of the systematic pre-mixer IM2 distortion. | 12-27-2012 |
20130009710 | RF AMPLIFIER MODULE, INTEGRATED CIRCUIT DEVICE, WIRELESS COMMUNICATION UNIT AND METHOD THEREFOR - A radio frequency (RF) amplifier module has a digitally controllable amplifier to receive a first biased signal, a further biased signal, and a digital control signal including a less significant bit (LSB) component and a more significant bit (MSB) component. The digitally controllable amplifier has an LSB module operating according to the first biased signal and the LSB component, and an MSB module operating according to the further biased signal and the MSB component. The RF amplifier module further has a biasing component to apply a first, operating DC bias voltage to the further biased signal when the digitally controllable amplifier operates in a higher gain mode and the MSB module outputs a load current component, and apply a second, higher DC bias voltage to the further biasing signal when the digitally controllable amplifier operates in a lower gain mode and the MSB module outputs the load current component. | 01-10-2013 |
20130069727 | Transimpedance Amplifier and Method Thereof - A transimpedance method and apparatus are provided. In one implementation an apparatus includes a common-gate amplifier for receiving a first current from a first circuit node and outputting a second current to a second circuit node, and a load circuit coupled to the second circuit node, the load circuit comprising a diode-connected MOS (metal-oxide semiconductor field effect transistor), wherein a gate terminal of the MOS is coupled to a drain terminal of the MOS via a resistor. In one embodiment, a current-mode input is injected to the first circuit node and the apparatus further comprises a biasing circuit for outputting a substantially constant current to the first circuit node. | 03-21-2013 |
20130069728 | Automatic bias operational amplifying circuit and system - An automatic bias operational amplifying circuit, includes a control sub-circuit and an offset sub-circuit connected to the control sub-circuit. The control sub-circuit includes a first input terminal, a second input terminal, a first field-effect transistor connected to the offset sub-circuit, a second field-effect transistor connected to the first input terminal, a third field-effect transistor connected to the second input terminal, a first output terminal connected to the second field-effect transistor, a second output terminal connected to the third field-effect transistor, a first resistor connected to the first output terminal, and a second resistor connected to the second output terminal. The offset sub-circuit includes a reference voltage terminal, a comparator connected between the reference voltage terminal and the control sub-circuit, a third resistor connected between the comparator and the second output terminal, and a fourth resistor connected between the comparator and the first output terminal Its system is further provided. | 03-21-2013 |
20130076447 | POWER AMPLIFIER MODULE HAVING BIAS CIRCUIT - There is provided a power amplifier module having a bias circuit, in which a bias power is supplied to an amplifier by differently setting an impedance between an input signal terminal and a reference power terminal and an impedance between the input signal terminal and a ground. The power amplifier module includes: an amplifier unit receiving a bias power to amplify an input signal; and a bias unit supplying the bias power to the amplifier, by differently setting an impedance between an input signal terminal transmitting the input signal therethrough and a reference power terminal transmitting a reference power having a predetermined voltage level and an impedance between the input signal terminal and a ground. | 03-28-2013 |
20130076448 | POWER AMPLIFIER - There is provided a power amplifier. The power amplifier includes an amplification unit including at least one amplification device; a power generation unit generating an input signal supplied to the amplification unit; and a bias circuit unit controlling bias of the at least one amplification device according to the input signal, wherein the bias circuit unit supplies a predetermined bias voltage to the amplification unit before the input signal is applied to the amplification unit. According to the embodiments of the present invention, a delay phenomenon occurring at an initial driving time or a low power mode may be significantly reduced by supplying a predetermined bias signal to an amplification unit in a standby circuit before the bias circuit unit of the power amplifier normally outputs the bias signal to the amplification unit. | 03-28-2013 |
20130088299 | Power Amplifier with Matching Transformer - Aspects of a system for a power amplifier with an on-package matching transformer may include a DC/DC converter that enables generation of a bias voltage level within an IC die based on an amplitude of an input signal to a PA circuit within the IC die. The bias voltage level may be applied to a transformer, which is external to the IC die but internal to an IC package containing the IC die and/or a circuit board containing the IC package. One or more amplifier bias voltage levels, derived from the bias voltage level applied to the transformer, may be applied to the PA circuit. | 04-11-2013 |
20130099868 | SOUND DETECTING CIRCUIT AND AMPLIFIER CIRCUIT THEREOF - Disclosed is a sound detecting circuit which includes a sensing unit configured to generate an AC signal in response to a sound pressure level of a sound signal; an amplification unit configured to amplify the AC signal; and a bias voltage generating unit configured to generate a bias voltage to be provided to the amplification unit. The bias voltage generating unit comprises a current source configured to provide a power current; and a current-voltage converting circuit configured to convert the power current into the bias voltage and to reduce a noise due to the power current. | 04-25-2013 |
20130106518 | INTEGRATED CIRCUIT | 05-02-2013 |
20130113570 | Method and Device for Controlling Power Amplification - A method and network equipment for controlling power amplification are disclosed. The method for controlling power amplification includes outputting a voltage signal according to the state of an NE. The voltage signal is applied to a grid electrode or a base electrode of at least one power amplifier transistor in a power amplifier. | 05-09-2013 |
20130127544 | AMPLIFIER CIRCUIT - According to embodiments of the present invention, an over-input signal may be limited to be within a range between adjustable upper limit voltage and lower limit voltage while suppressing deterioration of a noise figure. An amplifier circuit includes an input transistor; an input transistor; a resistor element having a first terminal connected to a gate of the input transistor and a second terminal connected to a bias voltage; and a protective circuit connected to the gate of the input transistor and limiting an input to the gate of the input transistor to be within a range between an upper limit voltage and lower limit voltage adjustable based on the bias voltage. | 05-23-2013 |
20130127545 | BIAS CURRENT MONITOR AND CONTROL MECHANISM FOR AMPLIFIERS - Techniques for monitoring and controlling bias current of amplifiers are described. In an exemplary design, an apparatus may include an amplifier and a bias circuit. The amplifier may include at least one transistor coupled to an inductor. The bias circuit may generate at least one bias voltage for the at least one transistor in the amplifier to obtain a target bias current for the amplifier. The bias circuit may generate the at least one bias voltage based on a voltage across the inductor in the amplifier, or a current through a current mirror formed with one of the at least one transistor in the amplifier, or a gate-to-source voltage of one of the at least one transistor in the amplifier, or a voltage in a replica circuit replicating the amplifier, or a current applied to the amplifier with a switched mode power supply disabled. | 05-23-2013 |
20130127546 | BIAS CURRENT MONITOR AND CONTROL MECHANISM FOR AMPLIFIERS - Techniques for monitoring and controlling bias current of amplifiers are described. In an exemplary design, an apparatus may include an amplifier and a bias circuit. The amplifier may include at least one transistor coupled to an inductor. The bias circuit may generate at least one bias voltage for the at least one transistor in the amplifier to obtain a target bias current for the amplifier. The bias circuit may generate the at least one bias voltage based on a voltage across the inductor in the amplifier, or a current through a current mirror formed with one of the at least one transistor in the amplifier, or a gate-to-source voltage of one of the at least one transistor in the amplifier, or a voltage in a replica circuit replicating the amplifier, or a current applied to the amplifier with a switched mode power supply disabled. | 05-23-2013 |
20130135053 | POWER AMPLIFIER - A power amplifier includes a first matching circuit configured to perform harmonic processing of an input signal, and a second matching circuit configured to perform the harmonic processing of an output signal, the output signal being generated by amplifying a power of the input signal. The power amplifier rotates a phase of output impedance at a matching point of the harmonic included in the generated output signal when the power of the input signal is decreased from a value higher than a certain value to a value lower than the certain value. | 05-30-2013 |
20130141167 | POWER AMPLIFIER - Disclosed herein is a circuit for preventing an element from being damaged although output impedance of a final transistor is changed in a power amplifier. The power amplifier includes: a power stage amplifying a signal; a transformer connected to an output terminal of the power stage and coupling a signal output from the power stage; and a controller controlling a bias voltage from the power stage according to the coupled signal. Although output impedance is changed, damage to the power amplifier can be prevented. Also, the power amplifier can be automatically controlled to maintain performance thereof by sensing an operational state in which output impedance is normal. | 06-06-2013 |
20130141168 | LOW-NOISE AMPLIFIER WITH THROUGH-MODE - The low-noise amplifier with through mode is configured such that a source grounded transistor and a gate grounded transistor are connected in cascode, and a load impedance element and a switching transistor are serially connected between the drain of the gate grounded transistor and a power supply, and a through pass circuit is connected between an input terminal and an output terminal. The gate voltage of the gate grounded transistor is regulated by a bias circuit and the voltage of a mode control terminal is converted by a level shifter to control the gate voltage of the switching transistor, whereby, in the case of using only transistors whose terminal-to-terminal breakdown voltages are each equal to or less than the power supply voltage, it becomes feasible to prevent voltages equal to or more than the terminal-to-terminal breakdown voltages from being applied between the terminals of each transistor. | 06-06-2013 |
20130176078 | APPARATUSES AND METHODS FOR LOW POWER CURRENT MODE SENSE AMPLIFICATION - Memory apparatuses and methods for low power current mode sense amplification are disclosed. An example memory apparatus may include a current mode sense amplifier and a current circuit. The current mode sense amplifier may be configured to provide an output current. The current circuit may comprise a bias generator that is configured to generate a bias signal as well as a current control circuit coupled to both the current mode sense amplifier and the bias generator. The current control circuit may be configured to receive both the output current and the bias signal and control the output current based, at least in part, on the bias signal. | 07-11-2013 |
20130207727 | APPARATUS AND METHODS FOR REDUCING OUTPUT NOISE OF A SIGNAL CHANNEL - Apparatus and methods for reducing output noise of a signal channel are provided. In one embodiment, a signal channel includes an amplifier for amplifying an input signal to generate an amplified signal. The amplifier includes a bias circuit that controls a bias current of the amplifier based on a voltage across a biasing capacitor. The apparatus further includes a sampling circuit for sampling the amplified signal. The sampling circuit generates an output signal based on a difference between a first sample of the amplified signal taken at a first time instance and a second sample of the amplified signal taken at a second time instance. The bias circuit samples a bias voltage onto the biasing capacitor before the first time instance and holds the voltage across the biasing capacitor substantially constant between the first time instance and the second time instance to reduce noise of the output signal. | 08-15-2013 |
20130207728 | AMPLIFIER CIRCUIT AND OPERATING METHOD THEREOF - There is provided an amplifier circuit. The amplifier circuit includes an amplifying unit including at least one transistor; at least one first bias circuit unit including a resistor and connected to the at least one transistor; and at least one second bias circuit unit connected between an input terminal to which an input signal is applied and the at least one transistor so as to block an input signal having a frequency higher than a first frequency or having a frequency lower than a second frequency. The amplifier circuit according to embodiment of the present invention may prevent thermal runaway, remove a harmonic component from an input signal to be amplified and suppress oscillations. | 08-15-2013 |
20130207729 | POWER AMPLIFIER - A power amplifier includes: an amplifier having a base into which input signals are input, a collector to which a collector voltage is supplied, and an emitter; and a bias circuit for supplying a bias current to the base of the amplifier. The bias circuit includes a first transistor having a first control terminal into which a reference voltage is input, a first terminal to which a power voltage is applied, and a second terminal connected to the base of the amplifier. A capacitance adjusting circuit elevates capacitance between a grounding point and at least one of the first control terminal and the first terminal when the collector voltage of the amplifier is lowered. | 08-15-2013 |
20130207730 | IMPEDANCE MATCHING CIRCUIT, POWER AMPLIFIER AND MANUFACTURING METHOD FOR VARIABLE CAPACITOR - Disclosed is an impedance matching circuit capable of wideband matching. The impedance matching circuit includes: a first variable inductor unit of which one end is connected to the first node and an inductance value varies; a second inductor unit connected between the first node and a second node and having a variable inductance value; a first variable capacitor unit of which one end is connected to the first node and a capacitance value varies; and a second variable capacitor unit of which one end is connected to the second node and a capacitance value varies, and the other end of the first variable capacitor unit and the other end of the second variable capacitor unit are connected to a ground voltage terminal to perform the impedance matching between a circuit connected to the other end of the first variable inductor unit and a circuit connected to the second node. | 08-15-2013 |
20130207731 | APPARATUS AND METHODS FOR ENVELOPE TRACKING - Apparatus and methods for envelope tracking are disclosed herein. In certain implementations, an envelope tracking system for generating a power amplifier supply voltage for a power amplifier is provided. The envelope tracking system can include a buck converter and an error amplifier configured to operate in parallel to control the voltage level of the power amplifier supply voltage based on an envelope of an RF signal amplified by the power amplifier. The buck converter can convert a battery voltage into a buck voltage that is based on an error current, and the error amplifier can generate the power amplifier supply voltage by adjusting the magnitude of the buck voltage using an output current that is based on the RF input signal's envelope. The error amplifier can control the buck converter by changing a magnitude of the error current in relation to a magnitude of the output current. | 08-15-2013 |
20130241659 | POWER AMPLIFIER - A power amplifier includes: a first amplifying element amplifying an input signal; a second amplifying element amplifying an output signal of the first amplifying element; a third amplifying element amplifying the input signal; a first switch connected between an output of the first amplifying element and an input of second amplifying element; a second switch connected between an output of the first amplifying element and an output of the third amplifying element; a third switch connected between an output of the first amplifying element and an output of the second amplifying element; a reference voltage generating a circuit generating reference voltage; a bias circuit supplying a bias current, based on the reference voltage, to inputs of the first, second, and third amplifying elements; and a control circuit controlling the first, second and third switches and the reference voltage generating circuit. | 09-19-2013 |
20130257542 | VOLTAGE BUFFER - A voltage buffer having a first transistor, a second transistor, a third transistor and a voltage detector is provided. A first terminal of the first transistor is coupled to a first reference voltage. A first terminal of the second transistor is coupled to a second terminal of the first transistor, a control terminal of the second transistor is coupled to an input voltage, and a second terminal of the second transistor is coupled to an output voltage. A first terminal of the third transistor is coupled to a second terminal of the second transistor. A second terminal of the third transistor is coupled to a second reference voltage. The voltage detector detects a voltage of the second terminal of the first transistor to generate a detection result and outputs the detection result to a bulk terminal of the second transistor. | 10-03-2013 |
20130271223 | AMPLIFIER WITH FLOATING WELL - A low-noise amplifier includes a first transistor having a gate configured to receive an oscillating input signal and a source coupled to ground. A second transistor has a source coupled to a drain of the first transistor, a gate coupled to a bias voltage, and a drain coupled to an output node. At least one of the first and second transistors includes a floating deep n-well that is coupled to an isolation circuit. | 10-17-2013 |
20130271224 | MULTIBAND RF SWITCH GROUND ISOLATION - A radio frequency (RF) switch semiconductor die and an RF supporting structure are disclosed. The RF switch semiconductor die is attached to the RF supporting structure. The RF switch semiconductor die has a first edge and a second edge, which may be opposite from the first edge. The RF supporting structure has a group of alpha supporting structure connection nodes, which is adjacent to the first edge; a group of beta supporting structure connection nodes, which is adjacent to the second edge; and an alpha AC grounding supporting structure connection node, which is adjacent to the second edge. When the group of alpha supporting structure connection nodes and the alpha AC grounding supporting structure connection node are active, the group of beta supporting structure connection nodes are inactive. | 10-17-2013 |
20130285750 | SUPPLY TRACKING - A power amplifier includes generation, tracking and usage of an envelope of an input RF signal. To improve upon the efficiency of the power amplifier, various configurations include using the tracked envelope, for example, an OFDM signal, to improve the average efficiency. Suitable hardware/software in the form of circuitry, logic gates, and/or code functions to generate and track an envelope of an input RF signal and modulate one or more of the input supply voltage, cascode gate bias or parallel PA branches using the tracked envelope. | 10-31-2013 |
20130293311 | HIGH FREQUENCY POWER AMPLIFIER - Provided is a compact high frequency power amplifier having a high degree of freedom of design with respect to a gain fluctuation immediately after start-up of an amplifier. The high frequency power amplifier includes a speed-up circuit that transiently increases a reference voltage during rise of a control voltage to increase an amount of bias supplied to an amplification transistor from a bias circuit. The speed-up circuit includes a capacitor and an overshoot control circuit. The overshoot control circuit determines an increasing amount of the reference voltage when the reference voltage is transiently increased according to a charge amount charged in the capacitor, and the overshoot control circuit also determines a time constant in charging and discharging the capacitor. | 11-07-2013 |
20130300508 | AMPLIFIER CIRCUIT AND METHOD OF AMPLIFYING A SIGNAL IN AN AMPLIFIER CIRCUIT - An amplifier circuit, comprising: an input, for receiving an input signal to be amplified; a power amplifier, for amplifying the input signal; a switched power supply, having a switching frequency, for providing at least one supply voltage to the power amplifier; and a dither block, for dithering the switching frequency of the switched power supply. The dither block is controlled based on the input signal. Another aspect of the invention involves using first and second switches, each having different capacitances and resistances, and using the first or second switch depending on the input signal or volume signal. Another aspect of the invention involves controlling a bias signal provided to one or more components in the signal path based on the input signal or volume signal. | 11-14-2013 |
20130307627 | INTEGRATED START-UP BIAS BOOST FOR DYNAMIC ERROR VECTOR MAGNITUDE ENHANCEMENT - Devices and methods for correcting for start-up transients in integrated power amplifiers are disclosed. A delay element is arranged to produce a delay waveform signal that is responsive to an input voltage signal. A transconductance element has an input that receives the delay waveform signal and is arranged to provide an output boost current that is based on the delay waveform signal and a gain of the transconductance element. A reference element provides an output bias current that is responsive to a static reference current and the boost current. A bias element has an input that receives the bias current and is arranged to provide a bias control output. A power amplifier is responsive to the bias control output and is arranged to provide an amplified power output. | 11-21-2013 |
20130307628 | Radio Frequency Power Amplifier and Packaging and Fabrication Method Thereof - A radio frequency (RF) power amplifier includes: a pre-stage amplifier configured to amplify an input power to the RF power amplifier; and a post-stage amplifier configured to amplify an output power of the pre-stage amplifier; wherein the pre-stage amplifier comprises a CMOS (Complementary Metal Oxide Semiconductor) amplifier, and the post-stage amplifier comprises a GaAs (Gallium Arsenide) amplifier or a SiGe (Silicon Germanium) amplifier. | 11-21-2013 |
20130314163 | INTEGRATED STACKED POWER AMPLIFIER AND RF SWITCH ARCHITECTURE - Combination circuitry includes a relatively small preamplifier and includes hybrid circuitry. The hybrid circuitry is configured to perform mode switching while also performing some amplification, thus allowing the relatively small preamplifier to be smaller than a conventional power amplifier. In one embodiment, the hybrid circuitry includes first series portion configured to amplify when ON, a first shunt portion, a second series portion configured to amplify when ON, and a second shunt portion. The first series portion may include: a first transistor; a first variable impedance in communication with a gate of the first transistor, wherein the first variable impedance is configured to receive a first transistor control signal; a second transistor in series with the first transistor; and a second variable impedance in communication with a gate of the second transistor, wherein second variable impedance is configured to receive a second transistor control signal. | 11-28-2013 |
20130314164 | Low-Noise Amplifier with Impedance Boosting Circuit - A low-noise amplifier ( | 11-28-2013 |
20130321085 | ADAPTIVE BIASING SCHEME FOR AN AMPLIFIER - There is provided a bias arrangement for an amplifier adapted to amplify a varying input signal, the arrangement comprising a control circuit arranged to adaptively vary a bias current to the amplifier in dependence on an envelope of the varying input signal. | 12-05-2013 |
20130321086 | BIAS CIRCUIT AND POWER AMPLIFIER HAVING THE SAME - There are provided a bias circuit supplying different levels of bias power according to respective power modes through a simple circuit configuration, and a power amplifier having the same. The bias circuit includes: a bias setting unit setting a bias power voltage level by switching reference power having a pre-set voltage level determined according to a pre-set power mode; and a bias supply unit including a switching element performing switching according to the setting of the bias setting unit and supplying bias power having a voltage level determined according to a switching operation of the switching element. | 12-05-2013 |
20130321087 | LOW VOLTAGE HIGH EFFICIENCY GALLIUM ARSENIDE POWER AMPLIFIER - A low voltage, switch mode PHEMT power amplifier with a 0.1 μm gate length and a low loss, lumped element, output matching circuit is disclosed that provides high performance over a frequency range of 1.4 GHz-2.5 GHz. The amplifier makes use of monolithic circuit technology for the first stage and output transistor, and uses a printed circuit board with surface mount components for the output matching network. The power output of the power amplifier is stable over a range of 60 degrees centigrade, has high power efficiencies of 44-53% with greater than 2 watts output power over the frequency range of 1.4 GHz and 2.5 GHz. In addition, through drain voltage control, the output power can be varied over a wide range between about 0.8 to 2.5 watts while still maintaining a high efficiency in the range of 50±3%. | 12-05-2013 |
20130335147 | Power Amplifier and Linearization Techniques Using Active and Passive Devices - Designs and techniques for improving the linearity of the power amplifiers, especially of the non-linear types, operated in microwave and millimeter-wave frequency using method through purposely designed active transistors or passive devices or both, are disclosed. The techniques use the manipulation of transistors' cut-off frequencies (fT) design, attached loaded linearization stub and characteristics of space attenuation of microwave signals individually or in combination of them. The disclosed techniques provide the advantages to compromise the performance among linearity, gain and power consumption in a wide range of power amplifier types, such as Class- AB, B, C, D, E and F in the different application scenarios. | 12-19-2013 |
20140015613 | POWER AMPLIFIER - A power amplifier includes: an amplifier having an input terminal and including an amplifying transistor having a threshold voltage; a transistor supplying a bias to the input terminal of the amplifier according to an on/off signal; a capacitor connected between the input terminal of the amplifier and a grounding point; a resistor connected between the input terminal of the amplifier and the grounding point, in parallel with the capacitor; and a diode connected in series with the resistor. The diode has a threshold voltage that is lower than the threshold voltage of the amplifying transistor. | 01-16-2014 |
20140022021 | POWER AMPLIFIER - A power amplifier includes an amplifying element, a bias circuit, a common power supply terminal, and a resistor or an inductor. The bias circuit is connected to the amplifying element and supplies a bias voltage to an input terminal of the amplifying element. The bias circuit and an output bias terminal of the amplifying element are connected to the common power supply terminal. The resistor or the inductor is connected in series between the bias circuit and the common power supply terminal. | 01-23-2014 |
20140028401 | METAMATERIAL POWER AMPLIFIER SYSTEMS - Power amplifying systems and modules and components therein are designed based on CRLH structures, providing high efficiency and linearity. | 01-30-2014 |
20140028402 | APPARATUS, METHOD AND MOBILE TERMINAL FOR REDUCING POWER CONSUMPTION ON POWER AMPLIFIER - The present invention applies to the field of energy saving, and in particular, to an apparatus, a method, and a mobile terminal for reducing power consumption on a power amplifier. In embodiments of the present invention, a controller is separately connected to a temperature detector and a voltage converter. The controller searches for, according to a temperature of the power amplifier detected by the temperature detector, a voltage compensation value corresponding to the temperature, and controls, according to the voltage compensation value, the voltage converter to output a power voltage that is capable of improving efficiency of the power amplifier. This may enable the power amplifier to work in an optimal efficiency at any temperature, and greatly reduce the power consumption of the power amplifier. | 01-30-2014 |
20140035683 | INTEGRATED CIRCUIT - According to one embodiment, provided are an amplifier transistor configured to amplify an input signal; a biasing circuit configured to set a bias voltage in such a manner as to allow the amplifier transistor to perform amplification; an electrostatic protective circuit configured to set the bias voltage for the amplifier transistor in such a manner as to make the amplifier transistor to turn off based on voltage to be applied to the amplifier transistor; and a switching circuit configured to switch the bias voltage for the amplifier transistor based on a power supply condition. | 02-06-2014 |
20140070890 | POWER AMPLIFIER - A power amplifier includes: an amplification element amplifying an input signal; and a bias circuit supplying a bias current to an input of the amplification element. The bias circuit includes a reference voltage terminal to which a battery voltage is applied from a battery, a first resistor having a first end connected to the reference voltage terminal, a second resistor connected between a second end of the first resistor and ground, and a first transistor. The first transistor has a control terminal connected to a connection point between the first resistor and the second resistor, a first terminal connected to a power supply, and a second terminal connected to the input of the amplification element. The first and second resistors are the same material. | 03-13-2014 |
20140070891 | HIGH FREQUENCY AMPLIFIER - To prevent a wrap-around signal from an output detection circuit unit that occurs when commonality is achieved between the power supply of the output detection circuit unit and the bias power supply of a power amplification unit. When commonality is achieved between the power supply of a diode of an output detection circuit unit and the power supply of a bias circuit, a resonance circuit is connected between the bias circuit and the output detection circuit unit, thereby preventing a wrap-around signal from the output side of a power amplification transistor from being input to the input side of the power amplification transistor. | 03-13-2014 |
20140077883 | Cascode Cell Having DC Blocking Capacitor - A cascode gain stage apparatus includes an input transistor having an RF input node and a transistor output node, an output transistor having a transistor input node and an RF output node, and a DC blocking capacitor connected between the transistor input and transistor output nodes. | 03-20-2014 |
20140091863 | CURRENT REUSE AMPLIFIER - A current reuse amplifier is disclosed. The amplifier includes a first field effect transistor (FET); and a second FET with a source coupled with a gate of the second FET and a drain of the first FET through a first resistor in a DC mode but floated from a ground in an AC mode. A feature of the current reuse amplifier is that the amplifier further includes a shunt block connected in the source of the second FET to shunt a DC current flowing in the second FET to the ground. A DC current flowing in the first FET is smaller than a DC current flowing in the second FET, and the first FET has a size smaller than a size of the second FET. | 04-03-2014 |
20140097905 | SPS RECEIVER WITH ADJUSTABLE LINEARITY - A device includes a low noise amplifier (LNA) for amplifying an input signal, with the LNA including a first transistor configured to receive the input signal, a second transistor configured to receive a bias current and forming a current mirror for the first transistor, and an operational amplifier (op amp) operative to generate a bias voltage for the first and second transistors to match operating points of the first and second transistors. | 04-10-2014 |
20140118073 | CANCELLATION OF DYNAMIC OFFSET IN MOS RESISTORS - A circuit utilizes a MOS device in a triode mode of operation and includes a biasing circuit and a MOS device. The MOS device has a drain, a source, and a gate terminal, and is coupled to the biasing circuit. The source terminal, drain terminal, and gate terminal each has a potential and the drain and the source terminals have a resistance. The biasing circuit couples the drain and source terminals of the MOS device to the gate terminal of the MOS device. The biasing circuit couples a DC potential to the gate terminal to adjust the resistance between the source and drain terminals of the MOS device. The resistance between the source and drain terminals is a non-linear function of voltage potentials at the source and drain terminals. The biasing circuit reduces the non-linearity of the resistance between the drain and source terminals by modulating the potential at the gate terminal by a combination of source and drain terminal potentials. | 05-01-2014 |
20140118074 | POWER AMPLIFIER CONTROLLER - The present disclosure provides a power amplifier controller for starting up, operating, and shutting down a power amplifier. The power amplifier controller includes current sense amplifier circuitry adapted to monitor a main current of the power amplifier. A bias generator is also included and adapted to provide a predetermined standby bias voltage and an operational bias voltage based upon a main current level sensed by the current sense amplifier circuitry. The power amplifier controller further includes a sequencer adapted to control startup and shutdown sequences of the power amplifier. In at least one embodiment, the power amplifier is a gallium nitride (GaN) device, and the main current level sensed is a drain current of the GaN device. Moreover, the bias generator is a gate bias generator provided that the power amplifier is a field effect transistor (FET) device. | 05-01-2014 |
20140125417 | SYSTEMS AND METHODS FOR BOOSTING A RECEIVED AC SIGNAL USING A POWER AMPLIFIER INCLUDING PHASE CONDITIONERS - A power amplifier configured to boost an AC signal. The power amplifier includes a first transistor, a second transistor, a first inductor connected between the first transistor and a voltage source, and a second inductor connected between the second transistor and ground. A first phase conditioner arranged at an input of the first transistor is configured to condition a phase of the AC signal such that the AC signal as received by the first transistor is out of phase with respect to the AC signal as received by the first inductor. A second phase conditioner arranged at an input of the second transistor is configured to condition a phase of the AC signal such that the AC signal as received by the second transistor is out of phase with respect to the AC signal as received by the second inductor. | 05-08-2014 |
20140152391 | SYSTEMS AND METHODS FOR MAINTAINING POWER AMPLIFIER PERFORMANCE - Systems and methods for maintaining power amplifier performance are provided. A system includes a bias supply that generates a bias voltage, and at least one primary power amplifier (PA) that receives the bias voltage and a primary radio frequency (RF) input. The at least one primary PA amplifies the primary RF input based on the bias voltage. The system includes an auxiliary PA that is connected in parallel with the at least one primary PA and receives the bias voltage and an auxiliary RF input, which is a scaled version of the primary RF input. The auxiliary PA amplifies the auxiliary RF input based on the bias voltage. The system includes a detector that measures an output voltage associated with the amplified auxiliary RF input, and a comparator that compares the measured output voltage to a reference voltage. The bias supply adjusts the bias voltage based on the comparison. | 06-05-2014 |
20140159819 | ELECTRONIC SYSTEM, RF POWER AMPLIFIER AND OUTPUT POWER COMPENSATION METHOD THEREOF - A radio frequency (RF) power amplifier is disclosed. The power amplifier includes an output stage circuit, an exponential type bias circuit and a voltage-current transformation circuit. The output stage circuit receives a first system voltage and outputs an output current. The exponential type bias circuit receives a bias current, wherein a relationship between the bias current and output current is exponential, and when the bias current is zero current, and the output current is zero current. The voltage-current transformation circuit transforms the first system voltage into a second current so that the bias current is in proportion to the first system voltage, and thus the relationship between the output current and the first system voltage is exponential. The bias current is equal to times of the sum of the first current and the second current. | 06-12-2014 |
20140167859 | CURRENT MIRROR WITH SATURATED SEMICONDUCTOR RESISTOR - A current mirror circuit having formed in a semiconductor: a pair of transistors arranged to produce an output current through an output one of the transistors proportional to a reference current fed to an input one of the pair of transistors; a resistor comprising a pair of spaced electrodes in ohmic contact with the semiconductor, one of such pair of electrodes of the resistor being coupled to the input one of the pair of transistors; and circuitry for producing a voltage across the pair of electrodes of the resistor, such circuitry placing the resistor into saturation producing current through a region in the semiconductor between the pair of spaced ohmic contacts, such produced current being fed to the input one of the transistors as the reference current for the current mirror. | 06-19-2014 |
20140167860 | MULTI-STAGE AMPLIFIER - Exemplary embodiments are directed to operating a multi-stage amplifier with low-voltage supply voltages. A multi-stage amplifier may include a first path of an amplifier output stage configured to convey an output signal if a first supply voltage is greater than a threshold voltage. The multi-stage amplifier may also include a second path of the amplifier output stage configured to convey the output signal if the first supply voltage is less than or equal to the threshold voltage. | 06-19-2014 |
20140167861 | BIAS CIRCUIT AND POWER AMPLIFIER WITH DUAL-POWER MODE - There are provided a bias circuit and a power amplifier with a dual-power mode. The bias circuit includes a regulated voltage generation unit generating a regulated voltage by using a reference voltage, a bias voltage generation unit generating a bias voltage according to the regulated voltage, and a power mode control unit operating in any one of a high power mode and a low power mode according to a power mode voltage and dropping the regulated voltage in the low power mode. | 06-19-2014 |
20140176243 | SYSTEMS AND METHODS TO ADJUST THE MATCHING CONDITIONS OF AN AMPLIFIER - A system and method improve amplifier efficiency of operation relative to that of a matching circuit with fixed matching conditions. A power level representing a level of transmission power from an amplifier circuit and an indicator of amplifier circuit operation are provided. The indicator is at least one of channel, channel bandwidth, out-of band spectral requirements, spectral mask requirements, error vector magnitude, modulation rate, and modulation type. The matching conditions for a matching circuit of an amplifying transistor are adjusted based at least in part on the power level and the indication where the matching conditions are different for channels at an edge of a channel band than for channels nearer a center of the channel band. | 06-26-2014 |
20140184336 | Amplifier Dynamic Bias Adjustment for Envelope Tracking - An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor. | 07-03-2014 |
20140184337 | Control Systems and Methods for Power Amplifiers Operating in Envelope Tracking Mode - Control systems and methods for power amplifiers operating in envelope tracking mode are presented. A set of corresponding functions and modules are described and various possible system configurations using such functions and modules are presented. | 07-03-2014 |
20140184338 | ASK MODULATION AMPLIFICATION CIRCUIT - An amplitude shift keying (ASK) modulation amplifier circuit includes a first amplifier to which a high frequency signal and a modulating signal are supplied, and that is configured to perform an amplification of the high frequency signal and an ASK modulation, and a second amplifier to which an output of the first amplifier and the modulating signal are supplied, and that is configured to perform an amplification of the output signal from the first amplifier and an ASK modulation. In some configurations, an amplification gain of the second amplifier is set higher than an amplification gain of the first amplifier. | 07-03-2014 |
20140191806 | ELECTRONIC SYSTEM - RADIO FREQUENCY POWER AMPLIFIER AND METHOD FOR DYNAMIC ADJUSTING BIAS POINT - A radio frequency (RF) power amplifier is disclosed. The RF power amplifier includes a bias circuit, an output stage circuit and dynamic bias controlling circuit. The bias circuit receives a first system voltage and provides a working voltage accordingly. The output stage circuit receives the working voltage so as to work at an operation bias point. The dynamic bias controlling circuit detects a RF input signal and outputs a compensation voltage to the bias circuit according to variation of the RF input signal, wherein the dynamic bias controlling circuit is an open loop configuration. When an input power of the RF input signal increases and makes the working voltage decreases so as to shift the operation bias point, the bias circuit adjusts the working voltage upward so as to recover or enhance the operation bias point according to the compensation voltage received. | 07-10-2014 |
20140191807 | SYSTEMS AND METHODS FOR BIASING AMPLIFIERS WITH ADAPTIVE CLOSED LOOP CONTROL - Various embodiments described herein provide systems and methods for improved performance for power amplifiers, particularly GaN power amplifiers. According to some embodiments, a power amplifier (e.g., GaN power amplifier) utilizes an adaptive closed loop control of the drain current of the power amplifier to achieve improved performance for the power amplifier. | 07-10-2014 |
20140191808 | SYSTEMS AND METHODS FOR BIASING AMPLIFIERS DURING HIGH-POWER OPERATION WITH ADAPTIVE CLOSED-LOOP CONTROL - Various embodiments described herein provide systems and methods for improved performance for power amplifiers, particularly GaN power amplifiers. According to some embodiments, a power amplifier (e.g., GaN power amplifier) utilizes an adaptive closed-loop control of the drain current of the power amplifier to achieve improved performance for the power amplifier. Additionally, for some embodiments, use of the adaptive closed-loop control of the drain current of the power amplifier depends on the power region in which the power amplifier is operating (e.g., depends on the radio frequency power region). | 07-10-2014 |
20140197893 | Amplification Circuit Having Optimization of Power - A Power amplifier circuit comprising an input, an output comprising:
| 07-17-2014 |
20140203877 | SEMICONDUCTOR DEVICE - A semiconductor device is provided with: a field-effect transistor that has a source electrode and a drain electrode that are connected to a semiconductor layer, a gate electrode that is provided on the surface of the semiconductor layer between the source electrode and the drain electrode, and a field plate electrode that is provided on the surface of the semiconductor layer in the vicinity of the gate electrode via an insulating layer, wherein the field-effect transistor amplifies high frequency signals received by the gate electrode to be outputted from the drain electrode; and a voltage dividing circuit that divides a potential difference between the drain electrode and a reference potential GND, and applies a bias voltage such that respective parts of the field plate electrode have a mutually equal potential. | 07-24-2014 |
20140210554 | AMPLIFIERS WITH IMPROVED ISOLATION - Amplifiers with improved isolation are disclosed. In an exemplary design, an apparatus (e.g., a wireless device, an integrated circuit, etc.) includes an amplifier having a gain transistor, first and second cascode transistors, and a shunt transistor. The gain transistor receives an input signal and provides an amplified signal. The first cascode transistor is coupled between the gain transistor and an intermediate node and receives the amplified signal. The second cascode transistor is coupled between the intermediate node and an output node and provides an output signal. The shunt transistor is coupled between the intermediate node and circuit ground. The first and second cascode transistors are enabled to provide the output signal. The shunt transistor is (i) disabled when the cascode transistors are enabled and (ii) enabled to short the intermediate node to circuit ground when the cascode transistors are disabled. | 07-31-2014 |
20140210555 | RADIO FREQUENCY SIGNAL AMPLIFIER AND AMPLIFYING SYSTEM - The present disclosure provides a radio frequency signal amplifier and amplifying system using coaxial cables to apply bias voltages to the control terminals of the transistors. The radio frequency signal amplifier includes a transistor connected between an input terminal and an output terminal, a first coaxial cable configured to couple a bias voltage to a control terminal of the transistor, a feed line connected between the bias voltage and the first coaxial cable, and a second coaxial cable connected between an open stub and the control terminal of the transistor. | 07-31-2014 |
20140210556 | HIGH-FREQUENCY AMPLIFIER - Since a high-frequency signal that is output from a high-frequency oscillator circuit section is detected in a detector circuit and a bias of a negative voltage is supplied from a bias circuit section to the high-frequency amplifier circuit section with a detection voltage that is detected, a negative power supply circuit such as a DC/DC converter or a peripheral circuit is not required, and since a negative bias voltage can be supplied to a high-frequency amplifier circuit, downsizing can be achieved with a low cost. | 07-31-2014 |
20140210557 | BIAS CIRCUIT - Proposed is a bias circuit for a transistor in a C class amplifier. The bias circuit comprises: a class AB amplifier bias voltage generating means adapted to generate a bias voltage at an output terminal; and a transistor connected between the output terminal and a first reference voltage, the control terminal of the transistor being connected to a second reference voltage via a switch. Closure of the switch connects the second reference voltage to the control terminal of the transistor to cause a shift in the bias voltage generated by the class AB amplifier bias voltage generating means to achieve a predetermined class C bias voltage at the output terminal. | 07-31-2014 |
20140210558 | SYSTEMS AND METHODS FOR BIASING AMPLIFIERS USING ADAPTIVE CLOSED-LOOP CONTROL AND ADAPTIVE PREDISTORTION - Various embodiments described herein provide systems and methods for improved performance for power amplifiers, particularly GaN power amplifiers. According to some embodiments, a power amplifier (e.g., GaN power amplifier) utilizes adaptive predistortion and adaptive closed-loop control of the drain current of the power amplifier to achieve improved power amplifier performance. | 07-31-2014 |
20140240048 | AMPLIFIERS WITH MULTIPLE OUTPUTS AND CONFIGURABLE DEGENERATION INDUCTOR - Multi-output amplifiers with configurable source degeneration inductance and having good performance are disclosed. In an exemplary design, an apparatus (e.g., a wireless device or an integrated circuit) includes a gain transistor and a configurable degeneration inductor for an amplifier. The gain transistor receives an input signal and provides an amplified signal. The amplifier provides a single output signal in a first operating mode or a plurality of output signals in a second operating mode. The configurable degeneration inductor is coupled to the gain transistor and provides a first source degeneration inductance in the first operating mode or a second source degeneration inductance in the second operating mode. The second source degeneration inductance is less than the first source degeneration inductance and may be dependent on the number of output signals generated in the second operating mode. | 08-28-2014 |
20140240049 | BIAS CIRCUIT AND AMPLIFIER CONTROLLING BIAS VOLTAGE - There are provided a bias circuit and an amplifier controlling a bias voltage, the bias circuit and the amplifier including a control voltage generating unit generating a control voltage using a reference voltage, a bias voltage generating unit generating a bias voltage according to the control voltage, and a voltage drop unit dropping the bias voltage from the bias voltage generating unit to a base voltage so as to provide the base voltage to an amplifying unit, wherein the control voltage generating unit controls the control voltage according to an amplitude of a high-frequency signal input to the amplifying unit. | 08-28-2014 |
20140247092 | WIDEBAND DISTRIBUTED AMPLIFIER WITH INTEGRAL BYPASS - An improved distributed amplifier ( | 09-04-2014 |
20140266466 | Internally, Resistively, Sensed Darlington Amplifier - An internally, resistively, sensed Darlington amplifier includes a Darlington amplifier, at least an input transistor, an output transistor, a resistive divider, a signal input node, and a signal output node. The Darlington amplifier is responsive to an input signal and configured to generate an output signal. An internal bias setting resistor is coupled between the signal output node, a collector of the output transistor, and the resistive divider. The bias setting resistor is configured to set and regulate the bias current of the Darlington amplifier. | 09-18-2014 |
20140266467 | SYSTEM AND METHOD FOR REDUCING STRESS IN A CASCODE COMMON-SOURCE AMPLIFIER - A method of reducing stress in a cascode common-source amplifier including a first transistor and a second transistor connected in a cascode arrangement. The method includes providing an input voltage and a bias voltage to the first transistor and the second transistor, respectively, connected in the cascode arrangement, generating, based on the input voltage and the bias voltage, an output current, and equalizing stress associated with operation of each of the first transistor and the second transistor. Equalizing the stress includes, in response to the input voltage decreasing by an amount sufficient to cause the first transistor and the second transistor to turn off, equalizing respective voltage drops across the first transistor and the second transistor. | 09-18-2014 |
20140285268 | RADIO FREQUENCY AMPLIFYING CIRCUIT AND POWER AMPLIFYING MODULE - An radio frequency amplifying circuit includes an amplifying transistor configured to amplify a radio frequency signal input to a base of the amplifying transistor via a matching network to output the amplified radio frequency signal, a first bias transistor connected to the amplifying transistor based on a current-mirror connection to supply a bias to the amplifying transistor, and a second bias transistor connected to the base of the amplifying transistor based on an emitter-follower connection to supply a bias to the amplifying transistor. | 09-25-2014 |
20140300421 | Power Amplifier Circuit Based on a Cascode Structure - A Power amplifier circuit based on a cascode structure and to be powered by a power source voltage, e.g. a battery, said circuit comprising—a first transistor having a grid, source and drain terminal; said first transistor being connected in a common source mode;—a second grid source transistor having grid, source and drain terminal, said second transistor being connected in common grid mode;—a biasing circuit for biasing said first transistor and said second transistor. The PA is characterized in that it includes a circuit for sensing the value of the power source voltage and for generating at least a first and a second biasing voltage for the grid of said second transistor in accordance with the power source voltage sensed, said first biasing voltage providing substantially equal protection to said first and second transistors when said power source voltage is sensed to be at a high voltage and said second biasing voltage providing more voltage to said first transistor when said power source voltage is sensed to be at a low voltage. | 10-09-2014 |
20140300422 | HIGH OUTPUT POWER AMPLIFIER - A high-output electric power amplifier using a depression-type FET includes a drain voltage supply portion adapted to create a positive voltage to be applied to a drain terminal in the depression-type FET, and a gate bias voltage supply portion adapted to create a negative voltage to be applied to a gate terminal in the depression-type FET, wherein the drain voltage supply portion uses an external commercial power supply as an electric power source, and the gate bias voltage supply portion uses a battery as an electric power source, in order to certainly prevent breakdowns of the FET due to excessive electric currents. | 10-09-2014 |
20140306766 | INTEGRATED PULSE SHAPING BIASING CIRCUITRY - Integrated pulse shaping biasing circuitry for a radio frequency (RF) power amplifier includes a square wave signal generator and an inverted ramp signal generator. The square wave signal generator and the inverted ramp signal generator are coupled in parallel between an input node and current summation circuitry. The square wave signal generator generates a square wave signal. The inverted ramp signal generator generates an inverted ramp signal. The current summation circuitry receives the generated square wave signal and the inverted ramp signal, and combines the signals to generate a pulse shaped biasing signal for an RF power amplifier. The square wave signal generator, the inverted ramp signal generator, and the current summation circuitry are monolithically integrated on a single semiconductor die. | 10-16-2014 |
20140306767 | Integrated RF Front End with Stacked Transistor Switch - A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Stacks of multiple FETs in series to operate as a switching device may be used for implementation of the RF front end, and the method and apparatus of such stacks are claimed as subcombinations. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits. | 10-16-2014 |
20140333384 | CIRCUITS AND METHODS RELATED TO LOW-NOISE AMPLIFIERS HAVING IMPROVED LINEARITY - Disclosed are circuits and methods related to low-noise amplifiers (LNAs) having improved linearity. In some embodiments, a radio-frequency (RF) amplifier circuit can include a first amplifying transistor configured to amplify an RF signal. The RF amplifier circuit can further include a switchable inductance circuit that couples the first amplifying transistor to a signal ground. The switchable inductance circuit can be configured to be capable of providing at least two different inductance values that yield different linearity levels for the RF amplifier circuit. A high linearity performance can be obtained with a higher inductance and a lower bias voltage, thereby reducing power consumption of the RF amplifier. Examples of methods and devices related to such an RF amplifier circuit are disclosed. | 11-13-2014 |
20140347135 | BIPOLAR TRANSISTORS WITH CONTROL OF ELECTRIC FIELD - The invention provides a bipolar transistor circuit and a method of controlling a bipolar transistor, in which the bipolar transistor has a gate terminal for controlling the electric field in a collector region of the transistor. The bias voltage applied to the gate terminal is controlled to achieve different transistor characteristics. | 11-27-2014 |
20140347136 | APPARATUS AND METHODS FOR RADIO FREQUENCY AMPLIFIERS - Apparatus and methods for radio frequency (RF) amplifiers are disclosed herein. In certain implementations, a packaged RF amplifier includes a first bipolar transistor including a base electrically connected to an RF input pin and a collector electrically connected to an RF output pin, and a second bipolar transistor including a base electrically connected to an emitter of the first bipolar transistor and a collector electrically connected to the RF output pin. The packaged RF amplifier further includes a first bias circuit electrically connected between the base of the first bipolar transistor and the RF output pin, a second bias circuit electrically connected between the base of the first bipolar transistor and a power low pin, an inductor implemented at least partly by a bond wire, and a third bias circuit electrically connected in series with the inductor between the base of the second bipolar transistor and the power low pin. | 11-27-2014 |
20140354363 | POWER AMPLIFIER - The present disclosure relates to a power amplifier, the power amplifier comprising a first amplifier including at least two first transistors whose sources are commonly connected to form a common source, a second amplifier including at least two second transistors whose gates are commonly connected to form a common gate, the at least two second transistors being connected to the at least two first transistors in a cascode structure; and a bias supplier configured to apply to the common gate of the second amplifier a bias voltage that changes in response to an input and output power. | 12-04-2014 |
20140361836 | CURRENT AMPLIFIER AND TRANSMITTER USING THE SAME - A current amplifier and a transmitter using the same. The current amplifier includes: a first transistor having a gate coupled to a former-stage circuit, a drain coupled to a current source, and a source biased at a constant voltage level; a second transistor having a gate coupled to the current source and having a source and a drain; | 12-11-2014 |
20140368276 | SELF-BIASED RECEIVER - A receiver is disclosed. The receiver includes an amplifier and a bias circuit configured to provide a bias current to the amplifier. The bias circuit is self biasing. The bias circuit is also configured to adjust the bias current using positive feedback from the amplifier. | 12-18-2014 |
20140368277 | RADIO FREQUENCY POWER AMPLIFIER AND ELECTRONIC SYSTEM - A radio frequency (RF) amplifier is disclosed. The RF power amplifier includes a bias circuit, an output-stage circuit and a RF compensation circuit. When a first system voltage is larger than a first voltage threshold value, the bias circuit generates a first current rising slightly. When first system voltage is larger than second voltage threshold value, the RF compensation circuit receives a second circuit rising slightly transmitted from the bias circuit. When the first system voltage is in an operation voltage range, the first current is larger than the second circuit so as to a quiescent operating current of the RF power amplifier is independent of change of the first system voltage. When the first system voltage is larger than a third voltage threshold value, the first current is equal to the second current so as to have the bias current being a zero current to protect the RF power amplifier from over-voltage. | 12-18-2014 |
20140368278 | Using Multiple-Driver Stages to Realize Fast Rise/Fall Time And Large Current Capability - A driver circuit includes a first sub-driver circuit having an input coupled to receive a first pulsed signal, the first sub-driver circuit being configured to generate a first driver signal at an output thereof in response to the first pulsed signal, the first driver signal having relatively fast edge transitions and a low current capability. Also included is a second sub-driver circuit having an input coupled to receive a second pulsed signal, the second sub-driver circuit being configured to generate a second driver signal at an output thereof in response to the second pulsed signal, the second driver signal having edge transitions that are slower than those of the first driver signal and a current capability that is higher than that of the first driver signal. Further included is a combiner to combine the first driver signal and the second driver signal to generate a combined driver signal having fast edge transitions associated with the first driver signal and higher current capability associated with the second driver signal. A corresponding method is also provided. | 12-18-2014 |
20140368279 | Direct Biasing A Gate Electrode Of A Radio Frequency Power Amplifier Through a Driver Stage - A radio frequency (RF) circuit includes an amplifier circuit comprising at least one transistor amplifier having first, second, and third terminals. The RF circuit additionally includes a driver circuit comprising an enhancement-mode transistor and a depletion-mode transistor coupled in a cascade configuration having an upper portion and a lower portion, the driver circuit having an output coupled to an input of the amplifier circuit such that the driver circuit is capable of providing pulsed signals as well as a direct-current (DC) bias current to at least one terminal of a transistor amplifier of the amplifier circuit. A corresponding method is also provided. | 12-18-2014 |
20140375390 | POWER AMPLIFIER WITH IMPROVED LOW BIAS MODE LINEARITY - Power amplifier circuitry includes a power amplifier including an input node and an output node, biasing circuitry, a selectable impedance network, and an input capacitor. The input capacitor is coupled to the input node of the power amplifier. The biasing circuitry is coupled to the input node of the power amplifier through the selectable impedance network. The power amplifier is operable in a low power operating mode and a high power operating mode. In the low power operating mode, the biasing circuitry delivers a first biasing current to the input node of the power amplifier, and a first impedance level of the selectable impedance is selected. In the high power operating mode, the biasing circuitry delivers a second biasing current to the input node of the power amplifier, and a second impedance level of the selectable impedance is selected. | 12-25-2014 |
20150035605 | APPARATUS AND METHODS FOR BIASING POWER AMPLIFIERS - Apparatus and methods for biasing power amplifiers are disclosed herein. In certain implementations, a power amplifier system includes a power amplifier and a bias circuit that generates a bias voltage for biasing the power amplifier. The bias circuit includes an amplifier, a current source for generating a reference current, and a reference transistor having a current therethrough that changes in relation to the bias voltage. The amplifier can control the bias voltage based on an error current corresponding to a difference between the reference current and the current through the reference transistor. The amplifier can be used to control the bias voltage such that the reference current and the current through the reference transistor are substantially equal. | 02-05-2015 |
20150054586 | CONSTANT GM BIAS CIRCUIT INSENSITIVE TO SUPPLY VARIATIONS - A bias circuit for biasing a field effect transistor (FET) to provide a transconductance (g | 02-26-2015 |
20150054587 | HIGH-FREQUENCY POWER AMPLIFIER - The present invention provides a power amplifier that can reduce irregularities in characteristics such as gains. A high-frequency power amplifier that is used for a mobile communication terminal includes: an amplifier element that includes a composite semiconductor bipolar transistor and that amplifies high-frequency power of a predetermined frequency band with a bias voltage and a bias current supplied thereto; a bias circuit that supplies the bias voltage and the bias current to the amplifier element on the basis of a bias reference voltage; a bias reference voltage supply circuit that generates and supplies the bias reference voltage to the bias circuit; and a bias reference voltage control unit that controls the bias reference voltage supply circuit so as to generate the bias reference voltage of a voltage corresponding to a given signal. | 02-26-2015 |
20150061776 | HIGH SPEED AMPLIFIER - A circuit may include one or more transistors connected directly to an output, and a biasing network connected to at least one of a substrate, a well, and a back-gate of at least one of the transistors. The biasing network may biase the at least one of the substrate, the well, and the back-gate to a virtual floating bias, such that the virtual floating bias shifts in voltage level based upon an AC input signal of the circuit, to reduce the parasitic capacitance of the output node of the circuit. | 03-05-2015 |
20150061777 | DEVICE AND METHOD FOR BIAS CONTROL OF CLASS A POWER RF AMPLIFIER - A circuit and technique are provided to control bias setting to an FET based common source RF amplifier that can operate with large signals present. The circuit and technique described herein use a second FET in an identical circuit having the gate circuits connected in parallel and being sourced by the same drain voltage that serves as a reference to a first circuit bias setting. The drain current in a first FET will include both the bias and RF amplification current, whereas the second FET only carries the bias current. Because the devices and circuits are matched, the gate voltage variations will appear in both FETs thereby providing regulation of the drain current. | 03-05-2015 |
20150070095 | WIDEBAND BIAS CIRCUITS AND METHODS - The present disclosure includes circuits and methods for wideband biasing. In one embodiment, an amplifiers includes a cascode transistor between an input and an output of the amplifier. The cascode transistor receives a bias from a bias circuit comprising a resistor between the power supply and a first node, a resistor between the first node and a reference voltage, and a capacitor between the power supply and the first node. The power supply may be a modulated power supply, which is coupled through the bias circuit to a capacitance at the control terminal of the cascode transistor. An inductor is configured between a terminal of the cascode transistor and the power supply. The inductor may isolate the output from the modulated supply signal. | 03-12-2015 |
20150070096 | POWER AMPLIFIER - A power amplifier is smaller in size and limits input noise having a differential frequency. A power amplifier has an input terminal, an amplifying transistor, a bias circuit, a filter circuit, and an impedance matching circuit. The bias circuit supplies a bias to the signal input side of the amplifying transistor. The filter circuit removes noise at the signal input side of the amplifying transistor. The filter circuit has a matching resistor, a chip inductor, and a chip capacitor. Each of the chip inductor and the chip capacitor is a surface mount device. The matching resistor is located on a semiconductor substrate, has a first end connected to a connection point of two MIM capacitors, and a second end connected to a connection point of one of the MIM capacitors and the signal input side of the amplifying transistor. | 03-12-2015 |
20150070097 | CONFIGURABLE MULTIMODE MULTIBAND INTEGRATED DISTRIBUTED POWER AMPLIFIER - A novel and useful configurable radio frequency (RF) power amplifier (PA) and related front end module (FEM) circuit that enables manipulation of the operating point of the power amplifier resulting in configurability, multimode and multiband operating capability. The configurable PA also provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configurable power amplifier is made up of one or more configurable sub-amplifiers having each constructed to have several orders of freedom (i.e. biasing points). Each sub-amplifier and its combiner path include active and passive elements. Manipulating one or more biasing points of each sub-amplifier, and therefore of the aggregate power amplifier as well, achieves multimode and multiband operation. Biasing points include, for example, the gain and saturation point, frequency response, linearity level and EVM. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provides efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers. | 03-12-2015 |
20150077187 | DYNAMIC ERROR VECTOR MAGNITUDE DUTY CYCLE CORRECTION - Aspects of this disclosure relate to dynamic error vector magnitude (DEVM) compensation. In one embodiment, an apparatus includes an amplifier, a low pass filter, and a bias circuit. The amplifier, such as a power amplifier, can amplify an input signal. The low pass filter, such as an integrator, can generate a correction signal based at least partly on an indication of a duty cycle of the amplifier. The indication of the duty cycle of the amplifier can be an enable signal for the amplifier, for example. The bias circuit can generate a bias signal based at least partly on the correction signal and provide the bias signal to the amplifier to bias the amplifier. | 03-19-2015 |
20150084700 | Systems and Methods of RF Power Transmission, Modulation and Amplification - Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion. | 03-26-2015 |
20150091654 | HIGH VOLTAGE WIDE BANDWIDTH AMPLIFIER - A high voltage amplifier and a method of assembling and of operating a high voltage amplifier are described. The device includes a first metal-oxide-semiconductor field-effect transistor (MOSFET) driven by a first gate drive circuit. The device also includes a second MOSFET driven by a second gate drive circuit and a first optocoupler coupled to the second gate drive circuit. The first MOSFET and the second MOSFET of the high voltage amplifier drive a first output voltage. | 04-02-2015 |
20150137892 | POLARITY-SWITCHING AMPLIFIER CIRCUIT - A polarity-switching amplifier circuit includes: a first amplifying transistor and a second amplifying transistor, a transformer which includes a primary winding and a secondary winding, and a polarity-switching controller. An unbalanced input signal is input to the first amplifying transistor and the second amplifying transistor. The transformer receives an output signal of the first amplifying transistor and an output signal of the second amplifying transistor as a balanced signal input to the primary winding, and outputs a signal from the secondary winding. The polarity-switching controller turns on one of the first amplifying transistor and the second amplifying transistor and turns off the other thereof. | 05-21-2015 |
20150145603 | SYSTEM LINEARIZATION ASSEMBLY AND METHOD FOR USE IN MODIFYING DISTORTION COMPONENTS - A system linearization assembly generally includes a delay device that receives an input signal from a signal source and delays the input signal by a predetermined delay function. An attenuation device receives a modified output signal from a signal modifying device, wherein the output signal is based on the input signal and includes a time varying parameter representing a plurality of frequency components including at least one component caused by non-linear intermodulation distortion. The attenuation device attenuates the output signal by a factor that is equal to at least one parameter of the modifying device. A computing device compares the attenuated output signal with the delayed input signal to obtain a resultant signal that includes the component caused by non-linear intermodulation distortion. A detection device detects at least one parameter of the resultant signal. Based on the detected parameter, a controller facilitates a modification of the component. | 05-28-2015 |
20150145604 | HIGH EFFICIENCY RADIO FREQUENCY POWER AMPLIFIER CIRCUITRY WITH REDUCED DISTORTION - Radio frequency power amplifier circuitry includes an amplifier element, power supply modulation circuitry, and bias modulation circuitry. The amplifier element is configured to amplify an RF input signal using a modulated power supply signal and a modulated bias signal to produce an RF output signal. The power supply modulation circuitry is coupled to the amplifier element and configured to provide the modulated power supply signal. The bias modulation circuitry is coupled to the amplifier element and the power supply modulation circuitry and configured to receive the modulated power supply signal and provide the modulated bias signal. Notably, the modulated bias signal is a function of the modulated power supply signal such that the modulated bias signal is configured to maintain a small signal gain of the amplifier element and the phase of the RF input signal at a constant value as the modulated power supply signal changes. | 05-28-2015 |
20150295544 | AMPLIFIER CIRCUIT WITH OVERSHOOT SUPPRESSION - An amplifier circuit with an overshoot suppress scheme is provided. The amplifier circuit includes an input amplifier, an output amplifier and a diode device. The output amplifier is coupled to the input amplifier and outputs an output voltage. The diode device is coupled between an output end and an input end of the output amplifier. When a voltage difference between the output end and the input end of the output amplifier is greater than a barrier voltage of the diode device, the diode device is turned on, and an overshoot of the output voltage is reduced. | 10-15-2015 |
20150295548 | APPARATUS AND METHODS FOR POWER AMPLIFIERS - Apparatus and methods for power amplifiers are disclosed. In one embodiment, a power amplifier circuit assembly includes a power amplifier and an impedance matching network. The impedance matching network is operatively associated with the power amplifier and is configured to provide a load line impedance to the power amplifier between about 6Ω and about 10Ω. The impedance matching network includes a fundamental matching circuit and one or more termination circuits, and the fundamental matching circuit and each of the of the one or more termination circuits include separate input terminals for coupling to an output of the power amplifier so as to allow the fundamental matching circuit and each of the one or more termination circuits to be separately tuned. | 10-15-2015 |
20150295549 | HIGH-FREQUENCY AMPLIFIER CIRCUIT - A high-frequency amplifier circuit ( | 10-15-2015 |
20150303883 | SYSTEMS, CIRCUITS AND METHODS RELATED TO DYNAMIC ERROR VECTOR MAGNITUDE CORRECTIONS - Systems, circuits and methods related to dynamic error vector magnitude (DEVM) corrections. In some embodiments, a power amplifier (PA) system can include a PA circuit having a plurality of amplification stages, and a bias system in communication with the PA circuit and configured to provide bias signals to the amplification stages. The PA system can further include a first correction circuit configured to generate a correction current that results in an adjusted bias signal for a selected amplification stage, with the adjusted bias signal being configured to compensate for an error vector magnitude (EVM) during a dynamic mode of operation. The PA system can further include a second correction circuit configured to change the correction current based on an operating condition associated with the PA circuit. | 10-22-2015 |
20150311870 | System and Method for Capacitive Signal Source Amplifier - In accordance with an embodiment, a system for amplifying a signal provided by a capacitive signal source includes a first voltage follower device, a second voltage follower device, and a first capacitor. The first voltage follower device includes an input terminal configured to be coupled to a first terminal of the capacitive signal source, and the second voltage follower device includes an input terminal coupled to the first output terminal of the first voltage follower device, and an output terminal coupled to a second output terminal of the first voltage follower device. Furthermore, first capacitor has a first end coupled to a first output terminal of the first voltage follower device, and a second end configured to be coupled to a second terminal of the capacitive signal source. | 10-29-2015 |
20150311873 | RADIO FREQUENCY POWER AMPLIFIER AND METHOD FOR INCREASING POWER ADDED EFFICIENCY AND LINEARITY - A radio frequency (RF) power amplifier is disclosed. The RF power amplifier includes an impedance transformation circuit, a current unit gain amplifier, and an output match circuit. The impedance transformation circuit receives a first input power signal and outputs a second input power signal correspondingly, wherein the impedance transformation circuit transforms an input impedance to an output impedance according to an impedance matching parameter for increasing power added efficiency of a pre-stage circuit. The current unit gain amplifier provides a linear transimpedance so as to transmit an input current to an output impedance, and then generate a linear output power for increasing power added efficiency of the current unit gain amplifier, wherein the impedance matching parameter is determined by a first system voltage, a second system voltage, and a predetermined power gain value. | 10-29-2015 |
20150333702 | RADIO FREQUENCY AMPLIFYING CIRCUIT AND POWER AMPLIFYING MODULE - An radio frequency amplifying circuit includes an amplifying transistor configured to amplify a radio frequency signal input to a base of the amplifying transistor via a matching network to output the amplified radio frequency signal, a first bias transistor connected to the amplifying transistor based on a current-mirror connection to supply a bias to the amplifying transistor, and a second bias transistor connected to the base of the amplifying transistor based on an emitter-follower connection to supply a bias to the amplifying transistor. | 11-19-2015 |
20150333703 | VARIABLE SWITCHED DC-TO-DC VOLTAGE CONVERTER - A voltage converter can be switched among two or more modes to produce an output voltage tracking a reference voltage that can be of an intermediate level between discrete levels corresponding to the modes. One or more voltages generated from a power supply voltage, such as a battery voltage, can be compared with the reference voltage to determine whether to adjust the mode. The reference voltage can be independent of the power supply voltage. | 11-19-2015 |
20150333704 | Method for Class-B Amplifier Mismatch Correction - A calibration solution for a power amplifier array comprising a plurality of amplifier cells is presented that improves the linearity and efficiency of the power amplifier, especially when only a small number of the amplifier cells are active. To that end, a bias control word is selected from a predetermined bias table for each of the active power amplifier cells. An average of the selected bias control words is then used to bias an input stage of each active power amplifier cell. The solution presented herein provides techniques for determining the bias control words, as well as using the bias control words. | 11-19-2015 |
20150340992 | LOW POWER MULTI-STACKED POWER AMPLIFIER - An apparatus includes a plurality of stacked transistors in a multi-stacked power amplifier. At least one transistor of the plurality of stacked transistors is configured to operate in a first mode and in a second mode. The at least one transistor of the plurality of stacked transistors is configured to be biased by a low power biasing network to operate in the first mode. | 11-26-2015 |
20150349397 | RESONATING FILTER AND METHOD THEREOF - In general the embodiments described herein can provide alternating-current (AC) resonating filters. These resonating filters comprise a transmission line, a first resonator, and a second resonator. The first resonator is configured to block AC signals in a first frequency range, while the second resonator is configured to block AC signals in a second frequency range, where the second frequency range is higher than the first frequency range. The transmission line has a first node coupled to an AC source, and the first resonator is coupled to the transmission line a first distance from the first node, and the second resonator is coupled to the transmission line a second distance from the first node, where the second distance is greater than the first distance. When so configured the resonating filter can effectively block signals in multiple selected frequency bandwidths. | 12-03-2015 |
20150349715 | POWER AMPLIFIER BIAS CIRCUIT HAVING PARALLEL EMITTER FOLLOWER - Improved power amplifier (PA) bias circuit having parallel emitter follower. In some embodiments, a bias circuit for a PA can include a first bias path implemented to couple a base node of an amplifying transistor and a supply node, with the first bias path being configured to provide a base bias current to the base node. The PA can further include a second bias path implemented to be electrically parallel with the first bias path between the base node and the supply node. The second bias path can be configured to provide an additional base bias current to the base node under a selected condition. | 12-03-2015 |
20150365057 | APPARATUS AND METHODS FOR POWER AMPLIFIER OUTPUT MATCHING - Apparatus and methods for power amplifier output matching is provided. In certain configurations, an output matching circuit includes a supply voltage biasing circuit electrically connected between an input node and a power high supply voltage, a second-order harmonic series resonant circuit electrically connected between the input node and a power low supply voltage, a third-order harmonic parallel resonant circuit electrically connected between the input node and a harmonic frequency grounding node, a third-order harmonic series resonant circuit electrically connected between the harmonic frequency grounding node and the power low supply voltage, and a DC blocking capacitor electrically connected between the harmonic frequency grounding node and an output node. | 12-17-2015 |
20150381120 | SLEW RATE CONTROL BOOST CIRCUITS AND METHODS - The present disclosure amplifier circuits and methods having boosted slew rates. In one embodiment, an amplifier circuit comprises an output stage comprising a first output transistor, the first output transistor comprising a gate, a source, and a drain, wherein the gate receives a signal to be amplified. A bias circuit biases the gate of the first output transistor. A damping circuit is coupled the gate of the first output transistor and is configured to produce a high impedance at low frequencies and a low impedance at high frequencies. The damping circuit includes a current limit circuit to limit current to the gate of the first output transistor when a voltage on the gate of the first output transistor decreases in response to the signal. | 12-31-2015 |
20160036386 | DYNAMIC BIAS CURRENT ADJUSTMENT FOR POWER AMPLIFIERS - In one embodiment, a circuit comprises a power amplifier. The circuit further comprises a memory that stores bias current values corresponding to a plurality of frequencies across a frequency band for setting the bias of a power amplifier based on selected frequencies, and a controller configured to provide at least one bias current value corresponding to a selected frequency from the memory to the power amplifier in response to a frequency selection signal. The bias current value at each frequency may be selected to maximize power efficiency or minimize adjacent channel leakage-power ratio of the power amplifier at said frequency. In one embodiment, the memory further stores bias current values corresponding to the plurality of frequencies across the frequency band at a plurality of temperatures for setting the bias of a power amplifier based on a temperature of the power amplifier and on selected frequencies. | 02-04-2016 |
20160036396 | Power Amplifier, and Method of the Same - A power amplifier comprises a first inductor, a second inductor, a capacitor, a first MOS transistor, a second MOS transistor and a current source. The first and the second inductors are both connected to a first power supply. The first inductor and the second inductor form a differential inductor. The capacitor is connected to the first inductor at a first terminal of and to the second inductor at a second terminal. A drain of the first MOS transistor is connected to the first terminal of the capacitor. A drain of the second MOS transistor is connected to the second terminal of the capacitor. A first terminal of the current source is connected to sources of both the first and the second MOS transistors. A second terminal of the current source is connected to a second power supply. The current source outputs a variable current based on a bias voltage input. | 02-04-2016 |
20160036398 | VOLTAGE MODE POWER COMBINER FOR RADIO FREQUENCY LINEAR POWER AMPLIFIER - A radio frequency (RF) power combining amplifier circuit has a circuit input and a circuit output. A first amplifier is connected to the circuit input and to a first bias input. A first output matching network is connected to an output of the first amplifier and to the circuit output. A second amplifier is connected to the circuit input and to a second bias input. A second output matching network is connected to an output of the second amplifier, and to the circuit output. A voltage level of an input signal applied to the circuit input, together with the respective first bias input and the second bias input, selectively activates the first amplifier and the second amplifier. | 02-04-2016 |
20160049907 | BIAS ADJUSTMENT CIRCUITRY FOR BALANCED AMPLIFIERS - Circuitry includes a balanced amplifier and bias adjustment circuitry. The bias adjustment circuitry is coupled to the balanced amplifier and is configured to measure an RF termination voltage across an output termination impedance of the balanced amplifier and adjust a bias voltage supplied to the balanced amplifier based on the RF termination voltage. Notably, the RF termination voltage is proportional to a voltage standing wave ratio (VSWR) of the balanced amplifier, and thus enables an accurate measurement thereof. By using the RF termination voltage to adjust a bias voltage supplied to the balanced amplifier, overvoltage and/or thermally stressing conditions of the balanced amplifier as a result of high VSWR may be avoided while simultaneously avoiding the need for large or expensive isolation circuitry. | 02-18-2016 |
20160049908 | RADIO-FREQUENCY AMPLIFIER CIRCUIT AND CONTROL VOLTAGE SETTING METHOD FOR RADIO-FREQUENCY AMPLIFIER CIRCUIT - A radio-frequency amplifier circuit includes first and second FETs cascode-connected to each other. The gate of the first FET is connected to a radio-frequency input terminal, and the drain of the second FET is connected to a radio-frequency output terminal. The source of the first FET is connected to a ground, and the drain of the first FET and the source of the second FET are connected to each other. A drive voltage is applied to the drain of the second FET. A bias setting unit is connected to the gate of the second FET. The bias setting unit sets a second control voltage to be applied to the second FET so that a node voltage between the drain of the first FET and the source of the second FET will be substantially half of the drive voltage. | 02-18-2016 |
20160056772 | INTEGRATED CIRCUIT - According to one embodiment, provided are an amplifier transistor configured to amplify an input signal; a biasing circuit configured to set a bias voltage in such a manner as to allow the amplifier transistor to perform amplification; an electrostatic protective circuit configured to set the bias voltage for the amplifier transistor in such a manner as to make the amplifier transistor to turn off based on voltage to be applied to the amplifier transistor; and a switching circuit configured to switch the bias voltage for the amplifier transistor based on a power supply condition. | 02-25-2016 |
20160056778 | CASCODE POWER AMPLIFIER WITH VOLTAGE LIMITER - Cascode power amplifier with voltage limiter. A power amplification system can include an input transistor having an input transistor gate configured to receive a radio-frequency (RF) signal, an input transistor source coupled to a ground voltage, and an input transistor drain. The power amplification can further include an output transistor having an output transistor drain configured to output an amplified version of the RF signal, an output transistor gate coupled to a bias voltage, and an output transistor source. The power amplification system can further include a high voltage limiter coupled between the output transistor drain and output transistor gate. The high voltage limiter can be configured to prevent a gate-drain voltage of the output transistor from exceeding a high voltage threshold. | 02-25-2016 |
20160065135 | HIGH-FREQUENCY AMPLIFIER CIRCUIT - A high-frequency amplifier circuit comprising a first and a second amplification units connected in cascade structure and so on. The first amplification unit includes an FET of a first conductivity type having a source terminal supplied with a first potential, and a first inductor connected to an intermediate potential line, and the second amplification unit includes an FET of a second conductivity type having a source terminal supplied with a second potential, and a second inductor connected to the intermediate potential line. The intermediate potential line is supplied with an intermediate potential between the first and second potentials. The first and second amplification units are supplied with bias voltages by a first and a second bias units, respectively. An operating current for the second bias unit is controlled on the basis of the intermediate potential. | 03-03-2016 |
20160072445 | POWER AMPLIFIER MODULE - In a power amplifier module for performing slope control of a transmitting signal, a gain variation due to a variation in battery voltage is suppressed while suppressing an increase in circuit size. The power amplifier module includes: a first regulator for outputting a first voltage corresponding to a control voltage for controlling a signal level; a second regulator for outputting a second voltage that rises as a battery voltage drops; a first amplifier supplied with the first voltage as a power-supply voltage to amplify an input signal and output an amplified signal; and a second amplifier for amplifying the amplified signal, wherein the second amplifier includes a first amplification unit supplied with the second voltage as the power-supply voltage to amplify the amplified signal, and a second amplification unit supplied with the battery voltage as the power-supply voltage to amplify the amplified signal. | 03-10-2016 |
20160072485 | CIRCUIT FOR REDUCING SLOPE MAGNITUDE DURING INCREASING AND DECREASING VOLTAGE TRANSITIONS - A wave shaping circuit reduces slope magnitudes during increasing and decreasing voltage transitions. The wave shaping circuit includes a first switch that receives an input voltage having at least two voltage values where an input voltage transition between the at least two voltage values has a first slope magnitude; an inductor connected in series with the first switch; a second switch connected in a parallel arrangement with the first switch and the inductor; and a capacitor having a first end connected between the inductor and an output port and a second end connected to ground. When the input voltage begins the input voltage transition to a higher voltage value, the first switch turns on and the second switch turns off, such that the inductor limits current flow from the input voltage, decreasing a second slope magnitude of an output voltage transition to less than the first slope magnitude. | 03-10-2016 |
20160079927 | POWER AMPLIFIER - A power amplifier includes an amplification transistor which performs power amplification, a bias circuit which outputs a bias voltage to a base of the amplification transistor, a control terminal to which a control voltage is applied for controlling switching between an operating state and a stopping state of the bias circuit, and a bias voltage adjustment circuit connected to the control terminal. The bias voltage adjustment circuit includes a variable capacitance element which is connected to the control terminal and whose capacitance value decreases as the control voltage increases, a discharge circuit which discharges electric charge accumulated in the variable capacitance element to the control terminal, and a control circuit which is connected to the bias circuit and controls the bias voltage. The bias voltage adjustment circuit outputs, to the bias circuit, a bias voltage adjustment signal which increases the bias voltage for a predetermined period after the control voltage is applied. | 03-17-2016 |
20160079940 | APPARATUS AND METHODS FOR POWER AMPLIFIERS - Apparatus and methods for power amplifiers are disclosed. In one embodiment, a power amplifier circuit assembly includes a power amplifier and an impedance matching network. The impedance matching network is operatively associated with the power amplifier and is configured to provide a load line impedance to the power amplifier between about 6 Ω and about 10 Ω. The impedance matching network includes a fundamental matching circuit and one or more termination circuits, and the fundamental matching circuit and each of the of the one or more termination circuits include separate input terminals for coupling to an output of the power amplifier so as to allow the fundamental matching circuit and each of the one or more termination circuits to be separately tuned. | 03-17-2016 |
20160087589 | AMPLIFIER WITH BASE CURRENT REUSE - An RF amplifier module that has a plurality of amplifiers wherein at least one of the amplifiers is powered via an envelope tracking module. The biasing input of at least one of the amplifiers is provided to the first amplifier to power the first amplifier to reduce power consumption. The first amplifier may also be powered via fixed biasing to provide greater stability of the module. | 03-24-2016 |
20160094184 | SCHOTTKY ENHANCED BIAS CIRCUIT - Embodiments disclosed herein relate to a bias circuit that uses Schottky diodes. Typically, a bias circuit will include a number of transistors used to generate a bias voltage or a bias current for a power amplifier. Many wireless devices include power amplifiers to facilitate processing signals for transmission and/or received signals. By substituting the bias circuit design with a design that utilizes Schottky diodes, the required battery voltage of the bias circuit may be reduced enabling the use of lower voltage power supplies. | 03-31-2016 |
20160094189 | POWER AMPLIFIER BIAS CIRCUIT - Power amplifier bias circuit. A power amplifier bias circuit can include an emitter follower device and an emitter follower mirror device coupled to form a mirror configuration. The emitter follower device can be configured to provide a bias signal for a power amplifier at an output port. The power amplifier bias circuit can include a reference device configured to mirror an amplifying device of the power amplifier. The emitter follower mirror device can be configured to provide a mirror bias signal to the reference device. | 03-31-2016 |
20160099683 | AMPLIFIER HAVING ORTHOGONAL TUNING ELEMENTS - An amplifier having orthogonal tuning elements is provided. In one embodiment, an amplifier comprises an input amplifier stage having a first tuning element used to control a first performance criteria of the amplifier; an output amplifier stage operatively coupled to the first amplifier stage; a bias circuit operatively coupled to the second amplifier stage and having a second tuning element used to control a second performance criteria of the amplifier; and wherein the first tuning element operates substantially independent of the second tuning element. | 04-07-2016 |
20160099686 | LINEARITY AND NOISE IMPROVEMENT FOR MULTILEVEL POWER AMPLIFIER SYSTEMS USING MULTI-PULSE DRAIN TRANSITIONS - Described embodiments provide a radio frequency (RF) amplifier system having at least one amplifier. The at least one amplifier includes an RF input port, an RF output port and a drain bias port. At least one voltage modulator is coupled to the bias port of the least one amplifier to provide a bias voltage. The bias voltage is selected by switching among a plurality of discrete voltages. At least one filter circuit is coupled between the at least one voltage modulator and the at least one amplifier. The at least one filter circuit controls spectral components resultant from transitions in the bias voltage when switching among the plurality of discrete voltages. A controller dynamically adapts at least one setting of the at least one voltage modulator by using multi-pulse transitions when switching among the plurality of discrete voltages for a first operating condition of the RF amplifier. | 04-07-2016 |
20160099688 | PEAK VOLTAGE LIMITING CIRCUITS AND METHODS FOR POWER AMPLIFIERS - Peak voltage limiting circuits and method for power amplifiers. A power amplifier and/or a voltage limiting circuit includes a diode circuit coupled to an output of an amplification stage, the diode circuit configured to provide a conductive path from the output when an output voltage exceeds a selected value. The power amplifier and/or voltage limiting circuit also includes a sink circuit coupled to the diode circuit and a bias circuit, the sink circuit configured to reduce a bias voltage provided by the bias circuit when the output voltage exceeds the selected value to thereby limit the output voltage. | 04-07-2016 |
20160099692 | HIGH GAIN, HIGH SLEW RATE AMPLIFIER - In an example embodiment, an amplifier having high gain and high slew rate is provided and includes a pair of input transistors to which input voltage is applied, a pair of diode-connected loads coupled to the input transistors, at least one pair of current sources coupled to the diode-connected loads, and a bias control configured to turn off the at least one pair of current sources to enable high slew rate for the amplifier and to turn on the at least one pair of current sources to enable high gain for the amplifier. In specific embodiments, the current sources include transistors, the bias control controls a bias voltage to the current sources, and the bias voltage is driven to the supply voltage (V | 04-07-2016 |
20160105153 | Band-Reconfigurable and Load-Adaptive Power Amplifier - A tunable amplifier includes continuous tunability for both frequency and power levels. The tunable amplifier includes a combination of a tunable series resonator and a multi-stage LC network as the output matching network. The tunable amplifier incorporates a variable diode varactor with high breakdown voltage and high tuning range into a tunable resonator. The tunable resonator is connected to a fixed output matching network to enable a wide range of operating frequencies. The tunable amplifier enables high power, high efficiency, broadband and load-modulated power amplification, which is greatly desired for next-generation wireless communication systems and other high-frequency applications. | 04-14-2016 |
20160112010 | LOW NOISE AMPLIFIER AND CHIP - A low noise amplifier and a chip. The amplifier includes a biasing circuit unit, a first amplifying circuit unit, a first adjusting unit, a first signal input, a second signal input and a first signal output; the biasing circuit unit includes a first voltage output and a second voltage output; the first amplifying circuit unit includes a first N-type transistor, a first P-type transistor, a first output capacitor, a second output capacitor, a first impedance and a second impedance; gates of first N-type and P-type transistors are connected to first voltage output and first signal input, and second voltage output and first signal input, respectively, via adjusting unit; source of first N-type transistor is connected to source of first P-type transistor and second signal input; drains of first N-type and P-type transistors are connected respectively to impedance, and to first signal output and second signal output via output capacitor. | 04-21-2016 |
20160118939 | AMPLIFIER AND AMPLIFICATION METHOD - An amplifier comprises a biasing unit, an amplifying unit and a Schmitt trigger. The biasing unit is configured to generate a bias current which is independent of the power supply, so as to increase power supply rejection ratio. The amplifying unit is connected to the biasing unit and configured to receive an input voltage and generate an amplified voltage based on the biasing current. The Schmitt trigger is connected to the amplifier and configured to generate and output a modified voltage. | 04-28-2016 |
20160118942 | PREDISTORTION IN RADIO FREQUENCY TRANSMITTER - A power amplifier circuit includes an amplifier MOSFET and a predistorter MOSFET. The predistorter MOSFET source and drain are connected together, and the predistorter MOSFET is connected between the gate of the amplifier MOSFET and a second bias voltage signal. This biasing of the predistorter MOSFET causes it to provide a nonlinear capacitance at the gate of the amplifier MOSFET. The combined non-linear capacitances of the amplifier MOSFET and predistorter MOSFET provide predistortion that promotes cancellation of the distortion or nonlinearity contributed by the amplifier MOSFET alone. | 04-28-2016 |
20160126896 | TRANSFORMER FEEDBACK AMPLIFIER - An apparatus includes: first and second transistors, each of the first and second transistors includes a gate terminal, a source terminal, and a drain terminal; and a transformer including a primary winding and first and second secondary windings, the primary winding is coupled to a first input node configured to receive an input signal and a second input node configured to receive a potential, the first and second secondary windings are coupled to gate terminals of the first and second transistors and cross-coupled to source terminals of the first and second transistors. | 05-05-2016 |
20160126897 | SEMICONDUCTOR AMPLIFIER BIAS CIRCUIT AND SEMICONDUCTOR AMPLIFIER DEVICE - A semiconductor amplifier bias circuit includes a first transmission line, a first grounded capacitor, a second transmission line and a power supply terminal. The first transmission line is connected to an output end part of the output matching circuit and the external load. The second transmission line includes one end part connected to the first transmission line and the other end part connected to the first grounded shunt capacitor. An electrical length of the second transmission line is approximately 90° at a center frequency of a band. The one end part is connected to the first transmission line at a position apart from the output end part by an electrical length of approximately 45° at the center frequency. The power supply terminal is connected to a connection point of the first grounded shunt capacitor and the other end part of the second transmission line. | 05-05-2016 |
20160126901 | Amplifier Topology for Envelope Tracking - An amplifier ( | 05-05-2016 |
20160126906 | LOW NOISE AMPLIFIER - Circuitry includes a floating-body main field-effect transistor (FET) device, a body-contacted cascode FET device, and biasing circuitry coupled to the floating-body main FET device and the body-contacted cascode FET device. The floating-body main FET device includes a gate contact, a drain contact, and a source contact. The body-contacted cascode FET device includes a gate contact, a drain contact coupled to a supply voltage, and a source contact coupled to the drain contact of the floating-body main FET device and to a body region of the body-contacted cascode FET device. The biasing circuitry is coupled to the gate contact of the floating-body main FET device and the gate contact of the body-contacted cascode FET device and configured to provide biasing signals to the floating-body main FET device and the body-contacted cascode FET device such that a majority of the supply voltage is provided across the body-contacted cascode FET device. | 05-05-2016 |
20160134241 | POWER AMPLIFIER - A power amplifier has improved power added efficiency at high output power. The power amplifier includes: a first transistor for amplifying an input signal input to the base thereof and outputting the amplified signal from the collector thereof; a second transistor with power-supply voltage applied to the collector thereof to supply bias voltage or bias current from the emitter thereof to the base of the first transistor; a third transistor whose collector is connected to the collector of the first transistor to amplify the input signal input to the base thereof and output the amplified signal from a collector thereof; a fourth transistor whose base and collector are connected to supply bias from the emitter thereof to the base of the third transistor; and a first resistor with bias control voltage applied to one end thereof and the other end connected to the bases of the second and fourth transistors. | 05-12-2016 |
20160134242 | POWER AMPLIFIER - The present disclosure is to improve the power added efficiency of a power amplifier at high output power. The power amplifier includes: a first capacitor with a radio frequency signal input to one end thereof; a first transistor whose base is connected to the other end of the first capacitor to amplify the radio frequency signal; a bias circuit for supplying bias to the base of the first transistor; and a second capacitor with one end connected to the base of the first transistor and the other end connected to the emitter of the first transistor. | 05-12-2016 |
20160134243 | BIAS-BOOSTING CIRCUIT WITH DUAL CURRENT MIRRORS FOR RF POWER AMPLIFIER - An RF power amplifier circuit has a signal input and a signal output. An input matching network connected to the signal input, and an output matching network is connected to the signal output. There is a power amplifier with an input connected to the input matching network, and an output connected to the output matching network. A bias boosting circuit is connected to the input of the power amplifier, and the bias boosting circuit comprises a cascode current mirror that is defined by a first cascode circuit and a second cascode circuit, and a biasing transistor that is connected to an output of the cascode current mirror. The biasing transistor, together with the power amplifier, defines a current mirror. The bias boosting circuit is thus a dual current mirror circuit that boosts the bias of the power amplifier. | 05-12-2016 |
20160134245 | BIAS CIRCUIT AND POWER AMPLIFIER HAVING THE SAME - A bias circuit providing different bias voltages depending on a power mode through a simple circuit, and a power amplifier having the same are provided. The bias circuit and the power amplifier include a bias setting unit configured to vary a voltage level of a control signal controlling a bias voltage according to an operation of a first transistor being switched-off in a high power mode and switched-on in a low power mode. A bias supplying unit includes a bias supplying transistor switched based on the control signal, to supply the bias voltage having a voltage level according to a switching operation of the bias supplying transistor. | 05-12-2016 |
20160142014 | BIAS CIRCUIT FOR USE WITH AMPLIFIER CIRCUIT, CONTROL METHOD THEREOF, AND SIGNAL AMPLIFIER - A bias circuit comprises: a first circuit that comprises a first resistor and a decoupling capacitor; a bias voltage generation circuit that comprises a first transistor being connected to the first circuit; one or more switches; a first replica circuit comprising a second circuit and a second transistor, the second circuit comprising a second resistor and a capacitor, the second transistor being connected to the second circuit; a second replica circuit comprising a third transistor; a comparator that makes a comparison between a pseudo-bias voltage and a reference voltage; and a control circuit that controls the one or more switches on the basis of the comparison result to reduce the amount of the current flowing through the first transistor. | 05-19-2016 |
20160156315 | PARALLEL RESONANT CIRCUIT | 06-02-2016 |
20160164469 | Amplifier Dynamic Bias Adjustment for Envelope Tracking - An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor. | 06-09-2016 |
20160164470 | METHOD, APPARATUS AND SYSTEM FOR ENVELOPE TRACKING - This disclosure relates generally to the field of wireless communication infrastructure, and more particularly to a method, apparatus and system for envelope tracking. The system for envelope tracking comprising: a transistor; an RF transistor; a driver; a switcher current source; and a subtracting network; wherein the system is configured such that when an envelope voltage is less than a predetermined voltage value, the RF transistor is configured for decreasing an amount of absorbed biasing current, and when the envelope voltage is greater than a predetermined voltage value, the RF transistor is configured for increasing an amount of absorbed biasing current. The goal of RF transistor sinking is to absorb the redundant biasing current generated by the envelope tracking supply modulator to eliminate distortions. | 06-09-2016 |
20160164471 | RADIO FREQUENCY DEVICES WITH SURFACE-MOUNTABLE CAPACITORS FOR DECOUPLING AND METHODS THEREOF - An embodiment of a radio-frequency (RF) device includes at least one transistor, a package, and a surface-mountable capacitor. The package contains the at least one transistor and includes at least one termination. The surface-mountable capacitor is coupled in a shunt configuration between the at least one transistor and a power supply terminal of the device to decouple the at least one transistor from a power supply. | 06-09-2016 |
20160173042 | NOVEL LOW NOISE AMPLIFIER ARCHITECTURE FOR CARRIER AGGREGATION RECEIVERS | 06-16-2016 |
20160181988 | METHODS AND CIRCUITS TO REDUCE POP NOISE IN AN AUDIO DEVICE | 06-23-2016 |
20160181989 | MULTI-MODE POWER AMPLIFIER | 06-23-2016 |
20160181990 | DUAL-BAND DOHERTY AMPLIFIER AND METHOD THEREFOR | 06-23-2016 |
20160190991 | Low Noise Amplifier - The embodiments of the present disclosure provide a low noise amplifier including: an input stage circuit; a bias circuit, adapted for providing bias to the input stage circuit; an output stage circuit; a first amplifier and a second amplifier; a first middle stage circuit, adapted for implementing inter-stage matching, signal coupling and isolation between the input stage circuit and the first amplifier; and a second middle stage circuit, adapted for implementing inter-stage matching between the first amplifier and the second amplifier, wherein the first middle stage circuit is coupled with the second middle stage circuit via the first amplifier, and the second middle stage circuit is coupled with the output stage circuit via the second amplifier. Accordingly, amplifier gain of LNA is improved without increasing power consumption. | 06-30-2016 |
20160190992 | Bias Circuit for a Transistor Amplifier - A bias circuit for a transistor amplifier, the bias circuit comprising a low-pass filter block, a reference transistor, a sum node, a reference current source, and a current difference block, wherein
| 06-30-2016 |
20160197586 | PEAK DETECTING CASCODE FOR BREAKDOWN PROTECTION | 07-07-2016 |
20160204744 | AMPLIFYING DEVICE AND RADIO COMMUNICATION DEVICE | 07-14-2016 |
20160204745 | LINEAR AMPLIFIER USING NONLINEAR AMPLIFYING STAGE | 07-14-2016 |
20160254790 | DISTRIBUTED AMPLIFIER | 09-01-2016 |
20160380599 | DC BIAS CIRCUIT AND THE RADIO FREQUENCY RECEIVER CIRCUIT USING THE SAME - The present invention presents a DC bias circuit including a first biasing circuit and a second biasing circuit. The first biasing circuit includes a first biasing transistor and a first biasing resistor for providing a first bias voltage to an output transistor of the mixer circuit. The first biasing transistor and the output transistor are the same type of transistor and have equal channel lengths. The second biasing circuit includes a second biasing transistor and a second biasing resistor for providing a second bias voltage to an input transistor of the common gate amplifier circuit. The second biasing transistor and the input transistor are the same type of transistor and have equal channel lengths. When the input transistor and the output transistor all operate in a saturation region, alternating current signals output from the mixer circuit is unrelated to a threshold voltage of the output transistor. | 12-29-2016 |
20170237400 | POWER AMPLIFIER | 08-17-2017 |
20180026582 | POWER AMPLIFIER CIRCUIT | 01-25-2018 |
20190149095 | POWER AMPLIFIER CIRCUIT | 05-16-2019 |
20190149100 | AMPLIFIER CIRCUIT WITH OVERSHOOT SUPPRESSION | 05-16-2019 |