Class / Patent application number | Description | Number of patent applications / Date published |
330288000 | Including current mirror amplifier | 48 |
20080303596 | AMPLIFIER CIRCUIT HAVING AN OUTPUT TRANSISTOR FOR DRIVING A COMPLEX LOAD - An amplifier circuit is disclosed having an output transistor for driving a complex load over a drive frequency range, wherein in the lower part of the range an inductive component of the load dominates and in the upper part the inductive component does not dominate. The amplifier circuit includes a current mirror circuit that is connected upstream of the output transistor and has a shunt path to a second potential, for the purpose of relatively reducing a DC current flowing through the output transistor in comparison with an AC current flowing through the latter. | 12-11-2008 |
20090021308 | Voltage Regulator Startup Method and Apparatus - A voltage regulator circuit comprises an amplifier, bias network and startup circuit. The bias network is configured to generate a bias voltage for setting a bias current in the amplifier. The startup circuit is configured to mirror the amplifier bias current and to assist the bias network in setting the amplifier bias current based on the mirrored amplifier bias current until the bias voltage approximates a desired level. | 01-22-2009 |
20090072909 | CURRENT MIRROR CIRCUIT - An all-NPN bipolar junction current mirror circuit for mirroring an input reference current is disclosed. The circuit includes an input stage for providing an input reference current to the current mirror circuit, a reference stage for mirroring the input reference current and an output stage electrically connected to the reference stage for providing the mirrored input current to at least one load. | 03-19-2009 |
20090079505 | GROUND SKIMMING OUTPUT STAGE - Ground skimming output stages that are designed to drive wideband signals with the ability to provide a high quality output signal all the way to the low supply rail are provided. In accordance with an embodiment of the present invention, the output stage of the present invention includes a translinear current controller, an output transistor and a current mirror. While not limited thereto, embodiments of the present invention only require a single positive power supply, consistent with the recent trend toward integrated circuits that only require a single low voltage power supply. | 03-26-2009 |
20090091393 | DUAL-PATH CURRENT AMPLIFIER - A dual-path current amplifier having a slow high-gain path and a fast low-gain path is described. In one design, the slow high-gain path is implemented with a positive feedback loop and has a gain of greater than one and a bandwidth determined by a pole. The fast low-gain path has unity gain and wide bandwidth. The two signal paths receive an input current and provide first and seconds currents. A summer sums the first and second currents and provides an output current for the dual-path current amplifier. The dual-path current amplifier may be implemented with first and second current mirrors. The first current mirror may implement the fast low-gain path. The first and second current mirrors may be coupled together and implement the slow high-gain path. The first current mirror may be implemented with P-FETs. The second current mirror may be implemented with N-FETs, an operational amplifier, and a capacitor. | 04-09-2009 |
20090146739 | OPTICAL RECEIVER AND AMPLIFIER AND PHOTOCOUPLER USING THE SAME - In an optical receiver and amplifier and an optical coupler, a technique for stabilize operations at turning on/off of a power supply by a simple configuration is desired. An optical receiver and amplifier includes: a photodiode generates a photocurrent in response to a light input; an output section outputs output voltage being a low level or a high level in response to a magnitude of the photocurrent by using a power supply voltage supplied from a power supply; and an output control circuit controls an input voltage of the output section such that the output voltage is set to the low level when the power supply is turned on or off during a period where the power supply voltage is lower than a predetermined value. The output voltage can be set to the low level so that an additional circuit for preventing malfunction is not needed. | 06-11-2009 |
20090160557 | SELF-BIASED CASCODE CURRENT MIRROR - A self-biased cascode current mirror circuit, including a first transistor having a first current electrode, a control electrode, and a second current electrode; a second transistor having a first current electrode coupled to the second current electrode of the first transistor, a control electrode coupled to the first current electrode of the first transistor, and a second current electrode coupled to a terminal; a third transistor having a first current electrode configured to provide an output current, a control electrode coupled to the control electrode of the first transistor and the first current electrode of the third transistor, and a second current electrode; and a fourth transistor having a first current electrode coupled to the second current electrode of the third transistor, a control electrode coupled to the control electrode of the second transistor, and a second current electrode coupled to the terminal. | 06-25-2009 |
20100007422 | AMPLIFIER CIRCUIT - There is provided an amplifier circuit includes: an amplifying transistor; a first transistor having a DC current amplification factor generally equal to the DC current amplification factor of the amplifying transistor and constituting a current mirror circuit in conjunction with the amplifying transistor; and a current source circuit being operable to supply a current to the first transistor and including a second transistor having opposite conductivity type to the conductivity type of the first transistor. The second transistor is operated in a saturation region at a power supply voltage lower than an operating voltage range so that the DC current amplification factor of the amplifying transistor can be detected. | 01-14-2010 |
20100045384 | System And Method For Pre-Charging A Current Mirror - A system for pre-charging a current mirror includes a controller configured to provide a first current and an additional current to a current mirror to rapidly charge a capacitance associated with the current mirror based on a reference voltage or control signals. A power amplifier module includes at least one current mirror and a controller. A capacitor is coupled to the current mirror. The controller provides a bias current in an amount proportional to an input to a voltage-to-current converter. The controller receives a control signal that directs the controller to apply one of a pre-charge voltage and a nominal voltage to the voltage-to-current converter. | 02-25-2010 |
20100219892 | CURRENT LIMITER CIRCUIT - The present invention relates to a circuit configuration for detecting and rapidly limiting large current increase based on high current injection at the output terminal (out). In particular, a gate-controlled switching device (PO), controlled by a driver circuit ( | 09-02-2010 |
20100271134 | High Gain Stacked Cascade Amplifier with Current Compensation to reduce Gain Compression - A high gain stacked cascade amplifier includes a first amplifying element, a second amplifying element, a current mirror bias element, and a dynamic bias adjustment element. The first and second amplifying elements are coupled in series to form the high gain stacked cascade amplifier configuration. The current mirror bias element provides a bias to the first and second amplifying elements. The dynamic bias adjustment element is coupled to the second amplifying element. The dynamic bias adjustment element is configured to increase a gain compression point of a composite filter, formed by the first and second amplifying elements, in response to a determination that an input signal causes gain compression in the first amplifying element. | 10-28-2010 |
20100295620 | HIGH-SPEED, MULTI-STAGE CLASS AB AMPLIFIERS - A multi-stage Class AB amplifier system includes a first Class AB amplifier circuit configured to receive an input signal. A bias circuit is configured to receive an output of the first Class AB amplifier circuit. A second Class AB amplifier circuit is in communication with the bias circuit. The second Class AB amplifier circuit is configured to generate an output signal. A current mirror circuit is arranged between the first Class AB amplifier circuit and the bias circuit. A common-mode feedback circuit is configured to generate a feedback signal based on the output signal. | 11-25-2010 |
20110001565 | HIGH-SPEED, MULTI-STAGE CLASS AB AMPLIFIERS - A multi-stage Class AB amplifier system includes a first Class AB amplifier circuit and a second Class AB amplifier circuit. A current mirror circuit is in communication with the first Class AB amplifier circuit. A bias circuit is in communication with the current mirror circuit. A frequency compensation circuit is arranged between the bias circuit and the second Class AB amplifier circuit. A common-mode feedback circuit is in communication with the second Class AB amplifier circuit. The common-mode feedback circuit is configured to generate a feedback signal. | 01-06-2011 |
20110006847 | HIGH-VOLTAGE IMPULSE AMPLIFIER - A circuit includes a first transistor in a common-collector configuration and a heterojunction bipolar transistor (HBT) in a common-emitter configuration. The first transistor has a base coupled to an input node for receiving a pulsed signal. A collector of the first transistor is coupled to a first voltage source node. A base of the HBT is coupled to an emitter of the first transistor. A collector of the HBT is coupled to a second voltage source node configured to bias the HBT normally off. The HBT operating isothermally when the pulsed signal has a short-pulse width and a low duty cycle. The first transistor drives the HBT when the pulsed signal is received at the base of the first transistor to output an amplified pulsed signal at the collector of the HBT. | 01-13-2011 |
20110032037 | POWER AMPLIFIER BIAS CIRCUIT HAVING CONTROLLABLE CURRENT PROFILE - A power amplifier bias circuit having a controllable current profile includes a first transistor device configured as a switch, and configured to receive a non-regulated system voltage, and a plurality of resistors configured to provide a current and configured to determine an amount of a bias current that flows through a second transistor device, where the second transistor device is part of a current mirror comprising a third transistor device and the amount of bias current flowing through the second transistor device determines a power output of the third transistor device. | 02-10-2011 |
20110133842 | RADIO-FREQUENCY AMPLIFIER - A radio-frequency amplifier includes a common gate amplification stage configured to be biased in a saturation condition with a first current and configured to receive an input signal as a gate-source voltage and to generate an output voltage as an amplified replica of the input signal. A feedback transistor is configured to be biased in a saturation condition with a second current and coupled to the common gate amplification stage so as to have a gate-drain voltage corresponding to a difference between the output voltage and the input signal. | 06-09-2011 |
20110210795 | HIGH FREQUENCY POWER AMPLIFIER AND OPERATING METHOD THEREOF - A high-frequency power amplifier which can reduce a variation of power gain due to the dependence on gate length of a power amplification field effect transistor is provided. The high-frequency power amplifier comprises, over a semiconductor chip, a bias control circuit, a bias transistor and an amplification transistor which are coupled so as to configure a current mirror circuit, and a gate length monitor circuit comprising a replicating transistor. The amplification transistor amplifies an RF signal and a bias current of the bias control circuit is supplied to the bias transistor. The transistors are fabricated by the same semiconductor manufacturing process, and have the same variation of gate length. The gate length monitor circuit generates a detection voltage depending on the gate length. According to the detection voltage, the bias control circuit controls the bias current, thereby compensating the gate length dependence of transconductance of the amplification transistor. | 09-01-2011 |
20110227653 | Electronic Circuit Output Stage - An electronic circuit including: a first branch, placed between two terminals of application of a D.C. voltage, including a series connection of a first constant current source, of a first diode-connected N-channel MOS transistor, of a first diode-connected P-channel MOS transistor, and of a second constant current source; a second branch, parallel to the first branch, comprising a series connection of a second N-channel MOS transistor connected as a current mirror on the first N-channel MOS transistor and of a second P-channel MOS transistor connected as a current mirror on the first P-channel transistor; and an input terminal connected between the first N-channel and P-channel transistors and an output terminal connected between the second N-channel and P-channel transistors. | 09-22-2011 |
20110260796 | BIAS CIRCUIT, POWER AMPLIFIER, AND CURRENT MIRROR CIRCUIT - There is provided a bias circuit that can operate even at low voltage and control a current reflecting a change in drain voltage. A first current mirror circuit for feeding back a drain terminal current of an FET which receives an output of an operational amplifier at a gate terminal to an input terminal of the operational amplifier and a second current mirror circuit are coupled in parallel. A variable voltage is coupled to the first current mirror circuit, and a fixed voltage is coupled to the second current mirror circuit. Even if the variable voltage becomes lower than the threshold voltage of FETs configuring the first current mirror circuit, the second current mirror circuit feeds back the current to the input terminal of the operational amplifier with reliability. | 10-27-2011 |
20110285466 | POWER AMPLIFIER CIRCUIT - A power amplifier circuit has a Gm amplifier, first and second transistors, third and fourth transistors consisting a mirror circuit, fifth and sixth transistors consisting a mirror circuit, seventh and eighth transistors consisting a mirror circuit, a ninth transistor of the first conductivity type which is connected at a first end thereof to the first power supply rail, connected at a second end thereof to a signal output terminal for outputting an amplified signal, and connected at a control terminal thereof to the inverting output terminal, and a tenth transistor of the second conductivity type connected at a first end thereof to the signal output terminal, connected at a second end thereof to the second power supply rail, and connected at a control terminal thereof to the noninverting output terminal. | 11-24-2011 |
20120086513 | INSTRUMENTATION INPUT SYSTEMS - An input stage for an instrumentation system may include a resistor coupled between an input terminal and a summing node, and an amplifier arranged to maintain the voltage at the summing node. In anther embodiment, an instrumentation input system may include an input stage to receive a signal to be measured, and a variable gain amplifier having an input coupled to an output of the input stage, wherein the variable gain amplifier comprises two or more gain stages. A variable gain amplifier may include an attenuator having an input and a series of tap points and a series of low-inertia switches to steer outputs from the attenuator to an output terminal. | 04-12-2012 |
20120092073 | TRANS-IMPEDANCE AMPLIFIER FOR OPTICAL RECEIVER - A trans-impedance amplifier (TIA) for an optical receiver is disclosed, where the TIA stabilizes the cross point in the output thereof independent of the variation of the power supply. The TIA of the invention includes an amplifier section, a source follower, and a bias generator. A transistor in the source follower to define the current flowing in the source follower and another transistor in the bias generator constitute a current-mirror circuit. The operating point of the other transistor in the bias generator depends on the variation of the power supply. The output level of the amplifier section follows the variation of the power supply. | 04-19-2012 |
20120112838 | RF POWER AMPLIFIER AND RF POWER MODULE USING THE SAME - The RF power amplifier circuit including multiple amplification stages has a previous-stage amplifier, a next-stage amplifier and a controller. The previous-stage amplifier responds to an RF transmission input signal. The next-stage amplifier responds to an amplification signal output by the previous-stage amplifier. In response to an output-power-control voltage, the controller controls the former- and next-stage amplifiers in quiescent current and gain. In response to the output-power-control voltage, the quiescent current and gain of the previous-stage amplifier are continuously changed according to a first continuous function, whereas those of the next-stage amplifier are continuously changed according to a second continuous function. The second continuous function is higher than the first continuous function by at least one in degree. The RF power amplifier circuit brings about the effect that the drop of the power added efficiency in low and middle power modes is relieved. | 05-10-2012 |
20120139637 | LINEAR AMPLIFIER - There is provided a linear amplifier capable of suppressing a reduction in bandwidth and reducing a ripple voltage by using a source follower and a local feedback loop. The linear amplifier includes an amplifier amplifying an input signal according to a difference in signal level between the input signal and a feedback signal, and a buffer buffering a signal amplified in the amplifier by a source follow method, suppressing a reduction in bandwidth of the signal, outputting the signal, and providing the buffered signal to the amplifier as the feedback signal. | 06-07-2012 |
20120161876 | ACCURATE BIAS TRACKING FOR PROCESS VARIATION AND SUPPLY MODULATION - A current mirror includes a bias branch, which includes first and second transistors in series between a voltage source and ground, a voltage divider coupled between the voltage source and ground, an op-amp configured to receive a divided voltage of the voltage divider and a voltage of a node between the first and second transistors, and drive a gate of the second transistor to pull the node to the divided voltage. The current mirror further includes a power amplifier core coupled to the bias branch. The power amplifier core includes first and second drive transistors configured in series between the voltage source and ground. Gates of the first transistor and the first drive transistor are coupled, and gates of the second transistor and the second drive transistor are coupled. | 06-28-2012 |
20120176198 | BIAS GENERATION CIRCUIT, POWER AMPLIFIER MODULE, AND SEMICONDUCTOR DEVICE - There is provided a bias circuit including a power amplifier in which influence of variation of a gate length L is reduced and variation of a gain among products is low. Two NPN- and PNP-type current mirror circuits | 07-12-2012 |
20120182073 | Apparatus and Method for Programmable Power Management in a Programmable Analog Circuit Block - An apparatus and method for programmable power management in a programmable analog circuit block. Specifically, the present invention describes an operational amplifier circuit that includes current sources that are coupled in parallel. Configuration bits are asserted to selectively enable or selectively disable one or more of the current sources in order to modulate the performance of the operational amplifier circuit block. Selective addition or removal of current sources increases or decreases the amount of current within the operational amplifier and, correspondingly, the speed and power consumption of the operational amplifier. Combinations of asserted configuration bits pass a bias voltage in order enable selected current sources. In one embodiment, the bias voltage can be increased in order to increase the current output of one of the current sources which, correspondingly, increases the speed of the operational amplifier circuit block. | 07-19-2012 |
20120188019 | OUTPUT CIRCUIT - Provided is an output circuit capable of allowing a more sufficient output current to flow. When a drain current of a PMOS transistor ( | 07-26-2012 |
20120242410 | BIPOLAR STACKED TRANSISTOR ARCHITECTURE - An amplifier for an integrated circuit has a plurality of ratioed current mirrors connected to each other in a stacked configuration. Each ratio mirror has at least two resistors and at least two bipolar transistors connected to each other via said at least two resistors. Each amplifying transistor, contains a capacitor, and potentially and inductor, to internally match the transistors that make up the amplifying stack. DC, harmonic and s-parameter simulations are performed to provide an optimal impedance for each of the stacked transistors to maximize the RF power output of each stacked layer and the amplifier. | 09-27-2012 |
20120256690 | POWER AMPLIFIER CIRCUIT WITH MEANS FOR TUNING WAVE SHAPE OF ASK RF SIGNAL ENVELOPE, AND METHOD FOR IMPLEMENTING THE POWER AMPLIFIER CIRCUIT - A power amplifier circuit can be linked to an antenna arrangement of a communication system for transmission of ASK RF data signals. The power amplifier circuit includes an amplifier core with several cascode amplifier cells in parallel. Each cascode amplifier cell is composed of three NMOS transistors in triode mounting between an output terminal connected to the antenna arrangement, and an earth terminal. A first transistor of each cascode amplifier cell is controlled by a carrier frequency signal, whereas a second transistor of each cascode amplifier cell is controlled by a smoothing control loop in order to modulate data to be transmitted on carrier frequency by amplitude shift keying. The smoothing control loop is provided for generating an increasing gate voltage for the second transistors on the basis of an increasing current ramp from a first minimum current value to a second maximum current value during a “0” to “1” data transition. The smoothing control loop is provided for generating a decreasing gate voltage for the second transistors on the basis of a decreasing current ramp from the second maximum current value to the first minimum current value during a “1” to “0” data transition for shaping the envelope of ASK RF data signals to be transmitted. | 10-11-2012 |
20120306577 | Open-Loop Transimpedance Amplifier for Infrared Diodes - A microcontroller integrated circuit includes an open-loop transimpedance amplifier (OLTA). An input lead of the OLTA is a terminal of the microcontroller. The cathode of a photodiode is connected to VDD and the anode is connected to the terminal. The OLTA maintains the photodiode in a strongly reverse-biased condition, thereby keeping diode capacitance low and facilitating rapid circuit response. The input of the OLTA involves a diode-connected field effect transistor that provides a low impedance. This low impedance decreases as the diode current increases, thus providing effective clamping of the voltage on the terminal. By this clamping, the amount of photodiode capacitance discharging necessary when transitioning from a high input current condition to a low input current condition is reduced, thereby further improving amplifier response time. The OLTA is small and consumes less than thirty microamperes and functions to mirror photodiode current and compare to a predetermined level. | 12-06-2012 |
20130021103 | HIGH POWER WIDEBAND AMPLIFIER AND METHOD - An amplifier including a high supply voltage source and a low supply voltage source and two parallel signal paths. Each signal path is connected to the high and the low supply voltage sources and includes a first amplifier and a second amplifier. The two signal paths are connected to each other only at a common input node and a common output node, so that the respective first amplifiers operate independently of each other. The first amplifiers are configured to convert at least a part of an input voltage signal into a signal current. The signal paths are configured so that the signal current in use drives the respective second amplifier to provide an amplified output current to the common output node. | 01-24-2013 |
20130043952 | Circuit and Method for Adjusting an Offset Output Current for an Input Current Amplifier - A circuit and a method for correcting an offset is provided that includes a current amplifier and an adjusting circuit for correcting an offset of an output current of the current amplifier. Wherein the adjusting circuit has a controlled current source, an output of the controlled current source is connected to the current amplifier for impressing an output current of the controlled current source in the current amplifier, an input of the controlled current source to form a regulation element of a control loop is connected by a first switching device of the adjusting circuit to an output of the current amplifier and to form a holding element is disconnected from the output of the current amplifier by the first switching device. The controlled current source, acting as a regulation element in the control loop, is set up to regulate the offset to a minimum by setting of a current value of the output current, and the controlled current source, acting as a holding element, is set up to hold the current value, associated with the minimum, of the output current. | 02-21-2013 |
20130063212 | TRANSIMPEDANCE AMPLIFIER AND LIGHT RECEIVING CIRCUIT - A transimpedance amplifier includes a first MOS transistor, a current mirror circuit, a second MOS transistor, a load and a first feed back resistor. The first MOS transistor has a gate terminal to which a photodiode is connected. An output current of the first MOS transistor is input to the current mirror. The second MOS transistor has a gate terminal to which a voltage of an output terminal of the current mirror circuit is input. A source of the second MOS transistor is grounded. A polarity of the second MOS transistor is same as a polarity of the first MOS transistor. A first feedback resistor is connected between the gate terminal of the first MOS transistor and a drain terminal of the second MOS transistor. The second MOS transistor outputs a voltage corresponding to the voltage of the output terminal from the drain terminal. | 03-14-2013 |
20130076445 | POWER AMPLIFYING APPARATUS WITH DUAL-CURRENT CONTROL MODE - There is provided a power amplifying apparatus with dual-current control mode, including: a transistor mirror circuit adjusting currents respectively flowing through a main path and a mirror path connected in parallel to a power source terminal; a resistor mirror circuit adjusting the respective currents of the main path and the mirror path; a current controlling unit controlling a control current flowing through the main path with a pre-set constant current; a voltage adjusting unit providing a bias adjustment signal that corresponds to a difference voltage between a first voltage of a first node on the main path to which a current is output from the resistor mirror circuit and a second voltage of a second node on the mirror path to which a current is output from the resistor mirror circuit; and a bias circuit unit adjusting a bias of a power amplifying unit. | 03-28-2013 |
20130300506 | ACCURATE BIAS TRACKING FOR PROCESS VARIATION AND SUPPLY MODULATION - A current mirror includes a bias branch, which includes first and second transistors in series between a voltage source and ground, a voltage divider coupled between the voltage source and ground, an op-amp configured to receive a divided voltage of the voltage divider and a voltage of a node between the first and second transistors, and drive a gate of the second transistor to pull the node to the divided voltage. The current mirror further includes a power amplifier core coupled to the bias branch. The power amplifier core includes first and second drive transistors configured in series between the voltage source and ground. Gates of the first transistor and the first drive transistor are coupled, and gates of the second transistor and the second drive transistor are coupled. | 11-14-2013 |
20140015611 | METHOD AND APPARATUS FOR FEEDBACK-BASED RESISTANCE CALIBRATION - A circuit has a first circuit module including a first resistor and first and second transistors coupled in parallel with the first resistor. The first resistor and the first and second transistors are coupled together at a first node. An equivalent resistance across the first circuit module increases as a voltage of the first node is increased from a first voltage to a second voltage, and the equivalent resistance across the first circuit module decreases as the voltage of the first node is increased from the second voltage to a third voltage. | 01-16-2014 |
20140085005 | CIRCUIT TO PREVENT LOAD-INDUCED NON-LINEARITY IN OPERATIONAL AMPLIFIERS - Apparatus and methods for reducing load-induced non-linearity in amplifiers are provided. In certain implementations, an amplifier includes a current mirror, a buffer circuit, and an output stage. The buffer circuit can have a relatively high current gain and a voltage gain about equal to 1. The buffer circuit can amplify a mirrored current generated by the current mirror and provide the amplified mirrored current to the output stage, thereby helping to balance or equalize currents in the current mirror and avoiding the impact of load-induced offset error. | 03-27-2014 |
20140139290 | SYSTEM AND METHOD FOR PRE-CHARGING A CURRENT MIRROR - A system for pre-charging a current minor includes a controller configured to provide a first current and an additional current to a current minor to rapidly charge a capacitance associated with the current minor based on a reference voltage or control signals. A power amplifier module includes at least one current minor and a controller. A capacitor is coupled to the current minor. The controller provides a bias current in an amount proportional to an input to a voltage-to-current converter. The controller receives a control signal that directs the controller to apply one of a pre-charge voltage and a nominal voltage to the voltage-to-current converter. | 05-22-2014 |
20140232467 | HIGH-FREQUENCY AMPLIFIER MODULE AND HIGH-FREQUENCY AMPLIFIER MODULE UNIT - A high-frequency amplifier module includes a driver-stage amplifier | 08-21-2014 |
20140340154 | SYSTEMS AND METHODS FOR IMAGE LAG MITIGATION FOR BUFFERED DIRECT INJECTION READOUT WITH CURRENT MIRROR - Embodiments relate to systems and methods for image lag mitigation for a buffered direct injection readout circuit with current mirror. A photo detector device is coupled to a buffered direct injection (BDI) circuit, in which an operational amplifier and other elements communicate the output signal from the detector to subsequent stages. The BDI output is transmitted to a first current mirror, which can be implemented as a Säckinger current mirror. The first current mirror is coupled to a second current mirror, one of whose outputs is a fixed bias current. Image lag can be controlled by the fixed bias current, rather than the photocurrent produced directly by the optical detector. In aspects, the negative feedback provided by the first current mirror can increase the modulation of the second current mirror. This gain factor can reduce image lag to a significantly lower point than the lag experienced by known BDI-current-modulated readout circuitry without Säckinger current mirror. | 11-20-2014 |
20140347130 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND HIGH-FREQUENCY POWER AMPLIFIER MODULE - The invention provides a semiconductor integrated circuit device and a high-frequency power amplifier module capable of reducing variations in the transmission power characteristics. The semiconductor integrated circuit device and the high-frequency power amplifier module each include, for example, a bandgap reference circuit, a regulator circuit, and a reference-voltage correction circuit which is provided between the bandgap reference circuit and the regulator circuit and which includes a unity gain buffer. The reference-voltage correction circuit corrects variations in a bandgap voltage from the bandgap reference circuit. The reference-voltage correction circuit includes first to third resistance paths having mutually different resistance values, and corrects the variations by selectively supplying a current which reflects an output voltage of the unity gain buffer to any one of the first to third resistance paths. The selection in this case is performed by connecting a bonding wire to any one of the terminals REF | 11-27-2014 |
20140361835 | Current Mirror - Some embodiments of the system comprise a current mirror with two switches (a first switch and a second switch) and two compensation circuits (a first compensation circuit and a second compensation circuit). In one embodiment, the first compensation circuit adjusts a drain voltage of the second switch based on a drain voltage of the first switch, and the second compensation circuit adjusts a current through the first switch based on the drain voltage of the second switch. | 12-11-2014 |
20150061770 | BIAS-BOOSTING BIAS CIRCUIT FOR RADIO FREQUENCY POWER AMPLIFIER - Various embodiments provide a bias circuit for a radio frequency (RF) power amplifier (PA) to provide a direct current (DC) bias voltage, with bias boosting, to the RF PA. The bias circuit may include a bias transistor that forms a current mirror with an amplifier transistor of the RF PA. The bias circuit may further include a first resistor coupled between the gate terminal and the drain terminal of the bias transistor to block RF signals from the gate terminal of the bias transistor. The bias circuit may further include a second resistor coupled between the drain terminal of the bias transistor and the RF PA (e.g., the gate terminal of the amplifier transistor). An amount of bias boosting of the DC bias voltage provided by the bias circuit may be based on an impedance value of the second resistor. | 03-05-2015 |
20150061771 | WAVEFORM CONVERSION CIRCUIT WITH REDUCED JITTER - An AC-inverting amplifier for a waveform conversion circuit includes a first MOS transistor of a first conductivity type having a gate that receives an input signal, a drain that provides an inverted amplified output signal, and a source coupled to a first power supply voltage. A current source provides a first bias current and a second bias current in proportion to the first bias current. The second bias current is coupled to the drain of the first MOS transistor to bias the first MOS transistor. The first bias current has a magnitude that is determined by a DC voltage applied at the gate of the first MOS transistor. | 03-05-2015 |
20150061772 | Circuit to Reduce Output Capacitor of LDOs - Circuits and methods to reduce the size of output capacitors of LDOs or amplifiers are disclosed. Nonlinear mirroring of the load current allows scaling of gain or adapting small signal impedance of a pass transistor depending on other inputs, in case of a preferred embodiment, allows to reduce small signal impedance at the gate of the pass transistor as the load current increases, hence allowing to reduce the size of an output capacitor without compromising stability of the system. | 03-05-2015 |
20150340995 | CURRENT REGULATED TRANSIMPEDANCE AMPLIFIERS - A transimpedance amplifier includes a current regulator having a first current mirror of a first conduction type and a first current mirror of a second conduction type. The first current mirror stage of a first conduction type receives a reference current. The first current mirror stage of a second conduction type is connected to the first current mirror stage of the first conduction type, and receives an output current from the first current mirror stage of the first conduction type, and to generate a current to be used as a current source by a transimpedance amplifier. Each of the current mirror stages includes a first transistor and a second transistor of the same conduction type having their gate terminals connected wherein the first transistor receives an input current and the second transistor provides an output current that is a factor of the received input current. | 11-26-2015 |
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