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Having field effect transistor

Subclass of:

330 - Amplifiers

330250000 - WITH SEMICONDUCTOR AMPLIFYING DEVICE (E.G., TRANSISTOR)

330252000 - Including differential amplifier

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DocumentTitleDate
20080272843Integrated Amplifier Circuit - An integrated amplifier circuit is provided with an amplifier that is composed of at least two amplifier regions, the amplifier regions being arranged about a symmetry point, wherein each amplifier region has a plurality of transistors in a transistor region, and wherein transistors from different amplifier areas are arranged within the same transistor region. According to an aspect, provision is made that each amplifier region has at least two transistors. Whereby the integrated amplifier circuit can be used for semiconductor components11-06-2008
20130043947OUTPUT CIRCUIT - An output circuit includes first to fourth transistors, first and second constant current units, and a differential pain The gates of the first and second transistors are supplied with two input signals, respectively. The drain of the first transistor is coupled to the drain of the third transistor and the gate of the fourth transistor. The drain of the second transistor is coupled to the gate of the third transistor and the drain of the fourth transistor. The first constant current unit is coupled to the sources of the third and fourth transistors. The differential pair includes two transistors, and the gates of the two transistors are coupled to the drains of the first and second transistors, respectively. The second constant current unit is coupled to the sources of the two transistors. Two output signals are output from two nodes respectively corresponding to the drains of the two transistors.02-21-2013
20090231038Differential amplifier - A differential amplifier includes a differential amplifier section to generate a current composed of a differential-mode current and a first common-mode current according to a differential-mode component and a common-mode component of an input signal, a common-mode current generator section to generate a common-mode current according to the common-mode component of the input signal, and a current amplifier section to receive the current and the common-mode current, amplify a difference between the current and the common-mode current and output a result.09-17-2009
20100156533REGULATOR CIRCUIT - The present invention is contrived to adopt a differential pair type amplifier circuit comprising a differential pair constituted by a first transistor receiving an input of a first signal and by a second transistor receiving an input of a third signal generated by outputting a second signal of which the voltage level is a power supply voltage. Elements requiring a matching are two transistors constituting the differential pair for the amplifier circuit. Because of this, the elements requiring a matching can be placed close to each other regardless of a layout between the amplifier circuits.06-24-2010
20120161869Differential Amplifier - A differential amplifier is provided in the present invention. The differential amplifier includes an amplifying module having a resistive ratio, receiving an input voltage, and amplifying the input voltage as an output voltage in accordance with the resistive ratio; and a feedback module coupled with the amplifying module and generating a feedback signal in accordance with the input voltage and the output voltage for regulating the output voltage.06-28-2012
20100052785DIFFERENTIAL AMPLIFIER, SAMPLE-AND-HOLD CIRCUIT, AND AMPLIFIER CIRCUIT - To provide a common-mode feedback circuit that feeds back signal corresponding to common-mode components of output terminal voltage of first and second amplifiers to input terminals of the first and second amplifiers via first and second passive elements connected to a common terminal, respectively.03-04-2010
20100164624METHOD FOR REDUCING OFFSET VOLTAGE OF OPERATIONAL AMPLIFIER AND THE CIRCUIT USING THE SAME - The invention provides an operational amplifier. In one embodiment, the operational amplifier includes an input stage circuit, a feedback circuit, a fixed stage circuit, and an output stage circuit. The input stage circuit receives a positive input voltage and a negative input voltage, and amplifies the positive input voltage and the negative input voltage to output a first positive output voltage and a first negative output voltage. The feedback circuit generates a reference positive output voltage equal to the first positive output voltage according to the positive input voltage and the negative input voltage. The fixed stage circuit equally amplifies the first negative output voltage and the reference positive output voltage to generate a second positive output voltage and a second negative output voltage. The output stage circuit generates an output voltage according to a difference voltage between the second positive output voltage and a second negative voltage.07-01-2010
20100164623TRANSMITTER - A transmitter for supplying a large current upon phase change of an output voltage is disclosed. The transmitter includes a first amplifying unit including a first amplifier including first NMOS and PMOS transistors connected by a common source thereof, and a second amplifier including a second PMOS and NMOS transistors connected by a common drain thereof while being connected with the first amplifier in parallel, a second amplifying unit including a third amplifier including third NMOS and PMOS transistors connected by a common source thereof, and a fourth amplifier including fourth PMOS and NMOS transistors connected by a common drain thereof while being connected with the third amplifier in parallel, and differential output nodes including a positive node connected to an output stage of the first amplifying unit, to which the common source of the first amplifier and the common drain of the second amplifier are connected, and a negative node connected to an output stage of the second amplifying unit, to which the common source of the third amplifier and the common drain of the fourth amplifier are connected.07-01-2010
20080258812High Speed Differential Receiver with Rail to Rail Common Mode Operation Having a Symmetrical Differential Output Signal with Low Skew - A novel high-speed differential receiver (10-23-2008
20090322428TUNABLE LINEAR OPERATIONAL TRANSCONDUCTANCE AMPLIFIER - A tunable, linear operational transconductance amplifier includes a differential voltage to current conversion unit adapted to generate first and second output signals at respective first and second output nodes responsive to first and second differential input signals. A first current amplification unit is adapted to generate a third output signal responsive to the first output signal and first and second control signals. A second current amplification unit is adapted to generate a fourth output signal responsive to the second output signal and the first and second control signals.12-31-2009
20090121789DEVICE COMPRISING A FEEDBACK-LESS GAIN CONTROLLED AMPLIFIER05-14-2009
20100117735CIRCUIT - A circuit and an adjusting method with a differential amplifier and with a control circuit, wherein the differential amplifier has a first amplifier transistor which for amplifying an input signal of the differential amplifier is connected in a first branch of the differential amplifier, wherein the differential amplifier has a second amplifier transistor which for amplifying the input signal of the differential amplifier is connected in a second branch of the differential amplifier, wherein the differential amplifier has at least one first series connection with a first transistor and a first semiconductor switch, the amplifier being connected parallel to the first amplifier transistor, wherein the differential amplifier has at least one second series connection with a second transistor and a second semiconductor switch, the amplifier being connected in parallel to the second amplifier transistor, and wherein the control circuit is connected to the switch inputs of the semiconductor switches to control the switching states of the semiconductor switches.05-13-2010
20090009244HIGH-FREQUENCY CIRCUIT - The potential of a source terminal of a transistor is fixed; a load is connected to a drain terminal of the transistor; and an input signal is received by a gate terminal of the transistor. A series circuit including an inductor and a capacitor connected in series is provided between a connection point of the drain terminal of the transistor and the load and an output terminal of a high-frequency circuit. A band-pass filter having a prescribed characteristic is configured by an output equivalent circuit expressing an output impedance of the transistor, the load, and the series circuit.01-08-2009
20130033321HIGH EFFICIENCY POWER AMPLIFIER - A power amplifier circuit utilizes a cross-coupled tapped cascade topology together with a technique of applying an RF injection current into a wideband node to provide a single-stage power amplifier with improved PAE, output power, and gain over a wide RF band. The amplifier circuit comprises a cross-coupled cascade transistor unit comprising a pair of cross-coupled cascode transistors, a cross-coupled switching transistor unit comprising a pair of cross-coupled switching transistors, and an RF current generator. RF current generator generates a differential RF injection current, while switching transistor unit amplifies the injection current to generate an amplified injection current at the wideband node of the amplifier circuit and the cascode transistor unit further amplifies the injection current to generate the desired amplified signal at the output of the amplifier circuit. The output signal amplitude generally depends on the differential injection current and the supply voltage V02-07-2013
20130033322CIRCUIT UNIT, BIAS CIRCUIT WITH CIRCUIT UNIT AND DIFFERENTIAL AMPLIFIER CIRCUIT WITH FIRST AND SECOND CIRCUIT UNIT - Circuit unit (CU) comprising a heterojunction bipolar transistor and a long-gate pseudomorphic high-electron-mobility transistor. Either a source (S) or a drain (D) of the long-gate pseudomorphic high-electron-mobility transistor is electrically coupled with either a collector (C) or an emitter (E) of the heterojunction bipolar transistor.02-07-2013
20080204137DESIGN STRUCTURE FOR A SERIAL LINK OUTPUT STAGE DIFFERENTIAL AMPLIFIER - A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for protection for the transmission of higher amplitude outputs required of differential amplifiers formed by thin oxide transistors with limited maximum voltage tolerance used where compliance with communication protocol standards requires handling voltages which may, in transition, exceed desirable levels is provided by limiting the voltage across any two device terminals under power down conditions.08-28-2008
20100045379METHOD OF INDICATION OF SYSTEM INFORMATION UPDATING - An amplifier amplifying an input signal and the method thereof. The amplifier comprises first and second transconductor circuits. The first transconductor circuit, coupled to the first transistor, receives the first noise voltage to generate a first noise current. The second transconductor circuit, coupled in parallel to the first transconductor circuit, receives the second noise voltage to generate a second noise current such that the first and second noise currents cancel each other out to reduce a noise component in the output current when summing up together, and the first and second transconductor circuits are operated in a current mode.02-25-2010
20130038393AMPLIFIER CIRCUIT, INTEGRATING CIRCUIT, AND LIGHT-DETECTION DEVICE - A photodetecting device 02-14-2013
20100109774Operational amplifier - An operational amplifier includes an input stage amplifier that receives an input signal, an output stage amplifier that amplifies a signal output from the input stage amplifier and outputs the signal, a capacitor that is connected between an input node and an output node of the output stage amplifier, and a charge and discharge control circuit that controls a charge and discharge current of the capacitor.05-06-2010
20090108934DIFFERENTIAL AMPLIFIER SYSTEM - One embodiment of the invention includes a differential amplifier circuit. A first input stage generates first and second control voltages in response to a differential input signal. A second input stage generates third and fourth control voltages in response to the differential input signal. The first and second control voltages can be inversely proportional and the third and fourth control voltages can be inversely proportional. The circuit also includes a first output stage that is configured to set a magnitude of a first output voltage of a differential output signal at a first output node in response to the first and second control voltages. The circuit further includes a second output stage that is configured to set a magnitude of a second output voltage of the differential output signal at a second output node in response to the third and fourth control voltages.04-30-2009
20100141341Receiver Having Multi-Stage Low Noise Amplifier - A receiver having multi-stage low noise amplifier are provided. In this regard, a representative receiver, among others, includes at least one antenna and a filter that receives and filters signals from the at least one antenna. The filtered signals include a first frequency band signal and a second frequency band signal. The receiver further includes a multi-stage low noise amplifier that receives the filtered signals from the filter. The multi-stage low noise amplifier includes a first stage low noise amplifier that receives and performs impedance matching for the first frequency band signal and second frequency band signal. The multi-stage low noise amplifier further includes a second stage low noise amplifier that receives the first frequency band signal and second frequency band signal. The second stage low noise amplifier includes load resistors that switch off for the first frequency band signal and switch on for the second frequency band signal based on receiving either the first frequency band signal or second frequency band signal.06-10-2010
20090045874DIFFERENTIAL AMPLIFIER AND INPUT CIRCUIT USING THE SAME - A differential amplifier comprises a plurality of first switching elements configured to output differentially amplified signals through output terminals when a voltage level of a first input signal and a second input signal belongs to a first range and a plurality of second switching elements configured to output the differentially amplified signals through the output terminals when the voltage level of the first input signal and the second input signal belongs to a second range.02-19-2009
20090045875DATA AMPLIFYING CIRCUIT CONTROLLABLE WITH SWING LEVEL ACCORDING TO OPERATION MODE AND OUTPUT DRIVER INCLUDING THE SAME - A data amplifying circuit for an output driver has a swing level that is controllable according to an operation mode. The data amplifying circuit includes a mode responding circuit supplying an additional source current to a source node of an amplifying circuit in response to a mode selection signal. The mode responding circuit controls the supply of the additional source current in accordance with an operation mode. Another data amplifying circuit of a semiconductor device, according to the invention, includes a small-swing amplifier and a full-swing amplifier. The small-swing amplifier causes a swing level of the output signal to be relatively smaller, while the full-swing amplifier causes the output signal swing level be relatively larger. The small-swing and full-swing amplifiers are alternatively enabled in response to the mode selection signal.02-19-2009
20130069722MULTI-BAND AMPLIFIER AND METHOD OF AMPLIFYING MULTI-BAND - Provided is a multi-band amplifier and a method of amplifying a multi-band. The multi-band amplifier includes a wireless signal input terminal into which a first frequency band signal and a second frequency band signal are input, a first impedance matching part connected to the wireless signal input terminal and configured to match an input impedance in a first frequency band, a second impedance matching part connected to the wireless signal input terminal and configured to match an input impedance in a second frequency band, a common source amplifier to which the first impedance matching part and the second impedance matching part, and a common gate amplifier connected to the common source amplifier. Accordingly, performance degradation can be reduced in comparison with a conventional amplifier, broadband amplification as well as narrow band amplification can be performed, and an amplification gain can be adjusted.03-21-2013
20130069721AMPLIFYING CIRCUIT - A circuit includes a first circuit module with a first input node, a second input node and an output node. The first circuit module receives an input signal at the first input node and generates an amplified signal at the output node. The circuit further includes a second circuit module coupled between the output node and a reference potential line. The second circuit selectively draws a current from the output node in response to a first control signal. The first control signal is generated in response to sensing a voltage fluctuation at a power supply node which supplies power to the first circuit module.03-21-2013
20130069720APPARATUS AND METHODS FOR ELECTRONIC AMPLIFICATION - Apparatus and methods for electronic amplification are provided. In one embodiment, a method amplifying a differential input voltage signal using a first NMOS transistor and a second NMOS transistor is provided. The method includes controlling a drain-source voltage of the first NMOS transistor using a first high voltage NMOS transistor and a first high voltage PMOS transistor. The first high voltage NMOS and PMOS transistors are electrically connected in parallel and to a drain of the first NMOS transistor. The method further includes controlling a drain-source voltage of the second NMOS transistor using a second high voltage NMOS transistor and a second high voltage PMOS transistor. The second high voltage NMOS and PMOS transistors are electrically connected in parallel and to a drain of the second NMOS transistor.03-21-2013
20130057345Analog Circuit and Display Device and Electronic Device - The invention provides an analog circuit that decreases an effect of variation of a transistor. By flowing a bias current in a compensation operation, a voltage between the gate and source of the transistor to be compensated is held in a capacitor. In a normal operation, the voltage stored in the compensation operation is added to a signal voltage. As the capacitor holds the voltage according to the characteristics of the transistor to be compensated, the effect of variation can be decreased by adding the voltage stored in the capacitor to the signal voltage. Further, an analog circuit which decreases the/effect of variation can be provided by applying the aforementioned basis to a differential circuit, an operational amplifier and the like.03-07-2013
20090091386Differential amplifier - A differential amplifier includes: a constant current source; first and second field effect transistors whose respective gates are imparted with positive-phase and negative-phase input signals and whose sources commonly connected to each other, the constant current source being connected to a common node of the sources; first and second loads serving as current paths for respective drain currents of the first and second field effect transistors; an amplifying unit which outputs positive-phase and negative-phase output signals which are amplified in response to the respective drain voltages of the first and second field effect transistors; and a current path generator which generates first and second current paths parallel to the respective first and second field effect transistors for a predetermined period of time at the time of start-up of the differential amplifier.04-09-2009
20090091385DIFFERENTIAL AMPLIFIER CIRCUIT - A differential amplifier circuit of simple circuit configuration is disclosed, which is capable of releasing an output signal within a voltage range independent of the voltage range of a differential input signal. The differential amplifier circuit 04-09-2009
20120188013RECEIVING CIRCUIT, SEMICONDUCTOR DEVICE INCLUDING THE SAME, AND INFORMATION PROCESSING SYSTEM - In a receiving circuit, and in a semiconductor device and an information processing system including the receiving circuit, the receiving circuit is configured to amplify a high-speed signal by a greater gain than a low-speed signal with a low electric power consumption. The receiving circuit includes a first amplifier and a second amplifier having a cutoff frequency lower than a cutoff frequency of the first amplifier. A received signal is inputted to the first amplifier and the second amplifier, an output from the second amplifier is subtracted from an output from the first amplifier, and a result is outputted from the receiving circuit.07-26-2012
20090295477AHUJA COMPENSATION CIRCUIT FOR OPERATIONAL AMPLIFIER - A frequency compensated operational amplifier includes: an input stage, for receiving an input signal; an output stage, coupled to the input stage, for generating an output signal according to an output of the input stage; a first current source, for providing a first bias current; a second current source, for providing a second bias current identical to the first bias current; an Ahuja compensation circuit, comprising: a matched transistor pair, coupled to the first current source and the second current source; a capacitor coupled between the matched transistor pair and the output stage; and a transconductance boosting circuit, coupled to the matched transistor pair, for boosting transconductance of the matched transistor pair.12-03-2009
20090267691AMPLIFIER CIRCUIT - A differential amplifier circuit 10-29-2009
20110012678TRANSFER-FUNCTION CONTROL IN AN ACTIVE FILTER - A filter circuit includes a differential amplifier circuit to provide a number of poles including a dominant pole, and a feedback circuit to feed a portion of an output of the differential amplifier circuit to an input of the differential amplifier circuit. The feedback circuit includes a feedback resistor and a feedback capacitor to provide a controllable increase in an order of a transfer function of the filter circuit along with non-dominant poles of the differential amplifier circuit coupled in parallel with the feedback resistor. Coefficients of a transfer function of the differential amplifier circuit are forced to substantially depend solely on one or more of a plurality of passive circuit elements, the feedback resistor, and the feedback capacitor to control a dependence of the transfer function of the filter circuit on a gain of the differential amplifier circuit and poles of the differential amplifier circuit.01-20-2011
20130063210HIGH SPEED AMPLIFIER - For high speed amplifiers, the parasitic capacitances from the differential input pair introduce a zero that can affect performance. Here, a neutralization network has been provided that compensates for this zero by shifting its position. This is generally accomplished by using a pair of capacitors that are cross-coupled across the differential input pair of the amplifier.03-14-2013
20090237164LOW LEAKAGE CURRENT AMPLIFIER - A circuit includes first, second, and third inverters and first and second transistors. The first inverter has an input, an output, a first supply terminal, and a second supply terminal. The second inverter has an input, an output, a first supply terminal, and a second supply terminal. The first transistor has a first current electrode for receiving a first supply voltage, a control electrode coupled to the output of the first inverter, and a second current electrode coupled to the first supply terminals of both the first and second inverters. The second transistor has a first current electrode coupled to the second supply terminals of the first and second inverters, a control electrode coupled to the output of the first inverter, and a second current electrode for receiving a second supply voltage. The third inverter has an input coupled to the output of the second inverter, and an output coupled to the output of the first inverter.09-24-2009
20090237163TRIMMING TECHNIQUE FOR HIGH VOLTAGE AMPLIFIERS USING FLOATING LOW VOLTAGE STRUCTURES - The system contains a first MOS transistor having a first source element, a first drain element, and a first gate element. A first low voltage current source has two ends. The ends of the low voltage current source are connected to at least two of the first MOS transistor elements. At least one first Zener clamp is in parallel with the low voltage current source.09-24-2009
20090237162LOW SKEW DIFFERENTIAL AMPLIFIER USING TAIL VOLTAGE REFERENCE AND TAIL FEEDBACK - Using the tail level referencing for an inverter stage immediately following a differential amplifier provides trip point tracking with the variations in magnitude of the output level swings on the differential amplifier stage output over the operating range of the circuit. When the tail voltage increases and the V09-24-2009
20090237161QUADRATURE OUTPUT LOW NOISE TRANSCONDUCTANCE AMPLIFIER HAVING DIFFERENTIAL INPUT - A device for providing low noise transconductance amplification is presented. The device includes a PMOS transconductance section configured to receive a differential RF input signal, a PMOS cascode section coupled to the PMOS transconductance section, an NMOS transconductance section configured to receive the RF differential input signal, and an NMOS cascode section coupled to the NMOS transconductance section, where the PMOS and NMOS cascode sections provide a differential quadrature output signal and a differential in-phase output signal. A method for amplifying an RF signal is also presented. The method includes receiving a differential RF input signal, converting the differential RF input signal into current signals, buffering the current signals to provide a differential quadrature output signal and a differential in-phase output signal.09-24-2009
20130113564FAST SETTLING LOW POWER LOW NOISE AMPLIFIER - Aspects of the present invention provide apparatuses and methods to provide slew rate enhancement during an initial stage of operation of an amplifier and processing of an input signal with low noise introduction during a subsequent amplification stage of operation. During the initial stage, a high bandwidth component of the amplifier can be engaged to provide slew rate enhancement of the overall amplifier. The adaptive slew rate enhancement can be based on a detected imbalance of an output of a low bandwidth component of the amplifier. Once a desired operating state of the amplifier is achieved, the high bandwidth component can be disengaged. The low bandwidth component can then solely operate on a received input signal during the amplification stage. The low bandwidth component can be low power and can introduce low levels of noise, thereby ensuring minimal noise introduction and corruption of the amplified output signal of the amplifier.05-09-2013
20100066449THREE-STAGE FREQUENCY-COMPENSATED OPERATIONAL AMPLIFIER FOR DRIVING LARGE CAPACITIVE LOADS - A three-stage frequency-compensated operational amplifier includes a first-stage circuit, a second-stage circuit incorporated with a first compensation circuit, a third-stage circuit, and a second compensation circuit. The three-stage frequency-compensated operational amplifier functions as a two-stage operational amplifier at high frequencies, thereby capable of driving large capacitive loads with low power consumption.03-18-2010
20090219094DIFFERENTIAL AMPLIFIER CIRCUIT AND FREQUENCY MIXER FOR IMPROVING LINEARITY - A differential amplifier circuit and a frequency mixer for improving linearity are disclosed. The disclosed differential amplifier circuit includes first and second loads, a first output terminal for the first load, a second output terminal for the second load, a differential amplifying stage including a differential stage for amplifying a voltage difference between a first input stage and a second input stage, and a biasing current source for biasing the differential stage, and a non-linearity filtering circuit for filtering a non-linear signal generated from the differential amplifying stage. The non-linearity filtering circuit includes a first cross circuit including a first transistor to connect the first and second output terminals, and a second cross circuit including a second transistor to connect the first and second output terminals. The differential amplifier circuit achieves an improvement in linearity, as compared to conventional differential amplifier circuits, by offsetting, at a load side, a non-linear component generated at an active element of the differential amplifier circuit, to output only a linear current component.09-03-2009
20080290940DIFFERENTIAL LOW NOISE AMPLIFIER (LNA) WITH COMMON MODE FEEDBACK AND GAIN CONTROL - A method, algorithm, architecture, circuits, and/or systems for low noise amplification are disclosed. In one embodiment, an amplifier can include an input stage, including a first differential input configured to receive a differential signal, a first current source coupled to the first differential input, a first current load receiving a first bias voltage and coupling the input stage to a first power supply, and a first pair of common mode feedback transistors, coupled to an output of the first current load and configured to limit a current to the first current source. The input stage provides an amplified signal to an additional stage having a structure similar to the input stage, configured to further amplify the amplified signal.11-27-2008
20100225395Input Buffer With Impedance Cancellation - An exemplary negative impedance converting circuit for functioning as a voltage buffer and/or negating the impedance of a connected load. The negative impedance converting circuit includes inputs, outputs, a first transconductance stage and a second transconductance stage. The transconductance gain value of the first transconductance stage is greater than a transconductance gain value of the second transconductance stage. Exemplary embodiments of a reference voltage buffer using the negative impedance converting circuit are also described.09-09-2010
20100188151OPERATIONAL AMPLIFIER AND PIPELINE AD CONVERTER - A differential voltage interconnect (W07-29-2010
20110279181Common-mode feedback circuit - A common-mode feedback circuit includes an amplifying circuit, a biasing circuit connected with the amplifying circuit, and a feedback loop connecting the amplifying circuit with the biasing circuit. The feedback loop includes a first field effect transistor M11-17-2011
20100182087ANTI-POP METHOD AND APPARATUS FOR CLASS AB AMPLIFIERS - A method for actuating an amplifier to generally eliminate a pop is provided. Accordingly, a plurality of current sources is actuated in an input stage, and a plurality of bias voltages are applied to the input stage. After a predetermined period after the step of applying a plurality of bias voltages to the input stage and the step of actuating a plurality of current sources in an input stage, a control circuit is actuated, and a transistor within a control amplifier stage is turned on at a predetermined rate.07-22-2010
20100171555CIRCUIT FOR REDUCING DUTY DISTORTION IN A SEMICONDUCTOR MEMORY DEVICE - A circuit for outputting an amplified clock signal is disclosed. The circuit includes a first input terminal for inputting a first clock signal, a second input terminal for inputting a second clock signal, a first amplifier circuit for amplifying the first clock signal and outputting a first amplified clock signal at a first output terminal, and a second amplifier circuit for amplifying the second clock signal and outputting a second amplified clock signal at a second output terminal. The circuit additionally includes a level maintenance circuit connected to the first output terminal and the second output terminal. The circuit further includes an output circuit connected to the first output terminal and the second output terminal and configured to output a further amplified clock signal based on the first amplified clock signal and the second amplified clock signal. The level maintenance circuit is configured to reduce duty distortion in the further amplified clock signal.07-08-2010
20100171556DIFFERENTIAL AMPLIFIER - A differential amplifier includes an amplification unit and a feedback unit. The amplification unit amplifies a voltage difference between a first input signal and a second input signal and outputs a first output signal and a second output signal. The feedback unit amplifies a voltage difference between a first feedback signal based on the first output signal and a second feedback signal based on the second output signal.07-08-2010
20100171554OFFSET CANCELLATION FOR DC ISOLATED NODES - Offset voltages developed on floating nodes on inputs to high-performance amplifiers that are DC isolated from the data signals input to amplifiers are cancelled by connecting a highly resistive element between the input node and a predetermined potential, particularly useful in proximity communication systems in which two chips are connected through capacitive or inductive coupling circuits formed jointly in the two chips. The resistive element may be an off MOS transistor connected between the node and a desired bias voltage or a MOS transistor with its gate and drain connected to the potential. Multiple bias voltages may be distributed to all receivers and locally selected by a multiplexer for application to one or two input nodes of the receiver. The receiver output can also serve as a predetermined potential when the resistive element has a long time constant compared to the data rate or the resistive element is non-linear.07-08-2010
20100301939High frequency receiver preamplifier - A folded cascode receiver amplifier with constant gain has inputs coupled to PMOS and NMOS differential transistors pairs with scaled geometries. The transconductance of both PMOS and NMOS transistors is the same whether the common mode input voltage is low or high. In a first version the transconductance of both PMOS and NMOS differential transistor pairs is reduced when the common mode input voltage is at mid-rail. Resistive means between current sources and the sources of the PMOS and NMOS transistor pairs force the current source transistors into the triode region of operation. A second version insures a constant voltage gain through control means which maintain a constant ratio of the transconductance of the output stage transistors versus the PMOS and NMOS differential transistor pairs when active.12-02-2010
20100007417Differential amplifier with symmetric circuit topology - A differential amplifier circuit is provided with a first input stage including a transistor pair of a first conductivity type, of which transistor pair receives differential input signals; a first output stage connected to the first input stage; a second input stage including a transistor pair of a second conductivity type different from the first conductivity type, of which transistor pair receives the differential input signals; a second output stage connected to the second input stage; and an output terminal. The second output stage is structured with a circuit topology in which transistors of the first conductivity type in the first output stage are replaced with transistors of the second conductivity type, transistors of the second conductivity type in the first output stage are replaced with transistors of the first conductivity type, ground terminals in the first output stage are replaced with power supply terminals, and power supply terminals in the first output stage are replaced with ground terminals. The output terminal is commonly connected to outputs of the first and second output stages.01-14-2010
20080272844CLASS AB FOLDED-CASCODE AMPLIFIER HAVING CASCODE COMPENSATION - A class AB folded-cascode amplifier having improved gain-bandwidth product, comprises a differential input circuit including a differential transistor pair coupled to a source of tail current and responsive to a differential input signal for conducting a first current, a cascode circuit coupled to the differential input circuit for supplying a second current thereto, and a class AB output stage. A compensation circuit is configured for feeding back mutually complementary compensation signals from an output node to the differential input circuit. Another compensation circuit is configured for feeding back a signal from the output of the output stage to the input of the output stage.11-06-2008
20120007676DRIVE AMPLIFIER - A drive amplifier having improved linearity while being characterized by low current consumption. The drive amplifier includes first and second transistors having a gate to which first and second differential Radio Frequency (RF) voltages are respectively input; a third transistor which has a drain connected to a drain of the second transistor and a source connected to the gate of the first transistor, and a drain-source current which increases with an increase in the second differential RF voltage; and a fourth transistor which has a drain connected to a drain of the first transistor and a source connected to the gate of the second transistor, and a drain-source current which increases with an increase in the first differential RF voltage.01-12-2012
20110285464APPARATUS AND METHOD FOR LOW NOISE AMPLIFICATION - Apparatus and methods are disclosed, such as those involving a low noise amplifier. One such apparatus includes a low noise amplifier circuit configured to receive a signal at an input node and to output an amplified signal at an output node. The low noise amplifier circuit includes a first transistor of a first polarity; and a second transistor of a second polarity complementary to the first polarity. The first and second transistors are connected in series between first and second supply voltage nodes via the output node. The circuit further includes a third transistor cascoded with one of the first transistor or the second transistor, but does not include a transistor cascoded with the other transistor. This configuration allows the low noise amplifier circuit to provide an increased high-frequency gain and linearity while having improved high-frequency system noise figure in, for example, deep submicron CMOS technology.11-24-2011
20100271128COMPOSITE DIFFERENTIAL RF POWER AMPLIFIER LAYOUT - A composite differential Radio Frequency (RF) power amplifier includes a plurality of differential RF cascode power amplifiers coupled in parallel. Each differential RF cascode power amplifier includes a positive transconductance stage and a positive cascode stage coupled in series with the positive transconductance stage between a voltage node and ground. Each also includes a negative transconductance stage and a negative cascode stage coupled in series with the negative transconductance stage between the voltage node and ground. The plurality of parallel differential RF cascode power amplifiers resides adjacent one another in a single semiconductor substrate such that the positive transconductance stage of a first differential RF cascode power amplifier resides adjacent a negative transconductance stage of a second differential RF cascode power amplifier and the positive cascode stage of the first differential RF cascode power amplifier resides adjacent a negative cascode stage of a second differential RF cascode power amplifier.10-28-2010
20110163807IMPEDANCE MATCHING CIRCUIT AND METHOD THEREOF - A circuit comprises an amplifier circuit and a trimming circuit. The amplifier circuit includes an operational amplifier. The operational amplifier has a first input configured to receive input signals, and the operational amplifier also has a second input and an amplifier output. One of the first input or the second input is a negative input. The trimming circuit is coupled to the amplifier output. The trimming circuit includes a termination resistor coupled in parallel with at least one trimming resistor. The termination resistor is coupled to a first switch in series, and the trimming resistor is coupled to a second switch in series. The amplifier output is connected back to the negative input through the first switch.07-07-2011
20110291758DIFFERENTIAL COMPARATOR CIRCUIT HAVING A WIDE COMMON MODE INPUT RANGE - In one embodiment of the invention, a circuit arrangement is provided. The circuit arrangement includes a plurality of differential amplifiers, coupled in parallel, including at least a first differential amplifier and a second differential amplifier. Each differential amplifier includes an adjustable current control circuit coupled to limit a tail current passing through the differential amplifier.12-01-2011
20090295480AMPLIFIER CIRCUIT - An amplifier circuit with favorable linearity is provided.12-03-2009
20100013556TRANSCONDUCTANCE AMPLIFIER - Provided is a transconductance amplifier capable of suppressing variation in the range of a linear relationship between an input voltage and an output current depending on the magnitude of a tuning voltage Vctrl, thereby adjusting transconductance over a wider range of operating input voltages. The transconductance amplifier is configured by a differential pair formed of MOS transistors (01-21-2010
20100033250Differential amplifier - An input stage of a differential amplifier includes a differential pair formed by an N-channel MOS transistor MN1 having a gate connected to an INM and an N-channel MOS transistor MN2 having a gate connected to an INP, both having sources connected to each other, a constant current source connected to the sources of the MN1 and MN2, and a variable current source connected to the sources of the MN1 and MN2. A subsequent-stage processing circuit having an intermediate stage and an output stage includes a phase compensation capacitor and outputs an output responsive to a change in the differential inputs by charging and discharging the phase compensation capacitor through the constant current source. The variable current source turns ON when the change reaches a level causing a parasitic capacitor at the sources of the differential pair to be discharged, and supplies a current for discharging the parasitic capacitor.02-11-2010
20100045378 COMMUTATING AUTO ZERO AMPLIFIER - A commutating auto zero amplifier system, comprises a first amplifier (A02-25-2010
20090153244LOW NOISE AND LOW INPUT CAPACITANCE DIFFERENTIAL MDS LNA - A differential low noise amplifier (LNA) involves two main amplifying transistors biased in saturation, and two cancel transistors biased in sub-threshold. In one example, the gates of the cancel transistors are coupled to the drains of main transistors, in a symmetrical and cross-coupled fashion. The main transistors are source degenerated. Because the gates of cancel transistors are not coupled to the differential input leads of the LNA, the input capacitance of the LNA is reduced. Noise introduced into the LNA output due to the cancel transistors being biased in the sub-threshold region is reduced because there are two stages. The first stage involves the main transistors, and the second stage involves the cancel transistors. By increasing the gain of the first stage and decreasing the gain of the second stage, overall LNA gain is maintained while reducing the noise that the sub-threshold biased transistors contribute to the LNA output.06-18-2009
20090206929OPERATION AMPLIFIER FOR IMPROVING SLEW RATE - An OP amplifier including an input stage and an output stage for improving a slew rate is provided. The input stage receives one of input voltages, and generates an internal voltage according to the received input voltage. The output stage receives and gains the internal voltage, and outputs an output voltage. The output stage includes a first transistor, a plurality of first capacitors and a first switching unit. The first transistor includes a first source/drain terminal coupled to a first voltage, a gate terminal controlled by the internal voltage. The output stage outputs the output voltage according to a voltage at a second source/drain terminal of the first transistor. First terminals of the first capacitors are coupled to the second source/drain terminal of the first transistor. The first switching unit selectively transmits the internal voltage to the second terminal of a corresponding one of the first capacitors.08-20-2009
20080265990Semiconductor circuit - An amplifier includes differential output and input stages. The differential output stage includes first and second current paths outputting differential signals and connected between first and second power supplies. The first current path includes a first resistance between the first power supply and a first node, first and second transistors between the first node and a second node, and a second resistance between the second node and the second power supply. The second current path includes a third resistance between the first power supply and a third node, third and fourth transistors between the third node and a fourth node, and a fourth resistance between the fourth node and the second power supply. Each gate of the first to fourth transistors is connected to each of the fourth to first nodes, respectively, and output current of the differential input stage is connected to the first and third nodes.10-30-2008
20090212861LOW NOISE AMPLIFIER - A low noise amplifier is provided. The low noise amplifier includes: a low noise amplifying unit amplifying an input signal; a harmonic and noise generating unit disposed in an input terminal of the low noise amplifying unit, for generating a compensating signal for compensating for an intermodulation distortion signal and a thermal noise signal of the input signal to the low noise amplifying unit; and a load unit outputting the amplified input signal generated by the low noise amplifying unit.08-27-2009
20090079499Differential Low Noise Amplifier (LNA) With Common Mode Feedback And Gain Control - A method, algorithm, architecture, circuits, and/or systems for low noise amplification are disclosed. In one embodiment, an amplifier can include an input stage, including a first differential input configured to receive a differential signal, a first current source coupled to the first differential input, a first current load receiving a bias voltage and coupling the input stage to a first power supply, and a first pair of common mode feedback transistors, coupled to an output of the first current load and configured to limit a current to the first current source. The input stage provides an amplified signal to an additional stage having a structure similar to the input stage, configured to further amplify the amplified signal.03-26-2009
20110063029SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes a first input terminal configured to input a first input voltage, a second input terminal configured to input a second input voltage, a differential amplifier configured to generate a differential output voltage by amplifying a differential input voltage obtained from a difference between the first input voltage input by the first input terminal and the second input voltage input by the second input terminal, a switch configured to electrically connect or cut off the first input terminal and the second input terminal, and a sample hold unit connected to a power supply which generates a reference voltage and configured to generate an offset correction voltage of the differential amplifier based on the differential output voltage and the reference voltage when the first input terminal and the second input terminal are electrically connected by the switch.03-17-2011
20090289711TRANSCONDUCTANCE AMPLIFIER - An embodiment of the present invention has a differential pair including a first and second MOS transistors having their sources grounded; a third and fourth transistor with their source terminals connected to drain terminals of the first and second transistors, respectively; a voltage generating circuit for outputting tuning and common voltage so that the ratio between the common and tuning voltage is constant; and a differential pair input voltage generating circuit that receives the input and common voltage to output voltages Vip and Vin to gate terminals of the first and second transistors, respectively. The gate terminal of the fourth transistor is connected to the gate terminal of the third transistor, and the tuning voltage is input to the two terminals.11-26-2009
20080309407Transimpedance Amplifier - A gain switching determination circuit (12-18-2008
20110169567CONSTANT TRANSCONDUCTANCE OPERATIONAL AMPLIFIER AND METHOD FOR OPERATION - An embodiment is a circuit comprising a first transistor, a second transistor, a third transistor, a fourth transistor, a first switch, and a second switch. The first transistor, the second transistor, the third transistor, and the fourth transistor are all of a same conductivity type. Sources of the first transistor, the second transistor, the third transistor, and the fourth transistor are electrically coupled together. Drains of the first transistor and the third transistor are electrically coupled together, and drains of the second transistor and the fourth transistor are electrically coupled together. A feature of the third transistor is three times a feature of the first transistor such that07-14-2011
20090273400DEVICE AND METHOD FOR GENERATING AN OUTPUT SIGNAL - An embodiment provides a device for generating an output signal as a function of an input signal, wherein a plurality of circuit sections generate partial signals and the output signal is composed from the partial signals.11-05-2009
20090273399Power amplifier, power amplifier circuit and power amplifying method - The present invention discloses a power amplifier, comprising: a first transistor having a gate receiving an input signal; a second transistor coupled to the first transistor in a cascode configuration, in which a source of the second transistor is coupled to a drain of the first transistor, and a drain of the second transistor outputs an amplified signal; and a dynamic biasing circuit having two input terminals, one of which receiving the input signal, and the other one coupled to the drain of the first transistor, and an output terminal being coupled to a gate of the second transistor, thereby modulating the voltage at the drain of the first transistor.11-05-2009
20090278600ELECTRONIC CIRCUIT AND ELECTRONIC DEVICE - An electronic circuit includes: a first amplifying circuit to which a first input signal is inputted; a second amplifying circuit to which a second input signal is inputted; a first drain ground amplifying transistor provided between a first power source node and an output node with control over the gate by the output from the first amplifying circuit; a second drain ground amplifying transistor provided between the first power source node and the output node with control over the gate by the output from the second amplifying circuit; a common load element provided between the output node and a second power source node; a first negative feedback path for negative feedback from the output node to the input of the first amplifying circuit; and a second negative feedback path for negative feedback from the output node to the input of the second amplifying circuit.11-12-2009
20090284315OPERATIONAL AMPLIFIER - An operational amplifier includes, between an input and an output of an operational amplifier (an operational amplification stage) 11-19-2009
20110215869PARTIAL CASCODE IN COMBINATION WITH FULL CASCODE OPERATIONAL TRANSCONDUCTANCE AMPLIFIER - An amplifier circuit includes a first stage and a second stage. The first stage includes a differential input circuit coupled to a differential input node. The first stage includes a first partial cascode circuit including devices of a first type, the first partial cascode circuit being coupled to a first power supply node, a first bias node, and the differential input stage. The first stage includes a second partial cascode circuit including devices of a second type, the second partial cascode circuit being coupled to a second power supply node and the differential input circuit. The second stage is coupled to the first stage. The second stage includes a first full cascode circuit coupled to an output node.09-08-2011
20090289713Differential amplifier circuit having offset adjustment circuit - A differential amplifier circuit includes an offset adjuster circuit for varying the active load to adjust the offset caused by the differential pair. The differential amplifier circuit includes fine adjustment cell sections including a plurality of transistors having the substantially same size, and shift cell sections including transistors, whose transistor size is larger than the transistors of the fine adjustment cell sections.11-26-2009
20090295479AMPLIFIER AND OFFSET REGULATING CIRCUIT - An amplifier includes a signal amplification part that outputs an output signal obtained by amplifying an input signal and a common mode voltage V12-03-2009
20080246543Common mode feedback for large output swing and low differential error - A differential amplifier includes a differential input pair (10-09-2008
20100201446Class AB Output Stage - The present disclosure relates to a class AB amplifier output stage.08-12-2010
20080290942DIFFERENTIAL AMPLIFIER - A cascode current mirror circuit is connected as an active load to the input differential pair. A tail current source supplies a tail current to the input differential pair. A constant current source is connected in parallel with the input differential pair, and supplies a constant current to the tail current source. The constant current supplied by the constant current source is set to a value at which a transistor is not cut off.11-27-2008
20090189694DIFFERENTIAL AMPLIFIER WITH ACCURATE INPUT OFFSET VOLTAGE - An amplifier with accurate input offset voltage is described. In one design, the amplifier includes first and second unbalanced differential pairs. The first unbalanced differential pair receives a differential input signal and provides a first differential current signal. The second unbalanced differential pair receives a differential reference signal and provides a second differential current signal, which is subtracted from the first differential current signal to obtain a differential output signal. The second differential current signal tracks an error current in the first differential current signal so that the differential output signal is zero when the differential input signal is equal to a target input offset voltage for the amplifier. For each unbalanced differential pair, one transistor is M times the size of the other transistor, with M being selected to obtain the target input offset voltage.07-30-2009
20080309410OFFSET FIXING OPERATIONAL AMPLIFIER CIRCUIT - In an offset fixing operational amplifier circuit, an operational amplifier circuit includes an input stage containing a first constant current source, a second constant current source, a first differential pair and a second differential pair. A bias circuit supplies a bias voltage to the operational amplifier circuit. An offset fixing circuit controls the input stage in accordance with an input voltage of the operational amplifier circuit.12-18-2008
20100127775AMPLIFIER FOR DRIVING EXTERNAL CAPACITIVE LOADS - An apparatus having a zero-pole that is dependant on an equivalent series resistance (ESR) and a load is provided. The apparatus comprises an amplifier stage that receives a first input voltage and a bias voltage, an intermediate stage that is coupled to the output node of the amplifier stage (where the intermediate stage outputs an intermediate voltage to an intermediate node), a first capacitor coupled between at least one of the internal transistors at an internal node and the intermediate node, a power transistor coupled between a second input voltage and the intermediate node, a second capacitor coupled between the internal node and the power transistor, and a feedback stage coupled to the intermediate node and to the amplifier stage. The amplifier stage also has an output node and includes a plurality of internal transistors. The second capacitor provides a third input voltage to the power transistor, and the ratio of the capacitance of the first capacitor to the capacitance of the second capacitor controls the position of the zero-pole. Additionally, the feedback stage is adapted to output an output voltage to a load, and wherein the feedback stage provides a feedback voltage to the amplifier stage.05-27-2010
20080309411RADIO FREQUENCY SIGNAL AMPLIFYING DEVICE - There is provided a radio frequency (RF) signal amplifying device consuming less power and operable at a high voltage in a PA driving amplifying apparatus applicable to a PA amplifying circuit which amplifies power of an RF signal. The RF signal amplifying device includes: a balun converting an unbalanced radio frequency signal into a balanced radio frequency signal; a primary amplifier differentially amplifying the balanced radio frequency signal from the balun; and at least one secondary amplifier secondarily and differentially amplifying the balanced radio frequency signal amplified from the primary amplifier.12-18-2008
20080252374Amplifier and system utilizing the same - An amplifier structure is disclosed. The amplifier comprises a voltage source, a first amplifying unit and a second amplifying unit. The first amplifying unit is coupled to the voltage source to amplify a first input signal and a second input signal to generate a first amplified signal according to a bias current and a reference current. The second amplifying unit is coupled to the voltage source and the first amplifying unit to amplify the first input signal and the second input signal to generate a second amplified signal according to the bias current and the reference current, wherein the amplifier generates an output signal according to the first amplified signal and the second amplified signal.10-16-2008
20100264986Class AB Amplifier Systems - The present invention comprises class AB amplifier systems exhibiting low quiescent power, low-voltage operation, high gain, high bandwidth, low noise and low offset, and requiring a small die area. The amplifier systems use a differential first stage and a second stage of two pair of nested current mirrors interconnected in a particular way. Using a low quiescent current, the present invention reduces power consumption almost to a theoretical minimum. Also the circuit will operate at an input of only 1.8V with a threshold voltage of 1V. Various embodiments are disclosed.10-21-2010
20080284512POWER AMPLIFIER CIRCUITRY AND METHOD - A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals.11-20-2008
20100141340METHOD AND APPARATUS FOR A HIGH BANDWIDTH AMPLIFIER WITH WIDE BAND PEAKING - A two stage fully differential amplifier has been designed which works, in tandem with a TX-FIR, as a linear equalizer at low frequencies, not covered by the TX-FIR, and also acts as a linear amplifier at higher frequencies which are equalized by the TX-FIR. The amplifier as a frequency response which does not attenuate signals frequencies less than one twentieth of baud rate, creates gain peaking ion the region between one twentieth and one tenth of baud rate and maintains flat peak gain up to half of baud rate. Different aspects of the frequency response curve (such as dc gain, max gain and zero frequency) are completely programmable. Also, the differential amplifier has been designed from low power and process, voltage and temperature insensitive frequency response.06-10-2010
20080258813Sense Amplifiers Operated Under Hamming Distance Methodology - A semiconductor device includes a first sense amplifier coupled to an input for generating a first output; a second sense amplifier couple to the input for generating a second output; and a third sense amplifier coupled to the input for generating a third output, wherein a fourth output amplifying the input is generated based on combinations of logic states of the first, second and third outputs.10-23-2008
20110204978COMPARATOR CIRCUIT - A comparator circuit (08-25-2011
20090128238Offset cancellation of a single-ended operational amplifier - A single-ended operational amplifier includes an output stage, a first transconductance amplifier and a second transconductance amplifier. In an offset cancellation mode, two inputs of the first transconductance amplifier are supplied with a reference voltage to sink two currents from two inputs of the output stage respectively, the output stage generates a third current according to the difference between the two currents to charge a capacitor, and the second transconductance amplifier generates two currents according to the voltage in the capacitor to make currents in the two inputs of the output stage equal to each other, thereby canceling the offset of the single-ended operational amplifier.05-21-2009
20090289712AMPLIFIER CIRCUIT - An amplifier circuit includes first and second transistor circuits, a current supply unit, and a current sink unit. The first transistor circuit is operatively responsive to a first input signal, and the second transistor circuit is operatively responsive to a second input signal. The current supply unit includes at least two symmetrically configured current mirrors connected to a source voltage, and provides a first current to the first transistor circuit and a second current to the second transistor circuit, where a magnitude of the first and second currents is the same. The current sink unit is responsive to an enable signal to sink the first and second currents supplied to the first and second transistor circuits to a ground voltage.11-26-2009
20090184767OPERATIONAL AMPLIFIER - Disclosed herewith is a circuit system for improving a slew rate while reducing the power consumption in an operational amplifier that requires a comparatively high supply voltage (e.g., 5 V or upper) operation. The operational amplifier includes level shift circuits, differential pairs whose source connected serially, current voltage conversion circuit and output stage. The level shift circuits convert a differential input signal level and output to differential pairs. Combination of level shift circuit and differential pairs realize input signal difference detection and driving current control in the common circuit.07-23-2009
20090015329Low Voltage Track and Hold Circuits - Circuits that operate with power supplies of less than 1 Volt are presented. More particularly, circuits that operate with supply voltages near or lower than the threshold voltage of the transistors in those circuits are presented. Various circuits and embodiments such as operational transconductance amplifiers, biasing circuits, integrators, continuous-time sigma delta modulators, track-and-hold circuits, and others are presented. The techniques and circuits can be used in a wide range of applications and various transistors from metal-oxide-semiconductor to bipolar junction transistors may implement the techniques presented herein.01-15-2009
20090206931Differential Amplifier and Applications Thereof - A differential amplifier includes a first pair of differential amplifiers and a second pair of differential amplifiers. These first and second pairs of differential amplifiers are connected between first power rails and are arranged to receive a differential input signal. Third and fourth pairs of differential amplifiers are connected between second rails and also connected to the differential input signal. A current summer sums a first output current of the first pair of differential amplifiers, a second output current of the second pair of differential amplifiers, a third output current of the third pair of differential amplifiers and a fourth output current of a fourth pair of differential amplifiers to produce an output signal.08-20-2009
20090206930AMPLIFIER CIRCUIT WITH VOLTAGE INTERPOLATION FUNCTION - An amplifier circuit with a voltage interpolation function includes an N-type differential pair and a P-type differential pair. The N-type differential pair includes a first transconductance value, and has a first differential input terminal coupled to a first voltage and a second differential input terminal coupled to a voltage output terminal. The P-type differential pair includes a second transconductance value, and has a first differential input terminal coupled to a second voltage and a second differential input terminal coupled to the voltage output terminal. The N-type differential pair and the P-type differential pair are further coupled to the voltage output terminal through an output stage, and voltages outputted by the voltage output terminal are interpolation results of the first voltage and the second voltage weighted by the first transconductance value and the second transconductance value.08-20-2009
20090251213METHOD FOR ADJUSTING THRESHOLD VOLTAGE AND CIRCUIT THEREFOR - A method and circuit for changing a threshold voltage of a transistor. The circuit includes a sense circuit coupled to a switching transistor, a circuit transistor and to one terminal of a resistor. The other terminal of the resistor is connected to a body contact. The switching transistor directs current along one of two different paths in response to an input voltage sensed by the sense circuit. When the switching transistor directs a first current along one path, the first current is steered towards the resistor and flows through the resistor in one direction and when the switching transistor directs a second current along the other path, the second current is directed towards the resistor and flows through the resistor in the opposite direction from the first current. Steering the currents varies the potential of a body with respect to the potential at the source of the circuit transistor.10-08-2009
20090102558OPERATIONAL AMPLIFIER - An operational amplifier includes a first differential stage, a second differential stage, a second cascade amplifier stage, an output unit, a first switching control unit and a second switching control unit. When an external signal for stopping operation is input, the first switching control unit shuts off a connection between a non-inverting input terminal and a control electrode of one input transistor at each first and second differential stage, and shuts off a connection between an inverting input terminal and a control electrode of another input transistor at the first and second differential stages, and the second switching control unit connects the negative-side power supply voltage terminal to each control gate of the input transistors at the first and second differential stages and to the substrate gates of the input transistors at the first differential stage.04-23-2009
20110227648Silicon-on-Insulator High Power Amplifiers - Illustrative embodiments of a power amplifier are disclosed which include a plurality of amplifier cells, each having an input and an output. The plurality of amplifier cells are formed on a semiconductor substrate such that the outputs of the plurality of amplifier cells are electrically coupled in series. Each of the plurality of amplifier cells may comprise a first transistor that is electrically insulated from the semiconductor substrate and a first feedback resistor configured to dynamically bias the first transistor.09-22-2011
20090231040OUTPUT DRIVER HAVING PRE-EMPHASIS CAPABILITY - An output driver and an I/O apparatus including the output driver are disclosed. The output driver includes a driving unit having a first type transistor and a second type transistor connected in series, the driving unit amplifying an input signal applied to the gates of the first type transistor and the second type transistor and outputting the amplified signal to a node between the series connected first type transistor and second type transistor, a first source peaking unit connected between the first type transistor and a first voltage source and having a first impedance that varies in accordance with the frequency of the input signal, and a second source peaking unit connected between the second type transistor and a second voltage source and having a second impedance that varies in accordance with the frequency of the input signal.09-17-2009
20090231039Differential amplifier - A differential amplifier includes a first differential pair formed by transistors of a first conductivity type, to receive input signals and output first differential-mode currents, a first current amplifier section to output a first output source current and a first output sink current to a first output terminal and a second output terminal, respectively, based on the first differential-mode currents, a second differential pair formed by transistors of a second conductivity type, to receive the input signals and output second differential-mode currents, and a second current amplifier section to output a second output source current and a second output sink current to the first output terminal and the second output terminal, respectively, based on the second differential-mode currents.09-17-2009
20120139631WIDE-SWING TELESCOPIC OPERATIONAL AMPLIFIER - An apparatus includes a telescopic operational amplifier. The telescopic operational amplifier includes an input stage, a load, and a first cascode circuit. The first cascode circuit is coupled to a first differential node and an output node. The first differential node is coupled to one of the input stage and the load. The apparatus includes a first negative transconductance circuit coupled to the first differential node. In at least one embodiment, the first negative transconductance circuit is operable to provide a negative transconductance to compensate at least a first component of an output resistance of the telescopic operational amplifier. In at least one embodiment, the first negative transconductance circuit includes a pair of cross-coupled devices coupled to the first differential node and a current source.06-07-2012
20120268205RF POWER AMPLIFIERS WITH IMPROVED EFFICIENCY AND OUTPUT POWER - Amplifiers with improved efficiency and output power are described. In an exemplary design, an apparatus includes an amplifier having at least three transistors and at least two capacitors. The at least three transistors are coupled in a stack and receive and amplify an input signal and provide an output signal. The at least two capacitors include at least one capacitor coupled between the drain and source of an associated transistor for each of at least two transistors in the stack, e.g., at least one capacitor for each transistor in the stack except for the bottommost transistor in the stack. The at least two capacitors recycle energy from gate-to-source parasitic capacitors of the at least two transistors to the output signal, which improves efficiency and output power of the amplifier.10-25-2012
20090243724Third Order Derivative Distortion Cancellation for Ultra Low Power Applications - An apparatus and method for the cancellation of third order derivative distortion for ultra low power (ULP) applications are disclosed involving a first amplifier connected in parallel with a second amplifier for amplifying a received signal. The first amplifier includes at least one transistor operating in the sub-threshold region such that the first amplifier possesses a positive third derivative of a transfer function of the first amplifier, which generates a first amplified signal having in phase third order distortions. The second amplifier includes at least one differential pair of transistors operating in the sub-threshold region such that the second amplifier possesses a negative third derivative of a transfer function of the second amplifier, which generates a second amplified signal having in opposite phase third order distortions. The first and second amplified output signals are combined resulting in cancellation of third order distortions in the combined amplified signal.10-01-2009
20090212863POWER AMPLIFIER - In the power amplifier of the invention, at a start of power amplification by an amplifier transistor 08-27-2009
20090243723DIFFERENTIAL AND SYMMETRICAL CURRENT SOURCE - A controlled, symmetrical, stable current source that can power floating resistive loads, eliminates the need to connect the load directly to either a power supply or ground and protects the load against overpower should either or both sides of the load be shorted to ground. The current source includes two operational amplifiers for providing a current through the load that is proportional to an input voltage applied across the respective non-inverting inputs of the two operational amplifiers; two current sensing resistors for providing voltage drops that are proportional to the current through the load; and four summing resistors connected to the sensing resistors for providing to the inverting inputs of the operational amplifiers voltages that offset the sum of the voltage drops provided by the sensing resistors so that the current through the load is controlled by only the input voltage.10-01-2009
20100182086SUPER SOURCE FOLLOWER OUTPUT IMPEDANCE ENHANCEMENT - A source follower circuit is disclosed with an added amplifier that extends the low input voltage linear range while providing a lower output impedance. The drain of the source follower MOSFET is coupled to a gain stage that drives a second MOSFET (or other type transistor) with its drain coupled to the follower output. High impedance current sources bias the circuitry, and the difference amplifier has a reference voltage at one input. The difference amplifier with the reference voltage provides a feedback mechanism that maintain adequate drain to source voltage across the follower MOSFET to enhance the low input voltage linearity along with reducing the follower output resistance.07-22-2010
20100188152SIGNAL CONVERSION CIRCUIT AND RAIL-TO-RAIL CIRCUIT - A signal conversion circuit 07-29-2010
20100182085Error amplifier structures - Error amplifier structures are provided to generate an error signal in response to the difference between an input signal (e.g., a feedback current) and a reference signal (e.g., a bias current). Amplifier embodiments generally include a reference generator and a differencing amplifier. In at least one embodiment, the error generator is arranged to generate first and second bias voltages that correspond to the bias current. In at least one embodiment, the differencing amplifier is configured to provide a reference current to an output node in response to the first bias voltage, provide a feedback current to the output node in response to the second bias voltage, and generate an error current in response to a voltage at the output node. The error amplifier structures are suited for use in various systems such as negative switching regulators.07-22-2010
20100225396SEMICONDUCTOR INTEGRATED CIRCUIT AND ELECTRONIC DEVICE - An electronic device has a manipulation part which outputs a control signal including a first analog signal and a second analog signal obtained by inverting a phase of the first analog signal; and a display part which includes a semiconductor integrated circuit supplied at an input terminal thereof with the control signal to output a signal depending upon the control signal from an output terminal thereof, and which displays a predetermined image based on the signal output from the semiconductor integrated circuit.09-09-2010
20100194477OP-AMP CIRCUIT - An OP-amp circuit includes a first circuit unit configured to generate an operating voltage in response to an enable signal, a second circuit unit configured to amplify a difference between respective voltages received through an inverting terminal and a non-inverting terminal in response to the operating voltage and to output a result of the amplification as a first drive voltage, a third circuit unit configured to output a second drive voltage according to a voltage level of the first drive voltage inputted thereto, and a fourth circuit unit configured to divide an input voltage inputted thereto into a divided voltage according to two resistances having respective resistive values varying according to the first and second drive voltages and to output the divided voltage through an output terminal.08-05-2010
20100182089METHOD AND SYSTEM FOR PROCESSING SIGNALS VIA AN INTEGRATED LOW NOISE AMPLIFIER HAVING CONFIGURABLE INPUT SIGNALING MODE - Aspects of a method and system for processing signals via an integrated low noise amplifier having a configurable input signaling mode are provided. In this regard, one or more circuits comprising an integrated amplifier may be configurable such that, in a first configuration, the one or more circuits are operable to handle a differential input signal, and, in a second mode of operation, the one or more circuits are operable to handle a single-ended input signal. The one or more circuits may output a differential signal when handling a differential input signal and when handling a single-ended input signal. In some instances, whether the one or more circuits are operable to handle a differential input signal or a single-ended input signal may determined by an inductance of a bond wire coupling the integrated amplifier to an integrated circuit package.07-22-2010
20090295478AMPLIFIER USING IMPEDANCE CIRCUIT FOR CANCELING CUTOFF - An amplifier circuit includes a pair of transistors amplifying differential signals of input signals to respective input terminals and outputting differential output signals to respective output terminals, and an impedance circuit provided in between sources of the pair of transistors, canceling a first cutoff characteristic on a high frequency side in frequency characteristics of the amplifier circuit constructed of the pair of transistors, and forming a second cutoff characteristic on a higher frequency side than the first cutoff characteristic.12-03-2009
20090251214RAIL-TO-RAIL OPERATIONAL AMPLIFIER - A rail-to-rail operational amplifier has a pair of input terminals and an output terminal, and includes first and second parallel-connected differential input stages configured to generate a differential output signal OUTN, OUTP in response to a differential input signal VINN, VINP received at the pair of input terminals. Each of the first and second differential input stages in turn includes a pair of source-follower transistors and a pair of bulk-driven transistors. The pair of source-follower transistors are respectively coupled between the pair of input terminals and a bulk terminal of the pair of bulk-driven input transistors. Further, the pair of source-follower transistors in the first differential input stage have a different threshold voltage than the source-follower transistors in the second differential input stage.10-08-2009
20100253431NON-INVERTING AMPLIFIER CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT, AND PHASE COMPENSATION METHOD OF NON-INVERTING AMPLIFIER CIRCUIT - A circuit includes a differential amplifier unit that receives an input signal at a non-inverting input thereof, a constant current source, a load circuit, an output transistor that receives an output of the differential amplifier unit as an input and drives a load circuit, a phase compensation circuit including a variable resistor and a capacitor connected in series between the input of the output transistor and a feedback path, an output current monitor circuit that detects an output current flowing through the output transistor, and a bias voltage generation circuit that varies a resistance value of the variable resistor in accordance with a result of the detection of the output current by the output current monitor circuit. A signal obtained by voltage dividing an output of the output transistor by resistors is supplied to an inverting input of the differential amplifier unit.10-07-2010
20110057727ADAPTIVE COMMON MODE BIAS FOR DIFFERENTIAL AMPLIFIER INPUT CIRCUITS - A method and apparatus for extending the common mode range of a differential amplifier. A circuit has a common mode detection circuit, a common mode voltage inversion circuit, and a differential amplifier. The common mode detection circuit receives a differential signal and detects a common mode voltage. The common mode voltage inversion circuit is coupled to the common mode detection circuit. The common mode voltage inversion circuit has an input node that receives the common mode voltage and an output node that outputs body voltage, wherein the common mode voltage inversion circuit creates an inverse relationship between the common mode voltage and the body voltage. The differential amplifier includes a differential pair of transistors that have a pair of body terminals coupled to the output node of the common mode voltage inversion circuit.03-10-2011
20100253430CONSTANT GAIN CONTROL FOR MULTISTAGE AMPLIFIERS - This disclosure relates to maintaining constant gain within multi-stage amplifiers.10-07-2010
20080315950Integrated Circuit Amplifiers Having Switch Circuits Therein that Provide Reduced 1/f Noise - Integrated circuit devices include a pair of field effect transistors having shared source terminals, shared drain terminals and shared gate terminals, which may be treated herein as being electrically coupled in parallel. A switch circuit is also provided, which is configured to drive a body terminal of a first one of the pair of field effect transistors with an alternating sequence of first and second unequal body voltages. This alternating sequence is synchronized with a first clock signal. The switch circuit is also configured to drive a body terminal of a second one of the pair of field effect transistors with an alternating sequence of third and fourth unequal body voltages, which is synchronized with a second clock signal. The first and third body voltages may have equivalent magnitudes and the second and fourth body voltages may have equivalent magnitudes. The first and second clock signals may have 50% duty cycles and may be 180 degrees out-of-phase relative to each other.12-25-2008
20120194273DIFFERENTIAL RECEIVER - A differential receiver includes a first amplifying circuit and a second amplifying circuit. The first amplifying circuit comprises a first differential pair of PMOS transistors, a first current source, and a first load resistance section, while the second amplifying circuit comprises a second differential pair of NMOS transistors, a second current source, and a second load resistance section. With the structure of the first and second amplifying circuits, an increased input common mode range can be obtained.08-02-2012
20090039958Operational amplifier with extended common-mode input range - An operational amplifier is provided with an extended common mode input range. This operational amplifier includes an input stage, a common mode feedback circuit, a current mirror, a replica input stage, and an output stage. The input stage couples to the CMFB circuit and replica input stage. The input stage is operable to receive a feedback signal from the CMBF circuit. This feedback signal is based on comparing a common mode voltage to a common mode reference voltage. The current mirror, coupled to the CMFB circuit and input stage, mirrors currents within the input stage as input to the CMFB circuit. The replica input stage, which is also coupled to the CMFB circuit, uses an input common mode (INCM) voltage to adjust current flow within the replica input stage. This allows a current within the CMFB circuit to be a function of the INCM. The output stage couples to the input stage and is operable to provide an amplified signal corresponding to a first differential signal.02-12-2009
20090115518DIFFERENTIAL AMPLIFIER WITH INPUT STAGE INVERTING COMMON-MODE SIGNALS - To eliminate common-mode components in differential input signals without the necessity of introducing a transformer and a special feedback loop for eliminating common-mode components, a differential amplifier (05-07-2009
20090115517APPARATUS AND METHOD FOR LOW POWER RAIL-TO-RAIL OPERATIONAL AMPLIFIER - A rail-to-rail amplifier is provided. The rail-to-rail amplifier includes a p-type differential pair, an n-type differential pair, switches, and an output stage. The switches are arranged to selectively couple either the p-type differential pair or the n-type differential pair to the output stage so that only one of the differential pairs is coupled to the output stage at a time.05-07-2009
20080231362LINEAR TRANSCONDUCTOR FOR RF COMMUNICATIONS - The present patent application comprises a linear transconductor having at least one input and at least one output, comprising a differential amplifier having a plurality of transistors and a plurality of inputs, wherein a difference of input signals is amplified, a cascode circuit having a plurality of transistors, wherein the transistors are operably connected to the differential amplifier, wherein reverse isolation between an input and an output of the linear transconductor is improved by decoupling the input and the output of the linear transconductor by mounting at least one transistor of the plurality of transistors of the cascode circuit as a common-gate stacked on the at least one transistor of the differential amplifier, an active load having a plurality of transistors operably connected between the cascode circuit and supply voltage, and an auxiliary device operably connected to the connection between the active load, the cascode device and ground.09-25-2008
20100295616AUDIO COMPENSATION METHOD AND AUDIO APPARATUS WITH CLASS AB POWER AMPLIFIER - An audio apparatus is provided, receiving a reference voltage and an input signal to generate an output signal. In the audio apparatus, a compensation circuit, generates a compensated reference voltage based on the input signal, the reference voltage and the output signal. A class AB power amplifier receives the compensated reference voltage to amplify the input signal into the output signal.11-25-2010
20100301938OPERATIONAL AMPLIFICATION CIRCUIT - An operational amplification circuit includes a differential amplification circuit portion that amplifies a differential input, and an output circuit portion that outputs the amplified output using a signal amplified in the differential amplification circuit portion. The differential amplification circuit portion is provided with a pair of first transistors to which signals are differentially input, and second and third transistors which are connected to current paths of the pair of first transistors and which constitute current mirror circuits with respect to each other. The output circuit portion is provided with a fourth transistor, a gate of which is connected to a drain of the second transistor, and an amplified output is output from a drain of the fourth transistor.12-02-2010
20100134186LOW POWER OPERATIONAL AMPLIFIER - An amplifier which operates with low power is provided. In the amplifier, a first input unit includes a first control circuit and a second control circuit each including one terminal connected to an output node and the other terminal connected to a respective input transistor from among the plurality of input transistors, and controls the amount of current flowing into the plurality of input transistors or flowing out of the plurality of input transistors according to operating modes of the amplifier, whereby even when an A bias current is increased in order to increase a slew rate of the amplifier, a B bias current a the quiescent current do not increase.06-03-2010
20130141163OUTPUT COUPLING CAPACITOR FREE AUDIO POWER AMPLIFIER DYNAMICALLY CONFIGURED FOR SPEAKERS AND HEADPHONES WITH EXCELLENT CLICK AND POP PERFORMANCE - First and second channel bridge amplifiers are dynamically configured to drive either speakers or headphones. The first channel bridge amplifier includes a first amplifier driving one end of a first speaker through a mechanical switch in a headphone-jack, and a second amplifier driving another end of the first speaker. The second channel bridge amplifier includes third and fourth amplifiers driving respective ends of a second speaker. To suppress click and pop, an amplifier control circuit maintains certain amplifiers (depending on headphone or speaker mode) tri-stated until input coupling capacitors have fully charged and an input signal exceeding a predetermined amount is detected.06-06-2013
20110001561SEMICONDUCTOR DIFFERENTIAL AMPLIFIER - There is provided a circuit to make a bias for adjusting a threshold voltage of MOS devices available in a wide range, to extend the amplitude range of the input voltage range of a semiconductor differential amplifier from a power supply potential to a ground potential, and automatically to ensure an operation of a differential pair in the saturation region as rejecting the common-mode signal in the entire voltage range. The semiconductor differential amplifier is configured by the first gates of two four-terminal fin type FETs serving as an input terminal of differential pair, and in that the second gates of the four-terminal fin type FETs interconnected with each other, wherein a signal decreasing monotonously along with the increase in the input common-mode component is input.01-06-2011
20110210792POWER AMPLIFIER DEVICE - This invention provides a power amplifier device that satisfies both of delivering a high output and reducing the chip area occupied by the power amplifier device. The power amplifier device formed over a substrate comprises primary inductors arranged in a generally circular geometry, a ground pattern, transistor pairs, and a secondary inductor. The ground pattern is provided to extend from a portion of a region inside the circular primary inductor into regions outside the primary inductor, when viewed from the direction perpendicular to the substrate, and grounded at a plurality of points in the regions outside the primary inductor. To both ends of each primary inductor, first main electrodes of first and second transistors forming a transistor pair in linkage with the primary inductor are coupled respectively. Second main electrodes of the first and second transistors are coupled to the ground pattern in the region inside the primary inductor and have electrical conduction to the respective plurality of points grounded.09-01-2011
20130147554LOW-POWER HIGH-GAIN MULTISTAGE COMPARATOR CIRCUIT - A method is provided for receiving a differential signal pair input at a first circuit stage and converting the differential signal pair input to a single-ended signal at a second circuit stage. The method also provides for receiving an output of the first circuit stage and an output of the second stage at a third circuit stage and transmitting an amplified signal output from the third circuit stage. The method allows for a 60 dB signal gain or more. A circuit is also provided that includes multiple circuit stages that can provide signal gain to an input differential signal pair. The circuit converts the differential pair into a single-ended signal and transmits the amplified signal as an output. The circuit provides the signal gain without using a current mirror. A computer readable storage device encoded with data for adapting a manufacturing facility to create an apparatus is also provided.06-13-2013
20110241778PEAKING CIRCUIT, METHOD FOR ADJUSTING PEAKING CIRCUIT, DIFFERENTIAL AMPLIFIER INSTALLING PEAKING CIRCUIT, LASER DIODE DRIVING CIRCUIT INSTALLING PEAKING CIRCUIT, AND DATA PROCESSING UNIT INSTALLING PEAKING CIRCUIT - A peaking circuit for adjusting peaking of a high-frequency signal, comprises: a first inductor; a second inductor which is electromagnetically coupled with the first inductor; a signal input section which receives an input signal; a transistor which adjusts electric current passing through the second inductor according to the input signal inputted via the signal input section; and a signal output section which outputs a signal whose peaking has been adjusted by the first inductor. Mutual inductance of the electromagnetically coupled first and second inductors is changed by the adjustment of the electric current passing through the second inductor, according to the input signal inputted via the signal input section, with the use of the transistor, thereby adjusting the peaking of signal waveform of electric current passing through the first inductor, and the signal subjected to the peaking adjustment is outputted from the signal output section.10-06-2011
20110025417Signal Processing Circuit - A signal processing circuit includes a differential input circuit, a first DC filter, a second DC filter, a differential transconductance circuit, and a differential converting circuit. The differential input circuit includes first and second input circuits respectively for receiving first and second input signals to generate first and second processed signals. The first DC filter and the second DC filter, respectively coupled to the first and the second input circuits, receive the first and the second processed signals and output first and second voltage signals. The differential transconductance circuit includes first and second transconductance circuits, respectively coupled to the first and the second DC filters, for converting the first and the second voltage signals to first and second current signals. The differential converting circuit includes first and second converting circuits, respectively coupled to the first and the second transconductance circuits, for mixing the first and the second current signals with first and second clock signals to generate first and second output signals.02-03-2011
20110025416Differential amplifier - A differential amplifier including: 1st transistor that is connected between 1st power-supply terminal and 1st output terminal, and has a control terminal receiving one of the differential input signals; 2nd transistor that is connected between 2nd power-supply terminal and 1st output terminal, and has a control terminal receiving the other of the differential input signals; 1st switch that is connected between 1st power-supply terminal and 1st transistor; 3rd transistor that is connected between 2nd power-supply terminal and 2nd output terminal, and has a control terminal is input to one of the differential input signals; 4th transistor that is connected between 1st power-supply terminal and 2nd output terminal, and has a control terminal receiving the other of the differential input signals; 2nd switch that is connected between 2nd power-supply terminal and 3rd transistor. Drive state of 1st and 2nd switches are controlled by a control signal.02-03-2011
20110025418CURRENT TO VOLTAGE CONVERTER - A current to voltage converter which includes a common gate transconductance element having at least one input and one output. The current to voltage converter further includes a common source transconductance element having at least one input and one output, where the common source transconductance element is connected to the common gate transconductance element. The current to voltage converter further includes a feedback circuit including a resistor, where the feedback circuit connects any input having a polarity to any output having an opposite polarity.02-03-2011
20090066415OPERATIONAL AMPLIFIER HAVING HIGH SLEW RATE AND STABILITY, AND OPERATING METHOD THEREOF - An operational amplifier includes a differential amplifier, an output stage, and a control unit. The differential amplifier generates a first current through a first output node and a second current through a second output node in response to a voltage difference between a first input signal input through a first input terminal and a second input signal input through a second input terminal. The output stage generates an output signal through an output node. The control unit receives a voltage of the first output node and a voltage of the second output node, as bias voltages, and controls an output current of the output stage to determine the output signal of the output stage in response to the received voltages of the first and second output nodes.03-12-2009
20110018634Method and Apparatus for Systematic and Random Variation and Mismatch Compensation for Multilevel Flash Memory Operation - Method and means for random or systematic mismatch compensation for a memory sensing system are disclosed. A sense amplifier includes a bulk voltage source to set the bulk of the sensing transistor to be a voltage different than the voltage driving the sensing transistor. For an NMOS sensing transistor, a triple well is used with the variable bulk voltage. Differential sense amplifiers with various offset compensation are included. Intentional offset creation for useful purpose is also included.01-27-2011
20110018633OPERATIONAL AMPLIFIER HAVING DC OFFSET CANCELLATION CAPABILITY - An operational amplifier includes an input stage for generating a first differential output signal pair according to a first differential input signal pair, an output stage for generating a second differential output signal pair according to at least a second differential input signal pair, and a high-pass filtering circuit coupled between the input stage and the output stage for performing high-pass filtering on the first differential output signal pair, for generating the at least a second differential input signal pair.01-27-2011
20110037518AMPLIFIERS WITH IMPROVED LINEARITY AND NOISE PERFORMANCE - Amplifiers with improved linearity and noise performance are described. In an exemplary design, an apparatus includes first through sixth transistors. The first transistor receives an input signal and provides an amplified signal. The second transistor receives the amplified signal and provides signal drive for an output signal. The third transistor receives the input signal and provides an intermediate signal. The fourth transistor provides bias for the third transistor in a high linearity mode. The fifth transistor receives the intermediate signal and provides signal drive for the output signal in a low linearity mode. The third and fourth transistors form a deboost path that is enabled in the high linearity mode to improve linearity. The third and fifth transistors form a cascode path that is enabled in the low linearity mode to improve gain and noise performance. The sixth transistor generates distortion component used to cancel distortion component from the first transistor.02-17-2011
20110115560DIFFERENTIAL PAIR WITH CONSTANT OFFSET - A bias current is generated for an unbalanced differential pair that is proportional to the transconductance gain of the differential pair. When the transconductance gain varies (e.g., due to temperature variations), the bias current varies in proportion thereby maintaining a constant offset voltage. In some implementations, a voltage to current converter circuit generates the bias current from a constant reference voltage that is independent of temperature and voltage supply variations (e.g., a bandgap reference voltage).05-19-2011
20110115561OUTPUT COMMON MODE VOLTAGE STABILIZER OVER LARGE COMMON MODE INPUT RANGE IN A HIGH SPEED DIFFERENTIAL AMPLIFIER - A circuit includes a differential amplifier having a folded cascode architecture with a pair of cascode transistors. A sensing circuit senses a common mode input voltage of a differential input signal applied to the differential amplifier. A bias generator circuit generates a bias voltage for application to the pair of cascode transistors in the folded cascode architecture. The bias generator circuit is connected to an output of the sensing circuit such that the generated bias voltage has a value which is dependent on the sensed common mode input voltage. This dependence stabilizes a common mode output voltage from the differential amplifier in response to changes in the common mode input voltage.05-19-2011
20100164621OUTPUT GAIN STAGE FOR A POWER AMPLIFIER - In one embodiment, the present invention includes multiple gain stages to receive and amplify a differential input signal at different common mode voltages. The stages each may include a pair of linear NMOS gain transistors coupled to a primary coil of a given output transformer. One of the stages may include commonly coupled terminals coupled to a center tap of the primary coil of an output transformer of another stage, and a supply current provided to one of the stages is re-used for the other stage(s).07-01-2010
20090322427TRANSISTOR AND ROUTING LAYOUT FOR A RADIO FREQUENCY INTEGRATED CMOS POWER AMPLIFIER DEVICE - An integrated CMOS power amplifier system to improve amplifier performance, the integrated CMOS power amplifier system including a plurality of differential main amplifier cores, a plurality of ground pads, and a plurality of routes to connect the plurality of differential main amplifier cores to the plurality of ground pads. Each differential main amplifier core includes a pair of collocated main amplifier core transistors. Each ground pad is connected to a subset of the differential main amplifier cores. Embodiments of the integrated CMOS power amplifier system decrease parasitic inductance to ground and increase the transconductance and amplification of the integrated CMOS power amplifier system, thus improving performance.12-31-2009
20110241779Front-end equalizer and amplifier circuit - A front-end equalizer and amplifier circuit includes two pairs of fully differential pair transistors, wherein the tail currents of one pair of transistors are connected with ground and connected with each other through the capacitive component to realize the connection between the pair of transistors and the feedback capacitor, the tail currents of the other pair of transistors are connected with ground and connected with each other through the resistive component to realize the connection between the other pair of transistors and the feedback resistor, the output positive and negative ends of each pair of transistors are connected with each other through the inductive component, thus forming the load for connecting the voltage source. The circuit increases the high frequency gain. Its single-stage gain is equivalent to the multi-stage gain. Compared with the traditional multi-stage structure, the present invention decreases the power consumption and area, and improves the reliability.10-06-2011
20090219093AMPLIFIER WITH ACTIVE INDUCTOR - An amplifier comprises an amplifier stage and an active inductor. The amplifier stage has an input terminal and an output terminal. The active inductor comprises first and second resistors and first and second transistors. The first resistor has a first terminal coupled to the output terminal of the amplifier stage, and a second terminal. The second resistor has a first terminal coupled to the output terminal of the amplifier stage, and a second terminal. The first transistor has a first current electrode coupled to the second terminal of the first resistor, a control electrode coupled to receive a bias voltage, and a second current electrode. The second transistor has a first current electrode coupled to the second current electrode of the first transistor, a control electrode coupled to the second terminal of the second resistor, and a second current electrode coupled to a first power supply voltage terminal.09-03-2009
20100039176SYNCHRONIZED TEMPERATURE PROTECTION FOR CLASS-AB AMPLIFIERS - The present invention relates to a synchronization circuit for an integrated amplifier provided with a bandwidth control in accordance to a bandwidth control signal, wherein said synchronization circuit comprises a control terminal for a control signal and rank selector means connected to an internal control signal and being configured to emboss said internal control signal to said control terminal, if said internal control signal has a higher rank in accordance to a predetermined ranking criteria in comparison to said control signal. Further, the present invention relates to a respective synchronization method for continuously communicating and synchronizing of a common control signal for multiple circuits. One preferred application of the invention is in temperature protection by a synchronized bandwidth control for multiple class-AB amplifiers by means of only one additional terminal pin per amplifier. In such multi-channel amplifier configuration, the hottest amplifier dictates the amount of bandwidth reduction. By the invention the individual amplifiers can communicate about their individual temperatures, by which the temperature of the actual hottest amplifier and the respective required bandwidth reduction is determined and provided to each individual amplifier for a synchronized bandwidth reduction. Thus, in three channel RGB-amplifiers the signal integrity is advantageously maintained.02-18-2010
20100039178AMPLIFIER CIRCUIT - An amplifier circuit includes an amplifier unit and a current control circuit as means for achieving the aforementioned object. The amplifier unit includes a gain compensation MOS transistor compensating for gain of an output characteristic and a linearity compensation MOS transistor compensating for linearity of an output characteristic. A source of the gain compensation MOS transistor is connected to a drain of the linearity compensation MOS transistor. An input signal is applied to a gate of the linearity compensation MOS transistor. A drain of the gain compensation MOS transistor is set as an output. The current control circuit performs control so as to pass predetermined current between the drain and the source of the gain compensation MOS transistor and pass predetermined current between the drain and the source of the linearity compensation MOS transistor.02-18-2010
20100039177Amplifier Arrangement and Method for Amplification - An amplifier arrangement comprises a first transistor (02-18-2010
20100066448DEVICE UNDER TEST POWER SUPPLY - A power supply with and input and output includes an amplifier configured to set an output voltage of the power supply output equal to a fixed input voltage for the power supply. The power supply has a first output stage coupled to the amplifier and configured to source and sink current at the output of the power supply between a first voltage rail and a third voltage rail. The power supply has a second output stage coupled to the amplifier and configured to source and sink current to the output of the power supply between a second voltage rail and the third voltage rail. A selection device is configured to enable the first and second output stages based on a selection input signal. The selection device is situated outside of the first and the second output stages.03-18-2010
20110102082MINIMAL AREA, POWER EFFICIENT, HIGH SWING AND MONOLITIHIC GROUND CENTERED HEADPHONE AMPLIFIER CIRCUIT OPERABLE ON A LOW VOLTAGE - A minimal area, power efficient, high swing and monolitihic ground centered headphone amplifier circuit operable on a low voltage. An input amplifier stage includes a first input terminal and a second input terminal and having a first gain. An output amplifier stage is coupled to an output of the input amplifier stage to provide an output signal and having a second gain. A feedback network coupled between the first input terminal and the output of the output amplifier stage. A level shifting unit coupled to the first input terminal and the feedback network. A charge pump coupled to the output amplifier stage to generate a negative supply voltage and to minimize a noise associated with the negative supply voltage using a loop gain of the amplifier, wherein the loop gain is a combination of the first gain, the second gain, and a gain of the feedback network.05-05-2011
20110102084MULTI-STAGE CMOS POWER AMPLIFIER - There is provided a multi-stage CMOS power amplifier including: a driver amplifier having differential output terminals, inverting differential signals input through first and second input terminals and outputting the respective inverted signals through the differential output terminals; a transformer for power matching having a primary coil connected between the differential output terminals of the driver amplifier and a secondary coil coupled with the primary coil using electromagnetic induction, having a predetermined turns ratio to the primary coil, and connected to a direct current (DC) tuning voltage terminal; and a power amplifier power-amplifying differential signals passing through one end and the other end of the secondary coil of the transformer and outputting the respective power-amplified differential signals through first and second output terminals.05-05-2011
20110102083HIGH PERFORMACE LVDS DRIVER FOR SCALABLE SUPPLY - Traditionally, complementary metal oxide semiconductor (CMOS) and bipolar transistors have been separately employed in low voltage differential signal (LVDS) drivers. Here, a hybridized LVDS driver is provided with an input stage that uses CMOS transistors and output stages that use bipolar transistors. As a result of this hybridization, the LVDS driver has superior functional characteristics compared to conventional LVDS drivers as well as being able to function with a supply range between about 1.8V and 3.3V.05-05-2011
20120200357POWER AMPLIFIER - A power amplifier according to the embodiments includes: a silicon substrate; an input terminal configured to receive an input of a RF signal; a power dividing unit configured to divide the RF signal into a first signal and a second signal; a phase modulating unit configured to modulate a phase of the second signal; an N well formed in the silicon substrate; a P well formed in the N well and configured to receive an input of the second signal of a modulated phase; a gate insulating film formed on the P well; a gate electrode formed on the gate insulating film and configured to receive an input of the first signal; source and drain electrodes formed on both sides of the gate electrode in the silicon substrate; and an output terminal configured to output a RF signal obtained from the drain electrode.08-09-2012
20090027124Level-Shifting Buffer - An analog level-shifting buffer for providing signal amplitude and/or common mode adjustment is disclosed. In one example, a receiver system may include a first amplification stage that is powered, for example, via an I/O power supply (e.g., VDDIO) and a second amplification stage that is powered, for example, via a core logic power supply (e.g., VDD). Arranged between the first and second amplification stages may be the analog level-shifting buffer. The analog level-shifting buffer may include a set of variable impedance elements for controlling the output common mode and output signal swing of the level-shifting buffer.01-29-2009
20090027123Controlled transconductance differential stage - A differential stage which uses a bias generator circuit to set the operating currents of the input stage FETs to make the incremental Gm primarily a function of a single resistor embedded in the biasing circuit, such that the input stage has a Gm which only gradually departs from nominal under overdrive, and continues to supply output currents which increase with an increasing differential input signal.01-29-2009
20110148523OP-AMP SHARING WITH INPUT AND OUTPUT RESET - An operational amplifier with two pairs of differential inputs for use with an input switch capacitor network. The operational amplifier has reset devices for resetting the second pair of differential inputs while amplifying the first pair of differential inputs, and for resetting the first pair of differential inputs while amplifying the second pair of differential inputs for reducing memory effect in electronic circuits. In an embodiment, the amplifier has an additional reset device for resetting the outputs during a prophase of amplifying the first pair of differential inputs and a prophase of amplifying the second pair of differential inputs.06-23-2011
20110001560Amplifiers with Input Offset Trim and Methods - Amplifiers with power-on trim and methods using an amplifier system having an amplifier system input and an amplifier system output, an amplifier, a comparator, a successive approximation register having an input coupled to an output of the comparator, a first switch for switching an input of the amplifier from the amplifier system input to shorting the amplifier input, a second switch for switching an output of the amplifier from the amplifier system output to an input of the comparator, an output of the successive approximation register being coupled to an N bit digital to analog (D/A) converter, the D/A converter being a non-binary converter using a radix of less than 2 for at least the most significant bits, and an output of the D/A converter being coupled to the amplifier to control the input offset of the amplifier. Novel embodiments for the amplifier, comparator and D/A converter are disclosed.01-06-2011
20100295617APPARATUS AND METHOD FOR DRIVING AN LED - Here, a driver for an light emitting diode (LED) is provided. Within this driver, several differential pairs of bipolar transistors are employed in an input stage and output stage along with a control loop. Collectively, these components operate together to drive the LED with a low headroom voltage while still achieving high driver performance in terms of edge speed and jitter.11-25-2010
20090231037TELESCOPIC OPERATIONAL AMPLIFIER AND REFERENCE BUFFER UTILIZING THE SAME - A telescopic operational amplifier including a current source, an input stage, and a load stage is provided. The input stage is coupled to the current source and includes a group of input transistors for receiving an input voltage. The load stage is coupled to the input stage and includes a group of load transistors for outputting an output voltage. The threshold voltages of the group of input transistors are larger than that of the group of load transistors.09-17-2009
20080252375Voltage-clamping device and operational amplifier and design method thereof - A voltage-clamping device used in an operational amplifier is provided. The operational amplifier comprises a first transistor. The cross-voltage between the gate and the source of the first transistor is near to a specific voltage and the cross-voltage between the drain and the source of the first transistor is not equal to zero, so as to generate a big substrate current. The voltage-clamping device comprises a second transistor whose source and gate are respectively coupled to the drain of the first transistor and used for receiving a bias signal, so that the second transistor is biased in saturation region, and the voltage at the source of the second transistor is made equal to the difference between the bias signal and the threshold voltage of the second transistor. Thus, the cross-voltage between the drain and the source of the first transistor is reduced and the substrate current is reduced accordingly.10-16-2008
20110163808AMPLIFIER WITH IMPROVED INPUT RESISTANCE AND CONTROLLED COMMON MODE - An amplifier includes a first pair of transistors (the first pair) that defines a first output, each transistor of the first pair having a gate coupled to a first input terminal; a second pair of transistors (the second pair) that defines a second output, each transistor of the second pair having a gate coupled to a second input terminal; a first capacitor coupled to the second output terminal and to the gate of a first transistor of the first pair; a second capacitor coupled to the second output terminal and to the gate of a second transistor of the first pair; a third capacitor coupled to the first output terminal and to the gate of a third transistor of the second pair; and a fourth capacitor coupled to the first output terminal and to the gate of a fourth transistor of the second pair.07-07-2011
20100283542Linear transimpedance amplifier with wide dynamic range for high rate applications - Various amplifier configurations having increased bandwidth, linearity, dynamic range, and less distortion are shown and disclosed. To increase bandwidth in a transimpedance amplifier, a replica circuit is created to replicate a degeneration resistance, or the resistance or value that relates to a feedback resistance. From the replica circuit, the replicated values are mirrored and processed to control a FET switch which modifies a degeneration resistance. The FET switch control signal is related to the feedback resistance and modifies the degeneration resistance to thereby maintain the product of the feedback resistance and the degeneration resistance as a constant. In another embodiment, a second switch controlled by an automatic gain control signal is established between a first stage amplifier and a second stage amplifier to improve dynamic range and bandwidth without degrading other amplifier specifications.11-11-2010
20110102085DIFFERENTIAL AMPLIFIER - A high-gain differential amplifier that is capable of high speed operation is provided. A differential amplifier that outputs a signal representing a difference between signals respectively inputted to first and second input terminals and a phase-inverted signal thereof via first and second output terminals respectively, is provided with a first switching element that makes a short-circuit between the first input terminal and the second output terminal when turned on, a second switching element that makes a short-circuit between the second input terminal and the first output terminal when turned on, and a third switching element that makes a short-circuit between the first output terminal and the second output terminal when turned on. The third switching element is set to an ON state for a predetermined period while the first and second switching elements are set to an OFF state. Subsequently, the third switching element is switched to the OFF state and both of the first and second switching elements are switched to the ON state.05-05-2011
20100182088OPERATIONAL AMPLIFIER - An operational amplifier has an input stage that branches a first current according to first and second input signals. An output stage generates an output signal from a second current and one of the branch currents in the input stage. A first transistor supplies the first current to the input stage. A second transistor supplies the second current to the output stage. A first gate line supplies a first bias potential to the gate terminal of the first transistor. A second gate line supplies a second bias potential to the gate terminal of the second transistor. The first gate line and the second gate line are electrically isolated from each other, preventing unwanted feedback of the output signal to the input stage by leakage through the gate lines.07-22-2010
20100117734Programmable Gain Amplifier and Transconductance Compensation System - A programmable gain amplifier (PGA) system comprises selectable parallel transconductors in a front end, independently selectable serial amplification circuits in a back end. The back end is configured to receive an output of the front end and may include a plurality of current or voltage mode amplifiers in series. The PGA system also includes control circuitry to select a gain configuration for the PGA by selecting selectable components in the front and back ends. The PGA system may additionally include control circuitry configured to change the transconductance of one or more of the front end transconductors such that the gain configurations of the PGA are independent of variations such as those due to temperature and fabrication. The PGA system may be used between a signal receiver and an analog to digital converter.05-13-2010
20110074510SYMMETRICALLY OPERATING SINGLE-ENDED INPUT BUFFER DEVICES AND METHODS - Embodiments are described including those pertaining to an input buffer having first and second complementary input terminals. One such input buffer has a symmetrical response to a single input signal applied to the first input terminal by mimicking the transition of a signal applied to the second input terminal in the opposite direction. The aforementioned input buffer includes two amplifier circuits structured to be complementary with respect to each other. Each of the amplifier circuits includes a first transistor having a first input node that receives an input signal transitioning across a range of high and low voltage levels, and a second transistor having a second input node that receives a reference signal. The first input node is coupled to the second transistor through a capacitor that charges and discharges the drain of the second transistor responsive to the input signal transitioning to mimic the second input node transitioning in the direction opposite to the transition of the input signal, while the reference signal at the second input node is maintained at a constant voltage level.03-31-2011
20110074508VOLTAGE REGULATOR - Provided is a voltage regulator having a structure in which an output terminal of a first differential amplifier circuit is connected to a second differential amplifier circuit to control an output transistor by the second differential amplifier circuit. When low current consumption is required, the first differential amplifier circuit is suspended. When high-speed response is required, the first differential amplifier circuit is activated. The low-current consumption operation and the high-speed operation are switched with a minimum circuit area.03-31-2011
20100176883METHOD FOR ADJUSTING THRESHOLD VOLTAGE AND CIRCUIT THEREFOR - A method and circuit for changing a threshold voltage of a transistor. The circuit includes a sense circuit coupled to a switching transistor, a circuit transistor and to one terminal of a resistor. The other terminal of the resistor is connected to a body contact. The switching transistor directs current along one of two different paths in response to an input voltage sensed by the sense circuit. When the switching transistor directs a first current along one path, the first current is steered towards the resistor and flows through the resistor in one direction and when the switching transistor directs a second current along the other path, the second current is directed towards the resistor and flows through the resistor in the opposite direction from the first current. Steering the currents varies the potential of a body with respect to the potential at the source of the circuit transistor.07-15-2010
20080218265Amplifier structures that enhance transient currents and signal swing - Amplifier embodiments are provided that are well suited for systems which require high signal gains and high transient currents that can drive various loads (e.g., capacitive loads). These embodiments are also well suited for electronic systems in which the available amplifier headroom is significantly limited. Exemplary systems are multiplying digital-to-analog converters in pipelined converter systems.09-11-2008
20100019848Complementary Low Noise Transductor with Active Single Ended to Differential Signal Conversion - Systems and methods for providing single-ended to differential signal conversion are described. A single-ended voltage signal may be received from an input of a low noise amplifier. The single-ended voltage signal may be coupled to a first input stage to match a source impedance of the single-ended voltage signal to a predetermined output impedance. The single-ended voltage signal with the predetermined output impedance may be output as a first voltage signal to a first converting stage. An input bias voltage may be provided to the first converting stage to bias the first voltage signal. The biased first voltage signal may be output as a first differential-ended current signal to an output of the low noise amplifier.01-28-2010
20110074509NON-LINEAR CAPACITANCE COMPENSATION - Embodiments are directed to capacitance compensation via a compensation device coupled to a gain device to compensate for a capacitance change occurring due to an input signal change, along with a controller coupled to the compensation device to receive the input signal and to control an amount of compensation based on the input signal. In some embodiments, banks may be formed of multiple compensation devices, where each of the banks has a different size and is coupled to receive a different set of bias voltages.03-31-2011
20080315949VARIABLE GAIN AMPLIFIER INSENSITIVE TO PROCESS VOLTAGE AND TEMPERATURE VARIATIONS - An improved VGA design offering a purely ratiometric mechanism for controlling gain by current-steering. A control loop delivers a reference voltage to a control amplifier that steers current and match the common mode output voltage (CMOV) with said predefined reference voltage. The VGA is designed so that, although the absolute gain varies over process, voltage, and temperature (PVT), the gain steps retain their values. Moreover, a method for controlling the gain in a VGA in a way that is insensitive to PVT is also disclosed. First, a voltage representing the required gain of the VGA in injected to the outputs of the VGA. Then, the CMOV of the VGA is sampled. Finally, the CMOV is subtracted by a predefined reference voltage and is fed back as bias to bases of the transistors of the VGA, thus controlling it gain, until the CMOV and the reference voltage become equal.12-25-2008
20100001797DIFFERENTIAL AMPLIFIER - A differential amplifier circuit at the input stage is configured with a twin differential type having a first differential amplifier circuit (01-07-2010
20090115516NAUTA OPERATIONAL TRANSCONDUCTANCE AMPLIFIER - Provided is an operational transconductance amplifier (OTA). An existing Nauta transconductor used to implement a high frequency Gm-C filter integrated circuit (IC) is analyzed by a new method and from a new perspective to remove extra components and divide roles of remaining inverters for more simple and efficient circuit structure. In an existing Nauta transconductor, a common mode signal from an input terminal is amplified and appears at an output terminal, while in the inventive Nauta transconductor the common mode signal from an input terminal does not appear at the output terminal and is effectively eliminated. These enhanced characteristics can be achieved with a smaller number of inverters than an existing Nauta transconductor. Frequency characteristics of the filter can be effectively enhanced by independently controlling the quality factor without affecting the transconductance value required for frequency characteristics of the filter.05-07-2009
20120146724LOW-NOISE AMPLIFIER - Traditionally, low-noise amplifiers or LNAs have been used in high frequency applications, but for very high frequency ranges (i.e., 60 GHz), building an LNA to meet performance needs has been difficult. Here, however, an LNA has been provided that operates well around 60 GHz. In particularly, this LNA is generally unconditionally stable, has a generally low noise factor or NF, and has a generally high gain around 60 GHz.06-14-2012
20100164622SINGLE-ENDED TO DIFFERENTIAL AMPLIFICATION AND PIPELINE ANALOG-TO-DIGITAL CONVERSION FOR DIGITALLY CONTROLLED DC-DC CONVERTERS - Methods and systems to amplify and convert a single-ended analog signal to a differential signal and to convert the differential signal to a digital value, including to time-multiplex a plurality of windowed single-ended analog error signals, amplify a difference between the time-multiplexed analog signals, sample a corresponding amplified difference signal and an inverted amplified difference signal, amplify and center the samples about a common mode, and convert a corresponding amplified differential signal to digital values in a pipeline fashion. Bias adjustable features may be implemented to control a bandwidth, and clock rates may be adjustable to correspond to the bandwidth.07-01-2010
20110304395POWER AMPLIFIER - Disclosed is a power amplifier. A power amplifier according to an aspect of the invention may include: a first amplification section having a first N metal oxide semiconductor (MOS) amplifier and a second N MOS amplifier connected in a cascode configuration and amplifying an input signal; a second amplification section having a first P MOS amplifier and a second P MOS amplifier connected in a cascode configuration and amplifying the input signal; and a power combining section combining respective output signals of the first amplification section and the second amplification section.12-15-2011
20110304394Variable Gain Amplifier for Low Voltage Applications - An integrated communications system. Comprising a substrate having a receiver disposed on the substrate for converting a received signal to an IF signal. Coupled to a VGA for low voltage applications and coupled to the receiver for processing the IF signal. The VGA includes a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors. The bank pair is cross-coupled in parallel, the IF signal is applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages. A digital IF demodulator is disposed on the substrate and coupled to the VGA for low voltage applications, for converting the IF signal to a demodulated baseband signal. And a transmitter is disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.12-15-2011
20110304392AMPLITUDE-STABILIZED ODD ORDER PRE-DISTORTION CIRCUIT - An amplitude-stabilized third-order predistortion circuit includes a main cell having a differential input for receiving a differential input voltage, a differential output for providing a differential output voltage, and a load control input for receiving a load control voltage; a plurality of replica cells having a differential input for receiving a differential level of peak input voltage, a differential peak output voltage, and a load control input; and a plurality of control circuits coupled to the differential outputs of the replica cells, and driving the load control inputs of the replica cells and the weighted inputs of a signal combiner driving the load control input of the main cell. The main cell and the replica cells each include a cross-coupled differential cell having a variable load. The control circuit includes a first amplifier for generating a single-ended peak signal and a second amplifier for generating the load control voltage from the difference between the replica cell single-ended peak output signal and a single-ended peak reference signal.12-15-2011
20110304393CLASS AB OUTPUT STAGES AND AMPLIFIERS INCLUDING CLASS AB OUTPUT STAGES - A buffer stage includes a flipped voltage follower and an emitter follower. The flipped voltage follower is connected between a high voltage rail and a low voltage rail and include an input and an output. The emitter follower is also connected between the high voltage rail and the low voltage rail and includes an input and an output. A resistor connects the output of the flipped voltage follower to the output of the emitter follower. The input of the flipped voltage follower and the input of the emitter follower are connected together and provide an input of the buffer stage. The output of the emitter follower provides an output of the buffer stage. A differential buffer stage can be implemented using a pair of such buffer stages. Such a differential buffer stage can provide the output stage for a fully differential operational amplifier.12-15-2011
20100148868Differential amplifier - In a wireless communications system, it is important to realize a limiter operation by which a differential amplifier for amplifying a local signal may stably supply an output signal having a constant amplitude. However, when a signal handled by the system has a high frequency, a gain of the differential amplifier is reduced and the limiter operation may not be performed appropriately. The differential amplifier is configured employing a double cascode connection to enhance an output impedance, an upper transistor of the double cascode connection realizes enhancement in gain and frequency characteristics based on a positive feedback signal, and a lower transistor of the double cascode connection controls an operating point and suppresses an allowable output voltage range by operating in a linear region and based on a negative feedback signal to facilitate the limiter operation.06-17-2010
20100321112Anti-Pop Circuit - Presently many audio chips suffer from pop issues, which is especially serious for single ended audio drivers. An audio pop is a disturbance in the output caused by a sudden transition of chip power, particularly when a chip is powered on or powered off. Furthermore, compensation networks included in the amplifiers on audio chips for stability offer a significant path for transmitting power disturbances to the output. Hence, circuitry is developed to suppress pops in the output stages of an amplifier.12-23-2010
20100237942COMMON-GATE COMMON-SOURCE AMPLIFIER - Techniques for integrating a common-source and common-gate amplifier topology in a single amplifier design. In one aspect, an input voltage is provided to both a common-source amplifier and a common-gate amplifier. The output voltages of the common-source amplifier and the common-gate amplifier are provided to a difference block for generating a single-ended voltage proportional to the difference between the output voltages. When applied to the design of, e.g., low-noise amplifiers (LNA's), the disclosed techniques may offer improved noise performance over the prior art.09-23-2010
20100156532CLASS AB AMPLIFIER WITH RESISTIVE LEVEL-SHIFTING CIRCUITRY - A class AB amplifier with resistive level-shifting circuitry is described. In one exemplary design, the class AB amplifier includes an input stage, a resistive level-shifting stage, a class AB output stage, and a bias circuit. The input stage receives an input signal and provides a first drive signal. The resistive level-shifting stage receives the first drive signal and provides a second drive signal. The output stage receives the first and second drive signals and provides an output signal. The bias circuit generates a bias voltage for the resistive level-shifting stage to obtain a desired quiescent current for the output stage. In one exemplary design, the resistive level-shifting stage includes a transistor and a resistor. The transistor receives the bias voltage and provides the second drive signal. The resistor is coupled to the transistor and provides a voltage drop between the first and second drive signals.06-24-2010
20120038421WIRELESS COMMUNICATION DEVICE AND SEMICONDUCTOR PACKAGE DEVICE HAVING A POWER AMPLIFIER THEREFOR - A semiconductor package device comprises a first amplifier block, at least one further amplifier block, and at least one differential inductance operably coupled between a first plurality of elements of the output of a first active component of the first amplifier block and a second plurality of elements of the output of a first active component of the at least one further amplifier block. The differential inductance is arranged such that a uniform inductance is provided between the first plurality of elements of the first active component of the first amplifier block and the second plurality elements of the second active component of the at least one further amplifier block.02-16-2012
20110050341High speed rail to rail phase splitter for providing a symmetrical differential output signal having low skew - A novel high-speed phase splitter circuit (03-03-2011
20110316629OFFSET CANCELLATION FOR DIFFERENTIAL CIRCUITS - An offset cancellation circuit for canceling an offset voltage in an amplifier is provided herein. The offset cancellation circuit includes a current source configured to provide an offset current, a switching stage comprising first and second switches, and a cascode stage. The cascode stage comprises a first cascode device configured to receive the offset current from the first switch and inject the offset current into a first differential end of the amplifier, and a second cascode device configured to receive the offset current from the second switch and inject the offset current into a second differential end of the amplifier. Offset voltages are common to many differential circuits as a result of mismatch. The injection of current by the offset cancellation circuit can reduce or eliminate an offset voltage, while the cascode stage can prevent parasitic capacitance associated with the offset cancellation circuit from creating further mismatch.12-29-2011
20090033420OPERATIONAL AMPLIFIER CIRCUIT, CONSTANT VOLTAGE CIRCUIT USING THE SAME, AND APPARATUS USING THE CONSTANT VOLTAGE CIRCUIT - A disclosed operational amplifier circuit with a multi-stage amplifier configuration provides fast-response and high withstand-voltage characteristics without using high withstand-voltage transistors as output transistors in its amplifying stages. The output voltage range of a differential amplifier circuit in a first stage is limited by voltage clamping based on a reverse withstand voltage of a bipolar diode. The output voltage range of an amplifier circuit in a second stage is limited by voltage clamping based on a reverse withstand voltage of another bipolar diode. A constant voltage circuit and an apparatus including such an operational amplifier circuit are also disclosed.02-05-2009
20100237941WIDEBAND RF AMPLIFIERS - A device for amplifying signals over a wide frequency range features stacked amplifying modules connected between a DC voltage source and an electrical ground. The stacking configuration reuses the DC current produced the voltage source, and thus reduces the amount of operational DC current permitting the use of lower voltage, higher frequency devices to be used. The amplifying modules are fed signals which are different versions of an input signal, and the output signals are AC coupled using capacitors to balance out gain imbalances and asymmetries between the amplifying modules.09-23-2010
20120007675POWER AMPLIFIER - A power amplifier is provided. The power amplifier includes a loading circuit, a first stage amplifying circuit, an analog pre-distorter, a loading circuit and a second stage amplifying circuit. The first stage amplifying circuit is coupled to the loading circuit to receive a first signal and output a second signal accordingly. The analog pre-distorter is coupled to the first stage amplifying circuit to detect the envelope of the second signal and generates a third signal according to the envelope. The second stage amplifying circuit is coupled to the first stage amplifying circuit to receive the second signal. The loading circuit is biased on the third signal. The gain of the first stage amplifying circuit is related to the third signal.01-12-2012
20120013403AMPLIFIER CIRCUIT - An amplifier circuit is configured to be preceded by a single-ended-to-differential translate circuit using a BTL configuration operating at a low voltage and succeeded by amplifiers to amplify output signals VOT and VOB from the single-ended-to-differential translate circuit. The amplifier circuit activates a mute function of the subsequent amplifiers during state transition when the single-ended-to-differential translate circuit turns on. Consequently, the amplifier circuit fixes output signals OUTP and OUTN to 0 V and masks an output noise. The amplifier circuit inactivates the mute function after signals VOT and VOB become stable. Thereby, the amplifier circuit is capable of easily preventing a pop noise using a BTL configuration requested for high voltage output to drive a piezoelectric actuator.01-19-2012
20110074507DIFFERENTIAL AMPLIFIER - A Provided is a differential amplifier in which a current flowing into an output transistor may be adjusted to a constant value even when a voltage of a non-inverting input terminal changes. A current flowing through the differential amplifier circuit is controlled by a current source, a current value of which is changed depending on the voltage of the non-inverting input terminal.03-31-2011
20120154046SENSE AMPLIFIER STRUCTURE FOR A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device includes a first signal line and a second signal line, and a sense amplifier that includes a plurality of PMOS transistors and a plurality of NMOS transistors. The sense amplifier is configured to sense amplify a potential difference between the first signal line and the second signal line. The junction regions of the NMOS and PMOS transistors having the same conductivity type, and to which the same signal is applied, are formed in one integrated active region.06-21-2012
20120154045PUSH-PULL LOW NOISE AMPLIFIER WITH VARIABLE GAIN, PUSH-PULL LOW NOISE AMPLIFIER WITH COMMON GATE BIAS CIRCUIT AND AMPLIFIER WITH AUXILIARY MATCHING - A push-pull low noise amplifier (LNA) includes at least one amplifier block. Each amplifier block includes a bypass stage and at least one gain cell. The bypass stage has a first node and a second node. The gain cell has an input terminal and an output terminal, comprising a loading stage and a driving stage. When the push-pull LNA is in a first gain mode, the loading stage is enabled and the bypassing stage is disabled; and when the push-pull LNA is in a second gain mode, the loading stage is disabled and the bypassing stage is enabled.06-21-2012
20090212862OP-AMP CIRCUIT AND OP-AMP CIRCUIT DRIVING METHOD - The present invention is to provide a CMOS op-amp circuit, an op-amp circuit and an op-amp circuit control method that can increase operating speed when the op-amp circuit stabilizes to a steady state after release of a power down state. During power down, a voltage is applied to a node N08-27-2009
20100097140 AMPLIFICATION APPARATUS - An amplification apparatus comprising first amplification circuitry having first shunt-peak circuitry and second amplification circuitry having second shunt-peak circuitry, wherein the amplification apparatus is arranged to provide an operational bandwidth over which the first and second amplification circuitry amplify signals, and wherein the second shunt-peak circuitry is arranged to use at least part of the first shunt-peak circuitry.04-22-2010
20090015330VARIABLE TRANSCONDUCTANCE CIRCUIT - The variable transconductance circuit includes: a voltage-current conversion circuit for outputting a current signal linear with an input voltage signal; first and second MOS transistors for converting the current signal received to a square-root compressed voltage signal; and third and fourth MOS transistors for converting the square-root compressed voltage signal to a linear current signal. A bias current at the first and second MOS transistors and a bias current at the third and fourth MOS transistors are varied to control transconductance.01-15-2009
20120249244OUTPUT BUFFER OF SOURCE DRIVER - An output buffer of a source driver is disclosed. The output buffer includes a buffer input, a buffer output, a differential input stage, a bias current source, an output stage, a compensation capacitor, and a comparator. The output stage and the comparator are both operated between an analog supply voltage (AVDD) and a half analog supply voltage (HAVDD), or both operated between the half analog supply voltage (HAVDD) and a ground voltage. The comparator compares an input signal with an output signal and outputs a control signal to the bias current source according to the compared result.10-04-2012
20120249243LOW SWITCHING ERROR, SMALL CAPACITORS, AUTO-ZERO OFFSET BUFFER AMPLIFIER - Switching error in an auto-zero offset amplifier is reduced by keeping a clock level to the auto-zero switches at an amplitude just enough to insure complete switching of the switches of the auto-zero offset buffer amplifier. A level shifting circuit provides the clock at the desired level control and a local voltage regulator provides a regulated voltage to the level shifting circuit.10-04-2012
20120249242APPARATUS AND METHODS FOR ELECTRONIC AMPLIFICATION - Apparatus and methods for electronic amplification are provided. In one embodiment, a method includes providing a first differential amplification block, providing a second differential amplification block, electrically connecting the first and second differential amplification blocks in a stack between a first voltage reference and a second voltage reference, amplifying a first signal using the first differential amplification block, and amplifying a second signal using the second differential amplification block. A voltage difference between the first and second voltage references defines a power supply voltage, and the first differential amplification block operates over a first range of the power supply voltage and the second differential amplification block operates over a second range of the power supply voltage.10-04-2012
20100289581DIFFERENTIAL AMPLIFYING DEVICE - A differential amplifying device includes a first differential amplifying unit that receives an input signal and a reference voltage. The first differential amplifying unit amplifies the input signal to generate an output signal when a sensing signal is at a first level. A second differential amplifying unit is configured to also receive the input signal and the reference voltage. The second differential amplifying unit amplifies the input signal to generate the output signal when the sensing signal is at a second level. The first and second differential amplifying units are configured to take advantage of transistor characteristics.11-18-2010
20100289580Operational trans-conductance amplifier with output clamp circuit - An operational trans-conductance amplifier circuit having a voltage clamp circuit. The clamp circuit utilizes low area and power overhead, has a sharp clamp characteristic, and little degradation in the small-signal DC gain at the “knee” of the clamp characteristic. The clamp circuit includes a comparator circuit and a current control circuit. The amplifier and clamp circuits may further include a clamp voltage generator circuit.11-18-2010
20100244959Operational amplifier - An operational amplifier includes a differential amplifier input stage that supplies an operating current to a differential pair, the differential amplifier input stage including a first transistor having a first polarity, a push-pull amplifier output stage that includes a second transistor having the first polarity, and a third transistor having a second polarity, the second transistor and the third transistor being connected in series, and a capacitive element that connects a gate of the first transistor and a gate of the second transistor.09-30-2010
20120126895VARIABLE GAIN AMPLIFIER WITH FIXED BANDWIDTH - Provided is a variable gain amplifier. The variable gain amplifier includes an operational amplifier, a variable feedback impedance unit, a variable compensation impedance unit, and a variable current source. The variable feedback impedance unit is connected between an inverting input terminal and output terminal of the operational amplifier, and has a feedback impedance value which varies for gain control. The variable compensation impedance unit is connected to the inverting input terminal, and has a compensation impedance value which varies in response to change of the feedback impedance value for maintaining a constant feedback factor. The variable current source is connected to the inverting input terminal, and supplies an output current, which varies in response to change of the compensation impedance value, to the variable compensation impedance unit.05-24-2012
20120126894DIFFERENTIAL AMPLIFIER - A differential amplifier includes first and second current paths, each connected between first and second power supplies (PS) and respectively outputting first and second differential output signals. The first current path includes: first transistor, selectively interconnected between the first PS and a first output terminal, its gate receiving one differential input signal; second transistor, connected between the second PS and the first output terminal, its gate receiving the other differential input signal; and first switch circuit. The second current path includes: third transistor, selectively interconnected between the second PS and a second output terminal, its gate receiving one differential input signal; fourth transistor, connected between the first PS and the second output terminal, its gate receiving the other differential input signal; and second switch circuit. One of the first and second switch circuits is connected to the first PS and the other is connected to the second PS.05-24-2012
20120161870FIGURE 8 BALUN - A balun includes a first set of wound conductors includes a first loop portion and a second loop portion. The first loop portion and the second loop portion are conductively coupled and form a first figure eight structure. The balun further includes a second set of wound conductors includes a third loop portion and a fourth loop portion. The third loop portion and the fourth loop portion are conductively coupled and form a second figure eight structure. The first loop portion and the third loop portion are inductively coupled. The second loop portion and the fourth loop portion are inductively coupled.06-28-2012
20120313704DIFFERENTIAL AMPLIFIER STAGE WITH INTEGRATED OFFSET CANCELLATION CIRCUIT - A differential amplifier stage and method for offset cancellation include an amplifier having an input and an output. An internal offset cancellation circuit has an input for receiving a control signal to control offset cancellation in the amplifier. The offset cancellation circuit is integrated with the amplifier but isolated from the input and the output of the amplifier, and, in accordance with its isolation, an impedance of the stage is unaffected by the offset cancellation circuit.12-13-2012
20120133436POWER AMPLIFIER AND MMIC USING THE SAME - A power amplifier includes an input terminal, an input matching circuit connected to the input terminal, an amplifying transistor having a gate connected to the input matching circuit, an output matching circuit connected to the drain of the amplifying transistor, an output terminal connected to the output matching circuit, and an inverting differentiator circuit for either inverting and then differentiating, or differentiating and then inverting, a signal from the input terminal. The output of the inverting differentiator circuit is connected to the gate.05-31-2012
20120133437SENSE AMPLIFIER AND ELECTRONIC APPARATUS USING THE SAME - A sense amplifier according to the present invention for detecting a potential difference of signals input to a first input terminal and a second input terminal, includes a first means for applying voltages corresponding to threshold voltages of first and second transistors to gate-source voltages of the first and second transistors, and a second means for transferring signals input to the first and second input terminals to gates of the first and second transistors. In this case, a threshold variation of the first and second transistors is corrected.05-31-2012
20090058523Amplifying circuit - An amplifying circuit comprising an output stage circuit composed of a first and a second output transistor and operating as a class AB push-pull circuit reduces electricity consumed by an idle current. A pre-stage circuit outputs a first and a second control signal, and controls a channel current of the first and the second output transistor. In a period in which one control signal causes the corresponding output transistor to operate in class AB mode, the other control signal places the corresponding output transistor in a cutoff state.03-05-2009
20090058522DIFFERENTIAL AMPLIFIER - A differential amplifier is constituted of first emitter-follower transistors, second emitter-follower transistors, and amplification transistors whose bases are alternately connected to the emitters of the second emitter-follower transistors and whose collectors are connected to the emitters of the first emitter-follower transistors, as well as emitter resistors and constant current sources, whereby it is possible to reduce distortions of output signals in response to large-amplitude input signals, thus ensuring high-speed operation. It is possible to further incorporate base-grounded transistors and diodes, by which substantially the same collector-emitter voltage is applied to the emitter-follower transistors and amplification transistors, thus achieving the same power consumption and the same temperature variations with respect to these transistors. This reduces the nonlinear amplification error due to temperature differences of transistors, thus achieving flat gain characteristics in broad ranges of frequencies.03-05-2009
20120169421AUDIO AMPLIFYING CIRCUIT WITH IMPROVED NOISE PERFORMANCE - An amplifying circuit includes a first circuit component configured to receive and amplify first and second input voltages to generate an output voltage. The first circuit component is formed by a first amplifier and a second amplifier. A second circuit component is configured to provide a first offset current that is associated with a first input current of the first amplifier. The first offset current compensates for variation in the first input current. A third circuit component is configured to provide a second offset current that is associated with a second input current of the second amplifier. The second offset current compensates for variation in the second input current.07-05-2012
20120313703RESTORING OUTPUT COMMON-MODE OF AMPLIFIER VIA CAPACITIVE COUPLING - An apparatus comprises an amplifier circuit comprising at least one output node and a common-mode restoration circuit capacitively coupled to the at least one output node of the amplifier circuit. The common-mode restoration circuit is configured to introduce at least one common-mode restoring signal onto the output node, wherein the at least one common-mode restoring signal transitions in correspondence with an operation interval of the amplifier circuit and thereby compensates for a common-mode voltage drop on the at least one output node of the amplifier circuit. In one example, the amplifier circuit may comprise a current-integrating amplifier circuit, and the operation interval may comprise an integration interval.12-13-2012
20120075022DIFFERENTIAL AMPLIFIER - A differential amplifier includes a pair of input transistors, a pair of load transistors, a pair of impedance devices, a pair of auxiliary input transistors, and a pair of shield transistors is provided. The input transistors provide two input terminals. The load transistors provide two output terminals and two first terminals connected to first voltage. The impedance devices are coupled between the output terminals in series. The auxiliary input transistors have two control terminals respectively connected to the input terminals, two first terminals, and two second terminals. The input transistors and the auxiliary input transistors have reverse conductive type. The shield transistors has a pair of control terminals, a pair of first terminals respectively connected to the second terminals of the auxiliary input transistors and coupled to a second voltage through a pair of current sources, and a pair of second terminals respectively connected to the output terminals.03-29-2012
20100271131INTEGRATED POWER AMPLIFIER - Methods to implement low cost, high efficiency, low loss power combiner with novel matching circuits are disclosed. A narrow band power combiner enables a high power and high efficiency radio frequency power amplifier to be realized using multiple low voltage CMOS transistors or micro power amplifiers. The power combiner may be printed on a package substrate and realized either using single layer substrate through edge coupling or multiple layers substrate through broadside coupling. The micro power amplifiers may be fabricated using low voltage CMOS technology and electrical connections between the outputs from the micro power amplifiers and the power combiner may be provided through stud bumps in a flip chip technology. With the tunable matching circuits, the present invention allows the narrow band power combiner to be tuned to different frequencies.10-28-2010
20100271130AMPLIFIER CIRCUIT, INTEGRATED CIRCUIT DEVICE, AND ELECTRONIC INSTRUMENT - An amplifier circuit includes an amplifier section that includes a P-type differential section, an N-type differential section, and an output section, an offset adjustment section that adjusts an offset of the amplifier section, a first offset adjustment register that stores a first offset adjustment value for the P-type differential section, a second offset adjustment register that stores a second offset adjustment value for the N-type differential section, and a control section that sets the first offset adjustment value in the offset adjustment section in a first operation mode in which the P-type differential section operates, and sets the second offset adjustment value in the offset adjustment section in a second operation mode in which the N-type differential section operates.10-28-2010
20100271129Output circuit using analog amplifier - An output circuit includes an analog amplifier circuit including a differential amplifier stage configured to receive an input voltage, and first to n10-28-2010
20120182070OUTPUT STAGE FORMED INSIDE AND ON TOP OF AN SOI-TYPE SUBSTRATE - A method for controlling an output amplification stage comprising first and second complementary SOI-type power MOS transistors, in series between first and second power supply rails, the method including the steps of: connecting the bulk of the first transistor to the first rail when the first transistor is maintained in an off state; connecting the bulk of the second transistor to the second rail when the second transistor is maintained in an off state; and connecting the bulk of each of the transistors to the common node of said transistors, during periods when this transistor switches from an off state to an on state.07-19-2012
20120182071OPERATIONAL AMPLIFIER CIRCUIT - An operational amplifier circuit may include a fully differential amplifier circuit that has a common mode feedback, the fully differential amplifier circuit performing operational amplification using a common mode base voltage as a center, a common mode detection circuit that detects a common mode output voltage of the fully differential amplifier circuit, a sample and hold circuit that performs sample and hold of an output of the common mode detection circuit, an operational circuit that detects a deviation between the output of the sample and hold circuit and a common mode reference voltage, the operational circuit outputting a voltage corresponding to the detected deviation and the common mode reference voltage, and a switching circuit that selects the common mode reference voltage or an output of the operational circuit to output the common mode reference voltage or the output as the common mode base voltage.07-19-2012
20120188012Operational Amplifier Device - An operational amplifier device includes an operational amplifier, a first transmission gate, and a first switch module. The operational amplifier includes an output stage, which has a first signal input terminal and a signal output terminal, and outputs an output voltage at the signal output terminal. The first transmission gate is coupled between the signal output terminal and a transmission output terminal, having a first transmission control terminal. The first switch module is utilized for controlling electrical connection between the first signal input terminal and the first transmission control terminal. During a first transmission period, the first switch module controls the first transmission control terminal to be coupled to the first signal input terminal, thereby conducting the first transmission gate to not only transmit the output voltage but also act as a Miller capacitor.07-26-2012
20120299653RECEIVER CIRCUITS FOR DIFFERENTIAL AND SINGLE-ENDED SIGNALS - Receiver circuits for differential and single-ended signals are disclosed. A receiver may include a differential amplifier configured to receive a first signal of a differential pair at a first input and a second signal of the differential pair at a second input when operating in differential mode, and a single-ended signal at the first input and a reference signal at a third input when operating in single-ended mode. The receiver may also include an inverter coupled to the differential amplifier. The inverter may be configured to provide a first beta ratio in differential mode and a second beta ratio in single-ended mode. Several receivers may be used, for example, to process a differential clock signal and one or more single-ended data signals referenced to the clock signal and/or differential data signals referenced to a single-ended clock signal. The rise/fall delays of each signal through each respective receiver may be independently adjusted.11-29-2012
20120229214Amplifier Circuit and Method - A differential amplifier circuit comprises a differential pre-amplifying stage which is designed to allow an input signal with a first common mode voltage range, and to generate an output which has a narrower common mode voltage variation. This pre-amplifier stage is designed to accept a large common mode input voltage and to process the signal so that it can be amplified by a main amplifying stage which is designed to allow an input signal with a smaller common mode voltage range.09-13-2012
20120229215AMPLIFIER ASSEMBLY HAVING CONTROLLED RETURN OF POWER LOSS - An amplifier assembly includes an input signal determiner that determines a first input signal and a second input signal based on an initial signal having an amplitude and an initial frequency. Amplifiers amplify the first and second input signal to form first and second output signals having a phase offset with respect to one another. The first and second amplified output signals are fed to a common coupling element that forms a useful signal and a loss signal, such that a total power of the useful signal and loss signal is independent of the phase offset, the power of the useful signal has a maximum corresponding to a predetermined value of the phase offset, and the partial power of the useful signal decreases with a deviation of the phase offset from the predetermined value. The coupling element feeds the useful signal to a load and the loss signal to a rectifier device that feeds a rectified loss signal to a power supply device, wherein the rectifier device includes active components as rectifier elements, which are controlled synchronously with respect to the initial frequency.09-13-2012
20080309409Balanced differential cross-coupled transconductance amplifier for a multiplexor - A balanced, differential, cross-coupled amplifier including an input stage for receiving a differential input and including an input transconductance differential pair and a feedback transconductance differential pair; and an output stage responsive to the input stage for providing a differential output; the differential input being connected to one input of the input transconductance differential pair and one input of the feedback transconductance differential pair, the differential output being fed back to one input of the input transconductance differential pair and one input of the feedback transconductance differential pair for balancing the currents in the transconductance differential pairs over the input range.12-18-2008
20100327975SIGNAL AMPLIFIER - A signal amplifier controls an output amplitude of a differential transmitted from an amplifier circuit to two output terminals via each of 2N number of MOS transistors that operate as a switch by switching a control value n, and includes an amplitude-control-word switching unit that multiplies the control value n by a value 1 or a value −1 and switches between an amplitude control word of a value (N+n) and an amplitude control word of a value (N−n) of a complementary 2N-bit amplitude control word.12-30-2010
20100327974Operational amplifiers having low-power unconditionally-stable common-mode feedback - An operational amplifier is provided. The operational amplifier includes a first transistor configured to receive a first input voltage, a second transistor configured to receive a second input voltage, and a current steering module coupled to first and second transistors and configured to receive a reference voltage. The first and second transistors form a differential pair. The first transistor, second transistor, and current steering module are configured such that a current is steered from the current steering module or to the current steering module based on common-mode voltages of the first and second input voltages and the reference voltage to set a common-mode output voltage of the operational amplifier.12-30-2010
20080297249CMOS AMPLIFIERS WITH FREQUENCY COMPENSATING CAPACITORS - The frequency and transient responses of a CMOS differential amplifier are improved by employing one or more compensating capacitors. A compensating capacitor coupled to a differential input of the CMOS differential amplifier is used to inject current into the differential input, such that the net current flow through the gate-to-drain capacitance of a MOS input transistor approaches zero. Thus, the Miller effect with respect to that MOS input transistor is substantially reduced or eliminated, resulting in increased frequency and transient responses for the CMOS differential amplifier. In one embodiment, the CMOS differential amplifier is a CMOS current mirror differential amplifier.12-04-2008
20120262236DIFFERENTIAL AMPLIFYING CIRCUIT - A differential amplifying circuit includes: two metal oxide semiconductor transistors to form a differential pair and receive a differential signal; a plurality of capacitance elements coupled in series between drains of the two metal oxide semiconductor transistors; and an inductance circuit coupled between at least one connection node of the plurality of capacitance elements and a bias power terminal.10-18-2012
20080290941NANOELECTRONIC DIFFERENTIAL AMPLIFIERS AND RELATED CIRCUITS HAVING CARBON NANOTUBES, GRAPHENE NANORIBBONS, OR OTHER RELATED MATERIALS - Small-signal and other circuit design techniques realized by carbon nanotube field-effect transistors (CNFETs) to create analog electronics for analog signal handling, analog signal processing, and conversions between analog signals and digital signals. As the CNFETs exist and operate at nanoscale, they can be readily collocated or integrated into carbon nanotube sensing and transducing systems. The resulting collocation and integration may be at, or adequately near, nanoscale. One embodiment implements an analog differential amplifier having transistors which include carbon nanotubes, electrical contacts, and insulating material. The differential amplifier may be used in isolation or as an element of an operational amplifier. Negative feedback may be used to implement a wide range of analog signal processing functions, and to provide conversions among analog and digital signals. In some cases, an entire analog differential amplifier is implemented with a single carbon nanotube.11-27-2008
20120319777Method and Apparatus for Biasing Rail to Rail DMOS Amplifier Output Stage - An amplifier comprises: an input stage for receiving incoming signals; a high gain stage coupled to the input stage and providing driving signals in response to the incoming signals to an output driver stage; and an output terminal coupled to the output driver stage. The output driver stage comprises a high side driver circuit having a first terminal receiving a first driving signal pdrive from the high gain stage, a second terminal coupled VDD through a first voltage drop, and a third terminal coupled to the output terminal of the amplifier.12-20-2012
20090027122Compact Low-Power Class AB Amplifier - A compact low-power class AB power amplifier design is provided. In an embodiment, the amplifier design eliminates an intermediate stage that couples an input stage and a biasing mesh of the amplifier. In another embodiment, the amplifier design reuses a tail current from the input stage to bias the biasing mesh. Accordingly, a much higher power efficiency can be achieved using the proposed amplifier design compared to conventional class AB amplifiers. Further, the proposed amplifier design is extremely compact and occupies a small silicon area.01-29-2009
20100244960DIFFERENTIAL AMPLIFIER CIRCUIT - A differential amplifier circuit includes a plurality of differential-pair transistors, a plurality of current addition transistors, a latch, and a control transistor. The differential-pair transistors have gate electrodes that receive differential input signals respectively. Different potentials of the differential input signals represent a piece of information. The current addition transistors are connected in parallel to the differential-pair transistors, respectively. The latch has differential outputs corresponding to the differential input signals respectively and related to the amplified data. The control transistor receives an activation initiation signal. The current addition transistors are transitioned into electrically conductive state either in a period of time from initiation of amplification operation of the differential amplifier circuit by transitioning the control transistor into an electrically conductive state to increasing a differential voltage to cause inversion of one of the differential outputs of the latch, or at the same time when the amplification operation is initiated.09-30-2010
20100176882TRANSCONDUCTANCE AMPLIFIER WITH A FILTER FOR REJECTING NOISE OUTSIDE THE USEFUL BAND - The invention relates to a transconductance amplifier, providing current variations di=k·dv when it receives voltage variations dv.07-15-2010
20100231300INPUT BUFFER WITH OPTIMAL BIASING AND METHOD THEREOF - A method and circuit of a biased input buffer is described to maximize the quality in the output signals. The input buffer includes a first stage for receiving differential input signals and generating differential internal signals as biased in response to an averaging of the differential internal signals. The input buffer further includes a second stage coupled to the differential internal signals and configured to generate differential output signals. A memory device includes a memory array with the respective input buffer. Differential input signals are received and differential internal signals are generated as biased in response to an averaging of the differential internal signals. Differential output signals are generated in a second stage from the differential internal signals.09-16-2010
20100231299AUTOMATIC GAIN CONTROL - A method and system for providing automatic gain control for a differential amplifier are provided. An impedance network is set to have a first impedance that corresponds to a first gain for a differential amplifier, which amplifies an input signal by the first gain. Once the amplified input signal is greater than a first threshold voltage, the impedance network is set to have a second impedance that corresponds to a second gain for the differential amplifier, which amplifies the input signal. Once amplified input signal is greater than a second threshold voltage and a predetermined period has lapsed, the impedance network is reset to have the first impedance that corresponds to a first gain for the differential amplifier.09-16-2010
20120092069Circuit with High-Density Capacitors Using Bootstrapped Non-Metal Layer - A switched-capacitor circuit on a semiconductor device may include accurately matched, high-density metal-to-metal capacitors, using top-plate-to-bottom-plate fringe-capacitance for obtaining the desired capacitance values. A polysilicon plate may be inserted below the bottom metal layer, and bootstrapped to the top plate of each capacitor in order to minimize and/or eliminate the parasitic top-plate-to-substrate capacitance. This may free up the bottom metal layer to be used in forming additional fringe-capacitance, thereby increasing capacitance density. By forming each capacitance solely based on fringe-capacitance from the top plate to the bottom plate, no parallel-plate-capacitance is used, which may reduce capacitor mismatch. Parasitic bottom plate capacitance to the substrate may also be eliminated, with only a small capacitance to the bootstrapped polysilicon plate remaining The capacitors may be bootstrapped by coupling the top plate of each capacitor to a respective one of the differential inputs of an amplifier comprised in the switched-capacitor circuit.04-19-2012
20120286869CURRENT BUFFER - A current filtering current buffer amplifier includes: a first port and a second input port configured to be coupled to and receive input current; a first output port and a second output port configured to be coupled to and provide current to a load; a buffer configured to transfer the received input current to the first and second output ports as an output current, the buffer having an input impedance and an output impedance where the output impedance is higher than the input impedance, the buffer including first and second amplifiers, the first amplifier being a common mode feedback amplifier; and a filter coupled to the first and second input ports and coupled to the first and second amplifiers, the filter having a complex impedance and being configured to notch filter the received input current.11-15-2012
20080309408SYMMETRICAL DIFFERENTIAL AMPLIFIER - A differential amplifier has improved power efficiency, reduced offset penalty and a symmetrical output differential signal. Such a differential amplifier may include: (a) a bias circuit that has a first input device and a second input device; (b) a first load device and a second load device, each biased by a bias voltage from the bias circuit; and (c) a third input device and a fourth input device that are connected in series with the first load device and the second load device, respectively. In that differential amplifier, the differential input signal is applied across the first and second input devices, as well as across the third and the fourth input devices. The first, second, third and fourth input devices are sized such that a total current in the first and second input devices bears a predetermined ratio to a total current in the third and fourth input devices.12-18-2008
20120139632DIFFERENTIAL AMPLIFIER CIRCUIT - A differential amplifier circuit includes a first/second field effect transistor including a gate coupled to a first/second differential input signal terminal, a source coupled to a reference potential node, and a drain coupled to a first/second differential output signal terminal, a first variable capacitor coupled between the gate of the first field effect transistor and the drain of the second field effect transistor, a second variable capacitor coupled between the gate of the second field effect transistor and the drain of the first field effect transistor, and a first envelope detector configured to detect an envelope of a signal at the first differential output signal terminal or the second differential output signal terminal, the first variable capacitor and/or the second variable capacitor has a capacitance that varies in accordance with an envelope detected by the first envelope detector.06-07-2012
20130009704TRANSCEIVER AND INTEGRATED CIRCUIT - An integrated circuit is disclosed, including a balun, a transistor pair, and a degeneration inductor winding. The balun has an outer boundary, and comprises a primary winding and a secondary winding. The primary winding is adapted to receive an input signal. The secondary winding is magnetically coupled to the primary winding, and adapted to convert the input signal into a differential form. The transistor pair is connected to the secondary winding and adapted to amplify the input signal. The degeneration inductor winding is connected to the transistor pair and located within the outer boundary of the balun.01-10-2013
20130009703BULK-DRIVEN CURRENT-SENSE AMPLIFIER AND OPERATING METHOD THEREOF - A bulk-driven current-sense amplifier and an amplifier operating method are disclosed. The bulk-driven current-sense amplifier includes a differential amplifier, a first driver, and a second driver. The first driver is coupled to the differential amplifier, and a first node is formed at a connectivity segment of the first driver. The second drive is coupled to the differential amplifier, and a second node is formed at a connectivity segment of the second driver. When a first switch of the first driver and a second switch of the second driver are turned on, the differential amplifier charges the first node and the second node. When the charging is completed, the first node and the second node respectively have a different stabilized potential according to currents separately flowing through a first memory unit of the first driver and a second memory unit of the second drive, and the differential amplifier generates a voltage.01-10-2013
20130015918HIGH SPEED AMPLIFIERAANM Wang Limketkai; Victoria L.AACI DallasAAST TXAACO USAAGP Wang Limketkai; Victoria L. Dallas TX USAANM Srinivasan; VenkateshAACI DallasAAST TXAACO USAAGP Srinivasan; Venkatesh Dallas TX US - For high speed amplifiers, the parasitic capacitances between a differential input pairs and a cascoded bias network can introduce a pole that can affect performance. Here, a feedforward network has been provided that compensates for this pole by introducing a zero that effectively cancels the pole, moving the next parasitic without any additional power. This is generally accomplished by using a pair of feedforward capacitors coupled across the transistors of the cascoded bias network, which reduced power consumption.01-17-2013
20080231363Temperature compensation of small signal gain of an amplifier stage - The invention relates to an differential amplifier circuit comprising an amplifier stage comprising a first and a second transistor, the gates of which are connected to differential input terminals of the amplifier stage. The differential amplifier further comprises a temperature compensation circuit comprising a third and fourth transistor. The third transistor is connected to the source of the first transistor and the fourth transistor is connected to the source of the second transistor. Further, the temperature compensation circuit comprises a constant current source connected to the respective sources of the third and fourth transistors. Thereby the temperature compensation circuit is arranged to provide a feedback resistance in dependence on the operating temperature so as to compensate for variations of the resistance of the first and second transistors.09-25-2008
20130169361Multi-Stage Fully Differential Amplifier with Controlled Common Mode Voltage - Disclosed are systems and methods to achieve a low noise, fully differential amplifier with controlled common mode voltages at each stage output but without the requirement of a common mode feedback loop. Common mode voltages are adjusted by adjusting the currents flowing through the load impedances (bias currents) wherein the currents are derived from one or more voltage-to-current converters based on an impedance that matches to the load impedances of the stages of the amplifier. The amplifier invented is primarily used for amplification of low frequency signals. The amplifier has one or more gain stages applying only one conduction type of transistors of an IC technology that has the lowest transition frequency between 1/f noise and white noise to achieve a low chopping or autozeroing frequency.07-04-2013
20130141164VOLTAGE OUTPUT DEVICE HAVING AN OPERATIONAL AMPLIFIER - A voltage output device capable of preventing an increase in circuit scale includes an offset compensation function and is suitably applicable to a drive circuit for display devices. The voltage output device includes an operational amplifier having an inverting input terminal and a non-inverting input terminal. Resistance values of a load resistor on the inverting input side and a load resistor on the non-inverting input side are maintained when the output voltage of the amplifier has changed while sequentially varying either one or both of the resistance values of the load resistor on the inverting input side and the load resistor on the non-inverting input side in a state that the inverting input terminal and the non-inverting input terminal are connected. The voltage output device is configured to output the output voltage of the amplifier with the inverting input terminal not connected to the non-inverting input terminal.06-06-2013
20080224774Method and Apparatus for Systematic and Random Variation and Mismatch Compensation for Multilevel Flash Memory Operation - Method and means for random or systematic mismatch compensation for a memory sensing system are disclosed. A sense amplifier includes a bulk voltage source to set the bulk of the sensing transistor to be a voltage different than the voltage driving the sensing transistor. For an NMOS sensing transistor, a triple well is used with the variable bulk voltage. Differential sense amplifiers with various offset compensation are included. Intentional offset creation for useful purpose is also included.09-18-2008
20090295481HIGH SPEED DIFFERENTIAL TO SINGLE ENDED CONVERTING CIRCUIT - A differential to single ended converting circuit includes a transconductance circuit having input terminals for receiving differential input voltages and having a first current output terminal for outputting a first current and a second current output terminal for outputting a second current; an offset cancellation circuit having a first controllable current source connected to the first current output terminal and a second controllable current source connected to the second current output terminal; a first transimpedance circuit having an input terminal connected to the first current output terminal and an output terminal for outputting a first voltage; a second transimpedance circuit having an input terminal connected to the second current output terminal and an output terminal for outputting a second voltage; and a first inverter having an input terminal connected to the output terminal of the first transimpedance circuit and an output terminal for outputting a first single ended output voltage.12-03-2009
20110273230CLASS AB OUTPUT STAGE - This disclosure describes at least one class AB amplifier output stage circuit arrangement that can operate at low supply voltages, with minimum current generated. Furthermore, at least one class AB amplifier stage circuit arrangement described herein reacts favorably to a supply voltage, that is, exhibits a good power supply rejection ratio. Moreover, this disclosure describes class AB amplifier output stage circuit arrangements that include a negative channel metal oxide semiconductor (NMOS) transistor current mirror arrangement and a positive channel metal oxide semiconductor (PMOS) transistor current mirror arrangement. In some implementations, a monitoring circuit may be coupled to a class AB amplifier output stage circuit arrangement to offset mismatch that may occur in the class AB amplifier output stage.11-10-2011
20130169360APPARATUS - According to an embodiment, an apparatus includes: a first node configured to receive a data input signal of a data latch; a second node configured to receive a data output signal of the data latch; process and hold circuitry configured to process a difference between a value of the data input signal received at the first node and a value of the data output signal received at the second node and hold respective values at the first and second nodes responsive to the difference; and comparison circuitry configured to compare the value held at the first node and a value of the data output signal of the data latch; wherein the process and hold circuitry is configured to be biased toward the signal received at one of the first node and the second node.07-04-2013
20130113565LINEAR DIFFERENTIAL AMPLIFIER WITH HIGH INPUT IMPEDANCE - A differential amplifier provides an amplifier circuit including two differential pairs. A first differential pair is connected in series to a second differential pair. The second differential pair is connected in a crosswise manner at least indirectly to a differential output signal of the first differential pair. The first differential pair and the second differential pair form a first differential current path and a second differential current path. A first emulation device is connected in parallel to the first current path. A second emulation device is connected in parallel to the second current path.05-09-2013
20130093516LOW OUTPUT IMPEDANCE RF AMPLIFIER - A radio frequency (RF) power amplifier includes a low impedance pre-driver driving the input of a common-source output amplifier stage. The preamplifier includes a first transistor that has a first terminal coupled to a preamplifier RF input node, a second terminal coupled to a preamplifier RF output node, and a third terminal coupled to a supply voltage node. A first inductor is coupled between the RF output node and a bias voltage node. A voltage difference between respective first and second voltages on the RF input node and the RF output node that are substantially in phase, determines current through the first transistor.04-18-2013
20130099863FOURTH-ORDER ELECTRICAL CURRENT SOURCE APPARATUS, SYSTEMS AND METHODS - Apparatus and methods disclosed herein operate to receive a differential input signal at a first-stage pair of transconductance devices. The differential signal is amplified by a second-order factor at a positive-side or a negative-side first-stage transconductance device, depending upon the polarity of the differential input signal, to create a second-order signal at the output of the appropriate first-stage device. The second-order output signal is then amplified by another second-order factor at a corresponding second-stage transconductance device. A resulting fourth-order signal is made available at an output node as a quartic-response current source. The quartic-response current source may be utilized as a dynamic bias source in conjunction with a linear amplifier to provide a high slew rate amplifier.04-25-2013
20130113563GAIN ENHANCEMENT FOR CASCODE STRUCTURE - Aspects of the present invention provide apparatuses and methods to provide significant gain enhancement for a cascode structure for a differential amplifier. The cascode structure of the differential amplifier can include first and second pairs of output transistors. The second pair of output transistors can be configured to approximately cancel modulation effects of the first pair of output transistors induced by changes in a differential output of differential amplifier, thereby resulting in conditions for providing enhanced gain.05-09-2013
20130120065Silicon-on-Insulator High Power Amplifiers - Illustrative embodiments of power amplifiers are disclosed. In one embodiment, a power amplifier includes a plurality of transistors formed on a silicon-on-insulator (SOI) substrate such that the plurality of transistors are each electrically isolated from one another within the SOI substrate. The power amplifier also includes a plurality of biasing networks, each biasing network being configured to dynamically bias at least one of the plurality of transistors. The plurality of transistors are electrically coupled in a series stack, with an output of the power amplifier being provided across the series stack.05-16-2013
20080197926SOURCE FOLLOWER CIRCUIT AND SEMICONDUCTOR APPARATUS - Based on a result of comparing an output common mode direct-current voltage of a pair of source follower transistors when a direct-current voltage is applied to each gate of the pair of source follower transistors with a predetermined reference voltage, the direct-current voltage is controlled such that the output common mode direct-current voltage can match the reference voltage.08-21-2008
20110227647Differential amplifier and source driver - A differential amplifier includes a first differential pair with one of an input pair serving as a first input terminal, a second differential pair with one of an input pair serving as a second input terminal, connected in parallel with the first differential pair and having the same conductivity type as the first differential pair, and a first capacity reduction circuit that reduces a capacity of the first differential pair in operation when a first input voltage input to the first input terminal is equal to or higher than an operation threshold of the first differential pair and a second input voltage input to the second input terminal is lower than an operation threshold of the second differential pair.09-22-2011
20110227646DISCRETE TIME OPERATIONAL TRANSCONDUCTANCE AMPLIFIER FOR SWITCHED CAPACITOR CIRCUITS - A discrete-time operational transconductance amplifier (OTA) with large gain and large output signal swing is described. In an exemplary design, the discrete-time OTA includes a clocked comparator and an output circuit. The clocked comparator receives an input voltage and provides a digital comparator output. The output circuit receives the digital comparator output and provides current pulses. The output circuit detects for changes in the sign of the input voltage based on the digital comparator output and reduces the amplitude of the current pulses when a change in the sign of the input voltage is detected. The output circuit also generates the current pulses to have a polarity that is opposite of the polarity of the input voltage. The discrete-time OTA may be used for switched-capacitor circuits and other applications.09-22-2011
20130147556Squelch Detection Method and Circuit Using Rectifying Circuit for Detecting Out-of-Band Signal - A circuit for detecting out-of-band signals is disclosed. In one embodiment, the circuit includes a first differential circuit configured to level shift and positively rectify a differential input signal to produce a first output component of a differential output signal. The first differential circuit is further configured to generate and provide a common mode voltage of the differential input signal as a second component of the differential output signal. The circuit further includes a second differential circuit configured to level shift and output first and second fixed voltages based on an input reference voltage and a ground voltage. The circuit is configured to provide the differential output signal and the first and second fixed voltages to an indicator circuit configured to assert an indication responsive to detecting that a differential voltage of the differential output signal is greater than a differential voltage of the first and second fixed voltages.06-13-2013
20130147555Squelch Detection Method and Circuit Using Dual Rectifying Circuit for Detecting Out-of-Band Signal - A circuit for detecting out-of-band signals is disclosed. In one embodiment, the circuit includes a first differential circuit configured to level shift and positively rectify a differential input signal to produce a first output component of a differential output signal. The detector further includes a second differential circuit configured to level shift and negatively rectify the differential input signal to produce a second output component of the differential output signal. A third differential circuit is configured to level shift and output first and second fixed voltages based on an input reference voltage and a ground voltage. The circuit is configured to provide the differential output signal and the first and second fixed voltages to an indicator circuit configured to assert an indication responsive to detecting that a differential voltage of the differential output signal is greater than a differential voltage of the first and second fixed voltages.06-13-2013
20100289582FULLY-DIFFERENTIAL AMPLIFIER CIRCUIT - A fully-differential amplifier circuit comprises a differential amplifier configured to differentially amplify first and second input signals serving as an input differential pair to generate a pair of first and second intermediate signals, first and second class AB amplifiers configured to amplify the first and second intermediate signals to generate first and second output signals, wherein the first and second output signals serve as an output differential pair, the first class AB amplifier amplifies the first intermediate signal with reference to a reference voltage adjusted by a first feedback signal that is a common mode component of the first output signal and the second output signal, and the second class AB amplifier amplifies the second intermediate signal with reference to a reference voltage adjusted by a second feedback signal that is a common mode component of the first output signal and the second output signal.11-18-2010
20100308912AMPLIFYING CIRCUIT WITH OFFSET COMPENSATION - An amplifying circuit has an offset calibration mode and a normal mode. The amplifying circuit includes an amplifier having a non-inverting input and an inverting input for receiving, during the normal mode, a first input signal and a second input signal and an output for providing a high speed output signal, wherein the first input signal is a reference voltage or a high speed signal and the second input signal is a high speed signal. The amplifying circuit further includes a first transmission gate and a second transmission gate coupled in series between the non-inverting input and an inverting input that are enabled during the offset calibration mode. A benefit of this approach is that capacitance between the inverting and non-inverting inputs is reduced by the first and second transmission gates being in series. There is further benefit in reducing this capacitance by having each transmission gate receive an enable signal from a different source.12-09-2010
20110234318LOW VOLTAGE DIFFERENTIAL SIGNAL DRIVER WITH REDUCED POWER CONSUMPTION - A low voltage differential signal (LVDS) driver circuit with reduced power consumption. A pre-driver stage, implemented as a differential current mode amplifier, is driven by the differential input signal and provides a corresponding differential drive signal, which drives the output stage, implemented as a differential voltage mode amplifier, which, in turn, provides the differential output signal for the load. Total current consumption equals the load current, which is provided by the output stage, plus a much smaller current used by the pre-driver stage.09-29-2011
20110234317DIFFERENTIAL DRIVER CIRCUIT - A first current source supplies a tail current It to a plurality of differential pairs. A pre-driver outputs gate signals to the gates of transistors of the corresponding differential pair. A pre-driver is configured to switch the state between the enable state and the disable state. In the enable state, the pre-driver outputs the gate signals that correspond to the differential signals. In the disable state, the pre-driver outputs the gate signals having levels which instruct the transistors of the corresponding differential pair to switch off.09-29-2011
20130154737COMPARATOR AND AMPLIFIER - A comparator has a differential pair circuit, a current control circuit, and a latch. The differential pair circuit has first and second comparator transistors, and is arranged to compare a first input and a second input according to a clock signal to generate a result indicating whether a difference of the first and second inputs exceeds an internal offset. The current control circuit is coupled in series with the differential pair circuit, and configured to provide unequal abilities of drawing currents for the first and second comparator transistors.06-20-2013
20130181775RAIL-TO RAIL INPUT CIRCUIT - A power-efficient, rail-to-rail input circuit includes two differential pairs, one having devices of a first threshold voltage and one having devices of a second, different threshold voltage. In various embodiments, the two differential pairs receive a differential input in parallel and are supplied a tail current, which a control circuit steers between the pairs in accordance with a common-mode level of the input.07-18-2013
20130181776RAIL-TO-RAIL COMPARATOR - The present invention discloses a rail-to-rail comparator. The rail-to-rail comparator includes: a positive voltage rail providing a positive supply voltage, a ground voltage rail providing a ground voltage, an input stage, and an output stage. The input stage includes: a positive and a negative input terminals for receiving a first input signal and a second input signal; a first differential amplifier circuit, which includes a pair of depletion NMOS transistors to generate a first pair of differential currents; and a second differential amplifier circuit, which includes a pair of native NMOS transistors to generate a second pair of differential currents. The output stage is coupled to the first differential amplifier circuit and the second differential amplifier circuit, and generates an output signal related to a difference between the first input signal and the second input signal.07-18-2013
20130181777VOLTAGE REGULATOR - Provided is a voltage regulator capable of reducing an influence of an offset to obtain an accurate output voltage. The voltage regulator includes: a first stage amplifier for amplifying and outputting a difference between a reference voltage and a divided voltage obtained by dividing a voltage output by an output transistor, to thereby control a gate of the output transistor; and a cascode amplifier circuit, in which the first stage amplifier includes: a first high breakdown voltage NMOS transistor as an input transistor; and an NMOS transistor as a tail current source, and in which the cascode amplifier circuit includes a second high breakdown voltage NMOS transistor as a cascode transistor.07-18-2013
20110291759RAIL-TO-RAIL AMPLIFIER - A rail-to-rail amplifier includes an NMOS type amplification unit configured to perform an amplification operation on differential input signals in a domain in which DC levels of the differential input signals are higher than a first threshold value, a PMOS type folded-cascode amplification unit configured to perform an amplification operation on the differential input signals in a domain in which the DC levels of the differential input signals are lower than a second threshold value which is higher than the first threshold value, the PMOS type folded-cascode amplification unit being cascade-coupled to the NMOS type amplification unit, and an adaptive biasing unit configured to interrupt a current path of the PMOS type folded-cascode amplification unit in a domain in which the DC levels of the differential input signals are higher than the second threshold value in response to the differential input signals.12-01-2011
20120007674POWER AMPLIFIER REDUCING GAIN MISMATCH - There is provided a power amplifier reducing a gain mismatch in order to reduce a gain mismatch between an N MOS amplifier and a P MOS amplifier by cross-connecting outputs from a two-stage amplification unit in a power amplifier having amplification units with a stacked structure in which the N MOS amplifier and the P MOS amplifier are connected in series with each other.01-12-2012
20120019322LOW DROPOUT CURRENT SOURCE - Disclosed is a low dropout current source that includes a first field effect transistor (FET), a second FET having a drain that is an output for an output voltage and an output current, and a third FET, wherein a gate of the first FET is coupled to both a gate of the second FET and a drain of the third FET, and wherein a drain of the first FET is coupled to a source of the third FET. A differential amplifier has an inverting input coupled to the drain of the first FET, a non-inverting input coupled to the drain of the second FET and an amplifier output coupled to the gate of the third FET. A current reference is coupled between the drain of the third FET and a fixed voltage node. The current reference provides a reference current that is multiplied and output from the third FET.01-26-2012
20120019321LOW PHASE NOISE BUFFER FOR CRYSTAL OSCILLATOR - A buffer for converting sinusoidal waves to square waves with reduced phase noise is described herein. The buffer shunts current from the outputs of a differential amplifier during sinusoidal state transition periods at the differential amplifier inputs to increase the finite slope of square wave transition periods of the output square wave. More particularly, a sinusoidal wave having alternating peaks and valleys connected by sinusoidal state transition periods is applied to differential inputs of a differential amplifier to generate a square wave at the differential outputs, where the output square wave comprises alternating high and low states connected by square wave state transition periods having a finite slope. The output square wave is shaped to increase the finite slope of the square wave transition periods by providing additional paths between the differential outputs and ground that shunt current from the differential amplifier during the sinusoidal state transition periods.01-26-2012
20130194039DIFFERENTIAL AMPLIFIER CIRCUIT WITH ULTRALOW POWER CONSUMPTION PROVIDED WITH ADAPTIVE BIAS CURRENT GENERATOR CIRCUIT - A differential amplifier circuit includes a differential operational amplifier that includes a differential pair circuit and operates based on a constant bias current supplied from a bias current source circuit, and the differential amplifier circuit includes a bias current generator circuit. A current monitor circuit detects two currents flowing through the differential pair circuit in correspondence with differential input voltages inputted to the differential pair circuit, and detect a minimum current of the two currents for a difference voltage of the differential input voltages as a monitored current. A current comparator circuit compares the monitored current with the constant bias current. A current amplifier circuit amplifies a voltage corresponding to the comparison result, and controls currents flowing through the differential pair circuit based on an amplified voltage, and the bias current generator circuit performs negative feedback adaptive control such that the bias current increases as the monitored current decreases.08-01-2013
20120293259Amplifier - A configurable low noise amplifier circuit which is configurable between a first topology in which the low noise amplifier circuit includes a degeneration inductance stage whereby the low noise amplifier circuit operates as an inductively degenerated low noise amplifier, and a second topology in which the low noise amplifier circuit includes a common-gate low noise amplifier stage whereby the low noise amplifier circuit operates as a common-gate low noise amplifier. The second topology includes one or more internal input impedance matching components and the first topology does not include the one or more internal input impedance matching components.11-22-2012
20130200953OPERATIONAL AMPLIFIER CIRCUITS - An operational amplifier circuit includes a first stage amplifier circuit, a second stage amplifier circuit and a first feedforward circuit. The first stage amplifier circuit is coupled to a first input node for receiving a first input signal and amplifying the first input signal to generate a first amplified signal. The second stage amplifier circuit is coupled to the first stage amplifier circuit for receiving the first amplified signal and amplifying the first amplified signal to generate a first output signal at a first output node. The first feedforward circuit is coupled between the first input node and the second stage amplifier circuit for feeding the first input signal forward to the second stage amplifier circuit.08-08-2013
20130093517Buffer Amplifier - A buffer amplifier with unity voltage gain, high input impedance, high speed, high current gain, high output power and low offset includes three stages and a DC servo circuit. The first stage of the buffer amplifier contains complementary N-channel and P-channel MOSFET source followers that provide high input impedance to buffer the input signal source. A feedback DC servo signal is provided to correct the subsequent stages so as to maintain the output at virtual DC ground level. The second stage is a driver stage that also contains complementary N-channel and P-channel MOSFET source followers to provide sufficient current to drive the output stage. The last stage is an output stage that contains at least one pair of complementary power MOSFETs or BJTs to deliver high currents to a load.04-18-2013
20130207721Envelope Tracking Amplifier - An envelope tracking power amplifier uses signal cancellation techniques to provide isolation between RF signals and envelope signals, without the use of filters. In this manner, the envelope tracking power amplifiers are capable of operating with envelope signals that are at or near the frequency of the corresponding RF signals. In at least one embodiment, a double balanced power amplifier is provided that includes a balanced RF input port, a balanced RF output port, and a balanced envelope input port. The balanced nature of the amplifier results in ports of the amplifier forming virtual grounds with respect to signals at other ports. In some other embodiments, a single balanced amplifier is provided that provides isolation between ports thereof.08-15-2013
20130207720OPERATIONAL AMPLIFIER WITH ELIMINATION OF OFFSET VOLTAGE - An operational amplifier may include a differential stage comprising two transistors whose gates are respectively linked to the two inputs of the operational amplifier. The sources of the two transistors may be linked to a first current source whose delivered current depends negatively on temperature variations and to a second current source whose delivered current is proportional to absolute temperature. The sum of these two currents may be less dependent on temperature, in that this link of the sources of the two transistors with the two current sources is effected respectively by way of two resistors, and in that the current which passes through the two transistors is imposed of proportional with temperature type, so as to allow substantially temperature-independent elimination of the offset voltage of the operational amplifier while obtaining a temperature-independent constant gain-bandwidth product.08-15-2013

Patent applications in class Having field effect transistor