Entries |
Document | Title | Date |
20080204121 | Voltage generating circuit having charge pump and liquid crystal display using same - An exemplary voltage generating circuit ( | 08-28-2008 |
20080218250 | CHARGE PUMP CIRCUIT - In a charge pump circuit provided with a positive electric potential generating charge pump circuit that generates a positive electric potential and a negative electric potential generating charge pump circuit that generates a negative electric potential, a parasitic bipolar transistor is prevented from turning on so that the charge pump circuit performs normal voltage boosting operation. First, the negative electric potential generating charge pump circuit is put into operation to generate −VDD as an output electric potential LV. Since the output electric potential LV is applied to a P-type semiconductor substrate, an electric potential of the P-type semiconductor substrate becomes −VDD. After that, the positive electric potential generating charge pump circuit is put into operation while the negative electric potential generating charge pump circuit continues its operation. The positive electric potential generating charge pump circuit performs the normal operation, because the electric potential of the P-type semiconductor substrate is −VDD. After the output electric potential HV of the positive electric potential generating charge pump circuit reaches 2VDD, the negative electric potential generating charge pump circuit is put into a second operation mode (inverting HV). | 09-11-2008 |
20080231346 | CHARGE PUMP CIRCUIT WITH DYNAMIC CURENT BIASING FOR PHASE LOCKED LOOP - A charge pump circuit includes a first PMOS transistor, a first NMOS transistor connected with the first PMOS transistor at a CPOUT node that is configured to provide an output signal from the charge pump circuit, and a second PMOS transistor connected between a high-voltage supply terminal (VDD) and the first PMOS transistor. The second PMOS transistor can provide a current IUP to the first PMOS transistor. A capacitor is connected to VDD and the gate of the second PMOS transistor. The charge pump circuit also includes an operational amplifier having its negative input and its output connected to the gate of the second PMOS transistor, and its positive input connected to the CPOUT node. | 09-25-2008 |
20080231347 | CHARGE PUMP CIRCUIT - A charge pump circuit including a plurality of switches and a switch control circuit is provided. The charge pump circuit is suitable for a display panel. The switches switch from “off” state to “on” state in an enable transition, and switch from “on” state to “off” state in a disable transition. The switch control circuit is coupled to the switches for controlling the on/off states of the switches and allowing the charge pump circuit to provide an output voltage that is different from an input voltage. The switch control circuit prolongs the time required for enable transition of the switches to be longer than the time for disable transition thereof. The equivalent impedances of the switches change from high values to low values when the switches are at the enable transition. | 09-25-2008 |
20080238534 | PHASE SHIFTING IN DLL/PLL - The disclosure relates to phase shifting in Delay Locked Loops (DLLs) and Phase-Locked Loops (PLLs). A charge pump in the DLL or PLL includes a capacitor connected in parallel to an output node. A primary current switching circuit charges the capacitor with a source current and discharges the capacitor with a sink current. A supplemental source circuit sources a positive phase shift producing current which has a range of magnitudes. A magnitude of the positive phase shift producing current is determined by at least one source selection signal. A supplemental sink circuit for sources a negative phase shift producing current which has a range of magnitudes. A magnitude of the negative phase shift producing current is determined by at least one sink selection signal. | 10-02-2008 |
20080246535 | SEMICONDUCTOR CHARGE PUMP USING MOS (METAL OXIDE SEMICONDUCTOR) TRANSISTOR FOR CURRENT RECTIFIER DEVICE - A semiconductor charge pump includes a plurality of P-channel MOS transistors being connected in series, a plurality of first pumping capacitors one electrode of each of which is connected to a connection point of each of the P-channel MOS transistors, a clock signal generating circuit which generates first and second clock signals whose phases are different from each other by 180 degrees, the first and second clock signals being alternately supplied to the other electrodes of the first pumping capacitors. The semiconductor charge pump further includes a plurality of dynamic level converter circuits each including a resistor element and a second pumping capacitor and connected to each of gates of the P-channel MOS transistors. | 10-09-2008 |
20080258800 | Voltage converter and semiconductor integrated circuit - There is a need for preventing a MOS transistor from being destroyed due to an inrush current from an input terminal when a boost operation starts from a boost disabling state. During the boost operation, a third MOS transistor (M | 10-23-2008 |
20080258801 | INTERNAL VOLTAGE GENERATOR OF SEMICONDUCTOR MEMORY DEVICE - An internal voltage generator is capable of supplying a stable internal voltage regardless of an unstable external voltage. The internal voltage includes a first level detecting unit configured to detect a voltage level of the internal voltage and output an output power detecting signal, an oscillating unit configured to produce a periodical signal in response to the output power detecting signal, a second level detecting unit configured to detect a voltage level of an external voltage and output a driving power detecting signal, a dividing unit configured to selectively divide the periodical signal in response to the driving power detecting signal and output a divided signal, and a charge pumping unit configured to provide the internal voltage by pumping the external voltage in response to the divided signal. | 10-23-2008 |
20080258802 | ADJUSTABLE TRANSISTOR BODY BIAS CIRCUITRY - An integrated circuit is provided that contain n-channel and p-channel metal-oxide-semiconductor transistors having body terminals. Adjustable transistor body bias circuitry is provided on the integrated circuit that provides body bias voltages to the body terminals to minimize power consumption. The adjustable body bias circuitry can be controlled using programmable elements on the integrated circuit that are loaded with configuration data. The integrated circuit may be a programmable logic device integrated circuit containing programmable logic. The adjustable body bias circuitry can produce an adjustable negative body bias voltage for biasing n-channel metal-oxide-semiconductor transistors. The adjustable body bias circuitry contains a bandgap reference circuit, a charge pump circuit, and an adjustable voltage regulator. | 10-23-2008 |
20080272831 | Charge Pump CMOS Circuit - A charge pump CMOS circuit comprises a differential input stage with two parallel circuit branches. Each of the parallel circuit branches has a diode-connected MOS transistor connected in series with a complementary input MOS transistor. There is a common tail current source for both circuit branches. The diode-connected MOS transistors each have their gate/drain node connected to corresponding current sources. The charge pump CMOS circuit is suitable for use in an oscillator. | 11-06-2008 |
20080272832 | Charge pump circuit and method of controlling the same - A charge pump circuit and related method are provided. The charge pump circuit includes first, second and third voltage generation units, first and second control units, and a latch-up prevention unit. The first generation unit regulates a first output signal, the second generation unit boosts a second output signal, and the third generation unit boosts a third output signal in response to the first and second output signals. The first control unit is connected between the first generation unit and the third generation unit, and the second control unit is connected between the second generation unit and the third generation unit. The first and second control units block respective outputs of the first and second generation units during the boosting time for the second output signal. The latch-up prevention unit prevents a latch-up operation caused by a parasitic transistor until the third output signal is maintained at a third voltage. | 11-06-2008 |
20080272833 | Charge Pump - A charge pump for generating an input voltage for an operational amplifier includes a storage capacitor for storing a charge pump voltage and a flying capacitor configured to be charged during a first phase of operation and discharged during a second phase of operation. Discharging the flying capacitor charges the storage capacitor. A current source supplies the flying capacitor and a switching means switches current from the current source through the flying capacitor in a first direction during the first phase and in a second opposite direction during the second phase. | 11-06-2008 |
20080278221 | POWER DISTRIBUTION CIRCUIT FOR USE IN A PORTABLE TELECOMMUNICATIONS DEVICE - A power distribution circuit for use in a personal telecommunications device comprises a switched mode power supply configured to convert an input voltage and current from an energy source into an output voltage and current, a plurality of series-connected charge storage components arranged to be charged by the output voltage and a charge balancing circuit configured to substantially equalise voltages across each of the charge storage components, wherein the charge balancing circuit comprises a charge pump. | 11-13-2008 |
20080278222 | CHARGE PUMP CIRCUIT - A latch-type charge pump circuit is provided having first and second charge pump stages interconnected by an intermediate circuit node. The charge pump circuit includes first pump capacitors respectively coupled between first and second enable terminals and respective first inner circuit nodes, second pump capacitors respectively coupled between the second and first enable terminals and respective second inner circuit nodes, latch transistors coupled between each of the first and second inner circuit nodes and the intermediate circuit node, and a stabilization circuit having at least one stabilization stage coupled between the intermediate circuit node and the first and second enable terminals and connected to control terminals of the latch transistors for supplying them with suitable control signals so as to ensure their correct turn-on and turn-off during a charge sharing period of the charge pump circuit. | 11-13-2008 |
20080284496 | INTERNAL VOLTAGE GENERATION CIRCUIT FOR SEMICONDUCTOR DEVICE AND METHOD FOR GENERATING INTERNAL VOLTAGE THEREIN - An internal voltage generation circuit of a semiconductor device includes: a voltage detecting unit configured to detect a voltage level of an internal voltage output terminal to output a voltage detection signal; an oscillating unit configured to generate a first oscillation signal having a predefined frequency in response to the voltage detection signal; and a pumping unit configured to perform a charge pumping operation in response to the first oscillation signal and the voltage detection signal to output an internal voltage to the internal voltage output terminal, a period of the charge pumping operation being limited within an activation period of the voltage detection signal. | 11-20-2008 |
20080284497 | VOLTAGE GENERATOR THAT PREVENTS LATCH-UP - A voltage generator that prevents latch-up includes: a charge pump circuit that is controlled by first through third enable signals, boosts an internal power voltage generated from an external power voltage, and generates first through fourth voltages; a detector that detects the first through third voltages and generates first through third flag signals that go logic high when the first through third voltages reach predetermined respective voltage levels and maintain logic low when the voltages do not reach the predetermined respective voltage levels; and a charge pump controller that receives the first through third flag signals, and generates the first through third enable signals to have the first through fourth voltages sequentially generated. The voltage generator can prevent latch-up that may occur in a boosting mode or in a normal operation mode. | 11-20-2008 |
20080284498 | Type of Charge Pump Apparatus and Power Source Circuit - This invention discloses charge pump apparati, where a charge pump apparatus, including a positive charge pump circuit and a negative charge pump circuit, providing multiple positive and negative voltages, comprises: a capacitor set shared by said positive charge pump circuit and said negative charge pump circuit; multiple electronic switches connected to said capacitor set and a plurality of voltage sources; multiple output capacitors connected to selected ones of said multiple electronic switches and one or more output terminals; and a non-overlapping time sequence that controls the on and off states of said multiple electronic switches; wherein under the control of said non-overlapping time sequence, corresponding electronic switches are turned on and off to control the output of the positive and negative voltages provided by said output capacitors to generate output voltages that are pre-determined multiples of the one or more input voltages. With this invention, coupling capacitors are shared during the processes of charging and discharging, and operate at alternating intervals through time sequence-control. As a result, both positive and negative output voltages can be simultaneously adjusted to provide different boost levels. The charge pump is both low in cost and has a design that is simple and easy to produce. | 11-20-2008 |
20080284499 | N-STAGE EXPONENTIAL CHARGE PUMPS, CHARGING STAGE THEREOF AND METHODS OF OPERATION THEREOF - An exponential charge pump uses a number of identical or similar charging stages, each having a first and second capacitor. During a first clock phase, the first capacitor of each stage is charged by the second capacitor of the preceding stage, and, during a complementary second clock phase, the positive plate of the first capacitor of each stage is pushed to an increased voltage by the first capacitor of the preceding stage and charges the second capacitor of the next stage to the increased voltage at the same time. A similar mechanism occurs to the second capacitors in each stage, but with complementary timing. The increased voltage of the first capacitor of the last stage is pumped to an output capacitor during the second clock phase, and the increased voltage of the second capacitor of the last stage is pumped to an output capacitor during the first clock phase. | 11-20-2008 |
20080290930 | LOW VOLTAGE CHARGE PUMP - A single pump stage of a multi-stage charge pump couples a first low-voltage NMOS transistor in series with a first low-voltage PMOS transistor between charge transfer capacitors. A second low-voltage NMOS transistor is coupled between the gate and the source of the first NMOS transistor. A second low-voltage PMOS transistor is coupled between the gate and the source of the first PMOS transistor. Respective boost voltages are applied to gates of the first NMOS transistor and the second PMOS transistor to minimize threshold voltage losses. A stabilizing capacitor is connected between the first NMOS transistor and the second PMOS transistor. | 11-27-2008 |
20080290931 | Charge pump systems and methods - Digital multilevel memory systems and methods include a charge pump for generating regulated high voltages for various memory operations. The charge pump may include a plurality of pump stages. Aspects of exemplary systems may include charge pumps that performs orderly charging and discharging at low voltage operation conditions. Additional aspects may include features that enable state by state pumping, for example, circuitry that avoids cascaded short circuits among pump stages. Each pump stage may also include circuitry that discharges its nodes, such as via self-discharge through associated pump interconnection(s). Further aspects may also include features that: assist power-up in the various pump stages, double voltage, shift high voltage levels, provide anti-parallel circuit configurations, and/or enable buffering or precharging features, such as self-buffering and self-precharging circuitry. | 11-27-2008 |
20080297231 | Monitoring the Temperature Dependence of the External Capacitors of a Charge Pump and Improved Charge Pumps Based Thereon - Apparatus ( | 12-04-2008 |
20080297232 | CHARGE PUMP CIRCUIT AND SLICE LEVEL CONTROL CIRCUIT - The invention provides a charge pump circuit which reduces rise time of an output current even when an input signal is of high frequency. PMOS | 12-04-2008 |
20080303584 | CHARGE CIRCUIT FOR OPTIMIZING GATE VOLTAGE FOR IMPROVED EFFICIENCY - A charge circuit for providing a gate driver supply voltage for a gate driver of a switching power supply in accordance with an embodiment of the present application includes a first voltage source providing a first voltage and a charge pump circuit connected to the first voltage source and operable to be turned ON and OFF to improve efficiency such that an increased output voltage of the charge circuit is provided when the charge pump circuit is ON, and wherein the output voltage is the gate driver supply voltage. | 12-11-2008 |
20080303585 | Charge pump circuit and nonvolatile memory - A charge pump circuit is provided for stably obtaining a stepped-up voltage even if a temperature varies. The charge pump circuit has a structure in which a voltage corresponding to a voltage which is dropped by a charge transfer device is generated by a charge transfer device for correction, and the generated voltage is applied to an input voltage of the charge pump circuit. In addition, a voltage amplitude of a clock pulse for a step-up operation is adapted to be an amplitude based on the input voltage. | 12-11-2008 |
20080303586 | Negative voltage generating circuit - An exemplary negative voltage generating circuit includes a voltage input, a first switch transistor, a second switch transistor, a third switch transistor, a fourth switch transistor, a first capacitor, a second capacitor, a switch controller, and a voltage output. The voltage input is connected to ground via the first switch transistor, the first capacitor, and a source electrode and the second switch transistor. The first switch transistor is connected to the second switch transistor via the third switch transistor, the second capacitor, and the fourth switch transistor. The third switch transistor is connected to ground. The fourth switch transistor is connected to the voltage output. The first switch transistor, the second switch transistor, the third switch transistor, and the fourth switch transistor are connected to the switch controller. | 12-11-2008 |
20080309399 | Two-phase charge pump circuit without body effect - A two-phase charge pump circuit without the body effect includes a voltage boost stage, an input stage connected to the voltage boost stage, and a high-voltage generator connected to the input stage. Each of the circuits can consist of NMOS or PMOS transistors. The body of each NMOS transistor is connected to an NMOS switch. The body of each PMOS transistor is connected to a PMOS switch. By providing an appropriate driving signal to each NMOS or PMOS switch, the body of each NMOS transistor can be switched to a lower voltage level and the body of each PMOS transistor is switched to a higher voltage level. This can prevent the body effect from occurring. | 12-18-2008 |
20090027108 | Multiple-stage charge pump circuit with charge recycle circuit - A multiple-stage charge pump circuit includes first and second pump capacitors, a charge recycle circuit, and first and second transfer circuits. The charge recycle circuit includes first and second driving circuits and a switch circuit turning off to make a node floating and to couple first terminals of the first and second pump capacitors to the node in a first time period. The switch circuit and first and second driving circuits provide a specific voltage to the node and control voltages at the first terminals of the first and second pump capacitors in second and third time periods, respectively. The first and second transfer circuits provide a high voltage to a second terminal of the first pump capacitor in the second time period, and provide the voltage of the second terminal of the first pump capacitor to a second terminal of the second pump capacitor in the third time period. | 01-29-2009 |
20090027109 | CHARGE PUMP CIRCUIT WITH BIPOLAR OUTPUT - A charge pump circuit with bipolar output comprises a first set of switch device capable of selectively connecting two terminals of a first transfer capacitor to a voltage source and a ground terminal, respectively, a second set of switch device capable of selectively connecting the two terminals of the first transfer capacitor to a grounded first storage capacitor and the voltage source, respectively, a third set of switch device capable of selectively connecting two terminals of a second transfer capacitor to the first transfer capacitor connected to the voltage source and the ground terminal, respectively, and a fourth set of switch device capable of selectively connecting the two terminals of the second transfer capacitor to a grounded second storage capacitor and the ground terminal, respectively. These four sets of switch devices totally have nine switches, and are collocated with clock signals to be selectively driven by a four-phase signal or a two-phase signal so as to produce bipolar voltages with magnitudes higher than the input voltage and also accomplish the highest conversion efficiency. | 01-29-2009 |
20090033407 | STRUCTURE FOR A HIGH OUTPUT RESISTANCE, WIDE SWING CHARGE PUMP - Disclosed are design structures for current sink and source circuits, a charge pump, and a phase locked loop. The current sink and source circuits each have a current mirror that biases a transistor connected to an output node. These circuits each further have a two-stage feedback amplifier to sense the current mirror drain voltage and to control the transistor gate voltage in order to stabilize the current mirror drain voltage independent of output voltage at the output node. The amplifier also increases output resistance at the output node. This configuration allows for a wide operation voltage range and ensures good circuit performance under a very low power supply. A charge pump that incorporates these circuits generates highly matched charging and discharging currents. A PLL that incorporates this charge pump exhibits minimal bandwidth shifts and minimal locking speed and jitter performance degradation. | 02-05-2009 |
20090039947 | Time-Multiplexed-Capacitor DC/DC Converter with Multiple Outputs - A multiple output DC-to-DC voltage converter using a new time-multiplexed-capacitor converter algorithm and related circuit topologies is herein disclosed. One embodiment of this invention includes a flying capacitor, a first output node, a second output node, and a switching network. The switching network configured to provide the following modes of circuit operation: 1) a first mode where the positive electrode of the flying capacitor is connected to an input voltage and the negative electrode of the flying capacitor is connected to ground; 2) a second mode where the negative electrode of the flying capacitor is connected to the input voltage and the positive electrode of the flying capacitor is connected to the first output node; and 3) a third mode where the positive electrode of the flying capacitor is connected to ground and the negative electrode of the flying capacitor is connected to the second output node. | 02-12-2009 |
20090039948 | CHARGE PUMP CIRCUIT AND CHARGE PUMPING METHOD THEREOF - A charge pump circuit includes first and second charge pumps and a detector. The first charge pump outputs a first charge pump signal of an intermediate voltage level by performing a charge pumping operation in response to a command signal. The detector outputs a detection signal in response to the command signal when a voltage level of an output node is lower than a designated voltage voltage. The second charge pump charge-pumps the voltage level of the output node to a target charge-pumped voltage level higher than the intermediate voltage level and the designated voltage in response to the detection signal and the first charge pump signal. | 02-12-2009 |
20090045868 | DOUBLE STAGE COMPACT CHARGE PUMP CIRCUIT - A charge pump circuit comprising a plurality of charge pumps each having their outputs connected in parallel, each charge pump receiving a plurality of clock signals, a clock signal oscillator for providing the plurality of clock signals, the clock signals being out of phase, each charge pump having an output (VCP) that is coupled to the output of the at least one other charge pump, further comprising a first capacitor in each charge pump, the first capacitor being charged by a switching circuit receiving the clock signals to charge the first capacitor to a voltage between a supply voltage and a reference potential, and further comprising a second capacitor coupled in series with the first capacitor, the second capacitor provided between a first terminal (IN) of the charge pump and a second terminal (OUT) of the charge pump, wherein the first terminal (IN) of the charge pump is connected to a second terminal (OUT) of another charge pump and the second terminal (OUT) of the charge pump is connected to the first terminal (IN) of another charge pump, and wherein when the first capacitor is charged by the switching circuit, the second capacitor is charged by its connection to another charge pump, the switching circuit connecting a first terminal of the first capacitor to the supply voltage thereby elevating a second terminal of the first capacitor to an elevated voltage, the second terminal of the first capacitor being connected to a first terminal of the second capacitor, and thereby elevating a second terminal of the second capacitor to a further elevated voltage elevated above the elevated voltage on the first capacitor, the further elevated voltage on the second terminal of the second capacitor being provided to the charge pump output. | 02-19-2009 |
20090051413 | APPARATUS AND METHOD FOR INCREASING CHARGE PUMP EFFICIENCY - A charge pump circuit is provided which includes at least two charge pump stages connected in series with a front charge pump stage having a first transistor for receiving an input voltage and a last charge pump stage having a second transistor for providing an output voltage. The first transistor is configured to operate at a first threshold voltage and the second transistor is configured to operate at a second threshold voltage different than the first threshold voltage. | 02-26-2009 |
20090051414 | Dual conversion rate voltage booster apparatus and method - An apparatus and method of boosting voltages. A boosting circuit includes a first and a second boosting circuit that each provide a boosted voltage in response to a set of control signals. The first and second boosting circuits receive different sets of control signals so that the boosted voltages may be alternately transferred to and combined at a load terminal. | 02-26-2009 |
20090051415 | Ripple current reduction circuit - A ripple current reduction circuit includes a supply node coupled to the output of a high ripple voltage source such as a charge pump. A first current mirror is referred to the supply node and mirrors a current I | 02-26-2009 |
20090058506 | Bottom Plate Regulation of Charge Pumps - Techniques of operating a charge pump are described. The charge pump is connectable to receive a clock signal and a regulating voltage and provide an output voltage. The charge pump can have one or multiple stages, each of the stages will include a capacitor. During the charging phase, the regulating voltage is used to regulate the potential of the capacitor's bottom plate. During the boosting phase, the capacitor's top plate is connected to supply the output for the stage and the bottom plate is connected to receive the stage's input. Each stage will also have a set of switching elements, allowing the capacitor to be alternately connected in the charging and boosting phases. For the first stage, the input is derived from the clock signal, and for any subsequent stages, the input will be the output of the preceding stage. The last stage provides the output voltage of the pump. | 03-05-2009 |
20090058507 | Bottom Plate Regulated Charge Pump - Techniques of operating a charge pump are described. The charge pump is connectable to receive a clock signal and a regulating voltage and provide an output voltage. The charge pump can have one or multiple stages, each of the stages will include a capacitor. During the charging phase, the regulating voltage is used to regulate the potential of the capacitor's bottom plate. During the boosting phase, the capacitor's top plate is connected to supply the output for the stage and the bottom plate is connected to receive the stage's input. Each stage will also have a set of switching elements, allowing the capacitor to be alternately connected in the charging and boosting phases. For the first stage, the input is derived from the clock signal, and for any subsequent stages, the input will be the output of the preceding stage. The last stage provides the output voltage of the pump. | 03-05-2009 |
20090058508 | Word line boost circuit and method - A word line boost circuit includes a first pump circuit, a first transistor, a voltage detection circuit and a second pump circuit. The first pump circuit provides a gate boosted signal according to an address transfer detection (ATD) signal. The first transistor has a control terminal for receiving the gate boosted signal and a second terminal coupled to a target word line. The voltage detection circuit is for detecting a voltage level of the gate boosted signal and accordingly outputting a detection signal. The second pump circuit is for outputting a boost signal to a first terminal of the first transistor according to a voltage level of the detection signal. The boost signal boosts the target word line via the turned-on first transistor. | 03-05-2009 |
20090066406 | CHARGE PUMP DEVICE AND OPERATING METHOD THEREOF - A charge pump device and an operating method thereof are proposed. The charge pump device is composed of a plurality of stages of charge transfer units and an output unit that are cascaded together. Each stage of the charge transfer units includes a first node for input, a second node for output, a first circuit and a first capacitor. The first node or the second node is biased at a bias provided for the first circuit. Thereby, the first capacitors of the odd-numbered stage and the even-numbered stage of charge transfer units can respectively receive two clock signals that are mutually opposite in phase for complementary switching operating. Collocated with the switching of the output unit, an output voltage with a high negative level can be generated. | 03-12-2009 |
20090066407 | CHARGE PUMP SYSTEMS AND METHODS THEREOF - A charge pump system includes a plurality of charge pump cells coupled in series between an input and an output and a voltage regulator system. The voltage regulator system is coupled to an output from the plurality of charge pump cells and to each of the plurality of charge pump cells to control a charge and discharge in one or more of the plurality of charge pump cells. | 03-12-2009 |
20090066408 | Step-up power supply circuit and stepping-up method - Boosting operation of a charge pump is performed at a fixed period irrespective of the state of a load. A regulator for controlling a charge pump includes: a frequency dividing circuit generating a frequency-divided clock having a period that is twice that of a boost clock; a voltage dividing circuit generating a plurality of divided voltages having voltage values that differ from one another; a comparator circuit comparing each of the divided voltages and a reference voltage and outputting a plurality of comparison-result signals; a selection signal generating circuit reading in logic of each of the comparison-result signals in synch with an edge of the frequency-divided clock and outputting selection signals; a duty converting circuit outputting a plurality of clocks having different ON duties; a selector selecting any one of the plurality of clocks or “H”-level logic as a PWM signal based upon the selection signals; and a gate circuit taking the logical AND between the frequency-divided clock and the PWM signal and generating control signals for controlling series-parallel switching. | 03-12-2009 |
20090072889 | Charge Pump - An improved charge pump design useful in low power applications derives an alternative voltage from a supply voltage. The design can be constructed using PMOS manufactured according to standard processes such that triple well manufacturing processes are not required. The design can incorporate control gate circuitry to increase efficiency and decrease degradation due to the threshold voltage of the transistors used. | 03-19-2009 |
20090072890 | BIAS CONTROL CIRCUITRY FOR AMPLIFIERS AND RELATED SYSTEMS AND METHODS OF OPERATION - Embodiments of the invention comprise methods, apparatuses and systems for a dynamic bias control circuit configured to dynamically bias an amplifier. The dynamic bias control circuitry includes four branches. Each of the four branches includes a transistor operably coupled in series between a current source and a reference voltage. Each branch also includes a storage element having a first terminal and a second terminal and configured for selectively coupling the first terminal to the reference voltage, selectively coupling the first terminal to a node located between the current source and a drain of the transistor, selectively coupling the second terminal to the node, and selectively coupling the second terminal to an output. | 03-19-2009 |
20090072891 | Varactor-based charge pump - Charge pump circuitry for an integrated circuit is provided. The integrated circuit may be a programmable integrated circuit that has programmable elements that provide static control signals. The charge pump circuitry may contain a number of stages. Each stage may include a diode and a capacitor. Oscillator and control circuitry may generate clock signals. The clock signals may be applied to the capacitors in the charge pump stages. The charge pump circuitry may provide an output voltage. A programmable voltage regulator may be used to regulate the output voltage. The static control signals may be used to adjust the oscillator and control circuitry. The static control signals may also be used to adjust the programmable voltage regulator. The capacitors in the charge pump may be based on varactors. | 03-19-2009 |
20090091376 | INTERNAL VOLTAGE GENERATING CIRCUIT - Disclosed is an internal voltage generating circuit that pumps charge to generate an internal driving voltage. The internal voltage generating circuit includes: a first oscillation signal generating unit that provides a first oscillation signal in response to a detected internal voltage and a predetermined test mode signal; a second oscillation signal generating unit that divides an external clock to provide a second oscillation signal having a variable oscillation period; and a switching unit that selects the first oscillation signal or the second oscillation signal in response to the predetermined test mode signal and provides the selected signal as a pumping period signal. | 04-09-2009 |
20090096508 | SEMICONDUCTOR INTEGRATED CIRCUIT - The present invention provides a charge pump circuit capable of achieving desired boosting operation even when a high-side switch for precharge or a low-side switch for driving output is constructed by a low-withstand-voltage transistor. The high level of a drive input signal for driving a high-side switch for precharge and a low-side switch for driving output in response to a clock signal is set to the level of a boosted output voltage. The low level of the drive input signal is set to the level of an input voltage, not ground potential. | 04-16-2009 |
20090108915 | Charge Pump System and Method of Operating the Same - A charge pump system includes a charge pump circuit, a level shifter and a start circuit. The charge pump circuit has a voltage input terminal and a voltage output terminal. The charge pump circuit receives an input voltage at the voltage input terminal and generates an output voltage at the voltage output terminal. The level shifter is electrically coupled to the voltage output terminal of the charge pump circuit. The start circuit is electrically coupled between the voltage input terminal and the voltage output terminal of the charge pump circuit. A method of operating the charge pump system is also disclosed. | 04-30-2009 |
20090108916 | PUMP CIRCUIT - A pump circuit includes a plurality of transfer elements, capacitors, and controllers. The transfer elements are connected in series between a power supply terminal and an output terminal. The capacitors charge two terminals of each of the transfer elements according to first and second clock signals, respectively. Each of the controllers includes first and second switch elements, which are operated in opposite manners in response to the first or second clock signal to control each of the transfer elements. | 04-30-2009 |
20090115494 | Charge pump warm-up current reduction - A charge pump circuit includes a voltage controlled oscillator. The voltage controlled oscillator operates at a lower frequency during a warm-up mode, and operates at a higher frequency during a loading mode. The lower frequency operation during the warm-up mode reduces power supply current requirements. | 05-07-2009 |
20090115495 | DRIVE CIRCUIT, VOLTAGE CONVERSION DEVICE AND AUDIO SYSTEM - The first control transistor is connected between a first input node for receiving a first input signal swinging between a first voltage and a second voltage and an intermediate node for outputting an output signal, and receives the second voltage at its gate. The second control transistor is connected between a second input node for receiving a second input signal swinging between a third voltage and a fourth voltage in synchronization with the first input signal and the intermediate node, and receives the third voltage at its gate. The voltage difference between the first voltage and the third voltage is smaller than or equal to the source-drain breakdown voltage of the second control transistor, and the voltage difference between the second voltage and the fourth voltage is smaller than or equal to the source-drain breakdown voltage of the first control transistor. | 05-07-2009 |
20090115496 | VPP VOLTAGE GENERATOR FOR GENERATING STABLE VPP VOLTAGE - The present invention relates to a VPP voltage generator that generates a stable VPP voltage. The VPP voltage generator of the present invention generates a stable VPP voltage. Therefore, power consumption can be saved, a precharge time of word line can be prevented from increasing and a tRCD characteristic can be improved. It is thus possible to improve the operational performance of semiconductor memory devices. | 05-07-2009 |
20090115497 | POWER SOURCE CIRCUIT - A power source circuit that outputs a designated voltage through an output terminal thereof, comprising: a step-up circuit that steps up a voltage fed from a power supply and applies the resultant voltage to the output terminal; a voltage sensing circuit that senses a voltage outputted from the step-up circuit and outputs a signal with which activation of the step-up circuit is controlled; and a filter circuit that includes a variable resistor connected between the output side of the step-up circuit and the output terminal. | 05-07-2009 |
20090115498 | COOPERATIVE CHARGE PUMP CIRCUIT AND METHOD - A multiple polarity reversible charge pump circuit is disclosed which, in certain embodiments, may be configured to generate a positive voltage at times and may be reversed to generate a negative voltage at other times. Such a charge pump circuit is advantageous if both the positive and negative voltage are not simultaneously required. In certain other embodiments, a charge pump circuit generates a high output current for only a positive boosted voltage in one mode of operation, but lower current positive and negative boosted voltage outputs in another mode of operation. Use with certain erasable memory array technologies is disclosed, particularly certain resistive passive element memory cells, and more particularly in a three-dimensional memory array. | 05-07-2009 |
20090121780 | MULTIPLE-STAGE CHARGE PUMP WITH CHARGE RECYCLE CIRCUIT - A multiple-stage charge pump circuit comprises first and second pump capacitors, first and second transfer circuits, first and second driving circuits, and a charge recycle circuit. The first pump capacitor, the first transfer circuit, and the first driving circuit form a first stage circuit and the second pump capacitor, the second transfer circuit, and the second driving circuit form a second stage circuit. The first and the second stage circuits operate 180 degree out of phase with each other. The charge recycle circuit transfers the charge at the second end of the first pump capacitor to the second end of the second pump capacitor in a first time interval, and transferring the charge at the second end of the second pump capacitor to the second end of the first pump capacitor in a second time interval. | 05-14-2009 |
20090121781 | CONTROL CIRCUIT AND CONTROL METHOD FOR CHARGE PUMP CIRCUIT - A charge pump circuit includes a first switch to a fourth switch, a flying capacitor, and an output capacitor. A driver turns on the first switch and the fourth switch during a predetermined precharge period from the start of activation of the charge pump circuit to charge the output capacitor. Thereafter, on the basis of a pulse signal, the driver alternately turns on and off a first pair and a second pair. | 05-14-2009 |
20090121782 | CONTROL CIRCUIT AND CONTROL METHOD FOR CHARGE PUMP CIRCUIT - A pulse frequency modulator generates a pulse signal having a fixed duty ratio and a frequency which is adjusted such that a feedback voltage corresponding to the output voltage of a charge pump circuit is coincident with a predetermined first reference voltage. A driver, on receiving the pulse signal, turns on a first or second group of switches during the time periods corresponding to the high time periods of the pulse signal and turns on the other ones of the first and second group of switches during the time periods corresponding to the low time periods of the pulse signal. | 05-14-2009 |
20090128228 | Charge Pump Capable of Enhancing Power Efficiency and Output Voltage - The present invention relates to a charge pump capable of enhancing power efficiency and output voltage, which comprises a pump capacitor, a switching module, a first switch, a first buffer, a first switch, and an output capacitor. The switching module is coupled to a first terminal of the pump capacitor. The first switch is coupled between a second terminal of the pump capacitor and a supply voltage. The first buffer receives a first input signal and produces a control signal for controlling the first switch to turn on or cut off. The level of the first input signal ranges between a first voltage and a second voltage, wherein the first and the second voltages are related to the gate voltage of the first switch. The gate voltage of the first switch is a multiple, which is greater than one, of the supply voltage. Thereby, the impedance of the switch is reduced, and hence the power efficiency of the charge pump, the output voltage level, and the area efficiency of integrated circuits are improved. | 05-21-2009 |
20090134936 | CHARGE PUMP CIRCUIT AND CELL THEREOF - A charge pump cell with an input and output nodes includes a first, second, and third equalization units, and a first, second, and third capacitors. The input node is coupled to the inputs of the first, second and third equalization units, and the output node is coupled to the second equalization unit. One end of the second capacitor is coupled to the control end of the first equalization unit for enabling or disabling the first equalization unit, and also coupled to the output of the third equalization unit. One end of the third capacitor is coupled to the output of the second equalization unit. One end of the first capacitor is coupled to the control ends of the second and third equalization units, and also coupled to the output of the first equalization unit. | 05-28-2009 |
20090134937 | Charge pump circuit - A charge pump circuit includes initialization units, each of which initializes a boost node to an initialization voltage. Boosting units each boost the boost node to a higher voltage than the initialization voltage in response to an input voltage. First and second pump circuits each include a transfer unit for transferring a voltage of the boost node to an output node and sharing the output node. The transfer unit of the first pump circuit includes two transfer transistors that are switched in response to a voltage of a control node of the first pump circuit and the voltage of the boost node of the second pump circuit. The transfer unit of the second pump circuit includes two transfer transistors that are switched in response to a voltage of a control node of the second pump circuit and the voltage of the boost node of the first pump circuit. | 05-28-2009 |
20090140794 | CONSTANT-CURRENT CHARGE PUMP - The present invention discloses a constant-current charge pump, wherein a current detection circuit and a regulation circuit are arranged in the output of a pump circuit and used to control the current output by the pump circuit. When the load varies, the current variation is detected, and the regulation circuit pumps and regulates the current output by the pump circuit to stabilize the output current. Thereby, the output current will vary very slightly for different loads and input voltages. | 06-04-2009 |
20090140795 | HIGH-DYNAMIC RANGE LOW RIPPLE VOLTAGE MULTIPLIER - A voltage multiplier ( | 06-04-2009 |
20090153230 | Low Voltage Charge Pump with Regulation - Techniques of providing a low output voltage, high current capability charge pump are given. The charge pump has multiple capacitors along with switching circuitry. In an initialization phase, the first plate of each of the capacitors is connected to receive a regulator voltage and the second plate of each capacitor is connected to ground. In a transfer phase, the capacitors are connected in series, where, for each capacitor after the first, the second plate is connected to the first plate of the preceding capacitor in the series. The output voltage of the pump is from the first plate of the last capacitor in the series. Regulation circuitry generates the regulator voltage from a reference voltage to have a value responsive to the output voltage level of the pump. | 06-18-2009 |
20090153231 | Diode Connected Regulation of Charge Pumps - A circuit including a charge pump and regulation circuitry is described. The output of the charge pump is connected to provide a first output signal that is connectable to drive a load. A diode is connected to provide a second output signal of lower voltage from the first output signal. The regulation circuitry is connected to the second output level and is connectable to the charge pump to regulate its output. The circuit also includes a current source connectable from the second line to ground, where control circuitry connects the current source to the second line when the first line is connected to the load. | 06-18-2009 |
20090153232 | Low voltage charge pump - A single pump stage of a multi-stage charge pump couples a first low-voltage NMOS transistor in series with a first low-voltage PMOS transistor between charge transfer capacitors. A second low-voltage NMOS transistor is coupled between the gate and the source of the first NMOS transistor. A second low-voltage PMOS transistor is coupled between the gate and the source of the first PMOS transistor. Respective boost voltages are applied to gates of the first NMOS transistor and the second PMOS transistor to minimize threshold voltage losses. A stabilizing capacitor is connected between the first NMOS transistor and the second PMOS transistor. | 06-18-2009 |
20090160532 | Charge pump circuit - A charge-pump circuit without reverse current is disclosed. The charge-pump circuit includes: several diode equivalent networks connecting in series, between any two of adjacent diode equivalent networks having a node with a corresponding voltage-boost level, wherein the low voltage end in the diode equivalent network with lowest voltage-boost level is the input of the charge-pump circuit, and the input receives an input voltage signal; a voltage-boost capacitor network having an end to electronically couple to one of the node and the other end to electronically couple to a pulse signal, wherein the pulse signal has a high-voltage level and a low-voltage level to raise a voltage level at the node with voltage-boost as high-voltage level and low-voltage level switches; and a reverse current cut-off circuit electronically coupled to the diode equivalent networks to enable and disable the diode equivalent networks, wherein the reverse current cut-off circuit has two conductive paths. | 06-25-2009 |
20090160533 | DC-DC VOLTAGE CONVERTER HAVING STABILIZED DIVIDED OUTPUT VOLTAGE - A DC-DC voltage converter includes a current comparator converting a fixed reference voltage and an input voltage to a corresponding reference current and input current. The current comparator compares levels of the reference current and input current to output a control signal. A charge pump converts an output voltage to corresponding to a target voltage by performing a charge pumping operation in response to the control signal. An input voltage providing unit divides the output voltage to output the input voltage which is fed back into the current comparator, and as such is capable of reducing the area occupied by the DC-DC voltage converter in the semiconductor device and improving current consumption. | 06-25-2009 |
20090160534 | Circuit Arrangement for Providing a Voltage Supply for a Transistor Driver Circuit - The invention relates to a circuit arrangement for providing a voltage supply for a driver circuit for driving a semiconductor switch. The circuit arrangement has: a first bootstrap circuit which is supplied with a first auxiliary voltage referring to a lower supply potential, the bootstrap circuit comprising a first capacitor which provides a supply voltage for the driver circuit; a first charge pump which is designed to keep the charge in the first capacitor at or above a particular level at least during a particular period of time; a second bootstrap circuit which is supplied with a second auxiliary voltage referring to an upper supply potential, the bootstrap circuit comprising a second capacitor which provides a supply voltage for the first charge pump; and a second charge pump which is designed to generate the second auxiliary voltage. | 06-25-2009 |
20090167416 | CURRENT CONSUMPTION PREVENTION APPARATUS OF A HIGH VOLTAGE GENERATOR - A current consumption prevention apparatus includes a first current supply unit for transferring charges from a capacitor connected to a first inverter group to a capacitor connected to a second inverter group, and a second current supply unit for transferring charges of the capacitor connected to the second inverter group to the capacitor connected to the first inverter group. The current supply units are operated complementarily. | 07-02-2009 |
20090167417 | CHARGE PUMPING CIRCUIT WITH DECREASED CURRENT CONSUMPTION - A charge pumping circuit consumes less current by reducing the number of charge pumps operating simultaneously. The charge pumping circuit includes a voltage sensor that detects a level of a high voltage and outputs a control signal based on the detection result. An oscillator provides an oscillating clock signal in response to the control signal of the voltage sensor, and the oscillator sequentially outputs the clock signal as a plurality of clock signals having shifted phases A plurality of high-voltage pumps are disposed in a plurality of regions to pump the high voltage in response to the clock signals and a different phase is designated for each region. | 07-02-2009 |
20090167418 | Supply Regulated Charge Pump System - An apparatus and a method for maintaining an output voltage of a charge pump circuit near a target voltage is disclosed. A regulated supply voltage is generated based on the output voltage of the charge pump. The regulated supply voltage is applied to a voltage input to the charge pump circuit and to a voltage input of a clock driver that provides a regulated clock signal to the charge pump circuit. | 07-02-2009 |
20090167419 | Voltage converting circuit - Leakage current flowing into load is prevented when a charge pump circuit operation is halted. The charge pump circuit converts supply voltage, supplied to a supply-voltage input terminal, to an output signal having desired voltage value and outputs the signal to an output terminal. A first bypass circuit, connected between the supply-voltage input terminal and a supply node of the charge pump circuit, forms a bypass between the supply-voltage input terminal and the supply node only when a voltage value at the supply node is low compared with a supply voltage value supplied to the supply-voltage input terminal. A second bypass circuit connected between the output terminal and the supply node, forms a bypass between the output terminal and the supply node only when the voltage value at the supply node is low compared with the voltage value at the output terminal. | 07-02-2009 |
20090174466 | CHARGE PUMP CIRCUIT - A charge pump circuit is provided. The charge pump circuit includes a pump unit, first through sixth switches, a fly capacitor and an output capacitor. In a first period, an input voltage and a first voltage charge at least one internal capacitor of the pump unit via a first terminal and a second terminal of the pump unit. In the second period, the internal capacitor of the pump unit provides charges to the fly capacitor via the second switch and generates a first output voltage. In the third period, the fly capacitor supplies the charges to the output capacitor via the fourth switch to generate a second output voltage. | 07-09-2009 |
20090184753 | CHARGE PUMP CIRCUIT - Provided is a charge pump circuit capable of shortening a settling time. When a boosted voltage (Vout) becomes high to be equal to or larger than an overshoot voltage, a transistor (T1) is turned on and an output terminal of the charge pump circuit is discharged. Accordingly, it is easy to reduce the boosted voltage (Vout) after an occurrence of an overshoot, and a period of time in which the boosted voltage (Vout) decreases from a voltage after the occurrence of the overshoot to a desired voltage is shortened, leading to a reduction in a settling time. | 07-23-2009 |
20090189681 | SELF-OSCILLATING REGULATED LOW-RIPPLE CHARGE PUMP AND METHOD - Charge pump circuitry ( | 07-30-2009 |
20090195298 | CHARGE PUMP CIRCUIT AND ELECTRONIC APPARATUS PROVIDED WITH THE SAME - A pumping circuit includes: a pumping capacitance; a first drive transistor connected between an input node for receiving an input voltage and one terminal of the pumping capacitance; and a second drive transistor connected between an output node for outputting an output voltage and the one terminal of the pumping capacitance. In a charge storing mode, the first drive transistor is turned ON to store charge in the pumping capacitance, while in a charge transfer mode, the second drive transistor is turned ON to transfer the charge stored in the pumping capacitance to the output node. The protection circuit puts at least one of the first and second drive transistors in a high-resistance state in which the resistance value is higher than when the transistor is ON, based on whether the output voltage is higher or lower than a predetermined judgment voltage. | 08-06-2009 |
20090195299 | APPARATUS AND METHOD FOR PREVENTING EXCESSIVE INCREASE IN PUMPING VOLTAGE WHEN GENERATING PUMPING VOLTAGE - A device for generating a pumping voltage and preventing an excessive increase in the pumping voltage includes a pumping voltage output unit that outputs a pumping voltage and adjusts the level of the pumping voltage in order to maintain a target voltage. The level of the pumping voltage is adjusted in response to a change in the level of the pumping unit. A release unit is included to detect an excessive pumping voltage. The release unit adjusts the level of the pumping voltage when the pumping voltage reaches a predetermined excessive level by compulsively decreasing the pumping voltage to prevent damage in the DRAM. | 08-06-2009 |
20090201076 | SEMICONDUCTOR CHARGE PUMP USING MOS (METAL OXIDE SEMICONDUCTOR) TRANSISTOR FOR CURRENT RECTIFIER DEVICE - A semiconductor charge pump includes a plurality of P-channel MOS transistors being connected in series, a plurality of first pumping capacitors one electrode of each of which is connected to a connection point of each of the P-channel MOS transistors, a clock signal generating circuit which generates first and second clock signals whose phases are different from each other by 180 degrees, the first and second clock signals being alternately supplied to the other electrodes of the first pumping capacitors. The semiconductor charge pump further includes a plurality of dynamic level converter circuits each including a resistor element and a second pumping capacitor and connected to each of gates of the P-channel MOS transistors. | 08-13-2009 |
20090206915 | Two Stage Voltage Boost Circuit, IC and Design Structure - A two stage voltage boost circuit, IC and design structure are disclosed for boosting a supply voltage using gate control circuitry to reduce gate oxide stress, thus allowing lower voltage level FETs to be used. The voltage boost circuit may include a first stage for boosting the supply voltage to a first boosted voltage; a first passgate coupled to the first stage; a first gate control circuit for generating an on-state gate voltage level for the first passgate adjusted to reduce gate oxide voltage stress on the passgate; a second stage for boosting the first boosted voltage to a second boosted voltage; a second passgate coupled to the second stage, and a gate control circuit for generating an on-state gate voltage level for the second passgate adjusted to reduce gate oxide voltage stress on the second pass-gate. | 08-20-2009 |
20090206916 | Voltage Boost System, IC and Design Structure - A voltage boost system, IC and design structure are disclosed for boosting a supply voltage while preventing forward biasing of n-well structures. The voltage boost system may include a first voltage boost circuit producing a first boosted voltage using at least one voltage boost sub-circuit, each of the at least one voltage boost sub-circuit having an output passgate in an n-well; a second voltage boost circuit producing a second boosted voltage, the n-well of each output passgate being biased using the second boosted voltage, wherein the second boosted voltage is greater than the first boosted voltage. Voltage boost sub-circuits may use gate control circuitry to reduce gate oxide stress, thus allowing lower voltage level FETs to be used. | 08-20-2009 |
20090206917 | Two Stage Voltage Boost Circuit With Precharge Circuit Preventing Leakage, IC and Design Structure - A two stage voltage boost circuit, IC and design structure are disclosed for boosting a supply voltage using gate control circuitry to reduce gate oxide stress, thus allowing lower voltage level FETs to be used. The voltage boost circuit may include a first stage for boosting the supply voltage to a first boosted voltage and a second stage for boosting the first boosted voltage to a second boosted voltage. Each stage may include a passgate and a gate control circuit for generating an on-state gate voltage level for the respective passgate adjusted to reduce gate oxide voltage stress on the passgate. The circuit may also include a precharge circuit for coupling a voltage on a high node of the second stage to a gate node of a precharge transistor thereof for disabling the precharge transistor and preventing leakage back to a power supply voltage. | 08-20-2009 |
20090219077 | VOLTAGE MULTIPLIER WITH IMPROVED EFFICIENCY - A multi-stage voltage multiplication circuit and methodology are provided which use a multi-stage charge pump boosting circuit ( | 09-03-2009 |
20090219078 | CHARGE PUMP DOWN CIRCUIT AND METHOD FOR THE SAME - The present invention discloses a charge pump down circuit which comprises three capacitors operating in three time phases. In the first time phase, the total of the voltages across the three capacitors is equal to an input voltage; in the second time phase, the voltage across the second capacitor is equal to the voltage across the third capacitor; in the third time phase, the difference between the voltages across the first and the second capacitors is equal to the voltage across the third capacitor, wherein the voltage across the third capacitor is the output voltage of the charge pump down circuit. | 09-03-2009 |
20090219079 | CHARGE PUMP CIRCUIT FOR RFID INTEGRATED CIRCUITS - An exemplary embodiment of the invention provides a charge pump stage ( | 09-03-2009 |
20090219080 | INTERNAL VOLTAGE GENERATION CIRCUIT - Internal voltage generation circuit including a reference oscillation signal generator for generating a reference oscillation signal according to a comparison result of a pumping voltage with a reference voltage, an oscillation signal generator for generating a plurality of oscillation signals with a predetermined phase difference and a pumping voltage generator for generating a pumping voltage through sequential charge pumping operations performed in response to the plurality of oscillation signals, respectively. | 09-03-2009 |
20090219081 | INTERNAL VOLTAGE GENERATOR OF SEMICONDUCTOR MEMORY DEVICE - An internal voltage generation circuit of semiconductor memory device includes a reference voltage generation unit configured to generate a reference voltage, and a pumping control unit configured to be enabled at every active mode, compare the reference voltage with a fed-back voltage of a pumping voltage terminal, and output a pumping enable signal based on a comparison result. A storage unit is configured to store and output the pumping enable signal outputted from the pumping control unit. A charge pumping unit is configured to drive the pumping voltage terminal by performing a charge pumping operation in response to the pumping enable signal outputted from the storage unit. | 09-03-2009 |
20090219082 | Semiconductor device whose internal power supply voltage is generated by voltage step-up circuit - A semiconductor device includes a voltage step-up circuit and a control circuit. The voltage step-up circuit includes at least a first capacitor and a second capacitor which generate an internal power supply voltage. The control circuit controls the voltage step-up circuit. The control circuit connects the first and second capacitors in series to perform a first voltage step-up operation and connects the first and second capacitors in parallel to perform a second voltage step-up operation. The voltage step-up circuit generates a first stepped-up voltage in the first voltage step-up operation and generates a second stepped-up voltage in the second voltage step-up operation. The circuit area of the voltage step-up circuit with a plurality of stepped-up levels is reduced. | 09-03-2009 |
20090231022 | PUMPING VOLTAGE GENERATING CIRCUIT - A pumping voltage generating circuit of a semiconductor memory apparatus, the pumping voltage generating circuit includes a detecting unit configured to compare a level of a pumping voltage with a level of a reference voltage to generate a detection signal, an oscillating signal generator configured to sequentially generate a first oscillating signal and a second oscillating signal in response to the detection signal, and to elevate frequencies of the first and second oscillating signals when the second oscillating signal is generated, a first pump configured to perform a pumping operation in response to the first oscillating signal, and a second pump configured to perform a pumping operation in response to the second oscillating signal, wherein output terminals of the first pump and the second pump are commonly connected, and the pumping voltage is output at the output terminals of the first pump and the second pump. | 09-17-2009 |
20090231023 | INTEGRATED CIRCUITS WITH PROGRAMMABLE WELL BIASING - An integrated circuit includes a substrate, a storage device formed in the substrate to hold bias settings, and operational blocks formed in the substrate, each operational block including an operational circuit and a charge pump to provide well bias voltages to the operational circuit in response to one or more of the bias settings. A method for testing an integrated circuit having two or more operational blocks includes: (a) determining a maximum operating speed of each of the blocks at a minimum supply voltage; (b) selecting a block that has a slow operating speed; (c) selecting a well bias to speed up the selected block; (d) selecting a supply voltage to meet a target operating frequency at the selected well bias and measuring power; (e) repeating acts (b)-(d) while the measured power is less than a baseline power; and (f) saving the selected well bias and supply voltage settings for operation of the integrated circuit. | 09-17-2009 |
20090237146 | Dynamic Voltage Pump Circuit and Method of Dynamically Generating an Output Supply Voltage Thereof - A dynamic voltage pump circuit includes a first stage voltage pump, a second stage voltage pump, a limiter, and a comparator. The first stage voltage pump generates an intermediate supply voltage according to an input supply voltage and a pump signal. The second stage voltage pump generates an output supply voltage according to the intermediate supply voltage, the pump signal, and an enable signal; the second stage voltage pump is enabled and disabled when the enable signal is asserted and de-asserted, respectively. The limiter controls the pump signal according to a comparison of the output supply voltage with a first reference voltage. The comparator compares the first reference voltage with a second reference voltage to generate the enable signal, and can assert the enable signal when the desired output supply voltage exceeds the maximum possible intermediate supply voltage generated by the first stage voltage pump. | 09-24-2009 |
20090237147 | VPP pumping circuit and VPP pumping method using the same - Disclosed are a high voltage pumping circuit and a VPP pumping method using the same. The high voltage pumping circuit includes an initializing unit for initializing a high voltage in response to a first enable signal, a first pump for pumping the high voltage in response to the first enable signal, a second pump for pumping the high voltage in response to a second enable signal and a first mode signal, and a mode signal transmitting unit for generating a second mode signal in response to the second enable signal and the first mode signal. The driving of the initializing unit and the first pump is controlled in response to the first pump and the second mode signal. | 09-24-2009 |
20090237148 | CHARGE PUMP CIRCUIT - There is provided a charge pump circuit which can prevent EMI noise of a frequency component independent of an operation clock frequency from occurring at the time of a change from a disable state to an enable state. The charge pump circuit includes a detection signal synchronization circuit which outputs a synchronization detection signal generated by synchronizing a detection signal outputted from a level detection circuit to a clock signal outputted from an oscillator circuit. The synchronization detection signal is used as a pump enable signal, and a first pump capacitance and a second pump capacitance in a pump circuit body are charged and discharged in response to the synchronization detection signal and the clock signal outputted from the oscillator circuit. | 09-24-2009 |
20090237149 | VOLTAGE GENERATING CIRCUIT - A charge pump provides high boosting efficiency with low power loss even with a heavy load. Plural charge transfer switches are connected in series forming two lines of charge transfer circuits operated by out-of-phase clock signals. Capacitors are connected to each of nodes in the charge transfer circuits. The charge transfer circuits include a first control unit, a second control unit, and a voltage comparison output unit. The second control unit includes a switch unit configured to selectively feed a signal from a previous-stage node or a later-stage node to the gate of a charge transfer switch in the second control unit, depending on the phase of the clock signal. | 09-24-2009 |
20090243706 | VOLTAGE REGULATED CHARGE PUMP - A voltage regulated charge pump includes a charge pump circuit for receiving an input voltage to generate an output voltage, in which the charge pump circuit further includes a capacitor, a first switch and a second switch. The first switch is coupled between the input voltage and a first end of the capacitor. The second switch is coupled to the first end of the capacitor. The first and second switch are non-simultaneously turned on, so that the capacitor is charged to generate the output voltage. The voltage regulated charge pump further includes a third switch and a voltage regulating circuit. The third switch is coupled to the charge pump circuit. The voltage regulating circuit has an input receiving the output voltage and an output coupled to the third switch. The voltage regulating circuit modulates the third switch for regulating the output voltage generated by the charge pump circuit. | 10-01-2009 |
20090256625 | CIRCUIT AND METHOD FOR A GATE CONTROL CIRCUIT WITH REDUCED VOLTAGE STRESS - Circuit and method for a gate control output circuit having reduced voltage stress on the devices is disclosed. In a circuit of MOS transistors for supplying an output to control a transfer gate, the output having a high voltage level that exceeds a supply voltage, first and second clamping circuits are provided. The first clamping circuit ensures a voltage between the gate and the source/drain and drain/source of a PMOS transistor that couples a pumped voltage to the output does not exceed a predetermined voltage. The second clamping circuit ensures that the voltage between the gate of an NMOS transistor and the output which is coupled to the drain/source of the NMOS transistor does not exceed a predetermined amount. The clamping circuits prevent gate stress problems on the transistors by ensuring the voltages between the gates and the source/drain and drain/source terminals do not exceed predetermined voltages. | 10-15-2009 |
20090256626 | MULTI-STEP CHARGE PUMP AND METHOD FOR PRODUCING MULTI-STEP CHARGE PUMPING - A multi-step charge pump having a power input terminal and a power output terminal is provided. The multi-step charge pump includes a plurality of capacitors, wherein each of the capacitors has a capacitance. A plurality of switching devices is connected among the capacitors, the power input terminal and the power output terminal. A switch-controlling unit controls the on/off states of the switches, wherein a charging-phase circuit corresponding to a pumping level is formed to charge the capacitors and an output-phase circuit is formed to output a voltage from the power output terminal. At least one of the capacitors herein is changeably selected as a voltage-regulating capacitor. | 10-15-2009 |
20090256627 | MULTISTAGE CHARGE PUMPS WITH DIODE LOSS COMPENSATION - Multistage charge pumps with diode loss compensation are disclosed. In one example, a pre-regulated charge pump to generate a voltage is described. The example pre-regulated charge pump includes a charge pump having a plurality of stages and one or more diodes. The stages are configured to generate an output voltage at an output terminal based on an input voltage and a number of the multiplier stages. The example pre-regulated charge pump also includes a pre-regulator stage configured to adjust the input voltage to remove dependency on supply voltage variation. The pre-regulator includes a feedback diode configured to compensate for one or more voltage drops associated with the one or more charge pump diodes. | 10-15-2009 |
20090261890 | REGULATED VOLTAGE BOOST CHARGE PUMP FOR AN INTEGRATED CIRCUIT DEVICE - An apparatus and method for a regulated voltage boost charge pump for an integrated circuit (IC) device. The charge pump generally includes a plurality of switching networks and a lift capacitor that are intermittently coupled to an output capacitor or to a regulating transistor, a differential error amplifier biasing a gate terminal of the transistor, and a controller configured to alternate states of switches in the switching networks in a pre-selected timing relationship with a clock signal of the IC device. | 10-22-2009 |
20090261891 | Charge Pump - The present invention relates to a charge pump, which uses a chopper circuit or a clamp circuit coupled between a pump capacitor and an output capacitor for preventing a parasitic transistor produced by a switching mechanism from turning on. Thereby, the performance of the charge pump is improved effectively. | 10-22-2009 |
20090261892 | Voltage generating circuit and semiconductor device having the same - An active charge pump circuit may include a charge pump circuit, a control circuit, and a charge transfer circuit. The charge pump circuit may generate a charge pumping voltage in response to an active enable signal. The control circuit may generate a charge transfer control signal varying between a ground voltage and a boosted power supply voltage that is twice as much as a power supply voltage in response to the active enable signal. The charge transfer circuit may output the charge pumping voltage as an active voltage in response to the charge transfer control signal. | 10-22-2009 |
20090261893 | SEMICONDUCTOR DEVICE INCLUDING CELL TRANSISTOR AND CELL CAPACITOR - A semiconductor memory device includes a current source, a first resistance element, a comparator, and a charge pump. The current source supplies current to a first node. The current source includes a first transistor, and a second transistor. The first transistor supplies a drain current. The second transistor supplies a drain current. The first resistance element including a first end connected to the first node and a second end connected to a second node. The comparator compares a reference potential with a voltage of the first node. The charge pump generating a negative voltage of the sensed level based on a result of the comparison performed by the comparator, to output the generated negative voltage to the second node. The current source supplies a sum of the drain current in the first transistor and the drain current in the second transistor to the first node. | 10-22-2009 |
20090273391 | FLASH MEMORIES AND REGULATED VOLTAGE GENERATORS THEREOF - A flash memory and a regulated voltage generator thereof. The regulated voltage generator includes a charge pump having an output terminal outputting a first voltage, a control circuit coupled to the output terminal of the charge pump and having first and second output terminals outputting a second voltage and a charge pump control signal, respectively, and a Field Effect Transistor (FET) in diode mode. The FET is coupled between the output terminal of the charge pump and the first output terminal of the control circuit. The charge pump adjusts the first voltage according to the charge pump control signal. | 11-05-2009 |
20090278591 | POWER SUPPLIES IN FLASH MEMORY DEVICES AND SYSTEMS - Power supplies in flash memory devices are disclosed. A first section of a flash memory device includes non-volatile memory for storing data. A second section of the flash memory device includes at least first and second pumping circuits. The first pumping circuit receives a first voltage and produces, at an output of the first pumping circuit, a second voltage at a second voltage level that is higher than the first voltage level. The second pumping circuit has an input coupled to the first pumping circuit output for cooperatively employing the first pumping circuit to pump up from a voltage greater than the first voltage to produce a third voltage at a third voltage level that is higher than the second voltage level. | 11-12-2009 |
20090284307 | High voltage pumping circuit - A swing width control circuit and a high voltage pumping circuit using the same are disclosed. The swing width control circuit includes a swing width controller for receiving a first pumping signal having a first swing width and generating a second pumping signal having a second swing width larger than the first swing width of the first pumping signal, in accordance with a level of a supply voltage to pump or precharge a voltage of a specific node, and a swing width holding device for maintaining a swing width of the specific node to be equal to the second swing width of the second pumping signal. | 11-19-2009 |
20090284308 | VOLTAGE GENERATION CIRCUIT AND FLASH MEMORY DEVICE INCLUDING THE SAME - A voltage generation circuit includes a high voltage detector (HVD), a clock signal control unit (CSCU), an oscillator, a pumping clock control unit (PCCU), and a charge pump. The HVD compares a high voltage applied to a memory cell array with at least one reference voltage to provide at least one comparison signal. The CSCU provides a clock control signal for changing a frequency of a clock signal in response to the at least one comparison signal. The oscillator generates the clock signal having a frequency according to the clock control signal. The PCCU passes or intercepts the clock signal to provide a pumping clock signal, in response to a control signal. The charge pump consecutively performs charge pumping operations to provide the high voltage while the pumping clock signal is applied to the charge pump. | 11-19-2009 |
20090295464 | BOOSTER CIRCUIT - Analog comparison circuits are provided, each of which compares the potentials of the same stage of a first boosting cell row and a second boosting cell row and selecting and outputting the lower potential. The P-well potentials of switching devices having a triple-well structure are controlled using the output potentials of these analog comparison circuits. As a result, the amplitude of the P-well potential can be suppressed and a common P-well region can be arranged. | 12-03-2009 |
20090302930 | Charge Pump with Vt Cancellation Through Parallel Structure - A charge pump circuit for generating an output voltage is described. The charge pump includes an output generation section and a threshold voltage cancelation section, where these sections have the same structure including a first branch, which receives a first clock signal and provides a first output, and a second branch, which receives a second clock signal and provides a second output. The charge pump circuit also includes first and second transistors, where the first and second outputs of the output generation stage are respectively connected through the first and second transistors to provide the output voltage of the charge pump, and where the first and second outputs of the threshold voltage cancellation stage are respectively connected to the control gate the first and second transistors. | 12-10-2009 |
20090315615 | CHARGE COUPLED PUMP-EFFICIENT CHARGE PUMP REGULATOR WITH MOS CAPACITOR - A charge pump with a MOS-type capacitor, where the MOS-type capacitor is operated in an inversion region in which capacitance varies as a function of the frequency of the applied signal. The charge pump is switched to transfer charge from an input node to the capacitor and from the capacitor to an output node. During a transition interval, a relatively high frequency switching signal is used to lower the capacitance and increase efficiency. During a settling interval, a relatively low frequency switching signal is used, in which case the capacitance is higher, but similar to a level which would be seen if the capacitor was operated in an accumulation region. MOS capacitor dimensions and switching intervals are mutually optimized to provide high efficiency and required throughput. The charge pump may be configured as a voltage multiplier, divider, inverter or follower, for instance. | 12-24-2009 |
20090315616 | Clock Generator Circuit for a Charge Pump - A charge pump system is formed on an integrated circuit that can be connected to an external power supply. The system includes a charge pump and a clock generator circuit. The clock circuit is coupled to provide a clock output, at whose frequency the charge pump operates and generates an output voltage from an input voltage. The clock frequency is a decreasing function of the voltage level of the external power supply. This allows for reducing power consumption in the charge pump system formed on a circuit connectable to an external power supply. | 12-24-2009 |
20090322413 | Techniques of Ripple Reduction for Charge Pumps - A charge pump system for supplying an output voltage to a load is described. It includes a regulation circuit connected to receive the output voltage and derive an enable signal from it and multiple charge pump circuits connected in parallel to supply the output voltage. Each of the charge pump circuits is also connected to receive a clock signal and the enable signal. The system also includes one or more delay circuit elements, where a corresponding one or more, but less than all, of the charge pump circuits are connectable to receive the enable signal delayed by the corresponding delay circuit element. | 12-31-2009 |
20100007407 | CIRCUIT FOR GENERATING A NEGATIVE VOLTAGE SUPPLY SIGNAL, AND ASSOCIATED POWER SUPPLY DEVICE AND PORTABLE ELECTRONIC APPARATUS - A circuit for generating a negative voltage supply signal is disclosed. The circuit has a first capacitive element coupled to receive a switched input signal which switches at least between a first state with a positive first voltage and a second state with a second voltage, different from the first voltage. A second capacitive element is coupled to provide the negative voltage supply signal. Control circuitry is coupled to the first capacitive element and the second capacitive element. The control circuitry is arranged, in the first state of the switched input signal, to enable charging of the first capacitive element by the switched input signal, and, in the second state of the switched input signal, to enable charging of the second capacitive element by the first capacitive element to generate the negative voltage supply signal. | 01-14-2010 |
20100013548 | POWER EFFICIENT CHARGE PUMP WITH CONTROLLED PEAK CURRENTS - A charge pump which uses a current limit resistor to limit in-rush current and peak currents. An additional advantage of such a charge pump is that, when being coupled to a boost converter or other switching converter utilizing an inductive energy storage element, it may avoid unnecessary power dissipation caused by the current limit resistor. | 01-21-2010 |
20100019831 | CHARGE PUMP USING LOW VOLTAGE CAPACITORS AND DDI COMPRISING THE CHARGE PUMP - A charge pump includes a first end including a first section having a first capacitor and a first node, and a second end including a second section having a second capacitor. The first section charges the first capacitor with a first voltage during a first logic section of a clock signal, and converts an external voltage to a first middle voltage using the first voltage and a second voltage in a second logic section of the clock signal. The first middle voltage is a node voltage of a first node. The second section is connected to the first node, charges the second capacitor with a third voltage during the first logic section of the clock signal, and converts the external voltage to an internal voltage by using the third voltage and the first middle voltage in the second logic section of the clock signal. | 01-28-2010 |
20100019832 | Self-Adaptive Multi-Stage Charge Pump - A charge pump circuit for generating an output voltage is described. The charge pump includes multiple output generation stages connected in series and a corresponding set of multiple gate stages connected in series, where the output stages have the same structure as the corresponding gate stages. The switches that the provide the output of each output generation stage are controlled by the corresponding gate stage. The number of output stages that are active in boosting the voltage self-adapts according to the output level being regulated, with the later stages changing from a boosting operation to a filtering function with not being used to active boost the output. | 01-28-2010 |
20100026373 | Semiconductor device for charge pumping - Provided is a semiconductor device for performing charge pumping. The semiconductor device may include a first pumping unit, a second pumping unit, and a controller. The first pumping unit may be configured to output a boosted voltage via an output node by using a first input signal and the initial voltage, where the boosted voltage is greater than an initial voltage. The second pumping unit may be configured to output the boosted voltage via the output node by using a second input signal and the initial voltage. The controller may be configured to control the first and second pumping units. Each of the first and second pumping units may include an initialization unit, a boosting unit, and a transmission unit. The initialization unit may be configured to control a voltage of a boosting node to be equal to the initial voltage during an initialization operation. The boosting unit may be configured to boost the voltage of the boosting node based on the first and second input signals. Also, the transmission unit may be configured to control output of the boosted voltage. | 02-04-2010 |
20100026374 | Semiconductor integrated circuit with switching variable resistance device - A semiconductor integrated circuit having a switching variable resistance device with combined functions of a switching device and a variable resistance device is provided. The semiconductor integrated circuit includes a supply voltage input terminal that receives a supply voltage, a pulse generating unit that receives an input pulse and generates a variable amplitude pulse in response to the input pulse during a period of time, and a switching variable resistance unit that controls a current flowing into the supply voltage input terminal in response to the variable amplitude pulse, thereby limiting an inrush current and thus substantially reducing an temporary unstable effect on the supply voltage, which may be supplied from a power source. | 02-04-2010 |
20100033232 | VARIABLE STAGE CHARGE PUMP AND METHOD FOR PROVIDING BOOSTED OUTPUT VOLTAGE - An embodiment of a variable stage charge pump includes a plurality of pump stages. Each stage is configured to generate an intermediate boosted output voltage. A pump stage selector selects the number of charge pump stages to be coupled between an input and output terminal of the variable stage charge pump. The pump stage selector may control a plurality of switches to select the number of stages. For example, two stages maybe coupled in parallel and the parallel combination coupled in series to a third stage, resulting in a two stage charge pump. For a three stage charge pump, all three stages are coupled in series. | 02-11-2010 |
20100033233 | PUMPING VOLTAGE GENERATING CIRCUIT AND SEMICONDUCTOR MEMORY APPARATUS USING THE SAME - A pumping voltage generating circuit in a semiconductor memory apparatus includes a voltage supplying unit configured to supply an external power supply voltage to a first node in response to a first transfer signal, a node control unit configured to couple the first node to a second node in response to a second transfer signal and to couple the second node to an output node in response to a third transfer signal, a first pumping unit configured to increase a voltage level on the first node through a pumping operation that is performed in response to a first oscillation signal and to control one of an amount of voltage increment and decrement on the first node in response to a first control signal, and a second pumping unit configured to increase a voltage level on the second node through a pumping operation that is performed in response to a second oscillation signal and to control one of an amount of voltage increment and decrement on the second node in response to a second control signal. | 02-11-2010 |
20100033234 | INTERNAL VOLTAGE GENERATION CIRCUIT AND METHOD THEREOF - An internal voltage generation circuit includes a level detection unit configured to generate a detection voltage corresponding to a voltage level difference between a reference voltage with an internal voltage, an oscillation signal generation unit configured to generate an oscillation signal having a period corresponding to a voltage level of the detection voltage, and an internal voltage generation unit configured to generate the internal voltage in response to the oscillation signal. | 02-11-2010 |
20100039167 | Charge Pump Circuit - A charge pump circuit includes a switch unit adapted to transmit charges from the input of the charge pump to the output of the charge pump; a transmission unit adapted to control turn-on or cut-off of an MOS transistor in the switch unit; and a charging unit in one-to-one correspondence with a PMOS transistor in the switch unit and adapted to store charges to boost the transmission voltage. The embodiment of the invention adopts a first NMOS transistor and at least one PMOS transistor as the switch unit during transmission of the charges, so that normal work can be enabled with high transmission efficiency in the case of a low source voltage. | 02-18-2010 |
20100045365 | TWO TERMINAL QUANTUM DEVICE USING MOS CAPACITOR STRUCTURE - A gated quantum well device formed as an MOS capacitor is disclosed. The quantum well is an inversion region less than 20 nanometers wide under the MOS gate. The device may be fabricated in either polarity, and integrated into a CMOS IC, configured as a quantum dot device or a quantum wire device. The device may be operated as a precision charge pump, with a minority carrier injection region added to speed well filling. | 02-25-2010 |
20100052771 | CIRCUIT FOR DRIVING MULTIPLE CHARGE PUMPS - A system for driving multiple charge pumps in a single unit is disclosed. The charge pump system includes a set of multiple charge pumps arranged in parallel. The charge pumps are connected to a clock signal generator, which generates clock signals that direct the charging of the charge pumps and are offset in time from one another. The clock signals may be generated such that rising edges of the clock signals are separated by a specified time interval. The clock signals may be generated by a ring oscillator using signals provided by stages of the oscillator to generate the multiple signals. The clock signals may also be generated by providing a single input clock signal to a multi-phase generator, which outputs a set of clock signals having different phases based on the input clock signal. The system may also be configured to generate the offset clock signals using other methods, such as using a programmed microcontroller or using spread spectrum techniques. | 03-04-2010 |
20100052772 | Charge-Recycle Scheme for Charge Pumps - A method of operating a circuit includes providing a charge pump comprising an input and an output; charge-pumping an output voltage at the output of the charge pump to a high voltage; and discharging the output of the charge pump to power supply voltage VDD. | 03-04-2010 |
20100060343 | CONTROL CIRCUIT AND CONTROL METHOD FOR CHARGE PUMP CIRCUIT - A charge pump circuit is provided. A voltage/current conversion circuit compares a feedback voltage that corresponds to the output voltage of the charge pump circuit with a predetermined reference voltage, and generates a bias current that corresponds to the difference therebetween. An oscillator oscillates at a frequency that corresponds to the bias current. A buffer is biased by the bias current, and supplies a gate clock to the charge pump circuit based upon a clock signal output from the oscillator, thereby driving the charge pump circuit. | 03-11-2010 |
20100073077 | Boosting charge pump circuit - A boosting charge pump circuit includes a first charge pump circuit unit that includes: a first charge pump capacitor having first and second ends; a first driver supplying the first end of the first charge pump capacitor with a first clock signal having a first voltage amplitude; and a first switch having a first terminal electrically connected to the second end of the first charge pump capacitor, a second terminal operatively connected to an output terminal, and a third terminal. A second charge pump circuit unit includes: a second charge pump capacitor having a third end operatively connected to the output terminal and a fourth end; a second driver operating on a voltage at a power node thereof to supply the fourth end of the second charge pump capacitor with a second clock signal, the second clock signal having a second voltage amplitude defined by the voltage at the power node; and a second switch having a fourth terminal electrically connected to the third terminal of the first switch, a fifth terminal electrically connected to an internal power voltage supply line and a sixth terminal electrically connected to the power node of the second driver. The first terminal of the first switch is electrically connected to the second terminal of the first switch when the fifth terminal of the second switch is electrically connected to the sixth terminal of the second switch, and the first terminal of the first switch is electrically connected to the third terminal of the first switch when the fourth terminal of the second switch is electrically connected to the sixth terminal of the second switch. | 03-25-2010 |
20100073078 | INTERNAL VOLTAGE GENERATING CIRCUIT - There is an internal voltage generating circuit for providing a stable high voltage by making a response time short. The internal voltage generating circuit includes a charge pump unit for generate a high voltage being higher than an external voltage in response to pumping control signals and a supply driving control signal; a pumping control signal generating unit for outputting the pumping control signals to the charge pump unit based on a driving signal; and a supply driving control unit for receiving the driving signal to generate the supply driving control signal to the charge pump unit. | 03-25-2010 |
20100085110 | Integrated Circuit Active Power Supply Regulation - Method and apparatus for compensating for voltage fluctuations on a voltage supply line in an integrated circuit device. In accordance with some embodiments, the apparatus includes a voltage fluctuation sensor which senses a voltage on the supply line, and a compensation circuit comprising a switch and a charge storage device (CSD). The switch actively connects the CSD to the supply line when the voltage sensed by the voltage fluctuation sensor passes outside a predetermined voltage range. | 04-08-2010 |
20100085111 | Charge pump-type voltage booster circuit and semiconductor integrated circuit device - A booster circuit includes first and second transistors, a first capacitor, a first drive circuit, a second capacitor, a first controller, and a second controller. The first and second transistors are connected in series between a first voltage and a second voltage. One end of the first capacitor is connected to a connection node between the first transistor and the second transistor. The first drive circuit boosts the voltage at the other end of the first capacitor. The second capacitor is connected between the second voltage and a reference voltage. The first controller controls conduction/non-conduction of the first transistor. The second controller inputs any of the first voltage and the second voltage to the second transistor, and thereby controls conduction/non-conduction of the second transistor. The boost circuit is supplied with the reference voltage, a supply voltage, and a boost clock signal, and generates the second voltage by boosting the supply voltage. | 04-08-2010 |
20100090753 | CHARGE PUMP CIRCUIT - A charge pump circuit and a method of compensating current mismatch in a charge pump circuit. The charge pump circuit comprises a core charge pump circuit; a replica charge pump circuit for sensing a current mismatch in the core charge pump circuit and for converting the sensed current mismatch into a voltage signal V_ctrl; wherein V-ctrl is utilized for compensating the current mismatch in the core charge pump circuit. | 04-15-2010 |
20100090754 | BOOSTING CIRCUIT - A boosting circuit includes a charge pump circuit; and a power supply circuit configured to supply a power supply voltage to the charge pump circuit. The power supply circuit includes an N-channel transistor connected with a power supply terminal of the charge pump circuit; and a current control circuit configured to control current flowing between the N-channel transistor and the charge pump circuit through the power supply terminal. | 04-15-2010 |
20100097125 | HVNMOS/HVPMOS switched capacitor charge pump having ideal charge transfer - An integrated circuit for a charge pump with a charge stage and a pump stage and a single High-Voltage PMOS (HVPMOS) transistor as the main switch for each stage and two times two minimum HVPMOS transistors in series as a bulk switch with fixed bulk connections, where the minimum HVPMOS transistors are smaller sized transistors than the transistors of the main switch. The bulk of the main switch is switched synchronously to the voltage node of the HVPMOS transistor of the main switch to force the bulk voltage (V | 04-22-2010 |
20100097126 | CHARGE PUMPING CIRCUIT AND CLOCK GENERATOR - A charge pumping circuit comprises: a charging pump capacitance; a charging unit; a discharging unit; a detection resistor having one terminal and the other terminal, the one terminal being connected between a first node and a second node in a second mode; a voltage source for supplying a reference voltage to the other terminal of the detection resistor; a correction unit for correcting a charging current output from the charging unit and a discharging current that is to be sunk by the discharging unit to equalize the charging current and the discharging current in the second mode, based on a difference between a voltage of the one terminal of the detection resistor and the reference voltage when the charging unit outputs the charging current to the one terminal of the detection resistor and the discharging unit sinks the discharging current from the one terminal of the detection resistor. | 04-22-2010 |
20100097127 | BOOSTER CIRCUIT AND VOLTAGE SUPPLY CIRCUIT - A voltage supply circuit includes a booster circuit and a ripple filter circuit. The ripple filter circuit has a first resistor connected to a first output terminal at one end thereof. The ripple filter circuit also has a first switch circuit connected between the other end of the first resistor and a second output terminal. In addition, the ripple filter circuit has a second switch circuit connected between the first output terminal of the booster circuit and the first switch circuit. | 04-22-2010 |
20100109758 | FEEDBACK-CONTROLLED BODY-BIAS VOLTAGE SOURCE - A body-bias voltage source having an output monitor, charge pump, and shunt. a shunt circuit having on/off control is coupled to the output monitor and to the output of the charge pump. Upon sensing that the output voltage of the charge pump is above a desired value, the output monitor may disable the charge pump circuit and may enable the shunt circuit to reduce the voltage at the output of the charge pump. When the voltage output of the charge pump is below the desired value, the output monitor may disable the shunt circuit and may enable the charge pump circuit. A shunt circuit having proportional control may be substituted for the shunt circuit with on/off control. | 05-06-2010 |
20100109759 | SOLAR CELL DEVICE HAVING A CHARGE PUMP - A solar cell device includes a solar cell section configured to output a first voltage upon receiving light. A charge pump circuit includes a first charge pump. The first charge pump includes a first terminal and a second terminal. The first terminal is configured to receive the first voltage from the solar cell section, and the second terminal is configured to output a second voltage that is higher than the first voltage. An output section is configured to receive an output voltage output by the charge pump circuit. The charge pump circuit is formed on a single semiconductor substrate. | 05-06-2010 |
20100117719 | CHARGE PUMP CIRCUIT - A charge pump circuit includes a first plurality of capacitors, and a first precharge circuit. The first plurality of capacitors are connected in parallel to each other. The first plurality of capacitors receive clock signals to perform sequentially pumping operations which generate a first higher voltage from a power voltage supplied. The first precharge circuit precharges a predetermined number of capacitors in the first plurality of capacitors at the power voltage. The predetermined number is greater than one. | 05-13-2010 |
20100127760 | ELECTRONIC CIRCUIT FOR GENERATING LOW VOLTAGE AND HIGH FREQUENCY PHASES IN A CHARGE PUMP - A charge pump latch circuit is provided that includes at least one first and at least one second charge pump stage interconnected by an intermediate circuit node, and a stabilization stage connected to the intermediate circuit node and to control terminals of transistors of the first and second charge pump stages. The stabilization stage includes at least one first pair and at least one second pair of first and second enable terminals receiving suitable and distinct phase signals that ensure the turn-off of the stabilization stage during overlapping periods of the phase signals. Also provided is a method for using a stabilization stage to drive transistors in first and second charge pump stages that are interconnected by an intermediate circuit node. | 05-27-2010 |
20100127761 | CHARGE PUMP CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME - A charge pump circuit includes a plurality of capacitors connected in series via switch circuits, a plurality of pre-charge circuits that pre-charge the capacitors, respectively, and a control circuit that controls the switch circuits and the pre-charge circuits. The control circuit sequentially deactivates the pre-charge circuits from a pre-charge circuit allocated to the last stage capacitor to a pre-charge circuit allocated to the first stage capacitor in this order. Deactivation of each of the pre-charge circuits is performed after pre-charge of a parasitic capacitance component included in a latter stage capacitor than a corresponding capacitor is completed. With this method, a charge loss due to a parasitic capacitance is reduced, and at the same time, pre-charge of a parasitic capacitance component that is sequentially increased can be reliably performed. | 05-27-2010 |
20100134177 | CHARGE PUMP CIRCUIT AND METHOD THEREOF - A charge pump circuit includes a charging capacitor, a plurality of pumping capacitors, a charging circuit, and a pumping circuit. The charging circuit is configured for charging the charging capacitor when the charge pump circuit is under a charging phase; and the pumping circuit is configured for coupling the charging capacitor charged in the charging phase to a pumping capacitor to generate an output voltage level at the pumping capacitor according to a potential difference stored in the charging capacitor, when the charge pump circuit is under a pumping phase. | 06-03-2010 |
20100134178 | BOOST CIRCUIT - A boost circuit includes: first transistors connected in series between a voltage input node and a voltage output node to constitute a charge transfer circuit; and first capacitors, one ends of which are coupled to the respective connection nodes between the first transistors, the other ends thereof being applied with clocks with plural phases, wherein a gate of a certain stage transistor corresponding to one of the first transistors in the charge transfer circuit is coupled to a drain of another stage transistor corresponding to another one of the first transistors, which is disposed nearer to the voltage output node than the certain stage transistor and driven by the same phase clock as that of the certain stage transistor, the certain stage transistor being disposed nearer to the voltage output node than an initial stage transistor. | 06-03-2010 |
20100141331 | METHOD OF FORMING A CHARGE PUMP CONTROLLER AND STRUCTURE THEREFOR - In one embodiment, a charge pump controller is configured with transistors having at least two different selectable on-resistance values may be used to charge a pump capacitor. | 06-10-2010 |
20100141332 | INTERNAL VOLTAGE GENERATOR OF SEMICONDUCTOR DEVICE - An internal voltage generator of a semiconductor device includes a charge pumping unit for performing a charge pumping operation on the basis of the voltage level of a reference voltage to generate a charge pumped voltage having a voltage level higher than the external power supply voltage; and an internal voltage generating unit for performing a charge pumping operation on the basis of an internal voltage level that is linear with respect to a temperature change in a first temperature range to generate an internal voltage, and to perform a charge pumping operation on the basis of an internal voltage clamping level that is constant independent of a temperature change in a second temperature range to generate the internal voltage. | 06-10-2010 |
20100148856 | Regulation of Recovery Rates in Charge Pumps - A method is presented of setting a frequency of a clock for a charge pump system including the clock and a charge pump. This includes setting an initial value for the frequency of the clock and, while operating the charge pump system using the clock running at the initial frequency value, determining the ramp rate of an output voltage for the charge pump during a recovery phase. The frequency of the clock is then adjusted so that the ramp rate of the output voltage for the charge pump during the recovery phase falls in a range not exceeding a predetermined maximum rate. A charge pump system is also described that includes a register having a settable value, where the charge pump clock frequency is responsive to the register value, and count and comparison circuitry is connectable to receive the pump's output voltage and the clock signal and determine from them the number of clock cycles the charge pump uses to recover from a reset value to a predetermined value. | 06-17-2010 |
20100156512 | CHARGE PUMP CONTROLLER AND METHOD THEREFOR - In one embodiment, a charge pump controller is configured to a charge pump controller to charge a plurality of pump capacitors during a charging time interval and to sequentially form a plurality of discharge time intervals with a different pump capacitor coupled to supply a current to a load for each discharge time interval. | 06-24-2010 |
20100156513 | CHARGE PUMP - A high power DC-DC converter uses wide bandgap semiconductor switches and capacitors as a charge pump to convert a DC input to a DC output of a different potential. Each capacitor is connected to the output of one of the stages of the charge pump. A wide bandgap semiconductor switch is connected between the input and output of each stage, and the conductive state of the switch is controlled by a circuit that compares voltage at the input and output of the stage. A multiphase drive alternates drive voltage applied to the capacitors to cause charge to be passed from stage-to-stage through the charge pump. | 06-24-2010 |
20100156514 | CHARGE PUMP REGULATOR AND METHOD OF PRODUCING A REGULATED VOLTAGE - A charge pump regulator has a charge pump to establish a charge path and a discharge path alternately, so as to produce a regulated voltage on an output terminal. The charge pump has at least a current control element on the charge path or the discharge path to control the current flowing therethrough according to an output-dependent feedback signal. | 06-24-2010 |
20100156515 | CHARGE PUMP REGULATOR AND METHOD OF PRODUCING A REGULATED VOLTAGE - A charge pump regulator has a charge pump to establish a charge path and a discharge path alternately, so as to produce a regulated voltage on an output terminal. The charge pump has at least a current control element on the charge path or the discharge path to control the current flowing therethrough according to an output-dependent feedback signal. | 06-24-2010 |
20100156516 | CHARGE PUMP REGULATOR AND METHOD OF PRODUCING A REGULATED VOLTAGE - A charge pump regulator has a charge pump to establish a charge path and a discharge path alternately, so as to produce a regulated voltage on an output terminal. The charge pump has at least a current control element on the charge path or the discharge path to control the current flowing therethrough according to an output-dependent feedback signal. | 06-24-2010 |
20100156517 | CHARGE PUMP REGULATOR AND METHOD OF PRODUCING A REGULATED VOLTAGE - A charge pump regulator has a charge pump to establish a charge path and a discharge path alternately, so as to produce a regulated voltage on an output terminal. The charge pump has at least a current control element on the charge path or the discharge path to control the current flowing therethrough according to an output-dependent feedback signal. | 06-24-2010 |
20100171544 | VOLTAGE GENERATOR AND MEMORY DEVICE INCLUDING OF THE SAME - A voltage generator and a memory device including the voltage generator are provided. The voltage generator includes a clock generation unit which outputs a plurality of clock signals; a charge pumping unit which comprises a plurality of charge pumps, wherein one from among the plurality of charge pumps is enabled in response to an operation mode signal, and performs a charge pumping operation according to the plurality of clock signals to output a first voltage; and a regulator which generates a standby operation voltage from the first voltage. | 07-08-2010 |
20100171545 | HIGH VOLTAGE GENERATOR AND WORD LINE DRIVING HIGH VOLTAGE GENERATOR OF MEMORY DEVICE - A high voltage generator includes: a detection unit for comparing a reference voltage with a high voltage and detecting a voltage level of the high voltage; an oscillator selection unit for generating a first control signal and a second control signal in response to an output signal of the detection unit and a selection signal corresponding to a data operation mode; an oscillator for generating clock signals having different frequencies in response to the first control signal and the second control signal; and a pumping unit for generating the high voltage by performing a charge pumping operation in response to the clock signals. | 07-08-2010 |
20100176872 | Charge Pump Circuit, LCD Driver IC, And Electronic Appliance - A charge pump circuit | 07-15-2010 |
20100176873 | INTERNAL VOLTAGE GENERATOR FOR SEMICONDUCTOR INTEGRATED CIRCUIT CAPABLE OF COMPENSATING FOR CHANGE IN VOLTAGE LEVEL - The internal voltage generator includes a level detector for comparing an internal voltage with a reference voltage to output a level detecting signal; a pump controller for outputting a pump enable signal in response to a mode signal and the level detecting signal; and a voltage pump for generating the internal voltage in response to the pump enable signal. | 07-15-2010 |
20100182074 | Signal Output Apparatus, a Charge Pump, a Voltage Doubler and a Method to Output Current - A signal output apparatus, a charge pump, a voltage doubler and a method to output current. They use the interior circuit of a chip to generate an oscillation signal whose swing is between 0 and 2×V | 07-22-2010 |
20100188137 | BOOSTING CIRCUIT - Provided is a boosting circuit having a small circuit scale. When a node (Vg) is reset by a reset transistor (M | 07-29-2010 |
20100188138 | Fast Start Charge Pump for Voltage Regulators - A digital multilevel memory system includes a charge pump and a voltage regulator for generating regulated high voltages for various memory operations. The charge pump may include a plurality of boost circuits to boost the output of the charge pump during a fast start up. Afterwards, the boost circuits are disabled to allow the charge pump to generate high voltages without boosting. The boost circuits may be successively enabled to boost the voltage. The boost circuits may be loadless. The voltage regulator may operate in an open loop and may include a resistive divider as a reference voltage for regulating the high voltage from the charge pump. The charge pump may include spread spectrum pump clocking to reduce electromagnetic inference for capacitor or inductor on-chip charge pumping. | 07-29-2010 |
20100188139 | DEVICE FOR SUPPLYING TEMPERATURE DEPENDENT NEGATIVE VOLTAGE - A negative voltage supply device includes a negative voltage detector and a negative voltage pumping unit. The negative voltage pumping unit pumps a negative voltage in response to a detection signal. The negative voltage detector detects a level of a negative voltage by using a first element and a second element, which are different in the degree of change in their respective resistance values depending on the temperature, and outputs the detection signal. The detection signal informs the negative voltage pumping unit that pumping of the negative voltage is no longer needed. | 07-29-2010 |
20100201435 | Circuit for initializing voltage pump and voltage pumping device using the same - A voltage pump initialization circuit is provided. The voltage pump initialization circuit includes an initialization signal generator for generating an initialization signal which is activated in response to a power-up signal, and an initializer for initializing a voltage pump in response to the initialization signal. | 08-12-2010 |
20100207684 | CMOS CHARGE PUMP WITH IMPROVED LATCH-UP IMMUNITY - A CMOS charge pump with improved latch-up immunity is provided. The CMOS charge pump includes a blocking transistor that disconnects first and second boost nodes from a bulk node in response to a blocking control signal, such that a bulk voltage can be maintained at a predetermined level or higher. The CMOS charge pump in a power-up period first precharges the bulk voltage before the main pump performs a boosting operation and prevents a latch-up phenomenon. | 08-19-2010 |
20100214010 | Low noise charge pump method and apparatus - A charge pump method and apparatus is described having various aspects. Noise injection from a charge pump to other circuits may be reduced by limiting both positive and negative clock transition rates, as well as by limiting drive currents within clock generator driver circuits, and also by increasing a control node AC impedance of certain transfer capacitor coupling switches. A single-phase clock may be used to control as many as all active switches within a charge pump, and capacitive coupling may simplify biasing and timing for clock signals controlling transfer capacitor coupling switches. Any combination of such aspects of the method or apparatus may be employed to quiet and/or simplify charge pump designs over a wide range of charge pump architectures. | 08-26-2010 |
20100219881 | Multiple-Stage Charge Pump with Charge Recycle Circuit - A multiple-stage charge pump circuit comprises first and second pump capacitors, first and second transfer circuits, first and second driving circuits, and a charge recycle circuit. The first pump capacitor, the first transfer circuit, and the first driving circuit form a first stage circuit, and the second pump capacitor, the second transfer circuit and the second driving circuit form a second stage circuit. The first and the second stage circuits operate 180 degree out of phase with each other. The charge recycle circuit transfers the charge at the second end of the first pump capacitor to the second end of the second pump capacitor in a first time interval, and transferring the charge at the second end of the second pump capacitor to the second end of the first pump capacitor in a second time interval. | 09-02-2010 |
20100225383 | CHARGE PUMP CONVERTER AND METHOD THEREFOR - In one embodiment, a charge pump converter is formed to use various values of an output voltage to selectively control a value of a charging current during a charging cycle of the charge pump converter. | 09-09-2010 |
20100237930 | INTERNAL VOLTAGE GENERATING APPARATUS AND METHOD FOR CONTROLLING THE SAME - The internal voltage generating apparatus includes a first charge pumping circuit, an external voltage level detector, and a second charge pumping circuit. The first charge pumping circuit outputs an internal voltage and selectively performs first charge pumping for the internal voltage depending on a result detecting a level of the internal voltage feed-backed. The external voltage level detector detects a level of an external voltage and outputs the result detecting the level of the internal voltage and outputs a result detecting the level of the external voltage as a detection signal. The second charge pumping circuit performs second charge pumping for the internal voltage together with the first charge pumping against a case in which the level of the external voltage is lower than a predetermined level by the detection signal of the external voltage level detector. | 09-23-2010 |
20100237931 | INTERNAL POWER SUPPLY VOLTAGE GENERATION CIRCUIT - An internal power supply voltage generation circuit | 09-23-2010 |
20100244935 | HIGH-VOLTAGE CMOS CHARGE PUMP - Provided is a high-voltage complementary metal-oxide semiconductor (CMOS) charge pump. The high-voltage CMOS charge pump includes a first Dickson charge pump for doubling a supply voltage based on an input clock signal and a complementary input clock signal with reversed phases to each other; a level shifter for doubling voltage levels of the input clock signal and the complementary input clock signal based on an output signal and a complementary output signal of the first Dickson charge pump as power sources, to thereby output a doubled-output clock signal and a doubled-complementary output clock signal; and a second Dickson charge pump for doubling voltage levels of the output signal and the complementary output signal based on the doubled-output clock signal and the doubled-complementary output clock signal from the level shifter. | 09-30-2010 |
20100253418 | CHARGE PUMP CIRCUITS, SYSTEMS, AND OPERATIONAL METHODS THEREOF - A charge pump circuit includes at least one stage between an input end and an output end. The at least one stage includes a first CMOS transistor coupled with a first capacitor and a second CMOS transistor coupled with a second capacitor. The at least one stage is capable of receiving a first timing signal and a second timing signal for pumping an input voltage at the input end to an output voltage at the output end. During a transitional period of the first timing signal and the second timing signal, the at least one stage is capable of substantially turning off at least one of the first CMOS transistor and the second CMOS transistor for substantially reducing leakage currents flowing through at least one of the first CMOS transistor and the second CMOS transistor. | 10-07-2010 |
20100264981 | CHARGE PUMP WITH SELF-TIMING AND METHOD - With conventional charge pumps, significant noise is present due at least in part to large changes in the supply current. To combat this problem, a charge pump is provided that includes a number of stages. These stages are coupled to receive periodic alternating voltages having a phase shift with respect to each other so that the changes in the supply current are reduced, which reduces noise. | 10-21-2010 |
20100277225 | CHARGE PUMP CONTROLLER AND METHOD THEREFOR - A charge pump controller ( | 11-04-2010 |
20100277226 | Boost circuit and liquid crystal display device using boost circuit - A charge pump circuit has boost capacitors and a charge switch supplying supply voltage to the boost capacitors, and a step-up ratio thereof is variable by switching a connection relationship of the boost capacitors. A control circuit unit controls switching of the step-up ratio and selects first operation or second operation depending on a sum-based voltage corresponding to a sum of the supply voltage and a under-charge boost capacitor voltage. The first operation is to turn ON/OFF the charge switch in synchronization with a boost clock signal, while the second operation is to turn OFF it irrespective of the boost clock signal. A value of the sum-based voltage with which the first and second operations are switched is a reference value. When switching the step-up ratio from a first ratio to a second ratio lower than the first ratio, the control circuit unit switches the reference value from a first value corresponding to the first ratio to a second value corresponding to the second ratio, and then switches the connection relationship. | 11-04-2010 |
20100277227 | POWER SUPPLY CIRCUIT AND METHOD FOR CONTROLLING THE SAME - A power supply circuit includes a charge pump circuit configured to raise a voltage inputted from an input terminal and supply the raised voltage from an output terminal to a given load and a control circuit unit. The charge pump circuit includes a fly-back capacitor configured to store a charge of the voltage inputted from the input terminal and an output transistor connected between one terminal of the fly-back capacitor and the output terminal of the charge pump circuit. The control circuit unit receives a reference voltage and the voltage outputted from the charge pump circuit and is configured to generate a proportional voltage proportional to the voltage outputted from the charge pump circuit and output a voltage to control the output transistor depending on a difference between the proportional voltage and the reference voltage so that the proportional voltage has the same voltage level as the reference voltage. | 11-04-2010 |
20100277228 | BOOSTER CIRCUIT - A boosting circuit comprises a first boosting cell row and a second boosting cell row. The boosting circuit further comprises an analog comparison circuit for comparing the potential of boosting cells on the same stage, and selecting and outputting the lower or higher of the potentials. The potential of an N well is controlled using the output potential of the analog comparison circuit. Thereby, the amplitude of an N well potential can be suppressed, and a single N well region can be shared. | 11-04-2010 |
20100283533 | Charge pump circuit and method - A charge pump circuit and its method of operation are described. Switching devices in each stage alternately charge one of a first and second nodes while the other of the nodes is discharged. A boosting circuit boosts the potential on the one of the first and second nodes being discharged. The first node in a stage (n) is discharged into a first node in a stage (n+1). In one embodiment, a triple-well, tri-channel pipeline charge pump is described. | 11-11-2010 |
20100283534 | BOOSTING xDSL AMPLIFIER SUPPLY POWER ON-DEMAND - Systems and methods for increasing amplifier supply power on demand for a plurality of xDSL signals is provided. In an embodiment, circuitry may be used to detect the signal or signals having the highest voltage. In different embodiments, the signal(s) with the highest absolute voltage or highest combined voltage between complementary signal pairs may be compared to a threshold voltage, such as an existing amplifier supply voltage. In different embodiments, when these highest voltage(s) exceed the threshold voltage, the corresponding amplifier supply voltages may be increased to meet the increased amplification demand. In some embodiments when these highest voltage(s) do not exceed the threshold voltage, the amplifier supply voltage may not be increased and the existing amplifier supply voltage may be used to amplify the xDSL signals. | 11-11-2010 |
20100289556 | SEMICONDUCTOR MEMORY APPARATUS - A semiconductor memory apparatus that generates a voltage by performing a pumping operation in response to an oscillator signal includes a driving voltage detecting unit configured to control the cycle of the oscillator signal in accordance with the level of a driving voltage that is used to perform the pumping operation. | 11-18-2010 |
20100289557 | INTERNAL VOLTAGE GENERATION CIRCUIT - Internal voltage generation circuit including a reference oscillation signal generator for generating a reference oscillation signal according to a comparison result of a pumping voltage with a reference voltage, an oscillation signal generator for generating a plurality of oscillation signals with a predetermined phase difference and a pumping voltage generator for generating a pumping voltage through sequential charge pumping operations performed in response to the plurality of oscillation signals, respectively. | 11-18-2010 |
20100308899 | Dual-Output Triple-Vdd Charge Pump - A dual-output triple-Vdd charge pump as two pumped outputs that are both pumped to three times the power-supply voltage, 3×Vdd. This pumped output voltage is reduced by two p-channel inner diode drops, to 3×Vdd−2×|Vtp|. A pair of cross-coupled n-channel transistors alternately charge two inner nodes from the power supply. Inner pumping capacitors drive inner nodes between Vdd and 2×Vdd, and the cross-coupling of the gates turns off one of the cross-coupled n-channel transistors when its inner node is being driven high. A p-channel inner diode transistor connects an inner node to an outer node, causing a |Vtp| drop. The outer node is also pumped by an outer pumping capacitor that drives the outer node between 2×Vdd−|Vtp| and 3×Vdd−|Vtp|. A p-channel outer diode transistor conducts from the outer node to the pumped output node, causing another |Vtp| voltage drop. The pumped output voltage is maintained at 3×Vdd−2×|Vtp| by an output capacitor. | 12-09-2010 |
20100308900 | METHOD AND CIRCUIT FOR CHARGING AND DISCHARGING A CIRCUIT NODE - A voltage circuit and method charges a circuit node to a first predetermined voltage. The first predetermined voltage charged onto the circuit node is used for a first predetermined function during a first time period. A portion of charge from the circuit node is removed to circuitry coupled to the circuit node. The portion of the charge is reused during a second time period subsequent to the first time period. In one form a voltage generator has diode configurable transistors for passing current in only one direction depending upon whether the circuit node is being charged or discharged. In another form a switch couples the circuit node between a reference terminal and another circuit for charge reuse. Reuse of charge permits increased power savings. | 12-09-2010 |
20100308901 | INTERNAL VOLTAGE GENERATING CIRCUIT - An internal voltage generating circuit is capable of controlling an amount of charge pumping according to an external power supply voltage. The internal voltage generating circuit includes a periodic signal generating unit configured to control generation of periodic signals according to a level of an external power supply voltage, and a pumping unit driven according to the periodic signals generated by the periodic signal generating unit. | 12-09-2010 |
20100315154 | Reliable Charge Pump Circuit - A reliable charge pump circuit includes an operational amplifier; an upper current mirror; a lower current mirror; a startup circuit; and an anti-lock circuit, wherein the anti-lock circuit includes a current source and a diode-connected NMOS transistor, which increases the driving strength of the operational amplifier to two NMOS transistors connected to an output node of the operational amplifier, so as to prevent deadlock caused by multiple stable status and improve production yield. | 12-16-2010 |
20100321099 | EFFICIENCY AND THERMAL IMPROVEMENT OF A CHARGE PUMP BY MIXING DIFFERENT INPUT VOLTAGES - For a charge pump, a control circuit switches two or more input voltages to apply to one or more pumping capacitors under auto-sensing control to modulate a maximum pumping voltage as close as to a demanded output voltage to thereby reduce the difference between the maximum pumping voltage and the output voltage for efficiency and thermal improvement of the charge pump. The maximum pumping voltage is produced by mixing the different input voltages and the charge pump may provide more operation modes. | 12-23-2010 |
20100327959 | HIGH EFFICIENCY CHARGE PUMP - A charge pump circuit includes a first and second charge pumps. Each of the first and second charge pumps includes a boosting unit to respectively initialize and boost a voltage, a transmission transistor to transmit the boosting voltage to an output node, and a control unit to control the transmission transistor. The charge pump circuit has a higher voltage boosting efficiency and higher power efficiency. | 12-30-2010 |
20110001554 | CHARGE PUMP CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT - Provided is a charge pump circuit which is preferably used for reducing noise generated when electric charges are accumulated in a capacitor of the charge pump circuit. A load driving system | 01-06-2011 |
20110006836 | CHARGE PUMP AND CHARGING/DISCHARGING METHOD CAPABLE OF REDUCING LEAKAGE CURRENT - A charge pump includes a first transistor, a second transistor, a first, a second and a third selectors. The first transistor includes a gate electrode, a first electrode, and a second electrode which serves as an output port of the charge pump. The second transistor includes a gate electrode, a first electrode and a second electrode, where the gate electrode of the first transistor is coupled to the gate electrode of the second transistor, and the gate electrode of the second transistor is coupled to the second electrode of the second transistor. The first selector is utilized for selectively connecting the first transistor to a first supply voltage. The second selector is utilized for selectively connecting the first transistor to a second supply voltage. The third selector is utilized for selectively connecting the second transistor to the second supply voltage. | 01-13-2011 |
20110012671 | Charge Pump Circuit - A charge pump circuit includes an input end, a first reservoir capacitor, a second reservoir capacitor, a first output end, a second output end, and a charge pump unit. The input end is utilized for receiving an input voltage. The charge pump unit includes a first flying capacitor, a second capacitor, a plurality of switches, and a control unit. The control unit is utilized for controlling on/off state of the plurality of switches so that the first flying capacitor provides a positive charge pump voltage to the first output end or a negative charge pump voltage to the second output and the second flying capacitor provides a positive charge pump voltage to the first output end through charge and discharge process. | 01-20-2011 |
20110018615 | Charge Pump with Current Based Regulation - A charge pump system using a current based regulation method, in addition to the typical voltage based regulation methods is presented. The current flow in the charge pump is determined independently of the output voltage. By sensing the current going through the charge pump while its output is being regulated to the target level, the strength of charge pump can be dynamically adjusted in term of regulation level, branch assignment, clock frequency, clock amplitude, and so on. Indirectly sensing the current going through pump (not in serial with output stage to allow additional IR drop) will allow the pumps to have matrix of V and I to better adjust the charge pump parameters for current saving and ripple reduction | 01-27-2011 |
20110018616 | CHARGE PUMP CIRCUIT - A charge pump circuit for biasing a capacitive transducer. The charge pump circuit includes a plurality of parallel arranged transistor-capacitor units each having a bipolar junction transistor with a collector terminal connected to a base terminal and an emitter terminal connected to a capacitor. The charge pump circuit also includes drive circuitry for driving the transistor-capacitor units at a predetermined rate, as well as load current circuitry connected to a last transistor-capacitor unit and configured to determine a load current through the transistor-capacitor units in order to establish a controllable voltage drop across the transistor-capacitor units. Also included is supply circuitry configured to supply the transistor-capacitor units and drive circuitry, the supply circuitry configured to bias a base-emitter voltage of the transistor-capacitor units proportional to the load current so that an output voltage of the charge pump is substantially independent of temperature fluctuations. | 01-27-2011 |
20110018617 | Charge Pump with Reduced Energy Consumption Through Charge Sharing and Clock Boosting Suitable for High Voltage Word Line in Flash Memories - A charge pump circuit for generating an output voltage is described. Charge pump circuits typically have two branches. As the clocks supplying the branches of a charge pump circuit alternate, the output of each branch will alternately provide an output voltage, which are then combined to form the pump output. The techniques described here allow charge to be transferred between the two branches, so that as the capacitor of one branch discharges, it is used to charge up the capacitor in the other branch. An exemplary embodiment using a voltage doubler-type of circuit, with the charge transfer between the branches accomplished using a switch controller by a boosted version of the clock signal, which is provided by a one-sided voltage doubler | 01-27-2011 |
20110018618 | CHARGE PUMP CIRCUIT - A rectifying device is used to prevent any reverse current in a charge pump circuit. Accordingly, energy stored in the charge pump circuit is prevented from being transmitted back to an input voltage source, or energy stored in a capacitor coupled to an output end is prevented from being transmitted back to the charge pump circuit and the input voltage source. Besides, a current limiting unit coupled to the input voltage source or/and the output end is used to protect devices of the charge pump circuit from being burned out due to an overly large current provided by the input voltage source to the charge pump circuit or/and an overly large current provided by the charge pump circuit to the output end when a short circuit occurs. | 01-27-2011 |
20110032026 | VOLTAGE BOOSTING SYSTEM WITH SLEW RATE CONTROL AND METHOD THEREOF - A system includes a voltage controlled oscillator, a charge pump, and a current regulator circuit. The voltage controlled oscillator has a control input and a clock output that provides a clock signal at a clock frequency that is variable. The charge pump is coupled to the clock output and has an output that provides a boosted output voltage. The current regulator circuit is coupled to the control input of the voltage controlled oscillator to adjust the clock frequency based on a simulation of a rate of change of the boosted output voltage. This allows for a controlled slew rate for the output of the charge pump. | 02-10-2011 |
20110050325 | Circuit Arrangement for Voltage Supply and Method - The circuit arrangement for the supply of voltage comprises a control arrangement ( | 03-03-2011 |
20110050326 | CHARGE PUMP WITH CHARGE FEEDBACK AND METHOD OF OPERATION - A charge pump charges a first capacitor to a predetermined input voltage using a first switch. The first switch is coupled to a first terminal of the first capacitor for coupling the first terminal to an input terminal that receives the predetermined input voltage. A second switch couples a second terminal of the first capacitor to a reference voltage terminal. Charge is sequentially transferred from the first capacitor to an output capacitance by using the first switch. A portion of charge is sequentially removed from the output capacitance to the input terminal using a third switch and a second capacitor. Configuration logic provides control signals to make one or more of a plurality of charge transfer capacitors switch the same as said first capacitor switches. | 03-03-2011 |
20110050327 | Semiconductor device - Provided is a semiconductor device including: a first charge pump circuit that generates a first control signal based on electric charge of a first pumping capacitor accumulated through a first drive transistor; a second charge pump circuit that generates a second control signal based on electric charge of a second pumping capacitor accumulated through a second drive transistor; a third charge pump circuit that transfers electric charge between an output terminal and a reference voltage terminal through a third drive transistor; and a fourth charge pump circuit that transfers electric charge between the output terminal and the reference voltage terminal through a fourth drive transistor. Conductive states of the first and third drive transistors are controlled based on the second control signal, and conductive states of the second and fourth drive transistors are controlled based on the first control signal. | 03-03-2011 |
20110050328 | Methods and Circuits for a Low Input Voltage Charge Pump - A charge pump circuit comprises a plurality of subcircuits, where the subcircuits are connected to each other in a single or a dual array having a repeating pattern. Each of the subcircuits comprises one or more of the following: an X-channel device having an X-gate terminal, an X-source terminal and an X-drain terminal, a Y-channel device having a Y-gate terminal, a Y-source terminal and a Y-drain terminal, and a capacitor; wherein a first end of the capacitor, the X-drain terminal, and the Y-drain terminal are connected with each other to form the common drain terminal; and wherein a second end of the capacitor is the clock terminal. | 03-03-2011 |
20110063018 | BOOSTER CIRCUIT - In a booster circuit which is operated with a two-phase clock and in which a plurality of (M≧4) lines of boosting cells constitute a unit, a boosting cell in the K-th line (1≦K≦M) is controlled, depending on the voltage of the input terminal of a boosting cell in the KA-th line (KA=(K−1) when (K−1)>0, and KA=M when (K−1)=0). As a result, a charge transfer transistor can transition from the conductive state to the non-conductive state before a clock input to the boosting cell in the K-th line transitions from low to high and then boosting operation is performed. As a result, the backflow of charge via the charge transfer transistor can be reduced or prevented. | 03-17-2011 |
20110068856 | Charge pump - A charge pump includes a switching circuit which is interposed among first and second output capacitors, a flying capacitor, and an input power supply; and a control unit which controls the switching circuit. The charge pump is operated in an operation mode including a high-voltage outputting mode, a low-voltage outputting mode, and a relay mode. The control unit controls the switching circuit so that respective charging voltages of the first and second capacitors that are charged in the high-voltage outputting mode are gradually lowered. The control unit changes the operation mode of the charge pump by relay transition from the high-voltage outputting mode through the relay mode to the low-voltage outputting mode when a voltage lower command is given during a period when the operation mode of the charge pump is in the high-voltage outputting mode. | 03-24-2011 |
20110068857 | LATCH CHARGE PUMP WITH EQUALIZATION CIRCUIT - A charge pump including first and a second charge-pump stages electrically coupled, four pump capacitors connected between two enable terminals and four internal nodes, two pump transistors connected to the pump capacitors and to the internal nodes, and having respective control terminals, two biasing capacitors, connected between the control terminals and the enable terminals, and an equalization circuit connected between the control terminals and structured to limit the voltage between the control terminals within a first range of values. | 03-24-2011 |
20110074492 | Charge Pump Circuit And A Novel Capacitor For A Memory Integrated Circuit - A novel capacitor for use in a charge pump circuit has a substrate with a planar surface. A first electrode is in a first plane spaced apart from the planar surface. A second electrode is adjacent to and is spaced apart from the first electrode in the first plane and is capacitively coupled thereto. A third electrode is in a second plane, spaced apart from the first plane and is capacitively coupled to the first electrode. A fourth electrode is adjacent to and spaced apart from the third electrode in the second plane and is capacitively coupled to the third electrode and capacitively coupled to the second electrode. The first and fourth electrodes are electrically connected together and the second and third electrodes are electrically connected together. In addition, a cylindrical shape electrode, and a great wall electrode, and charge pump capacitor-by-pattern-filling is disclosed. A charge pump circuit using the foregoing described capacitor has a plurality of transistors for charging the capacitor and discharging the capacitor thereby increasing the voltage of the charge pump circuit. | 03-31-2011 |
20110074493 | CONFIGURABLE NP CHANNEL LATERAL DRAIN EXTENDED MOS-BASED TRANSISTOR - An integrated circuit containing a configurable dual n/p-channel 3-D resurf high voltage MOS field effect transistor (MOSFET) is disclosed. An n-channel drain is coterminous with a p-channel source in an n-well, and a p-channel drain is coterminous with an n-channel source in a p-well. A lateral drift region including n-type drift lanes and p-type drift lanes extends between the n and p wells. A resurf layer abuts the lateral drift region. The n-channel MOS gate is separate from the p-channel MOS gate. The p-channel MOS gate may be operated as a field plate in the n-channel mode, and vice versa. An n-channel MOS transistor may be integrated into the n-channel MOS source to provide an n-channel cascode transistor configuration, and similarly for a p-channel cascode configuration, to debias parasitic bipolar transistors under the MOS gates. Circuits using the MOSFET with various loads are also disclosed. | 03-31-2011 |
20110084756 | Reduced capacitor charge-pump - Systems and methods to achieve a charge pump for generating from single supply voltage energy efficient supply voltages that are symmetrical around ground voltage have been disclosed. The charge pump requires two flying capacitors only. The charge pump generates positive and negative supply voltages following a 1/N ratio of Vdd voltage, i.e. +−Vdd/N, and can be generalized to generate +/−Vdd/2 | 04-14-2011 |
20110084757 | VDD/5 or VDD/6 charge-pump - Systems and methods to achieve a charge pump for generating from single supply voltage energy efficient supply voltages having a value of ±1/6 Vdd, ±1/5 Vdd, ±1/4 Vdd, ±1/3 Vdd, ±1/2 Vdd or ±1 Vdd that are symmetrical around ground voltage have been disclosed. The charge pump requires two flying capacitors only. The charge pump generates positive and negative supply voltages following a 1/N ratio of Vdd voltage, i.e. +−Vdd/N, and can be generalized to generate +/−Vdd/2 | 04-14-2011 |
20110089996 | Systems and Devices for Dynamically Scaled Charge Pumping - Systems and devices for dynamically scaled charge pumping are presented. Example embodiments of the disclosed systems of dynamically scaled charge pumping enable regulation of the output voltage at a particular ratio and to dynamically control the ratio based on the input voltage. A charge pumping circuit is enabled by an oscillator. The charge pump oscillator is enabled by the output of a comparator. The comparator compares an input voltage to a comparator voltage, which is a divided version of the output voltage. The output voltage is referenced to a regulated voltage and the comparison voltage is divided between the two voltages by a resistor divider. The regulated voltage remains flat until the input voltage equals the reference voltage. At that point, the regulated voltage will begin to rise and follow the input voltage. Before the reference voltage is reached, the output voltage equals the input voltage multiplied by the resistor divider ratio. Once the input voltage reaches the reference voltage, the difference between the output voltage and the input voltage becomes a constant. | 04-21-2011 |
20110089997 | POWER SUPPLY CIRCUIT - A power supply circuit in accordance with the invention includes a charge-pump circuit and a control circuit. The charge-pump circuit includes first and second capacitors. The control circuit controls the charging voltage of the first and second capacitors. In this way, the power supply circuit outputs a constant output voltage based on the charging voltages of the first and second capacitors. | 04-21-2011 |
20110102069 | CHARGE PUMP CIRCUIT AND DRIVING METHOD THEREOF - A charge pump circuit includes an input end, a first reservoir capacitor, a second reservoir capacitor, two output ends, a charge pump unit and a charge module. The input end receives an input voltage, and the two output ends output a positive pumping voltage and a negative pumping voltage, respectively. The charge pump unit is utilized for charging the first reservoir capacitor and the second reservoir capacitor respectively by referring to a plurality of operational phases, wherein the charge pump unit does not charge at least one designated reservoir capacitor of the first reservoir capacitor and the second reservoir capacitor during at least one designated operational phase of the plurality of operational phases. When the charge pump unit operates in the at least one designated operational phase, the charge module is utilized for charging the at least one designated reservoir capacitor. | 05-05-2011 |
20110102070 | VOLTAGE PUMPING CIRCUIT - In a first pair of stacked PMOS devices comprising a first PMOS device and a second PMOS device, the first pumping circuit is coupled between a gate of the first PMOS device and a P pre-driver signal. In a second pair of stacked NMOS devices comprising a first NMOS device and a second NMOS device, the second pumping circuit is coupled between a gate of the first NMOS device and an N pre-driver signal. The pumping circuits recognizing the transition from the pre-driver signals provide a voltage to the gate of the first PMOS device and of the first NMOS device so that the first PMOS and NMOS devices are turned on better. As a result, their voltage Vds peaks are suppressed to a safe level; the devices avoid hot-carrier degradations; and their lifetimes are prolonged. | 05-05-2011 |
20110109375 | CHARGE PUMP APPARATUS AND CHARGE PUMPING METHOD - A charge pumping method includes: generating a first boosted voltage by boosting an input voltage by a boosting mode of a first multiplier; changing the level of a voltage charged in at least one capacitor provided in the inside of a charge pump circuit, in preparation for a change in the boosting mode; and generating a second boosted voltage by boosting the input voltage by a boosting mode of a second multiplier. | 05-12-2011 |
20110109376 | CIRCUITS AND METHODS FOR CONTROLLING A CHARGE PUMP SYSTEM - A circuit includes a charge pump and a feedback circuit. The charge pump coupled to a switch provides a control signal to the switch. The feedback circuit coupled to the charge pump receives the control signal and adjusts an operating frequency of the charge pump based upon the control voltage. The control voltage is adjusted to a predetermined target voltage by adjusting the operating frequency through the feedback circuit. | 05-12-2011 |
20110115549 | CHARGE PUMP FOR USE WITH A SYNCHRONOUS LOAD - A charge pump has circuitry and implements a method for monitoring a synchronous load by using a first voltage threshold below a target output voltage and a second voltage threshold above a target output voltage. An output terminal is coupled to the load. Charge is demanded by clocking the load. When the target output voltage passes below the first voltage threshold, a first value representing a present size of a charging capacitance is stored as a stored first value, and a second stored value representing a needed changed size of the charging capacitance is used. The present size of the charging capacitance is changed in response to the passing of the target output voltage below the first voltage threshold. When demand for charge from the load is reduced, a present value is saved and a prior value is restored to change the size of the charging capacitance. | 05-19-2011 |
20110115550 | SYSTEM AND METHOD FOR COMMUNICATING BETWEEN MULTIPLE VOLTAGE TIERS - A system includes first, second, and third circuits and first and second capacitors. The first capacitor has a first power supply terminal coupled to positive power supply terminal, a second power supply terminal, and an input/output. The second capacitor has a first power supply terminal coupled the second power supply terminal of the first circuit, a second power supply terminal, and an input/output. The third circuit has a first power supply terminal coupled the second power supply terminal of the second circuit, a second power supply terminal, and an input/output. The first capacitor has a first terminal coupled to the input/output of the first circuit and a second terminal coupled to the input/output of the second circuit. The second capacitor has a first terminal coupled to the second terminal of the first capacitor and a second terminal coupled to the input/output of the third circuit. | 05-19-2011 |
20110115551 | CHARGE PUMP UTILIZING EXTERNAL CLOCK SIGNAL - A method of generating a pumping voltage in an integrated circuit includes receiving an external clock signal from outside of the integrated circuit. The frequency of the received external clock signal is changed according to one or more modulation ratios, resulting in one or more respective modulated external clock signal. The external clock signal or one of the modulated external clock signals is then selected for use as a pump clock signal. The pump clock signal is used for driving the pump capacitance of a pump circuit for generating the pumping voltage. | 05-19-2011 |
20110115552 | CHARGE PUMP CIRCUIT - There is provided a charge pump circuit which can prevent EMI noise of a frequency component independent of an operation clock frequency from occurring at the time of a change from a disable state to an enable state. The charge pump circuit includes a detection signal synchronization circuit which outputs a synchronization detection signal generated by synchronizing a detection signal outputted from a level detection circuit to a clock signal outputted from an oscillator circuit. The synchronization detection signal is used as a pump enable signal, and a first pump capacitance and a second pump capacitance in a pump circuit body are charged and discharged in response to the synchronization detection signal and the clock signal outputted from the oscillator circuit. | 05-19-2011 |
20110128070 | CHARGE PUMP STAGE, METHOD FOR CONTROLLING A CHARGE PUMP STAGE AND MEMORY HAVING A CHARGE PUMP STAGE - A charge pump having a supply terminal, for receiving a supply voltage, and an output terminal, for supplying an output voltage. The charge pump has a control block including a comparator having a first comparison input, for receiving the supply voltage, a second comparison input, for receiving the output voltage, and a comparison output, for generating a pump-switch-off signal depending upon a comparison between the input voltage and the output voltage; and a switch controlled in switching off by the pump-switch-off signal and configured for switching off the charge pump circuit. The control block has an activation input for receiving an activation signal that has a plurality of pulses and repeatedly activates the comparator-circuit block. | 06-02-2011 |
20110133819 | LOW POWER CHARGE PUMP AND METHOD OF OPERATION - A charge pump and method for starting up a charge pump are provided. The charge pump comprises a plurality of charge pump cells and a start-up control circuit. Each charge pump cell has a clock terminal for receiving a delayed clock signal, an input terminal for receiving an input voltage, and an output terminal for providing a boosted voltage in response to receiving the clock signal and the input voltage. The start-up control circuit is coupled to the clock terminals of each of the plurality of charge pump cells. The start-up control circuit is for delaying the delayed clock signal provided to each charge pump cell of the plurality of charge pump cells. Each of the charge pump cells receives the delayed clock signal having a different predetermined delay so that each of the plurality of charge pump cells are enabled in a predetermined sequence during start-up of the charge pump. | 06-09-2011 |
20110133820 | Multi-Stage Charge Pump with Variable Number of Boosting Stages - A charge pump circuit for generating an output voltage is described. The charge pump includes multiple output generation stages connected in series, where the number of stages operating in a boosting mode is variable in order to regulate the pump. The number of stages arranged in series stays the same, but the last one or more of the stages can be operated in a filtering mode, with the number of boosting stages being lower as the regulation level goes lower. This improves the power consumption and reduces noise at lower regulated output levels. | 06-09-2011 |
20110133821 | CHARGE PUMP CIRCUIT - A charge pump circuit has: first and second charge pump circuits alternately performing boosting operations; and a control circuit. The first (second) charge pump circuit has: plural stages of first (second) switch transistors connected in series; plural stages of first (second) connection nodes respectively connected to sources of the first (second) switch transistors; and plural stages of first (second) capacitors respectively connected to the first (second) connection nodes. The control circuit has: plural stages of first inverters and plural stages of second inverters. The n-th-stage first (second) inverter is supplied with a positive-side power supply voltage from the (n−1)-th-stage second (first) connection node, is supplied with a negative-side power supply voltage from the n-th-stage first (second) connection node, is supplied with an input voltage from the (n−1)-th-stage first (second) connection node, and outputs an output voltage to a gate of the n-th-stage first (second) switch transistor. | 06-09-2011 |
20110140767 | Method and Apparatus for Charge Leakage Compensation for Charge Pump with Leaky Capacitive Load - An apparatus comprises a charge pump to receive a phase signal representing a result of a phase detection and to output a current flowing between an internal node of the charge pump and an output node of the charge pump; a capacitive load coupled to the output node; a current source controlled by a bias voltage to output a compensation current to the output node; a current sensor coupled between the internal node and the output node to sense the current; and a feedback network to generate the bias voltage in accordance with an output of the current sensor. A comparable method is also disclosed. | 06-16-2011 |
20110148509 | Techniques to Reduce Charge Pump Overshoot - A charge pump system for supplying an output voltage to a load is described. The charge pump system includes a charge pump connected to receive an input voltage generate from it the output voltage. The system also includes regulation circuitry connected to receive the output voltage and a reference voltage, where the regulation circuitry is connected to the charge pump to regulate the output voltage based upon the values of the reference voltage and the output voltage. During ramp up or a recovery operation the output voltage is initially regulated according to a first level and subsequently regulated to a second level higher than the first level, the second level corresponding to a desired regulated output voltage. | 06-23-2011 |
20110148510 | REDUCED CURRENT CHARGE PUMP - This document discusses, among other things, a charge pump having a plurality of switching devices, coupled in parallel, and configured to selectively provide a variable available drive current for a capacitor using a comparison of an output voltage to at least one reference voltage. | 06-23-2011 |
20110156802 | CHARGE PUMP WITH LOW POWER, HIGH VOLTAGE PROTECTION CIRCUITRY - A charge pump circuitry for generating a charging voltage for programming a one time programmable (OTP) memory includes a charge pump sub-circuit for generating the charging voltage in a second voltage range when the charging voltage exceeds a threshold level. A precharge circuit generates the charging voltage in a first voltage range when the charging voltage is below the threshold level. A voltage measurement circuit determines the charging voltage. A first control circuit enables the precharge circuit and disables the charge pump sub-circuit in a first mode of operation responsive to the charging voltage being determined to be below the threshold level and disables the precharge circuit and enables the charge pump sub-circuit in a second mode of operation responsive to the charging voltage being determined to exceed the threshold level. A second control circuit provides an indication that the charging voltage has reached a charging level for programming the OTP memory responsive to the determined charging voltage. | 06-30-2011 |
20110156803 | METHOD FOR GENERATING MULTIPLE INCREMENTAL OUTPUT VOLTAGES USING A SINGLE CHARGE PUMP CHAIN - A method and apparatus for generating multiple voltage level outputs from a single series of charge pump stages. The apparatus includes a plurality of voltage output circuits electrically connected in series. A selected number of the voltage output circuits include voltage output nodes that are available to be connected to loads. A control component in each voltage output circuit regulates operation of the charge pump stages within that circuit to provide a voltage level at the voltage output node regulated independently of other voltage output circuits in the series. The method and apparatus has the advantage of reducing the number of charge pump stages required to achieve a plurality of different voltage output levels. In another embodiment, the method and apparatus recycles charge within the apparatus by transferring charge between voltage output circuits through a load. | 06-30-2011 |
20110156804 | VOLTAGE REFERENCE CIRCUIT FOR LOW SUPPLY VOLTAGES - A voltage reference circuit and method for generating a reference voltage using the circuit uses a comparison of the voltages on first and second nodes of a diode resistor network to produce a comparison signal, which is then used to increase the voltage on an output of a charge pump to generate the reference voltage. | 06-30-2011 |
20110156805 | INTERNAL VOLTAGE GENERATOR AND METHOD OF GENERATING INTERNAL VOLTAGE - An internal voltage generator and a method of generating an internal voltage are disclosed. The internal voltage generator includes: a charge pumping block configured to perform charge pumping base on a period pulse signal to generate an internal voltage, and output the generated internal voltage to an interval voltage terminal; a voltage detection block configured to detect the voltage level of the internal voltage terminal; a driving voltage supply block configured to supply a first power supply voltage or a second power supply voltage having a higher voltage level than the first power supply voltage as a driving voltage, depending on the detection result of the voltage detection block; and a period pulse generation block configured to drive the period pulse signal to the is driving voltage supplied from the driving voltage supply block. The period pulse signal driven by the second power supply voltage has a longer pulsing period than the period pulse signal driven by the first power supply voltage. | 06-30-2011 |
20110156806 | CHARGE PUMP WITH REDUCED CURRENT MISMATCH - Charge pump circuitry is provided that is insensitive to charge sharing and current mismatch effects. The charge pump circuitry has an output node at which a charge pump output voltage is provided. A first current source charges the output node to increase the output voltage or a second current source discharge the output node to decrease the output voltage. The charge pump circuitry uses a unit-gain op-amp circuit to prevent charge sharing effects from affecting the output voltage when switching between discharging and charging operations. A low-pass filter is used to reduce feedback noise on the output node. A replica feedback circuit prevents current mismatch between the currents produced by the first and second current sources. The first and second current sources may be formed using programmable transistors that are adjusted by static control signals provided by programmable elements to further minimize current mismatch. | 06-30-2011 |
20110163796 | Load Switch System Driven by a Charge Pump - A method for operating a load switch, wherein a charge pump drives a gate of the load switch, comprises the steps of: controlling a charge pump frequency as a function of states of the load switch; generating a charge pump output as a function of the charge pump frequency; and providing the charge pump output to the gate of the load switch. | 07-07-2011 |
20110169557 | CHARGE PUMP CIRCUIT - Each of a plurality of pump stages has an input node and an output node and performs a charge pump operation in response to any one of the first and second clock signals. The plurality of pump stages include a first pump stage, in which a charge transfer transistor is connected between the input node and the output node. One end of a pump capacitor is connected to the output node, and the other end is supplied with one of the first and second clock signals corresponding to the first pump stage. A connection switcher connects to the gate of the charge transfer transistor any one of the output node of a pump stage which is supplied with one of the clock signals corresponding to the first pump stage and the input node of a pump stage which is supplied with the other clock signal not corresponding to the first pump stage and which is included in a pump stage row not including the first pump stage. | 07-14-2011 |
20110169558 | CHARGE PUMP SYSTEMS AND METHODS - Digital multilevel memory systems and methods include a charge pump for generating regulated high voltages for various memory operations. The charge pump may include a plurality of pump stages. Aspects of exemplary systems may include charge pumps that performs orderly charging and discharging at low voltage operation conditions. Additional aspects may include features that enable state by state pumping, for example, circuitry that avoids cascaded short circuits among pump stages. Each pump stage may also include circuitry that discharges its nodes, such as via self-discharge through associated pump interconnection(s). Further aspects may also include features that: assist power-up in the various pump stages, double voltage, shift high voltage levels, provide anti-parallel circuit configurations, and/or enable buffering or precharging features, such as self-buffering and self-precharging circuitry. | 07-14-2011 |
20110181346 | Charge Pump Driving Circuit and Charge Pump System - A charge pump driving circuit for generating a driving pulse signal to drive a charge pump circuit is disclosed. The charge pump driving circuit includes a control signal generator and a driving signal generator. The control signal generator generates a first control signal, a second control signal, and a third control signal, in which the third control signal transits in the first place, the first control signal transits next, and the second control signal transits last. The driving signal generator, controlled by the first control signal, the second control signal and the third control signal, generates the driving pulse signal, in which the driving signal generator has a rare short circuit current flowing from a supply terminal providing a supply voltage to a ground terminal providing a ground voltage. | 07-28-2011 |
20110187443 | SEMICONDUCTOR APPARATUS AND METHOD FOR CONTROLLING THE SAME - A semiconductor apparatus includes a plurality of pump control units respectively located in a plurality of chips, connected in series through a first TSV, and configured to sequentially delay a period signal, transmit delayed period signals and generate pump control signals based on the period signal or the delayed period signals; and a plurality of voltage pump units respectively located in the plurality of chips, and configured to generate a pumping voltage in response to the pump control signals generated from the plurality of pump control units. | 08-04-2011 |
20110204959 | Charge Pump with Reduced Current Variation - Circuits and methods for maintaining a substantially constant input and output current for a charge pump circuit are provided which reduce current variation during switching intervals. The charge pump circuitry of the present invention maintains a current flow path from a current source to the charge pump output which minimizes or eliminates spikes normally associated with the switching intervals. | 08-25-2011 |
20110204960 | Fully Featured Control Pin Powered Analog Switch - An apparatus comprises at least one input connection, at least one output connection, at least one control connection, a voltage converter circuit having an input coupled to the control connection and an output, wherein the voltage converter circuit is configured to provide a voltage at its output that is greater than a voltage present at its input, and at least one switch circuit coupled to the input connection, the output connection, and the output of the voltage converter circuit. The switch circuit passes a signal received at the input to the output when the switch circuit is activated by the voltage converter output. Power to the voltage converter circuit is provided via the control connection, and power to the switch circuit is provided via the output of the voltage converter circuit. | 08-25-2011 |
20110204961 | Power-efficient multi-mode charge pump - Disclosed is a power-efficient multi-mode charge pump. The charge pump comprises a first pumping circuit that provides at least one output voltage produced by a discharge sequence of a shared flyback capacitor. The charge pump also comprises a second pumping circuit that provides a plurality of output voltages produced by a corresponding plurality of discharge sequences of the shared flyback capacitor. The charge pump may include a transition circuit to selectably enable the first pumping circuit or the second pumping circuit. In one embodiment, the first pumping circuit may employ a two-phase discharge sequence. In another embodiment, the second pumping circuit may employ a three-phase plurality of discharge sequences. A related method is also disclosed. | 08-25-2011 |
20110204962 | HIGH EFFICIENCY DC-DC CONVERTER - A charge pump includes an input, an output, and a fixed voltage node; a first capacitor and at least a second capacitor; and a plurality of switches adapted to selectively couple the first capacitor and the at least the second capacitor to the input, the output, and the fixed voltage node. A switch controller is adapted to switch the plurality of switches in response to at least three phase signals to provide fixed gains. A phase generator is adapted to generate the at least three phase signals, wherein at least one of the at least three phase signals has a duty cycle that is different from at least one other of the at least three phase signals. The phase generator is also adapted to adjust the frequency of a clock signal used to generate the at least three phase signals so that a minimum switching frequency is provided. | 08-25-2011 |
20110204963 | SEMICONDUCTOR DEVICE - A semiconductor device is provided, including a charge-pumping unit configured to charge-pump power voltage in every period of a pumping clock to generate pumping voltage, a first voltage level detection unit configured to detect a maximum voltage level of the generated pumping voltage, a second voltage level detection unit configured to detect a minimum voltage level of the generated pumping voltage, and a pumping clock generating unit configured to generate the pumping clock, the pumping clock having a frequency that is adjusted in response to an output signal of the first and the second voltage level detection units. | 08-25-2011 |
20110210784 | RF SWITCHING DEVICE AND METHOD THEREFOR - Disclosed are an apparatus and a method for switching RF signals. An RF switching apparatus according to an exemplary embodiment of the present invention includes: a plurality of FETs passing or blocking high-frequency signals depending on driving voltage applied to a gate; a control power supply generating control voltage for controlling the passing or blocking of the high-frequency signals; and a charge pump increasing the level of the control voltage and outputting the corresponding voltage as the driving voltage. According to the exemplary embodiment of the present invention, it is possible to minimize insertion loss generated in an RF switch. | 09-01-2011 |
20110221511 | VARIABLE INPUT VOLTAGE CHARGE PUMP - A device for providing a constant output voltage based on a variable input voltage is provided. The device may include: (1) a charge-pump comprising a plurality of cells, wherein each of the plurality of cells can be configured as an input cell, a stepping cell, or a load cell; (2) a comparator; and (3) a differentiator coupled to the comparator output, wherein the differentiator is configured to monitor the comparator output and produce a reset pulse each time the comparator output changes its state. The device may further include: (1) a decimator; (2) an up/down counter; and (3) a controller for detecting whether the device is operating in a first predetermined mode or a second predetermined mode, wherein the two modes relate to the configuration of the plurality of cells into the input cell, the stepping cell, and/or the load cell. | 09-15-2011 |
20110221512 | Charge Pump - A charge pump is disclosed for amplifying an input voltage received at an input end and outputting the amplified voltage at an output end as an output voltage. The charge pump includes a plurality of source/drain coupling transistors for serving as charging capacitors, and a plurality of cascode-connected transistors being symmetrically connected to between the input end and the output end. The charge pump further includes a plurality of diode-connected transistors to protect the source/drain coupling transistors against breakdown during the course of charge transfer and to speed up the charge transfer. | 09-15-2011 |
20110221513 | Semiconductor device having boosting circuit - A semiconductor device includes a boosting circuit that boosts an internal power supply voltage in a boosting range according to an external power supply voltage, an external voltage-level comparison circuit that compares the external power supply voltage and a predetermined reference voltage, and a variable resistor circuit that includes a variable resistor connected to an output terminal of the boosting circuit. The variable resistor circuit controls a resistance value of the variable resistor based on a comparison result of the external voltage-level comparison circuit. | 09-15-2011 |
20110221514 | VARIABLE STAGE CHARGE PUMP AND METHOD FOR PROVIDING BOOSTED OUTPUT VOLTAGE - An embodiment of a variable stage charge pump includes a plurality of pump stages. Each stage is configured to generate an intermediate boosted output voltage. A pump stage selector selects the number of charge pump stages to be coupled between an input and output terminal of the variable stage charge pump. The pump stage selector may control a plurality of switches to select the number of stages. For example, two stages maybe coupled in parallel and the parallel combination coupled in series to a third stage, resulting in a two stage charge pump. For a three stage charge pump, all three stages are coupled in series. | 09-15-2011 |
20110234305 | CHARGE PUMP CIRCUIT AND METHODS OF OPERATION THEREOF - A charge pump circuit, and associated method and apparatuses, for providing a split-rail voltage supply, the circuit having a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of said states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage and centered on the voltage at the common terminal. | 09-29-2011 |
20110241766 | CHARGE PUMP - A charge pump includes a first voltage input node, a second voltage input node, a voltage output node, at least a flying capacitor, an energy reserve capacitor, a first MEMS switches group controlled by a controlling signal, a second MEMS switches group controlled by the controlling signal, a third MEMS switches group controlled by the controlling signal and a forth MEMS switches group controlled by the controlling signal. The flying capacitor is connected with the first voltage input node and the second voltage input node via the first MEMS switches group. The flying capacitor is connected with the first voltage input node or the second voltage input node via the second MEMS switches group. The energy reserve capacitor is connected with the flying capacitor via the third MEMS switches group. The energy reserve capacitor is connected with the voltage output node and the second voltage input node. When a clock controls the first MEMS switches group to turn on, and the second MEMS switches group and the third MEMS switches group to turn off, the flying capacitor is charged up through the first voltage input node and the second voltage input node. When the clock controls the first MEMS switches group to turn off, and the second MEMS switches group and the third MEMS switches group to turn on, the energy reserve capacitor is charged up through the flying capacitor and the second voltage input node. Through MEMS technology, miniaturization and integration of the charge pump are achieved, and power consumption is reduced, and energy conversion efficiency is improved. | 10-06-2011 |
20110241767 | CHARGE-PUMP CIRCUIT - The invention describes a charge-pump circuit ( | 10-06-2011 |
20110248776 | POWER SUPPLY HAVING A CHARGE PUMP CIRCUIT - Exemplary embodiments of a power supply can be provided. The exemplary power supply can include a voltage source which supplies a supply voltage; and a charge pump circuit supplied by the voltage source and configured to generate an output voltage at an output. The charge pump can include alternating first and second clock states. In the first clock state, a first charge pump capacitor can be disposed between the supply voltage and ground and can be charged to the supply voltage by the voltage source, and a second charge pump capacitor can be coupled in series between the voltage source and the output. In the second clock state, the first charge pump capacitor and the second charge pump capacitor can be connected in series such that the charged connection of the first charge pump capacitor the first clock state can be grounded and the second charge pump capacitor can be charged by the voltage source. | 10-13-2011 |
20110254615 | PLL CHARGE PUMP WITH REDUCED COUPLING TO BIAS NODES - A charge pump includes an UP current mirror and a DN current mirror. The UP current mirror is controlled by an input UP signal and supplies charge onto an output node. The DN current mirror is controlled by an input DN signal and draws charge from the output node. The input UP and DN signals may be received from a phase detector in a Phase-Locked Loop (PLL). To prevent disturbances on bias nodes of the UP and DN current mirrors that otherwise might occur, replica circuits of portions of the UP and DN current mirrors are provided. Each replica circuit is coupled to a bias node of a corresponding current mirror, but is controlled by an input signal of opposite polarity to the input signal that controls the current mirror so that the replica circuit creates disturbances that tend to counteract disturbances created by switching of the current mirror. | 10-20-2011 |
20110254616 | Boosting circuit of charge pump type and boosting method - A boosting circuit of charge pump type includes: charging portion for applying an input voltage to a first capacitor; double boosting portion for applying the input voltage to a second capacitor and applying a sum of the input voltage and a voltage across the first capacitor to an output capacitor in a first predetermined period after start of a boosting operation; and triple boosting portion for repeating in order, after end of the first predetermined period, a step of applying the sum of the input voltage and the voltage across the first capacitor to the second capacitor and a step of applying a sum of the voltage across the first capacitor and a voltage across the second capacitor to the output capacitor. | 10-20-2011 |
20110273225 | PULSE GENERATOR HAVING AN EFFICIENT FRACTIONAL VOLTAGE CONVERTER AND METHOD OF USE - Disclosed are systems and methods which provide voltage conversion in increments less than integer multiples of a power supply (e.g., battery) voltage. A representative embodiment provides power supply voltage multipliers in a binary ladder distribution to provide a desired number of output voltage steps using a relatively uncomplicated circuit design. By using different sources in various combinations and/or by “stacking” different sources in various ways, the voltage multiplier circuit may be used to provide desired voltages. In order to minimize the number of components used in a voltage converter of an embodiment, a capacitive voltage converter circuit uses one or more storage capacitors in place of pump capacitors in a voltage generation cycle. Also, certain embodiments do not operate to generate an output voltage until the time that voltage is needed. | 11-10-2011 |
20110279172 | Charge pump circuit - A charge pump circuit includes a switching circuit for providing a charge and discharge current, and a control circuit for controlling the switching circuit. The switching circuit includes a first switch for controlling the charging speed. The control circuit generates a signal for controlling the first switch based on the pulse width of the input signal. The charge pump circuit of the present invention quickens the locking time of the phase locked loop. | 11-17-2011 |
20110279173 | Controlled Charge Pump Arrangement and Method for Controlling a Clocked Charge Pump - A controlled charge pump comprises a clock operated charge pump having an output terminal to provide an output voltage. A first sub-circuit is coupled to the output terminal of the clocked operated charge pump and adapted to provide a first control signal in response to a comparison of the output voltage with a first reference signal. A second sub-circuit is coupled to the clocked operated charge pump and provides a second control signal in response to a comparison of a switch current within the clocked operated charge pump with a second reference signal. A clock skip controller is adapted to control the mode of operation of the clocked operated charge pump in response to that first and second control signals. | 11-17-2011 |
20110285455 | EXPONENTIAL VOLTAGE CONVERSION SWITCHED CAPACITOR CHARGE PUMP - Described herein are switched capacitor charge pump designs for a 2 | 11-24-2011 |
20110309877 | HIGH VOLTAGE CHARGE-PUMP WITH A NOVEL FEEDBACK CONTROL LOOP - A high voltage charge-pump having a feedback control loop is disclosed. The high voltage charge-pump includes a plurality of voltage boosting stages, a low voltage input, and at least one clock input. A sensing charge-pump having a voltage detector output has at least one voltage sensing stage that is communicably coupled to at least one of the plurality of voltage boosting stages. A loop filter in the feedback control loop includes a voltage detector input coupled to the voltage detector output, a voltage reference input, and a voltage error output. A voltage controlled oscillator (VCO) with a variable frequency output has a voltage error input coupled to the voltage error output. The feedback control loop also includes at least one driver having a variable frequency input coupled to the variable frequency output and at least one clock output coupled to the at least one clock input. | 12-22-2011 |
20110309878 | BOOST CIRCUIT - A boost circuit includes: first transistors connected in series between a voltage input node and a voltage output node to constitute a charge transfer circuit; and first capacitors, one ends of which are coupled to the respective connection nodes between the first transistors, the other ends thereof being applied with clocks with plural phases, wherein a gate of a certain stage transistor corresponding to one of the first transistors in the charge transfer circuit is coupled to a drain of another stage transistor corresponding to another one of the first transistors, which is disposed nearer to the voltage output node than the certain stage transistor and driven by the same phase clock as that of the certain stage transistor, the certain stage transistor being disposed nearer to the voltage output node than an initial stage transistor. | 12-22-2011 |
20110316617 | METHOD AND APPARATUS FOR FULL CLOCK CYCLE CHARGE PUMP OPERATION - A charge pump comprises at least one charge pump cell and control logic. The at least one charge pump cell is configured to receive a power supply voltage and provide a pump output voltage higher than the power supply voltage. The control logic is configured to receive an oscillator signal and a level detector enable signal, provide at least one cell clock signal, based on the oscillator signal, to the at least one charge pump cell, control the at least one pump cell to charge while the level detector enable signal is asserted, and control the at least one pump cell to continue to charge after the level detector enable signal is deasserted and until a full pulse cycle of the oscillator signal is completed. | 12-29-2011 |
20110316618 | SUB-STAGE FOR A CHARGE PUMP - A sub-stage ( | 12-29-2011 |
20120001682 | APPARATUSES AND METHODS TO REDUCE POWER CONSUMPTION IN DIGITAL CIRCUITS - An apparatus and method for reducing power consumption in digital circuits, particularly circuits including a charge pump. A driver may selectively drive a signal line, such as a memory device wordline, between a first voltage, which may be a voltage generated by the charge pump, and a different second voltage. A coupling circuit may be coupled between the signal line and the charge pump to selectively couple the signal line to the charge pump responsive to the signal line being driven from the first voltage to the second voltage. For example, the first voltage may be a voltage generated by the charge pump, and the second voltage may be a voltage having a lesser magnitude. As a result, the voltage on the signal line may be discharged into the charge pump when the voltage of the signal line transitions from the first voltage to the second voltage. | 01-05-2012 |
20120001683 | VOLTAGE LEVEL SHIFT CIRCUITS AND METHODS - In one embodiment, the present invention includes a charge pump circuit. The charge pump circuit comprises a plurality of terminals, a plurality of switches for selectively coupling the plurality of terminals, and a control circuit. A first input terminal receives a first reference voltage and a second input terminal receives a second reference voltage. First, second, third, and fourth flying capacitor terminals and the first and second input terminals are selectively coupled together in different configurations. The control circuit selects the switches to actuate according to a cycling of at least three phases of configuration. The cycling shifts the first and second reference voltages to provide dual power supply rails. | 01-05-2012 |
20120001684 | Systems and Methods for Minimizing Static Leakage of an Integrated Circuit - A leakage manager system for adequately minimizing static leakage of an integrated circuit is disclosed. The leakage manager system includes a generator configured to generate a control signal to be applied to a sleep transistor. A monitor is configured to determine whether to adjust the control signal to adequately minimize the static leakage. In some embodiments, the monitor includes an emulated sleep transistor. A regulator is configured to adjust the control signal depending on the determination. | 01-05-2012 |
20120001685 | CAPACITIVE CHARGE PUMP - One or more charge pumps may be used to amplify the output voltage from a chemically-sensitive pixel that comprises one or more transistors. A charge pump may include a number of track stage switches, a number of boost phase switches and a number of capacitors. The capacitors are in parallel during the track phase and in series during the boost phase, and the total capacitance is divided during the boost phase while the total charge remains fixed. Consequently, the output voltage is pushed up. | 01-05-2012 |
20120032731 | CHARGE PUMP DOUBLER - An integrated circuit includes a first PMOS transistor, where its drain is arranged to be coupled to a voltage output, and its source is coupled to the drain of a second PMOS transistor. The source of the second PMOS transistor is arranged to be coupled to a high power supply voltage. The source and drain of a MOS capacitor are coupled to the source of the first PMOS transistor. The drain of an NMOS transistor is coupled to the drain of the first PMOS transistor. The integrated circuit is configured to receive a voltage input to generate the voltage output having a maximum voltage higher than the voltage input. The gate oxide layer thickness of the MOS capacitor is less than that of the first PMOS transistor. | 02-09-2012 |
20120075009 | Charge Pump - A charge pump for transmitting energy and data has a primary side, a secondary side and a first coupling capacitance by way of which the primary side is connected to the secondary side, wherein the primary side is designed to periodically transmit energy in the form of a charge packet to the secondary side with the first coupling capacitance during a charge pump interval, the primary side being designed to impress an item of data on the charge pump interval by modulation, wherein the secondary side is designed to receive the item of data by demodulating the charge pump interval, wherein the secondary side is designed to impress an item of data on the charge pump interval by modulation, and wherein the primary side is designed to receive the item of data by demodulation of the charge pump interval. | 03-29-2012 |
20120092063 | Charge pump system for low-supply voltage - The present invention discloses a charge pump system for low-supply voltage including: a clock generator to generate a plurality of clock signals; a clock pump circuit coupled to said clock generator to generate high voltage; a level shifter coupled to said clock generator and said clock pump circuit to generate a plurality of HV (high voltage)-clock signals; a main pump circuit coupled to said clock generator and said level shifter to generate output voltage. | 04-19-2012 |
20120105137 | GATE VOLTAGE BOOSTING ELEMENT FOR CHARGE PUMP - Systems, methods, and devices that generate a desired boosted gate voltage to facilitate controlling a charge pump are presented. A multi-phase charge pump (e.g., two-phase CMOS charge pump) can comprise a desired number of switch cells (SCs), wherein each SC can include a gate boost switch control component, which employs two transistors (without the need for external circuitry), and generates a desired gate voltage, based at least in part on a desired clock signal, wherein the desired gate voltage is applied to a charge transfer switch, M | 05-03-2012 |
20120105138 | Circuit Charge Pump Arrangement and Method for Providing a Regulated Current - A power source arrangement comprises a controlled and clocked operated power source, that power source providing an output voltage out of a plurality of output voltages in response to a first multiplication factor. One or more regulated current sources are connected to the controlled and clocked operated power source to provide an output current to respective loads. Each of the one or more regulated current sources is adapted to provide a first indication signal upon a regulated operation of the respective current source. The power source arrangement further comprises a dummy power source as well as a dummy current source connected to the dummy power source. The dummy current source receives a load signal corresponding to a voltage drop over the loads connected to the one or more regulated current sources and provides a second indication signal in response thereto. A control circuit receives the respective first and second indication signal and provides the control signal to the controlled and clocked operated power source in response thereto. | 05-03-2012 |
20120119822 | Method for Modulating the Impedance of an Antenna Circuit - An electromagnetic transponder includes an antenna circuit capable of providing signals to a charge pump. The pump includes a first transistor connected to a first capacitor. The transponder also includes means for applying a voltage alternating between first and second values between the gate and the conduction terminal on the side of the first capacitor of the first transistor. | 05-17-2012 |
20120133424 | CHARGE PUMPS WITH IMPROVED LATCHUP CHARACTERISTICS - Some embodiments of the present disclosure relate to improved regulators for charge pumps. Such regulators selectively activate a charge pump based not only on the voltage output of the charge pump, but also on an series of wake-up pulses that are delivered at predetermined time intervals and which are delivered independently of the voltage output of the charge pump. Hence, these wake-up pulses prevent extended periods of time in which the charge pump is inactive, thereby helping to prevent latch-up in some situations. | 05-31-2012 |
20120133425 | BOOSTER CIRCUIT AND VOLTAGE SUPPLY CIRCUIT - A booster circuit includes a pump circuit having a plurality of charge pump circuits that output a boosted voltage. The booster circuit also includes a clock adjusting circuit that generates a second clock signal for operating the charge pump circuits from a first clock signal to a first output terminal. The booster circuit additionally includes a pump controlling circuit that outputs the first clock signal for operating the pump circuit, a first comparator that outputs a first output signal, a second comparator that outputs a second output signal, and a third comparator that outputs a third output signal. A gradient of the boosted voltage is decreased when the first output signal is output. A frequency of the first clock signal is reduced when the second output signal is output. The third output signal is output when the boosted voltage is higher than a set value of the boosted voltage. | 05-31-2012 |
20120139619 | HIGH VOLTAGE GENERATOR AND METHOD OF GENERATING HIGH VOLTAGE - A high voltage generator includes a negative bias generator configured to generate a negative bias, a clock generator configured to generate a clock signal that toggles between a positive bias and the negative bias, a clock doubling circuit configured to raise the positive bias of the clock signal and to output the clock signal having the raised positive bias as a second clock signal, and a charge pump configured to generate a high voltage using the second clock signal having the raised positive bias. | 06-07-2012 |
20120139620 | SUPPLY REGULATED CHARGE PUMP SYSTEM - An apparatus and a method for maintaining an output voltage of a charge pump circuit near a target voltage is disclosed. A regulated supply voltage is generated based on the output voltage of the charge pump. The regulated supply voltage is applied to a voltage input to the charge pump circuit and to a voltage input of a clock driver that provides a regulated clock signal to the charge pump circuit. | 06-07-2012 |
20120139621 | VOLTAGE SUPPLY CIRCUIT AND INTEGRATED CIRCUIT INCLUDING THE SAME - A voltage supply circuit includes a pump voltage generator for generating an input voltage by changing a power source voltage to a desired level and changing a level of the input voltage according to a rising time of an operating voltage. | 06-07-2012 |
20120139622 | SEMICONDUCTOR APPARATUS VOLTAGE SUPPLY CIRCUIT - A voltage supply circuit includes, inter alia, a clock generator, a negative voltage pump, a level shifter, a clock controller, and a pump circuit. The clock generator generates a first clock swinging between a positive voltage and a ground voltage. The negative voltage pump generates a negative voltage. A level shifter shifts the first clock by the negative voltage to output a second clock swinging between the negative voltage and the ground voltage. The clock controller generates a third clock by inverting the second clock and also generates a fourth clock by inverting the third clock. The pump circuit generates a high voltage according to the third and fourth clocks. | 06-07-2012 |
20120154022 | Charge Pump System that Dynamically Selects Number of Active Stages - A multi-stage charge pump selects the number of active stages dynamically. In the exemplary embodiment, this is done by having a multi-stage master charge pump section in which the number of active stages is settable and a slave charge pump section that is of the same design as the master section. The master section is used drive the external load, while the slave section drives an adjustable internal load. The adjustable load is set by control logic by comparing the operation of the two sections. The control logic then operates the slave sections with a different number of active stages than the master stage in order to determine whether the master stage is using the optimal number of active stages. The control logic can then change the number of active stages accordingly. | 06-21-2012 |
20120154023 | Charge Pump Systems with Reduction in Inefficiencies Due to Charge Sharing Between Capacitances - Improvements in the efficiency of two charge pump designs are presented. As a charge pump switches between modes, capacitances are charged. Due to charge sharing between capacitances, inefficiencies are introduced. Techniques for reducing these inefficiencies are presented for two different charge pump designs are presented. For a clock voltage doubler type of pump, a four phase clock scheme is introduced to pre-charge the output nodes of the pump's legs. For a pump design where a set of capacitances are connected in series to supply the output during the charging phase, one or more pre-charging phases are introduced after the reset phase, but before the charging phase. In this pre-charge phase, the bottom plate of a capacitor is set to the high voltage level prior to being connected to the top plate of the preceding capacitor in the series. | 06-21-2012 |
20120154024 | INTERNAL NEGATIVE VOLTAGE GENERATION DEVICE - An internal negative voltage generation device includes a first internal negative voltage generation block configured to generate a first internal negative voltage which is lower than a ground voltage; a second internal negative voltage generation block configured to generate a second internal negative voltage according to the first internal negative voltage, the second internal negative voltage being higher than the first internal negative voltage and lower than the ground voltage; and an initial driving block configured to additionally drive a second internal negative voltage terminal to the first internal negative voltage during an initial set time interval of an active operation time interval. | 06-21-2012 |
20120161857 | CHARGE PUMP CIRCUIT - A charge pump circuit includes first to fifth transistors disposed between a power supply terminal and an output terminal; first to fourth capacitive components between the junctions of the first to fifth transistors and one of first and second clock input terminals; sixth to tenth transistors between the power supply terminal and the output terminal; and fifth to eighth capacitive components between the junctions of the sixth to tenth transistors and one of the first and second clock input terminals. The conduction state of the fifth transistor is controlled according to the potential of a first node. The conduction state of the tenth transistor is controlled according to the potential of a second node. Each transistor is disposed on a triple well, and an n-well and a p-well are electrically coupled to each other in at least the triple wells forming the first to fourth and six to ninth transistors. | 06-28-2012 |
20120161858 | CAPACITOR BALANCING CIRCUIT AND CONTROL METHOD FOR AN ELECTRONIC DEVICE SUCH AS A MULTILEVEL POWER INVERTER - A method of balancing voltages in a group of capacitors of a power electronic device, such as a multilevel power inverter, includes making a balancing determination regarding whether to (i) inject energy into the selected one of the capacitors from an energy storage element, or (ii) extract energy from the selected one of the capacitors into the energy storage element based on the voltage of a selected one of the capacitors, and either injecting energy into the selected one of the capacitors from the energy storage element, or extracting energy from the selected one of the capacitors into the energy storage element based on the balancing determination. Also, a voltage balancing circuit that implements the method. In one particular implementation, a spatial second derivative algorithm is used. In another particular implementation, a comparison to an average capacitor voltage is used. | 06-28-2012 |
20120169404 | Exponential Charge Pump - An exponential multistage charge pump is disclosed. Node voltages in a pumpcell in one stage of the charge pump are used to control operation of clock drivers in a subsequent stage of the charge pump, thereby eliminating the need for level shifters. | 07-05-2012 |
20120169405 | METHOD AND APPARATUS FOR GENERATING VOLTAGE - An apparatus for generating an output voltage includes a boosting circuit configured to generate the output voltage by boosting an input voltage based on a boosting rate, and a pump level controller configured to control the boosting rate in response to the input voltage. | 07-05-2012 |
20120169406 | CHARGE PUMP AND DRIVER INTEGRATED CIRCUIT USING THE SAME - A charge pump including an output terminal, an external capacitor, and a switch module is provided. The output terminal is coupled to an internal capacitor disposed inside an integrated circuit (IC). The external capacitor is disposed outside the IC. The switch module, coupled to the external capacitor and the internal capacitor configured to control the external capacitor and the internal capacitor to charge and discharge by turns. In a first operating period, the switch module controls the external capacitor to charge without providing current to the output terminal, and controls the internal capacitor to discharge to the output terminal. | 07-05-2012 |
20120169407 | VOLTAGE GENERATOR AND NONVOLATILE MEMORY DEVICE INCLUDING THE SAME - A voltage generator includes a high voltage generator configured to include a plurality of pump circuits for generating various levels of a high voltage in response to clock signals, wherein the plurality of pump circuits are configured to receive enable signals corresponding to a level of voltage to be generated, where the enable signals are generated in response to internal operation signals. And a clock transfer circuit configured to generate a clock enable signal by comparing the high voltage and a reference voltage and to selectively provide the clock signals to each of the pump circuits in response to the clock enable signal and each of the enable signals. | 07-05-2012 |
20120169408 | VOLTAGE BOOSTER - A voltage booster device may include a plurality of multiplication stages arranged in a sequence so that an input terminal of each multiplication stage, with the exception of a first multiplication stage, is connected to an output terminal of a previous multiplication stage. Each multiplication stage may include pumping circuitry for accumulating an electric charge proportional to a pump voltage value of the multiplication stage. Each multiplication stage may also include a phase signal generating circuit for switching the multiplication stages between a transfer phase and a maintaining phase. In at least one of the stages, the pumping circuitry may include at least two series connected charge accumulators. A terminal may be shared between the charge accumulators and may be connected through biasing circuitry to an output terminal of a previous multiplication stage for forcing the charge accumulators within a threshold potential drop value. | 07-05-2012 |
20120169409 | CHARGE PUMP CIRCUITS, SYSTEMS, AND OPERATIONAL METHODS THEREOF - A charge pump circuit includes at least one stage between an input end and an output end. The at least one stage includes a first CMOS transistor coupled with a first capacitor and a second CMOS transistor coupled with a second capacitor. The at least one stage is capable of receiving a first timing signal and a second timing signal for pumping an input voltage at the input end to an output voltage at the output end. During a transitional period of the first timing signal and the second timing signal, the at least one stage is capable of substantially turning off at least one of the first CMOS transistor and the second CMOS transistor for substantially reducing leakage currents flowing through at least one of the first CMOS transistor and the second CMOS transistor. | 07-05-2012 |
20120194263 | CHARGE PUMP AND METHOD OF BIASING DEEP N-WELL IN CHARGE PUMP - A charge pump has at least one charge pump stage. Each charge pump stage includes at least one NMOS device. The at least one NMOS device has a deep N-well (DNW), and is coupled to at least one capacitor, an input node, and an output node. The input node is arranged to receive an input signal. The at least one capacitor is arranged to store electrical charges. The charge pump stage is configured to supply the electrical charges to the output node, and the DNW is arranged to float for a positive pump operation. | 08-02-2012 |
20120200340 | CHARGE PUMP - Traditionally, charge pumps, which used flying capacitors, were limited to a maximum divide ratio of N+1 (where N is the number of flying capacitors). Here, however, a charge pump has been provided that allows for a dramatically increased divide ratio. Specifically, several switched capacitor circuits (which are controlled by a driver) allow for flying capacitors to be arranged to provide a maximum divide ratio of 3·2 | 08-09-2012 |
20120200341 | LOCKED LOOPS, BIAS GENERATORS, CHARGE PUMPS AND METHODS FOR GENERATING CONTROL VOLTAGES - Locked loops, bias generators, charge pumps and methods for generating control voltages are disclosed, such as a bias generator that generates bias voltages for use by a clock signal generator, such as a voltage controlled delay line, in a locked loop having a phase detector and a charge pump. The charge pump can either charge or discharge a capacitor as a function of a signal from the phase detector to generate a control voltage. The bias generator can receive the control voltage from the capacitor, and it generates bias voltages corresponding thereto. A portion of the bias generator can have a topography that is substantially the same as at least a portion of the topography of the charge pump. As a result, it can cause the charge pump to charge the capacitor at the same rate that it discharges the capacitor over a relatively wide range of control voltages. | 08-09-2012 |
20120218032 | HIGH EFFICIENCY NEGATIVE REGULATED CHARGE-PUMP - A charge-pump circuit for providing a regulated negative voltage is disclosed. The charge-pump circuit includes at least one flying capacitor stage having a capacitor with a first terminal selectively coupled between a negative voltage input through a first electronic switch and a negative voltage output through a second electronic switch. A second terminal of the capacitor is selectively coupled between a fixed voltage node through a third electronic switch and an error signal input through a fourth electronic switch. A positive voltage source is coupled to the negative voltage output through a feedback network. A feedback amplifier having an error signal output, a reference voltage input, and a feedback input is coupled to the feedback network. A switch controller having a first clock output drives the first electronic switch and the third electronic switch, while a second clock output drives the second electronic switch and the fourth electronic switch. | 08-30-2012 |
20120223766 | INTEGRATED CIRCUITS WITH BI-DIRECTIONAL CHARGE PUMPS - Integrated circuits such as memory arrays are coupled to a bi-directional charge pump that includes an input circuit and output circuit, and one or more pump stages coupled between the input circuit and the output circuit of the bi-directional charge pump. The output circuit includes a diode having an input and output and a transistor connected to the output of the diode and a ground potential. The input of the diode is electrically connected to the pump stages in a configuration that allows the charge pump to apply a positive or negative voltage to the memory array or other load. | 09-06-2012 |
20120235730 | CHARGE PUMP SURGE CURRENT REDUCTION - Techniques for reducing surge current in charge pumps. In an exemplary embodiment, one or more switches coupling a terminal of a flying capacitor to a voltage supply are configured to have variable on-resistance. When the charge pump is configured to switch a gain mode from a lower gain to a higher gain, the one or more variable resistance switches are configured to have a decreasing resistance profile over time. In this manner, surge current drawn from the voltage supply at the outset of the gain switch may be limited, while the on-resistance during steady-state charging and discharging may be kept low. Similar techniques are provided to decrease the surge current from a bypass switch coupling the supply voltage to a positive output voltage of the charge pump. | 09-20-2012 |
20120242400 | HIGH-VOLTAGE MEMS APPARATUS AND METHOD - A high-voltage MEMS system compatible with low-voltage semiconductor process technology is disclosed. The system comprises a MEMS device coupled to a high-voltage bias generator employing an extended-voltage isolation residing in a semiconductor technology substrate. The system avoids the use of high-voltage transistors so that special high-voltage processing steps are not required of the semiconductor technology, thereby reducing process cost and complexity. MEMS testing capability is addressed with a self-test circuit allowing modulation of the bias voltage and current so that a need for external high-voltage connections and associated electro-static discharge protection circuitry are also avoided. | 09-27-2012 |
20120242401 | PHASED-ARRAY CHARGE PUMP SUPPLY - A charge pump system and method that may provide large supply voltages and currents with reduced ripple voltage at reduced ripple frequency. The charge pump system may include an array of charge pumps and a delay pipeline. The array of charge pumps may include a plurality of charge pumps. The delay pipeline may include a plurality of delay elements. The delay elements may respond to a global trigger signal to output a trigger signal to the array of charge pumps. Respective charge pumps may fire in response to the trigger signal. | 09-27-2012 |
20120249223 | HIGH EFFICIENCY REGULATED CHARGE PUMP - Described herein are systems and methods for creating high efficiency regulated charge pumps. In an exemplary embodiment, a Dickson charge pump is combined with a low voltage amplifier to create an effective class G amplifier with high voltage outputs that achieves very high power efficiency. The charge pump capacitors are alternately driven by either the charge pump circuit or a low voltage amplifier which uses negative feedback from one or more high voltage outputs to give closed loop regulation. | 10-04-2012 |
20120249224 | DUAL MODE CHARGE PUMP - A dual mode charge pump is operable in a first mode or a second mode for providing positive and negative output voltages that can be stabilized by adjusting the charging time of two terminals of a flying capacitor or by adjusting the charging/discharging time of the positive and negative voltage output terminals. The dual mode charge pump can apply to a much wider input supply voltage range with less numbers of power switches, thus requiring less die area and lower costs. Moreover, the dual mode charge pump can precisely define a common mode voltage, thus making the common voltage drift smaller and less load dependent, especially when the output supply voltages are under different load conditions. | 10-04-2012 |
20120249225 | CHARGE PUMP CIRCUIT - There is provided a charge pump circuit which can prevent EMI noise of a frequency component independent of an operation clock frequency from occurring at the time of a change from a disable state to an enable state. The charge pump circuit includes a detection signal synchronization circuit which outputs a synchronization detection signal generated by synchronizing a detection signal outputted from a level detection circuit to a clock signal outputted from an oscillator circuit. The synchronization detection signal is used as a pump enable signal, and a first pump capacitance and a second pump capacitance in a pump circuit body are charged and discharged in response to the synchronization detection signal and the clock signal outputted from the oscillator circuit. | 10-04-2012 |
20120256681 | CHARGE PUMP - A charge pump circuit comprises a first node, a second node, and at least one capacitance stage coupled between the first node and the second node. Capacitance stages of the at least one capacitance stage are coupled in series. A capacitance stage of the at least one capacitance stage includes a capacitive device and a voltage limiter coupled in parallel with the capacitor. The voltage limiter is configured to limit a voltage dropped across the capacitor. The capacitive device and the voltage limiter are configured such that a first current flowing through a first branch having the voltage limiter is more than a second current flowing through a second branch having the capacitive device. | 10-11-2012 |
20120262224 | CHARGE PUMP DEVICE - A charge pump device is coupled to first and second input terminals receiving an AC signal and comprises an electric switch set and two voltage boost circuits. The electric switch set is coupled to the first and second input terminals and a ground terminal and switches the conduction status thereof according to the AC signal. The two voltage boost circuits are interconnected and coupled to the first and second input terminals and the electric switch set. The boost circuits receive the AC signal according to the conduction status, respectively boost voltage in positive and negative semi-periods of the AC signal, and alternatively output a voltage at least two times the peak voltage of the AC signal, to a load. The present invention not only boosts voltage by several folds within a cycle but also outputs voltage by dual phases to reduce ripple of output voltage. | 10-18-2012 |
20120262225 | BOOST CIRCUIT - A boost circuit includes: first transistors connected in series between a voltage input node and a voltage output node to constitute a charge transfer circuit; and first capacitors, one ends of which are coupled to the respective connection nodes between the first transistors, the other ends thereof being applied with clocks with plural phases, wherein a gate of a certain stage transistor corresponding to one of the first transistors in the charge transfer circuit is coupled to a drain of another stage transistor corresponding to another one of the first transistors, which is disposed nearer to the voltage output node than the certain stage transistor and driven by the same phase clock as that of the certain stage transistor, the certain stage transistor being disposed nearer to the voltage output node than an initial stage transistor. | 10-18-2012 |
20120262226 | SWITCHED CAPACITOR VOLTAGE CONVERTERS - An on-chip voltage conversion apparatus for integrated circuits includes a first capacitor; a first NFET device configured to selectively couple a first electrode of the first capacitor to a low side voltage rail of a first voltage domain; a first PFET device configured to selectively couple the first electrode of the first capacitor to a high side voltage rail of the first voltage domain; a second NFET device configured to selectively couple a second electrode of the first capacitor to a low side voltage rail of a second voltage domain, wherein the low side voltage rail of the second voltage domain corresponds to the high side voltage rail of the first voltage domain; and a second PFET device configured to selectively couple the second electrode of the first capacitor to a high side voltage rail of the second voltage domain. | 10-18-2012 |
20120268196 | REGULATORS REGULATING CHARGE PUMP AND MEMORY CIRCUITS THEREOF - A regulator for regulating a charge pump is provided. The regulator includes a comparator having a first input end capable of receiving a first voltage and a second input end capable of receiving a second voltage for determining enabling or disabling the charge pump. The first voltage is associated with an output voltage of the charge pump. The second voltage is associated with an internal power voltage and a reference voltage V | 10-25-2012 |
20120274392 | ADAPTIVE CHARGE PUMP - A method of adaptively controlling a charge pump including coupling the charge pump to a control node, toggling a clock input between supply voltage levels to charge an a charge pump output, monitoring the charge pump output, maintaining the control node at a supply voltage level when a supply voltage magnitude does not exceed a threshold level, and adjusting the control node to maintain the charge pump output at a limit level when the supply voltage magnitude exceeds the threshold level. A positive charge pump embodiment charges the output to twice the positive supply voltage up to no more than a limit level. A negative charge pump embodiment charges the output to the same magnitude with opposite polarity as the positive supply voltage, and decreases the output magnitude if the positive supply voltage is above the threshold level. A Zener diode and controlled current mirror may be used for control. | 11-01-2012 |
20120274393 | DYNAMIC BIASING CIRCUIT FOR A PROTECTION STAGE USING LOW VOLTAGE TRANSISTORS - A biasing circuit may include an input configured to receive a supply voltage, a value of which is higher than a limit voltage. The biasing circuit may also include a control stage configured to generate first and second control signals with mutually complementary values, equal alternatively to a first value, in a first half-period of a clock signal, or to a second value, in a second half-period of the clock signal. The first and second values may be a function of the supply and limit voltages. The biasing circuit may also include a biasing stage configured to generate a biasing voltage as a function of the values of the first and second control signals. The first and second control signals may control transfer transistors for transferring the supply voltage to respective outputs, while the biasing voltage may be for controlling protection transistors to reduce overvoltages on the transfer transistors. | 11-01-2012 |
20120274394 | CHARGE PUMP FEEDBACK CONTROL DEVICE AND METHOD USING THE SAME - Charge pump feedback control device and method are provided. The device is coupled to the charge pump unit which receives an input voltage so as to generate an output voltage and has switches and at least one capacitor, the device includes: a compensation unit, a modulation unit, and a phase control unit. The compensation unit receives the output voltage, compensates the output voltage for stability, and generates an error signal. The modulation unit receives the error signal, modulates the error signal, and correspondingly generates a modulation signal. The phase control unit receives the modulation signal so as to generate phase signal, and controls the plurality of switches of the charge pump unit according to the plurality of phase signal so as to generate the output voltage through the input voltage charging/discharging at least one capacitor of the charge pump unit. | 11-01-2012 |
20120280744 | CHARGE PUMP CIRCUIT - A charge pump circuit includes a charge generation circuit, a tracking circuit, a replica circuit, and a main charge pump. The main charge pump generates a charge current and a discharge current to a subsequent loop filter according to a UP signal and a DOWN signal. The replica circuit generates a first voltage in response to the current values of the first current source and the second current source of the main charge pump. The tracking circuit adjusts the current values of the first current source and the second current source of the main charge pump according to the first voltage and a second voltage, wherein the second voltage is in response to a voltage of an output node of the main charge pump. | 11-08-2012 |
20120286854 | High Voltage Ring Pump - A multi-stage device for boosting an input voltage is discussed. Each stage of the device comprises a stage of a ring oscillator and a charge pump. An oscillating signal, generated by the ring oscillator within the device, drives the charge pump in each stage of the device. The charge pumps of the stages are serially connected. A final stage of the multi-stage device is adapted to provide voltage to a load circuit. The multi-stage device is applicable for generation of different bias voltages from one or more source voltages. | 11-15-2012 |
20120293243 | SEMICONDUCTOR DEVICE INCLUDING BOOSTING CIRCUIT - According to one embodiment, a semiconductor device includes the following configuration. A control circuit controls an output voltage to a predetermined voltage, based on a monitor voltage configured to monitor the output voltage. A switch circuit sets the output voltage to first and second voltages in first and second operation states, respectively. The second voltage is higher than the first voltage. A clock driver generates a clock signal that includes a voltage level of the output voltage as an amplitude thereof. A charge pump is formed by connecting unit circuits in series and at multiple stages. Each of the unit circuits includes a capacitor and a diode. The charge pump boosts an input voltage by the clock signal that is inputted to the capacitor. | 11-22-2012 |
20120293244 | CHARGE PUMP CIRCUITS AND METHODS - Embodiments of the present invention include charge pump circuits and methods. In one embodiment, a first charge pump receives a voltage and generates a first charge pump output voltage and current for supplying the power requirements of a circuit. A second charge pump is coupled in series with the first charge pump. The second charge pump generates a second charge pump output voltage and current for supplying different power requirements of the circuit. In one embodiment, the first charge pump provides a high current low voltage output to a first circuit and the second charge pump provides a low current high voltage output to a second circuit. Capacitors of the first charge pump may be external to an integrated circuit and capacitors of the second charge pump may be internal to the integrated circuit. | 11-22-2012 |
20120299642 | CHARGE PUMP CIRCUIT, CONTROL METHOD THEREOF, AND SEMICONDUCTOR INTEGRATED CIRCUIT - There is provided a charge pump circuit suited for reducing the power consumption. A capacitor | 11-29-2012 |
20120313694 | INTERNAL VOLTAGE GENERATION CIRCUIT AND OPERATION METHOD THEREOF - An internal voltage generation circuit includes a pumping voltage generator including a plurality of pump units and configured to generate a final pumping voltage of a target voltage level, and an activation controller configured to control the number of activated pump units among the pump units based on the target voltage level. | 12-13-2012 |
20120313695 | High Voltage Tolerant Inverting Charge Pump - The present invention provides a high voltage tolerant regulated inverting charge pump circuit utilizing low-voltage semiconductor devices, capable of operation directly from a high voltage source. The circuit according to the present invention comprises a plurality of high voltage tolerant pre-driver circuits, connected to the high voltage source, for driving the charge pump low voltage switching devices appropriately for reliable operation. A flying capacitive element connected to the high voltage source through a plurality of low voltage semiconductor devices acting as a switch, peak current limiter, and cascode device. An output capacitive element connected to the flying capacitive element through a plurality of low voltage semi-conductor devices acting as a switch, peak current limiter, regulating element and cascode device. Further, the circuit of the present invention comprises a negative feedback controller connected to the output capacitor to regulate the output voltage over a wide range of load current. | 12-13-2012 |
20120319762 | POWER SWITCH - A method for switching between first and second voltages is provided. Initially, a first voltage is provided from a first input terminal to an output terminal through a first MOS transistor, and the first MOS transistor is deactivated. A back-gate of a second MOS transistor is shorted to the output terminal in response to the deactivation of the first MOS transistor and after a settling interval, and the second MOS transistor is activated while its back-gate is shorted to the terminal so as to provide a second voltage from a second input terminal to the output terminal. | 12-20-2012 |
20120326770 | BOOSTING CIRCUIT - A boosting circuit, includes an output circuit including a first transmission circuit, transmitting charges of a first boosting node to a first output node according to a first transmission control signal, a detection circuit, detecting the voltage level of the first output node, and a pre-charge circuit pre-charging the first boosting node according a detection signal of the detection circuit; a first pump circuit includes a second transmission circuit, transmitting charges to a second output node according to a second transmission control signal, and a first capacitance unit, coupled to the first boosting node, boosting the voltage level of the first boosting node according to charges transmitted in the second output node; and a control circuit, coupled to the output circuit and the first pump circuit, controls the second transmission control signal according to the voltage level of the first output node. | 12-27-2012 |
20120326771 | CHARGE PUMP CIRCUIT AND METHODS OF OPERATION THEREOF - A method of generating a voltage supply (Vout+, Vout−) from a single input supply (+V | 12-27-2012 |
20130002343 | HIGH VOLTAGE REGULATION IN CHARGE PUMPS - High voltage regulation in charge pumps. A circuit includes a voltage regulator with a first input in communication with a reference voltage. The circuit also includes a data latch having a signal input coupled to receive an output of the voltage regulator and coupled to receive a clock input from a clock source. The circuit further includes a delay circuit having an input coupled to receive the clock input from the clock source. Further, the circuit includes a logic gate having a first input coupled with an output of the data latch and a second input coupled with an output of the delay circuit. Moreover, the circuit includes a charge pump having an input coupled with an output of the logic gate and an output coupled with a second input of the voltage regulator. The output of the charge pump provides an output voltage. | 01-03-2013 |
20130009696 | Triple mode charge-pump - Systems and methods to achieve a charge pump for generating from a single input supply voltage Vdd in three modes efficient output supply voltages having a value of 2×Vdd, ½ Vdd, and inverted Vdd. The charge pump requires 8 switches and one flying capacitor only. | 01-10-2013 |
20130027120 | Standby Charge Pump System - In one aspect, a charge pump output of a charge pump is coupled to a capacitor of a voltage shifter. The output of the voltage shifter causes pump control logic to enable the charge pump. In another aspect, a transistor in saturation has a drain terminal coupled to a charge pump output and a source terminal coupled to an output mode providing a word line read voltage. | 01-31-2013 |
20130027121 | SEMICONDUCTOR INTERATED CIRCUIT - A semiconductor integrated circuit includes a first pad configured to receive a first voltage, a second pad configured to receive a second voltage, an internal voltage generation circuit configured to generate a third voltage having the same voltage level as the first voltage in response to the second voltage during a test mode, and an internal circuit configured to perform a normal operation using the first voltage and the second voltage during a normal mode and perform a test operation using the second voltage and the third voltage during the test mode. | 01-31-2013 |
20130038381 | Charge Pump Systems with Reduction in Inefficiencies Due to Charge Sharing Between Capacitances - Improvements in the efficiency of two charge pump designs are presented. As a charge pump switches between modes, capacitances are charged. Due to charge sharing between capacitances, inefficiencies are introduced. Techniques for reducing these inefficiencies are presented for two different charge pump designs are presented. For a clock voltage doubler type of pump, a four phase clock scheme is introduced to pre-charge the output nodes of the pump's legs. For a pump design where a set of capacitances are connected in series to supply the output during the charging phase, one or more pre-charging phases are introduced after the reset phase, but before the charging phase. In this pre-charge phase, the bottom plate of a capacitor is set to the high voltage level prior to being connected to the top plate of the preceding capacitor in the series. | 02-14-2013 |
20130043930 | CHARGE PUMP - A charge pump exhibiting a voltage compensation function is provided. The charge pump includes: a first current generator, a first semiconductor device, a second current generator, a second semiconductor device, and a voltage regulator. The voltage regulator dynamically adjusts a voltage level at the gate of the first or second semiconductor device so as to adjust a first current or a second current outputted to a current output node. In addition, the voltage regulator provides a bias voltage at the current output node when both the first and second semiconductor devices are turned off. | 02-21-2013 |
20130043931 | SINGLE CHARGE-PUMP BUCK-BOOST FOR PROVIDING INDEPENDENT VOLTAGES - Disclosed is a charge pump having first and second outputs and at least one capacitor. A plurality of switches are coupled to the at least one capacitor for selectively coupling the at least one capacitor between a high voltage node and a low voltage node, and for selectively coupling the at least one capacitor to the first output and the second output. A switch controller is adapted to generate control signals for the plurality of switches to selectively couple the at least one capacitor between the high voltage node and the low voltage node during charging, and to selectively couple the at least one capacitor to the first output and the second output during discharging that output a first voltage pulse from the first output and a second voltage pulse from the second output such that the first voltage pulse and the second voltage pulse are asymmetrical and coincidental. | 02-21-2013 |
20130043932 | CHARGE-PUMP SYSTEM FOR PROVIDING INDEPENDENT VOLTAGES - Disclosed is a charge pump system having a charge pump with a switch control input, a voltage output terminal, a high voltage terminal coupled to a high voltage node and a low voltage terminal coupled to a low voltage node. Also included is a first buck/boost switch having a first terminal coupled to the voltage output terminal, a second terminal coupled to a first output node, and a first control terminal for receiving a first control signal. A second buck/boost switch includes a first terminal coupled to the voltage output terminal, a second terminal coupled to a second output node, and a control terminal for receiving a second control signal. Further included is a switch controller that is adapted to generate the first control signal and the second control signal such that voltage pulses output from the first output node and the second output node, respectively, are asymmetrical and coincidental. | 02-21-2013 |
20130043933 | INTERNAL VOLTAGE GENERATOR AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME - A semiconductor device including an internal voltage generator circuit that provides an internal voltage having a different level depending on the operation speed is provided. The semiconductor device includes an internal voltage generator circuit configured to receive operation speed information to generate an internal voltage having a different level depending on the operation speed; and an internal circuit operated using the internal voltage. | 02-21-2013 |
20130069711 | CHARGE PUMP SYSTEM CAPABLE OF STABILIZING AN OUTPUT VOLTAGE - A charge pump system includes a charge pump, a ring oscillator, a comparing circuit and a discharge circuit. When an output voltage of the charge pump is relatively low, the comparing circuit turns on the ring oscillator to make the ring oscillator provide an oscillation output to the charge pump to raise the output voltage of the charge pump. When the output voltage of the charge pump is relatively high, the comparing circuit turns off the ring oscillator to stop the ring oscillator from providing the oscillation output to the charge pump, the comparing circuit also makes the discharge circuit provide a discharge path to the charge pump to quickly reduce the output voltage of the charge pump. | 03-21-2013 |
20130076432 | HIGH VOLTAGE CHARGE PUMP REGULATION SYSTEM WITH FINE STEP ADJUSTMENT - A regulator system for a charge pump system divides the binary decoding into two branches. One controls a set of parallel connected resistors for fine output voltage steps. The other branch controls a serial resistor to provide the large step size. For example, a 9-bit digital input signal is split into 2 least significant for the fine adjustment and the other 7 bits for the larger adjustments. In the example of a 50 mV step size, in one current path 2 bits of the binary input then control two parallel resistors for 50 mV and 100 mV step size, and in the other current path 7 bits are used for one-hot-decode control serial resistors to provide a 200 mV step size. A unity gain operational amplifier and a high voltage device are added in between the two branches to decouple the parasitic capacitance of large parallel resistors from the other elements. | 03-28-2013 |
20130093503 | HIGH CURRENT DRIVE SWITCHED CAPACITOR CHARGE PUMP - Systems, methods, and devices that employ a dynamic gate boost component (DGBC) to generate a desired boosted gate voltage to facilitate controlling an enhanced charge pump are presented. An enhanced charge pump can comprise a desired number of charge transfer switches (CTSs) and a desired number of DGBCs, wherein a DGBC can apply a desired boosted gate voltage to the gate of an associated CTS to control switching of the CTS. An auxiliary gate boost component (AGBC) of one circuit path can apply a desired boosted gate voltage to a CTS of another circuit path to control switching of that CTS. The AGBC and DGBC can operate to facilitate maintaining the overdrive voltages of all of the CTSs in the enhanced charge pump so that the overdrive voltages are essentially unchanged under various loading current conditions. Multiple enhanced charge pumps can be cascaded to produce a higher output voltage. | 04-18-2013 |
20130099852 | CHARGE PUMP CIRCUIT WITH LOW CLOCK FEED-THROUGH - A charge pump circuit includes a first comparator, a PMOS tuner, a first current mirror, a first NMOS transistor, a first PMOS switch, an NMOS tuner, a second current mirror, a first PMOS transistor and a first NMOS switch. The first PMOS switch is coupled between the PMOS tuner and a first output PMOS transistor of the first current mirror, thus the parasitic capacitor formed between the gate and the drain of the first PMOS switch, the parasitic capacitor formed between the gate and the source of the first output PMOS transistor, and the parasitic capacitor formed between the gate and the drain of the first output PMOS transistor are equivalently coupled in series, lowering the capacitance between the PMOS tuner and the charge pump output, and reducing the clock feed through and the charge injection effect in the charge pump circuit. | 04-25-2013 |
20130113546 | Master-slave low-noise charge pump circuit and method - Charge pump circuitry ( | 05-09-2013 |
20130127522 | SYSTEM AND METHOD FOR GENERATING ABRITRARY VOLTAGE WAVEFORMS - An electrical system for generating arbitrary voltage waveform includes a power supply unit for providing a supply voltage to the electrical system. One or more charge pumps are in electrical communication with the power supply unit. Each charge pump generates a voltage. The electrical system also includes a plurality of switches, a first switch among the plurality of switches coupled between a ground and an output terminal, other switches among the plurality of switches coupled between the one or more charge pumps and the output terminal. A control circuit is in electrical communication with the power supply unit, the plurality of switches and the one or more charge pumps, and is operable to control the voltage generated by the each charge pump and the plurality of switches. Voltages from the one or more charge pumps additively result in a variable output voltage that generates an arbitrary voltage waveform. | 05-23-2013 |
20130127523 | DEVICE AND METHOD FOR PROVIDING POWER TO A MICROCONTROLLER - A charge pump device and method for providing power to a microcontroller where the voltage required to operate the microcontroller (VCCmin) is greater than the voltage of the power source, which may be a single galvanic cell. The invention utilizes a flying capacitor circuit having a flying capacitor, and a supply capacitor connected to the power supply terminal of the microcontroller. The invention utilizes firmware that runs on the microcontroller and which controls the flying capacitor circuit to repeatedly switch the flying capacitor from being connected in series with the power source to being connected in parallel with the power source so as to maintain the voltage provided to the microcontroller at a level of at least VCCmin. | 05-23-2013 |
20130147543 | Apparatus and Method for Fractional Charge Pumps - An embodiment apparatus comprises a plurality of flying capacitors coupled between a dc input power source and an output capacitor and switching circuitry coupled to the plurality of flying capacitors. The switching circuitry is configured such that in a first operational phase, the dc input power source and the plurality of flying capacitors in a first capacitor configuration are stacked together and further coupled to the output capacitor and in a second operational phase, the plurality of flying capacitors in a second capacitor configuration are coupled between ground and the output capacitor. | 06-13-2013 |
20130154720 | CONSTANT VGS SWITCH - This document discusses, among other things, a signal switch circuit including a first field effect transistor (FET) configured to couple a first node to a second node in an on-state and a charge pump circuit configured to provide a first supply voltage to control the FET, wherein a reference voltage of the charge pump circuit is coupled to a well of the FET to maintain a constant gate to source voltage of the FET during the on-state. | 06-20-2013 |
20130162334 | NEGATIVE CHARGE PUMP - Generally, this disclosure provides negative charge pump circuitry that is configured to supply a voltage that is less than a reference voltage (such as ground). The charge pump circuitry includes blocking circuitry that reduces or eliminates charge leakage so that a negative voltage may be developed at the output. The charge pump circuitry generally includes complimentary pairs of MOS switches that switch in a complimentary fashion according to charge developed on complimentary capacitors to provide a negative voltage power supply. | 06-27-2013 |
20130162335 | CHARGE PUMPING APPARATUS USING OPTIMUM POWER POINT TRACKING AND METHOD THEREOF - A charge pumping apparatus includes a voltage pumping unit for pumping an input voltage, a voltage pumping control unit for controlling the voltage pumping unit according to a comparison result between the input voltage and an input criterion voltage and a comparison result between an output voltage output from the voltage pumping unit and an output criterion voltage, and an optimum power point tracking unit for tracking an optimum power point in the case of detecting that the output voltage decreases lower than the output criterion voltage, and adjusting an input impedance to change the input criterion voltage to a voltage corresponding to the optimum power point, wherein the optimum power point is a power point where an input power according to the input voltage becomes a maximum. Since the optimum power point is tracked by measuring only a voltage without a current sensor, a power loss is small. | 06-27-2013 |
20130162336 | Time-Multiplexed-Capacitor DC/DC Converter With Multiple Outputs - A multiple output DC-to-DC voltage converter using a new time-multiplexed-capacitor converter algorithm and related circuit topologies is herein disclosed. One embodiment of this invention includes a flying capacitor, a first output node, a second output node, and a switching network. The switching network configured to provide the following modes of circuit operation: 1) a first mode where the positive electrode of the flying capacitor is connected to an input voltage and the negative electrode of the flying capacitor is connected to ground; 2) a second mode where the negative electrode of the flying capacitor is connected to the input voltage and the positive electrode of the flying capacitor is connected to the first output node; and 3) a third mode where the positive electrode of the flying capacitor is connected to ground and the negative electrode of the flying capacitor is connected to the second output node. | 06-27-2013 |
20130162337 | CHARGE PUMP CIRCUIT AND POWER-SUPPLY METHOD FOR DYNAMICALLY ADJUSTING OUTPUT VOLTAGE - A charge pump circuit and power-supply method for dynamically adjusting output voltage is related to the charge pump circuit having three power-supply modes with different power conversion efficiencies. When supplying power, a pump unit controls the electrical connecting relations of a first flying capacitor, second flying capacitor, first storage capacitor and second storage capacitor through a first clock and second clock with non-overlapping working phases, to convert a source voltage into a positive output voltage and negative output voltage, thereby providing one of the three power-supply modes. | 06-27-2013 |
20130169352 | BOOSTING CIRCUIT OF CHARGE PUMP TYPE AND BOOSTING METHOD - A boosting circuit includes an input terminal to which a power voltage is applied, a first capacitor connected to the input terminal, second and third capacitors, a first circuit including a first switch through which one end of the first capacitor is connected to one end of the second capacitor, and a second switch through which another end of the first capacitor is connected to another end of the second capacitor, a second circuit including a third switch through which the one end of the first capacitor is connected to the other end of the second capacitor, and a fourth switch through which the one end of the second capacitor is connected to one end of the third capacitor, the other end of the first capacitor being connected to another end of the third capacitor, and a fifth switch through which the one end of the first capacitor is connected to the one end of the third capacitor. | 07-04-2013 |
20130181766 | VOLTAGE GENERATOR - A voltage generator adapted for a flash memory is disclosed. The voltage generator includes a charge pump circuit and a voltage regulator. The charge pump circuit includes at least one charge pump unit having a voltage receiving terminal and a voltage transmitting terminal. The voltage receiving terminal receives a reference voltage and the voltage transmitting terminal generates an output voltage. The charge pump unit includes first and second voltage transmitting channels and first and second capacitors. The first and second voltage transmitting channels are turned on or off according first and second control signals, respectively. The first and second capacitors receive the first and second pump enabling signals, respectively. The voltage regulator outputs a regulated output voltage according to the output voltage. | 07-18-2013 |
20130181767 | SEMICONDUCTOR INTEGRATED CIRCUIT - A power generation block configured to generate internal power by a charge pump circuit and a power supply control block configured to control the power generation block are provided. First and second power supply interconnects individually separated from an external power supply interconnect are connected to the power generation block and the power supply control block, respectively. At least any one of the power supply interconnects is provided with a filter section configured to remove noise propagating through the power supply interconnect. | 07-18-2013 |
20130187707 | Charge Pump Systems and Methods - Digital multilevel memory systems and methods include a charge pump for generating regulated high voltages for various memory operations. The charge pump may include a plurality of pump stages. Aspects of exemplary systems may include charge pumps that performs orderly charging and discharging at low voltage operation conditions. Additional aspects may include features that enable state by state pumping, for example, circuitry that avoids cascaded short circuits among pump stages. Each pump stage may also include circuitry that discharges its nodes, such as via self-discharge through associated pump interconnection(s). Further aspects may also include features that: assist power-up in the various pump stages, double voltage, shift high voltage levels, provide anti-parallel circuit configurations, and/or enable buffering or precharging features, such as self-buffering and self-precharging circuitry. | 07-25-2013 |
20130194031 | DATA-DRIVEN CHARGE-PUMP TRANSMITTER FOR DIFFERENTIAL SIGNALING - One embodiment of the present invention sets forth a mechanism for transmitting and receiving differential signals. A transmitter combines a direct current (DC) to DC converter including a capacitor with a 2:1 multiplexer to drive a pair of differential signaling lines. The transmitter drives a pair of voltages that are symmetric about the ground power supply level. Signaling currents are returned to the ground plane to minimize the generation of noise that is a source of crosstalk between different differential signaling pairs. Noise introduced through the power supply is correlated with the switching rate of the data and may be reduced using an equalizer circuit. | 08-01-2013 |
20130200943 | CHARGE PUMP VOLTAGE REGULATOR - A regulator ( | 08-08-2013 |
20130207716 | CHARGE PUMPING DEVICE AND UNIT CELL THEREOF - A unit cell includes a first cell including a first charge transfer unit, a first switch for controlling a charge transfer operation of the first charge transfer unit, and a first charge storage unit having one end connected to an output terminal of the first charge transfer unit. The unit cell includes a second cell including a second charge transfer unit, a second switch for controlling a charge transfer operation of the second charge transfer unit, and a second charge storage unit having one end connected to an output terminal of the second charge transfer unit. In the unit cell, the first switch is controlled by a first clock and an output terminal of the second charge storage unit, and the second switch is controlled by a second clock and an output terminal of the first charge storage unit. | 08-15-2013 |
20130207717 | Charge Pump Circuit - A charge pump circuit according to the present invention includes a plurality of charge pump units each including a capacitor and connected to each other in parallel; a current source connected to commonly connected power source terminals of the plurality of charge pump units; and a control circuit connected to commonly connected output terminals and controlling an amount of a current to be supplied by the current source to the commonly connected power source terminals based on an output signal at the output terminals output signal from the plurality of charge pump units. Always in at least one charge pump unit, a current from the current source via the power source terminal is supplied to the capacitor. A spike noise due to a change in current is not generated and characteristics degradation of the other circuit can be prevented. | 08-15-2013 |
20130214851 | VOLTAGE PUMP USING HIGH-PERFORMANCE, THIN-OXIDE DEVICES AND METHODS OF USE - A voltage pump using high-performance, thin-oxide devices and methods of use are provided. A multi-stage voltage boosting circuit includes a first boost capacitor with a first boosted voltage. The multi-stage voltage boosting circuit further includes a second boost capacitor with a second boosted voltage. The multi-stage voltage boosting circuit further includes a precharge transistor operable to precharge the first boost capacitor to a supply voltage. The multi-stage voltage boosting circuit further includes a precharge circuit operable to limit a stress voltage on the precharge transistor to the supply voltage, to drive the first boosted voltage to a gate of the precharge transistor in a boosting state, and to drive ground to the gate in a precharge state. | 08-22-2013 |
20130214852 | Dual Output Charge Pump Generating Two Voltage Values with Two Distinctive Levels, and Method for the Same - A dual voltage charge pump circuit to be associated with one power supply for the purpose of generating two positive and negative output voltages, with two different low and high levels. The circuit comprises two flying capacitors and two tank capacitors. PMOS transistors and NMOS transistor for achieving the charge transfer between the fly capacitor and the respective tank capacitor. Additional transistors are used for providing a low voltage charge pump as well as charge compensation between the two fly capacitors. Preferably, one fly capacitor has one end directly connected to the ground, what reduces the complexity of the dual charge pump and achieves saving of MOS transistor and ball. | 08-22-2013 |
20130214853 | INTEGRATED CIRCUITS WITH BI-DIRECTIONAL CHARGE PUMPS - A method includes receiving a first voltage at a first input circuit of a bi-directional charge pump circuit, selectively turning on a first switch of a switching circuit that is coupled electrically to a deep N-well transistor of a first set of one or more intermediate pump stages that are coupled between the first input circuit and a first output circuit, and providing a third voltage from the first output circuit in response to receiving a second voltage at an input of a first diode of the output circuit from the first set of the one or more intermediate pump stages. | 08-22-2013 |
20130222050 | Low Voltage and High Driving Charge Pump - The present disclosure relates to a charge pump circuit having one or more voltage multiplier circuits that enable generation of an output signal having a higher output voltage. In one embodiment, the charge pump circuit comprises a NMOS transistor having a drain connected to a supply voltage and a source connected to a chain of diode connected NMOS transistors coupled in series. A first voltage multiplier circuit is configured to generate a first two-phase output signal having a maximum voltage value that is twice the supply voltage. The first two-phase output signal is applied to the gate of the NMOS transistor, forming a conductive channel between the drain and the source, thereby allowing the supply voltage to pass through the NMOS transistor without a threshold voltage drop. Therefore, degradation of the charge pump output voltage due to voltage drops of the NMOS transistor is reduced, resulting in larger output voltages. | 08-29-2013 |
20130222051 | Charge Pump Device and Driving Capability Adjustment Method Thereof - A charge pump device is disclosed. The charge pump device includes a driving stage, for generating a driving signal corresponding to a driving capability; a charge pump circuit, for generating an output voltage according to the driving signal; a comparing circuit, comprising a first comparator for comparing the output voltage and a first reference voltage to generate a first comparing result; an overload detection circuit, for generating a detection result according to at least one of the first comparing result and the output voltage; and a driving capability control circuit, coupled between the overload detection circuit and the driving stage for controlling the driving capability corresponding to the driving signal according to the detection result. | 08-29-2013 |
20130229225 | METHODS AND APPARATUS RELATED TO AN IMPROVED COMPLEMENTARY MOSFET SWITCH - In one general aspect, an apparatus can include a complementary switch circuit including a first portion and a second portion, and a first driver circuit coupled to the first portion of the complementary switch circuit. The apparatus can include a positive charge pump device coupled to the first driver, and a second driver circuit coupled to the second portion of the complementary switch circuit. The apparatus can also include a negative charge pump device coupled to the second driver circuit. | 09-05-2013 |
20130229226 | Charge Pump Device - A charge pump device includes a charge pump circuit, for generating an output voltage according to a driving signal, a comparing circuit, for generating a comparison result according to the output voltage and a reference voltage, a detecting circuit, for detecting a frequency range of a ripple of the output voltage according to the comparison result and generating a detection result, and a driving stage, for generating the driving signal according to the comparison result, and adjusting a driving capability corresponding to the driving signal according to the detection result. | 09-05-2013 |
20130234785 | Apparatus and Method for Feedforward Controlled Charge Pumps - An embodiment apparatus comprises a switched capacitor network coupled between an input voltage and an output capacitor and a feedforward controller. The switched capacitor network comprises a plurality of flying capacitors and a switching circuit. The feedforward controller comprises a sensor configured to detect the input voltage and a mode selector configured to generate a plurality of gate drive signals for the switched capacitor network. The gate drive signals configure the switched capacitor network to form a charge pump with a non-integer multiplication factor. | 09-12-2013 |
20130234786 | Methods and Circuits for a Low Input Voltage Charge Pump - A charge pump comprises, a plurality of branches each having serially-connected T-circuit cells, wherein each of the branches has a first end for receiving an input voltage and a second end for outputting a charge pump voltage, wherein each of the T-circuit cells comprises a first transistor, a second transistor, and a capacitor, wherein the first transistor and the second transistor of each of the T-circuit cells have a common drain, and wherein the gate of the first transistor of a certain one of the T-circuit cells of a certain branch is connected to a first branch and the gate of the second transistor of the certain one of the T-circuit cells of the certain branch is connected to a second branch. | 09-12-2013 |
20130234787 | Circuit for Clamping Current in a Charge Pump - A circuit for clamping current in a charge pump is disclosed. The charge pump includes switching circuitry having a number of switching circuitry transistors. Each of first and second pairs of transistors in the circuit can provide an additional path for current from its associated one of the switching circuitry transistors during off-switching of that transistor so that a spike in current from the switching circuitry transistor is only partially transmitted through a path extending between the switching circuitry transistor and a capacitor of the charge pump. | 09-12-2013 |
20130241630 | Touch Sensor Driver With Selectable Charge Source - An apparatus may include an internal charge pump within an integrated circuit package, an external pin positioned at an exterior of the integrated circuit package, and a select circuit configured to operate independently from the internal charge pump and located within the integrated circuit package, wherein the select circuit is configurable to selectively couple at least one of the internal charge pump and the external pin to a transmit (TX) sensor electrode. | 09-19-2013 |
20130249624 | SEMICONDUCTOR DEVICE INCLUDING INTERNAL VOLTAGE GENERATION CIRCUIT - A semiconductor integrated circuit device has a negative voltage generation circuit provided at each power supply circuit unit for six memory macros. Therefore, the response with respect to variation in a negative voltage is increased. In a standby mode, a negative voltage supply line for the six memory macros is connected by a switch circuit, and only a negative voltage generation circuit of one power supply circuit unit among six negative voltage generation circuits of the six power supply circuit units is rendered active. Thus, increase in standby current can be prevented. | 09-26-2013 |
20130257521 | CONTROLLING OVER VOLTAGE ON A CHARGE PUMP POWER SUPPLY NODE - A charge pump driver circuit has a first charge switch that couples a first node of a flying capacitor to a first power supply node, and a second charge switch that couples a second node of the capacitor to a second power supply node. Control circuitry is coupled to open the second charge switch and discharge the second node of the capacitor, in response to a control signal. Other embodiments are also described and claimed. | 10-03-2013 |
20130257522 | HIGH INPUT VOLTAGE CHARGE PUMP - This document discusses, among other things, a charge pump circuit that includes an input, an output, a plurality of field effect transistors (FETs), each of the plurality FETs having a respective gate terminal, and at least two flying capacitors in electrical communication with at least one of the plurality of FETs. Each of the respective gate terminals is configured to receive a respective logic level shifted clock signal voltage. The at least two flying capacitors are configured to alternatingly charge and discharge in response to the logic level shifted clock signal voltages, and the at least two flying capacitors are configured to supply a voltage at the output that is different from a voltage at the input. | 10-03-2013 |
20130257523 | CALIBRATION CIRCUIT APPARATUS AND METHOD - Embodiments of a calibration circuit for a current source which may include a first control switch, a second control switch, and a capacitor. In embodiments, the first control switch may be operable to couple the capacitor to the current source and the second control switch may be operable to couple the capacitor to a reference current source to enable the capacitor to be charged or discharged according to a first control signal provided to the first control switch and a second control signal provided to the second control switch. In embodiments, the calibration circuit may be included in a digital-to-analog (DAC) converter. | 10-03-2013 |
20130265104 | METHOD AND APPARATUS FOR CURRENT CONTROL IN A CIRCUIT - A circuit includes an output node; a first current source coupled via at least one first switch to at least the output node and a calibration node, wherein the first switch alternately operably couples the first current source to the output node or the calibration node; a second current source of opposing polarity to the first current source and operably coupled via at least one second switch to at least the output node and the calibration node, wherein the second switch alternately operably couples the second current source to the output node or the calibration node; and a current control circuit having an adjustment circuit operably coupled to the calibration node, wherein the current control circuit couples both the first and second current sources to the calibration node when a current from the first/second current source is not to be used as an output from the output node. | 10-10-2013 |
20130285737 | Charge Pump System - In one aspect, a first charge pump has serially arranged charge pump stages. Inter-stage nodes between adjacent stages are pumped by a second charge pump. In another aspect, timing of the charge pump stages is controlled by at a command clock signal. The command clock signal and command data are communicated between a integrated circuit with the charge pump and an external circuit. | 10-31-2013 |
20130293284 | DIGITALLY PROGRAMMABLE HIGH VOLTAGE CHARGE PUMP - A method of operating a programmable charge pump includes configuring each of a plurality of cascaded charge pump stages to be in a first set of charge pump stages or in a second set of charge pump stages based on an indicator of a target output voltage level. The first set of charge pump stages is configured to level-shift a first voltage level to a second voltage level. Each charge pump stage of the second set of charge pump stages has a disabled pump circuit portion. The second set of charge pump stages is configured to pass a version of the second voltage level to an output node of the programmable charge pump. | 11-07-2013 |
20130300495 | CHARGE PUMP CIRCUIT AND METHOD FOR GENERATING A SUPPLY VOLTAGE - A charge pump circuit ( | 11-14-2013 |
20130307612 | VOLTAGE DOUBLER AND OSCILLATING CONTROL SIGNAL GENERATOR THEREOF - A voltage doubler and an oscillating control signal generator controlling a charge pump (powered by a first voltage to provide a second voltage) of the voltage doubler are disclosed. The oscillating control signal generator includes a first input terminal receiving a fundamental oscillation signal, a second input terminal receiving a comparison result showing whether the second voltage is greater than a target value, a third input terminal operative to obtain an electric current consumption status at an output terminal of the charge pump, and an output terminal outputting an oscillating control signal for the control of the charge pump. Further, the oscillating control signal generator includes a logic circuit. The logic circuit generates the oscillating control signal by selectively blocking status changes of the fundamental oscillation signal according to the comparison result and the electric current consumption status. | 11-21-2013 |
20130314151 | CHARGE PUMP CIRCUIT AND METHODS OF OPERATIONS THEREOF - A charge pump circuit, and associated method and apparatuses, for providing a split-rail voltage supply, the circuit having a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of said states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage and centered on the voltage at the common terminal. | 11-28-2013 |
20130321067 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a first reference voltage generation unit configured to generate a first reference voltage having a negative property in correspondence to an increase of the temperature; a second reference voltage generation unit configured to generate a second reference voltage having a positive property in correspondence to an increase of the temperature; a voltage level detection unit configured to select any one of the first and second reference voltages according to a voltage selection signal, and detect a level of an internal voltage based on a level of the selected voltage; and an internal voltage generation unit configured to generate the internal voltage in response to an output signal of the voltage level detection unit. | 12-05-2013 |
20130321068 | CIRCUIT FOR GENERATION OF AN ELECTRIC CURRENT WITH A CONFIGURABLE VALUE - A current-generator circuit is for generation of an output current of a value that is configurable as a function of a configuration signal. The circuit may have a first reference resistor element traversed by an intermediate current, the value of which is a function of a reference current, for supplying a first reference voltage. The circuit may also include a resistive divider stage receiving the configuration signal and supplying a second reference voltage as a function of the first reference voltage and of the configuration signal. A second reference resistor element supplies, as a function of the second reference voltage (V | 12-05-2013 |
20130321069 | CHARGE PUMP CIRCUIT - A charge pump circuit includes a clock signal input terminal to receive a clock signal; an inverted clock signal input terminal to receive an inverted clock signal having a phase obtained by reversing a phase of the clock signal; an output terminal for outputting an output voltage, the output voltage being generated by boosting the clock signal and the inverted clock signal; and a pump circuit including a plurality of rectifying circuits connected in series and located between the output terminal and a ground terminal and a plurality of capacitative elements respectively having first terminals respectively connected to anodes of the plurality of rectifying circuits, a second terminal of a last-stage capacitative element located on the output terminal side, the clock signal input terminal and the inverted clock signal input terminal being alternately connected to second terminals of the capacitative elements other than the last-stage capacitative element. | 12-05-2013 |
20130328618 | VOLTAGE PUMPING CIRCUIT - A voltage pumping circuit for pumping an input voltage to generate an output voltage, which comprises: a first voltage pumping path including a first number of pumping stages; and a second voltage pumping path including a second number of pumping stages, wherein the second number is less than the first number. Only one of the first voltage pumping path and the second voltage pumping path is activated according to at least one path selecting signal to pump the input voltage to generate the output voltage. | 12-12-2013 |
20130342265 | Charge Pump Device - A charge pump device is disclosed. The charge pump device includes a driving stage, for generating a driving signal corresponding to a driving capability; a charge pump circuit, for generating an output voltage according to the driving signal; a comparing circuit, comprising a first comparator for comparing the output voltage and a first reference voltage to generate a first comparing result; an overload detection circuit, for generating a detection result according to at least one of the first comparing result and the output voltage; and a driving capability control circuit, coupled between the overload detection circuit and the driving stage for controlling the driving capability corresponding to the driving signal according to the detection result. | 12-26-2013 |
20140022005 | CONFIGURABLE MULTISTAGE CHARGE PUMP USING A SUPPLY DETECT SCHEME - A configurable multistage charge pump including multiple pumpcells, at least one bypass switch and control logic. The pumpcells are coupled together in series including a first pumpcell receiving an input voltage and at least one remaining pumpcell including a last pumpcell which generates an output voltage. Each bypass switch is coupled to selectively provide the input voltage to a pumpcell input of a corresponding one of the remaining pumpcells. The control logic is configured to determine one of multiple voltage ranges of the input voltage, to enable each pumpcell for a first voltage range and to disable and bypass at least one pumpcell for at least one other voltage range. A method of operating a multistage charge pump including detecting an input voltage, selecting a voltage range based on an input voltage, and enabling a number of cascaded pumpcells corresponding to the selected voltage range. | 01-23-2014 |
20140022006 | SWITCH CIRCUIT AND CHARGE PUMP USING THE SAME THEREOF - The switch circuit comprises a first switch, a second switch, a third switch, a forth switch, a fifth switch, a sixth switch and a seventh switch. The first switch couples the voltage input terminal to one terminal of a flying capacitor. The second switch couples one terminal of the flying capacitor to one terminal of the output capacitor. The third switch couples one terminal of the flying capacitor to a common terminal. The fourth switch couples the other terminal of the flying capacitor to one terminal of the output capacitor. The fifth switch couples one terminal of the output capacitor to a positive voltage output terminal. The sixth switch couples the other terminal of the flying capacitor to the common terminal. The seventh switch couples the other terminal of the flying capacitor to a negative voltage output terminal. | 01-23-2014 |
20140022007 | Charge Transfer Apparatus and Method - An apparatus for transferring charge has a first charge pump path with a plurality of stages having first capacitors, and a second charge pump path, also with a plurality of stage having second capacitors, in parallel with the first charge pump path. The first and second charge pump paths are coupled to share a common output node. The apparatus also has a timing circuit coupled with the first and second charge pump paths. Among other things, the timing circuit is configured to cause at least one of the first capacitors to periodically charge at least one of the second capacitors. | 01-23-2014 |
20140035661 | AN INTEGRATED CIRCUIT AND METHOD FOR CONTROLLING LOAD ON THE OUTPUT FROM ON-CHIP VOLTAGE GENERATION CIRCUITRY - An integrated circuit and method are provided for controlling variation in the voltage output from on-chip voltage generation circuitry. The integrated circuit comprises voltage generation circuitry configured to operate from a supplied input voltage and to generate at an output node an on-chip voltage supply different to the supplied input voltage. A circuit block is then arranged to receive the on-chip voltage supply generated by the voltage generation circuitry, during operation of the circuit block the circuit block presenting a varying load on the output node. Oscillation circuitry is also coupled to the output node to provide an additional load on the output node, and is configured to produce an oscillation signal whose frequency varies as the value of the on-chip voltage supply varies. Control circuitry is configured to be responsive to a trigger condition to adjust the additional load provided on the output node by the oscillation circuitry. This provides a particularly simple and effective mechanism for providing an additional load on the output node which can be altered with the aim of offsetting variation in the load on the output node presented by the circuit block, thus allowing the variation in the voltage output from the on-chip voltage generation circuitry to be controlled. | 02-06-2014 |
20140035662 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR OPERATING THE SAME - A semiconductor device includes a power supply voltage level/slope detection unit configured to detect a level of a power supply voltage and a slope of a power supply voltage curve, and output a power supply voltage level/slope detection signal, a pumping voltage detection unit configured to detect a level of a pumping voltage based on a reference pumping level to output a pumping detection signal, an oscillation signal generation unit configured to generate an oscillation signal in response to the pumping detection signal and the power supply voltage level/slope detection signal, and a pumping unit configured to generate the pumping voltage by performing a charge pumping operation in response to the oscillation signal. | 02-06-2014 |
20140035663 | Boosting Circuit - A boosting circuit, includes an output circuit including a first transmission circuit, transmitting charges of a first boosting node to a first output node according to a first transmission control signal, a detection circuit, detecting the voltage level of the first output node, and a pre-charge circuit pre-charging the first boosting node according a detection signal of the detection circuit; a first pump circuit includes a second transmission circuit, transmitting charges to a second output node according to a second transmission control signal, and a first capacitance unit, coupled to the first boosting node, boosting the voltage level of the first boosting node according to charges transmitted in the second output node; and a control circuit, coupled to the output circuit and the first pump circuit, controls the second transmission control signal according to the voltage level of the first output node. | 02-06-2014 |
20140055194 | Low Noise Charge Pump Method and Apparatus - A charge pump method and apparatus is described having various aspects. Noise injection from a charge pump to other circuits may be reduced by limiting both positive and negative clock transition rates, as well as by limiting drive currents within clock generator driver circuits, and also by increasing a control node AC impedance of certain transfer capacitor coupling switches. A single-phase clock may be used to control as many as all active switches within a charge pump, and capacitive coupling may simplify biasing and timing for clock signals controlling transfer capacitor coupling switches. Any combination of such aspects of the method or apparatus may be employed to quiet and/or simplify charge pump designs over a wide range of charge pump architectures. | 02-27-2014 |
20140062580 | Diode Formed of PMOSFET and Schottky Diodes - A P-type Metal-Oxide-Semiconductor Field Effect Transistor (PMOSFET) includes a gate, a first source/drain region connected to the gate, and a second source/drain region on an opposite side of the gate than the first source/drain region. A first Schottky diode includes a first anode connected to the first source/drain region, and a first cathode connected to a body of the PMOSFET. A second Schottky diode includes a second anode connected to the second source/drain region, and a second cathode connected to the body of the PMOSFET. | 03-06-2014 |
20140062581 | RADIATION HARDENED CHARGE PUMP - This invention relates to radiation hardened charge pumps for electronic circuitry. | 03-06-2014 |
20140077868 | CIRCUITS FOR PREVENTION OF REVERSE LEAKAGE IN VTH-CANCELLATION CHARGE PUMPS - Techniques are presented to reduce reversion leakage in charge pump circuits. The exemplary circuit is a charge pump of the voltage doubler type, where the output of each leg is supplied through a corresponding output transistor. An auxiliary charge pump is used to supply the gates of the output transistors in order to cancel the threshold voltage of these output transistors. To reduce reverse leakage back through the output transistors, in each leg of the charge pump a switch is connected between the gate of the output transistor and the output level of the leg so the these levels can be shorted when that particular is not supplying the pump's output. | 03-20-2014 |
20140077869 | Method for Modulating the Impedance of an Antenna Circuit - An electromagnetic transponder includes an antenna circuit, a load, and a charge pump transistor having a current path coupled between the antenna circuit and the load. During operation, a retromodulated signal is transmitted at a first level by biasing the charge pump transistor during a first time period such that an impedance of the antenna circuit has a first impedance value and current flows from the antenna circuit to the load. A retromodulated signal at a second level is transmitted by biasing the charge pump transistor during a second time period such that the impedance of the antenna circuit has a second impedance value different than the first impedance value and current flows from the antenna circuit to the load. The retromodulated signals are transmitted at the first and second levels in a sequence determined to transmit information from the electromagnetic transponder. | 03-20-2014 |
20140097887 | REDUCTION OR ELIMINATION OF IRREGULAR VOLTAGE DISTRIBUTION IN A LADDER OF VOLTAGE ELEVATORS - The voltage distribution in a cascade or ladder of voltage elevator cells may become irregular in certain conditions. In such conditions, one or more cells may become overstressed. Corrective circuitry may be added to one or more of the voltage elevator cells to reduce or eliminate such stresses. Such corrective circuitry may include a capacitor, a long-channel PMOS transistor, both a capacitor and a long-channel PMOS transistor in parallel, or other electrically equivalent components coupled in parallel with the input and output node of one or more of the voltage elevator cells. | 04-10-2014 |
20140111271 | SEMICONDUCTOR DEVICE HAVING BOOSTING CIRCUIT - A semiconductor device includes a boosting circuit that boosts an internal power supply voltage in a boosting range according to an external power supply voltage, an external voltage-level comparison circuit that compares the external power supply voltage and a predetermined reference voltage, and a variable resistor circuit that includes a variable resistor connected to an output terminal of the boosting circuit. The variable resistor circuit controls a resistance value of the variable resistor based on a comparison result of the external voltage-level comparison circuit. | 04-24-2014 |
20140152378 | CHARGE PUMP CIRCUIT - A charge pump circuit includes a charge pump, a regulator circuit, and a load current, wherein the charge pump circuit further includes: a filter circuit connected to an output terminal of the charge pump for filtering an output voltage of the charge pump; and a ripple control circuit connected both to the output terminal of the charge pump and to the filter circuit for reducing the output voltage of the charge pump upon an increase thereof, thereby attenuating ripples contained in the output voltage of the charge pump. The charge pump circuit is capable of enabling a relatively stable output voltage for the charge pump, thus benefiting a downstream integrated circuit. | 06-05-2014 |
20140152379 | CAPACITOR, CHARGE PUMP CIRCUIT, AND SEMICONDUCTOR DEVICE - There is provided a capacitor with a reduced layout area. A capacitor has an electrode EL | 06-05-2014 |
20140159804 | HYBRID CHARGE PUMP AND METHOD FOR OPERATING THE SAME, POWER MANAGEMENT IC COMPRISING THE PUMP - A hybrid charge pump including a hybrid circuit configured to snub an over shoot or under shoot present in an input pulse in a snubbing operation if a level of the pulse is a first level, store the pulse in a charging operation if the level of the pulse is a second level different from the first level, and generate a negative voltage from the stored pulse in a negative voltage generation operation. | 06-12-2014 |
20140159805 | SUB-GATE DELAY ADJUSTMENT USING DIGITAL LOCKED-LOOP - A delay locked loop (DLL) includes a delay line that delays a clock signal to generate a delayed clock signal, a phase frequency detector (PFD) for detecting a phase and/or frequency difference between the clock signal and the delayed clock signal, and a charge pump having an adjustable bias current for converting the phase and/or frequency difference taking into account a bias current adjustment into a control voltage, in which the control voltage controls an amount of delay in the delayed clock signal. | 06-12-2014 |
20140197881 | CHARGE PUMP AND METHOD OF BIASING DEEP N-WELL IN CHARGE PUMP - A charge pump has at least one charge pump stage. Each charge pump stage includes at least one NMOS device. The at least one NMOS device has a deep N-well (DNW), a gate and a drain, and is coupled to at least one capacitor, a first node, a second node and a switch. For the at least one NMOS device, the gate is capable of receiving a different signal from the drain. The first node is arranged to receive an input signal. The switch is coupled between the at least one NMOS device and a ground. A drain of the switch is coupled to a deep N-well of the switch. The at least one capacitor is arranged to store electrical charges. The charge pump stage is configured to supply the electrical charges to the second node. The DNW is coupled to the ground for a negative pump operation. | 07-17-2014 |
20140232452 | INTERNAL VOLTAGE GENERATION CIRCUIT - In an internal voltage generation circuit, four charge pump circuits are provided, the first two charge pump circuits are driven with a long period at the time of standby mode, and the four charge pump circuits are driven with a short period at the time of active mode. Therefore, a layout area can be reduced compared with a case where a charge pump circuit for standby mode and a charge pump circuit for active mode are provided separately. | 08-21-2014 |
20140240034 | Divide by 2 and 3 Charge Pump Methods - The present disclosure relates to methods and circuits to achieve ground centered charge-pumps generating output voltages of +/−VDD/2 or +/−VDD/3 while achieving high efficiency of power conversion and minimized output impedances. Key points of the disclosure are minimizing number of switching states, reducing the time required for transition through all switching states, maintain constant flying capacitor voltages in all switching states, and, ideally, configuring the size of the flying capacitors large enough to provide the required load charge of each switching state without voltage change of the flying capacitors. | 08-28-2014 |
20140240035 | SYNCHRONIZED CHARGE PUMP-DRIVEN INPUT BUFFER AND METHOD - An integrated circuit includes (a) an analog-to-digital converter operated according to a first clock signal; and (b) a charge pump circuit providing a negative power supply voltage to the integrated circuit, the charge pump circuit being operated according to a second clock signal having a frequency that is different from a frequency of the first clock signal, such that a noise level introduced by the charge pump into the analog-to-digital converter is less than the average noise level over a predetermined range of frequencies for the second clock signal. The integrated circuit may further include a clock divider circuit (e.g., a programmable clock divider) that generates both the first clock signal and the second clock signal. | 08-28-2014 |
20140266410 | APPARATUS AND METHOD FOR CONTROLLING CHARGE PUMP - An apparatus for controlling a charge pump includes a current sensor arranged to output a current sense signal that is linearly proportional to an output current of the charge pump, and an oscillator that provides a clock signal for the charge pump. The oscillator receives the current sense signal and uses it to vary an oscillation frequency of the clock signal. An amplitude of the clock signal also may be varied in response to the current sense signal. | 09-18-2014 |
20140285254 | CHARGE PUMP SYSTEMS AND METHODS - Charge pump systems and methods for the operation thereof can be configured for delivering charge to a primary circuit node. A sequential charging pattern of at least a subset of a series-connected plurality of charge-pump stages connected between a supply voltage node and the primary circuit node can be selectively initiated. For example, the sequential charging pattern can be initiated one time for every N cycles of a given clock signal, wherein N is a selectively adjustable integer value greater than or equal to 1. | 09-25-2014 |
20140300409 | HIGH VOLTAGE CHARGE PUMP - Various embodiments of a high voltage charge pump are described. One embodiment is a charge pump circuit that comprises a plurality of switching stages each including a clock input, a clock input inverse, a clock output, and a clock output inverse. The circuit further comprises a plurality of pumping capacitors, wherein one or more pumping capacitors are coupled to a corresponding switching stage. The circuit also comprises a maximum selection circuit coupled to a last switching stage among the plurality of switching stages, the maximum selection circuit configured to filter noise on the output clock and the output clock inverse of the last switching stage, the maximum selection circuit further configured to generate a DC output voltage based on the output clock and the output clock inverse of the last switching stage. | 10-09-2014 |
20140327479 | EFFICIENT GATE DRIVERS FOR SWITCHED CAPACITOR CONVERTERS - An apparatus for converting voltage includes terminals coupled to external circuits at corresponding voltages and a switching network having driving circuits and semiconductor switches that interconnect capacitors in successive states to one another and to the terminals. The switches interconnect some capacitors to one another through a series of switches when an activation pattern causes them to be activated. Each driving circuit has power connections, a control input, and a drive output coupled to and controlling at least one switch. A drive output of one of them couples to and drives each switch. Some of the driving circuits are powered via corresponding power connections from at least one of the capacitors such that a voltage across the corresponding power connections is less than a highest of the corresponding voltages. The terminals and the switching network are constituents of a switched capacitor converter. | 11-06-2014 |
20140340140 | PHASED-ARRAY CHARGE PUMP SUPPLY - A charge pump system and method that may provide large supply voltages and currents with reduced ripple voltage at reduced ripple frequency. The charge pump system may include an array of charge pumps and a delay pipeline. The array of charge pumps may include a plurality of charge pumps. The delay pipeline may include a plurality of delay elements. The delay elements may respond to a global trigger signal to output a trigger signal to the array of charge pumps. Respective charge pumps may fire in response to the trigger signal. | 11-20-2014 |
20140354349 | CHARGE PUMP AND METHOD OF HAVING NEGATIVE OUTPUT VOLTAGE TRACKING POSITIVE OUTPUT VOLTAGE THEREOF - A method having a negative output voltage at a negative output terminal of a charge pump tracking a positive output voltage at a positive output terminal of the charge pump. The charge pump comprises a plurality of switches and each of the plurality of switches has a serially coupled resistance. The method comprises selecting the serially coupled resistance for at least one of the plurality of switches to be different to each of the other respective serially coupled resistances associated to the other switches. | 12-04-2014 |
20140361827 | High Voltage Ring Pump with Inverter Stages and Voltage Boosting Stages - A multi-stage device for boosting an input voltage is discussed. Each stage of the device comprises a stage of a ring oscillator and a charge pump. An oscillating signal, generated by the ring oscillator within the device, drives the charge pump in each stage of the device. The charge pumps of the stages are serially connected. A final stage of the multi-stage device is adapted to provide voltage to a load circuit. The multi-stage device is applicable for generation of different bias voltages from one or more source voltages. | 12-11-2014 |
20140368262 | Efficient Voltage Doubler - A charge pump circuit using a voltage doubler-type of circuitry for generating an output voltage is described. An output generating stage uses a voltage double structure, except that the transistors in each leg are not cross-coupled to the other leg, but instead are controlled by an auxiliary section. The auxiliary section has a voltage doubler structure, but is not used to drive the load, but instead provides the gate voltage for the precharge section using the same levels as used for the corresponding transistors in the auxiliary section. This arrangement can be particularly advantageous for applications using low supply voltages to address self-loading effect due to loading. As the auxiliary section does not drive the load, its elements can be sized smaller. Additional improvement can be obtained by using separate clock drivers for the auxiliary section to address secondary self-loading effect due to loading. | 12-18-2014 |
20140368263 | VOLTAGE DETECTION CIRCUIT AND INTERNAL VOLTAGE GENERATOR USING THE SAME - A voltage detection circuit includes a voltage detection unit suitable for comparing a voltage level of a reference voltage terminal with a voltage level of an internal voltage terminal and for generating a detection signal based on a comparison result, a test reference voltage generating unit suitable for receiving an external reference voltage through a pad and for supplying the received external reference voltage to the reference voltage terminal as the reference voltage by using a first input resistance, during a test operation, and a normal reference voltage generating unit having a current mirror structure, wherein the normal reference voltage generating unit is suitable for generating an internal reference voltage, and for supplying the internal reference voltage to the reference voltage terminal as the reference voltage by using a second input resistance different from the first input resistance, during a normal operation. | 12-18-2014 |
20140368264 | TEMPERATURE/VOLTAGE DETECTION CIRCUIT - A circuit includes a comparator unit, a capacitive device, and a switching network. The comparator unit is configured to set a control signal at a first logical value when an output voltage reaches a first voltage value from being less than the first voltage value, and to set the control signal at a second logical value when the output voltage reaches a second voltage value from being greater than the second voltage. The capacitive device provides the output voltage. The switching network is configured to charge or discharge the capacitive device based on the control signal. | 12-18-2014 |
20140375378 | Efficiency for Charge Pumps with Low Supply Voltages - A charge pump system uses a helper pump to use in generating a boosted clock signal to use for the stages capacitor of a charge pump and also for the gate clock of the stage. This can be particularly useful in applications with lower supply levels, where a the helper pump can be used to provide an amplitude higher than the supply level, that can then be added to the supply level for the boosted clock signal and then added again to the supply level for the gate clock. Further advantages can be obtained by using the helper or auxiliary pump as an input to an optimized inverter circuit that receives an input clock and has an output that initially rises to the supply level than subsequently to the auxiliary pump's level. | 12-25-2014 |
20150008978 | COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) ANALOG SWITCH CIRCUIT - A Complementary Metal-Oxide-Semiconductor (CMOS) analog switch has a circuit structure such that when a supply voltage is applied, the CMOS analog switch biases voltages at both ends of a Metal-Oxide-Semiconductor Field Effect Transistor (MOS) device, which switches on upon application of supply voltage, to a substrate node of MOS, or biases the substrate voltage of MOS device to a ground voltage state during a switching-off operation. The substrate voltage of MOS device in floating state is still biased to the ground voltage state even when abnormal, high voltages are applied to both ends of the MOS device. As a result, threshold voltage and conduction resistance decrease compared to related analog switches, and frequency bandwidth increases. | 01-08-2015 |
20150015323 | CHARGE PUMP CIRCUIT - A charge pump circuit includes a plurality of serially coupled stages and a plurality of clock drivers. A voltage output of a first of the stages is connected to a voltage input of a second of the stages. A voltage output of the second of the stages is boosted relative to a voltage input of the second of the stages. Each of the stages includes complementary charge pumps. Each of the charge pumps includes a pumping capacitor that stores charge in the stage. Each of the clock drivers drives a clock signal to the pumping capacitor of at least one of the stages. A voltage of the clock signal provided to the second of the stages is derived from the voltage input of the second of the stages. | 01-15-2015 |
20150015324 | CIRCUITRY, MULTI-BRANCH CHARGE PUMP, METHOD FOR CONTROLLING A CHARGE PUMP AND SYSTEM - One example refers to a circuitry comprising a first charge pump stage controlled by a first control signal, a second charge pump stage controlled by a second control signal, wherein the first charge pump stage and the second charge pump stage are arranged subsequently to each other and comprising a control unit for providing the first control signal and the second control signal, wherein the control unit is arranged to set the second control signal to high when the first control signal is high. Also, a multi-branch charge pump, a method for controlling various charge pumps and a system for controlling various charge pumps are suggested. | 01-15-2015 |
20150015325 | MULTIPLE OUTPUT CHARGE PUMP WITH MULTIPLE FLYING CAPACITORS - A multiple output charge pump that includes a first flying capacitor, a second flying capacitor, a first output node, a second output node, and a switching network. The first output node is configured to provide a first voltage, and the second output node is distinct from the first output node and is configured to provide a second voltage, different than the first voltage. The switching network is configured to provide a first mode of operation in which the first and second flying capacitors are connected in one of in series with one another between an input voltage and ground or in parallel with one another between the input voltage and ground, a second mode of operation in which the first and second flying capacitors are connected in parallel with one another between ground and the second output node, and a third mode of operation. | 01-15-2015 |
20150028938 | CHARGE PUMPING DEVICE - A charge pumping device includes unit cells. Each unit cell includes first and second cells, each including a charge transfer circuit, a switch controlling a charge transfer operation thereof, and a charge storage circuit having a first end connected to an output terminal of the charge transfer circuit. The switch of the first and second cell is controlled by a first and second clock and the output terminal of the second and first cell, respectively. The first and second clocks are inputted to a second end of the charge storage circuit of the second and first cells, respectively. A first interface circuit connects first and second cells of a first unit cell to second and first cells of a second unit cell, respectively. Output terminals of a final unit cell connect to a load capacitor. Input terminals of an initial unit cell connect to a supply voltage. | 01-29-2015 |
20150042398 | CHARGE PUMP INCLUDING SUPPLY VOLTAGE-BASED CONTROL SIGNAL LEVEL - Some embodiments include apparatuses and methods having an input node to receive a first voltage, an output node to provide an output voltage, and a charge pump to generate the output voltage based on the first voltage. The charge pump can include a control node to receive a control signal for controlling at least one switch of the charge pump, such that the output voltage includes a value greater than a value of the first voltage. The control signal can include a level corresponding to a second voltage having a value greater than the value of the output voltage. Additional apparatus and methods are described. | 02-12-2015 |
20150054571 | CHARGE PUMP CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - Efficiency of a charge pump circuit is increased. The charge pump circuit includes serially connected fundamental circuits each including a diode-connected transistor and a capacitor. At least one transistor is provided with a back gate, and the back gate is connected to any node in the charge pump circuit. For example, the charge pump circuit is of a step-up type; in which case, if the transistor is an n-channel transistor, a back gate of the transistor in the last stage is connected to an output node of the charge pump circuit. Back gates of the transistors in the other stages are connected to an input node of the charge pump circuit. In this way, the voltage holding capability of the fundamental circuit in the last stage is increased, and the conversion efficiency can be increased because an increase in the threshold of the transistors in the other stages is prevented. | 02-26-2015 |
20150054572 | CHARGE PUMP GENERATOR WITH DIRECT VOLTAGE SENSOR - A method for operating a charge pump that supplies switching current for a plurality of transistors includes a capacitor generating a pumped voltage. A comparator generates a pump control signal for turning on and off charging of the pump capacitor based on a difference between a comparison voltage and a reference voltage. A direct voltage sensor receives a feedback signal reflecting the pumped voltage and generates the comparison voltage in response to the feedback signal. The sensor includes a sensor resistor, a current source configured to drive a sensor current through the sensor resistor, and a differential op-amp that drives the sensor current to cause the voltage drop across the sensor resistor to remain constant as the pumped voltage experiences the voltage drop. The charge pump may include two similar direct voltage sensor controlling positive and negative pumped voltages. | 02-26-2015 |
20150061755 | SEMICONDUCTOR APPARATUS - A negative voltage pumping unit including a driver configured to receive an external high-voltage and an external voltage and drive and output an oscillator signal, and a capacitor configured to perform a pumping operation and generate a negative voltage; and an internal circuit configured to receive a ground voltage and the voltage of a node. | 03-05-2015 |
20150070080 | SYSTEM AND METHOD FOR DISTRIBUTED REGULATION OF CHARGE PUMPS - A system for providing a load current at a specific voltage to a circuit block of an integrated circuit (IC) includes a plurality of charge pumps and a control circuit to generate a control signal for each of the charge pumps. The control signal causes each of the charge pumps to be enabled, partially enabled, or disabled, and controls at least one of the charge pumps independently of the other charge pumps. | 03-12-2015 |
20150070081 | SYSTEM AND METHOD FOR REDUCTION OF BOTTOM PLATE PARASITIC CAPACITANCE IN CHARGE PUMPS - A system for providing a load current at a specific output voltage to a circuit block of an integrated circuit (IC) includes a supply node at a supply voltage, a charge pump, and a cross-coupling circuit. The charge pump includes a first a first capacitor to charge while a first clock signal is high and a second capacitor to charge while a second clock signal is high. Each of the capacitors has a top plate node, a bottom plate node, a ground node, and an intermediate node between the bottom plate node and the ground node. The cross-coupling circuit couples the intermediate node of the first capacitor to the supply node while the second clock signal is high and couples the intermediate node of the second capacitor to the supply node while the first clock signal is high. | 03-12-2015 |
20150070082 | CHARGE PUMP CIRCUIT - A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes and a second pair of output nodes, and two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first bipolar output voltage at the first pair of output nodes and a second bipolar output voltage at the second pair of bipolar output nodes. | 03-12-2015 |
20150070083 | BOOSTING CIRCUIT OF CHARGE PUMP TYPE AND BOOSTING METHOD - A boosting circuit of charge pump type includes: charging portion for applying an input voltage to a first capacitor; double boosting portion for applying the input voltage to a second capacitor and applying a sum of the input voltage and a voltage across the first capacitor to an output capacitor in a first predetermined period after start of a boosting operation; and triple boosting portion for repeating in order, after end of the first predetermined period, a step of applying the sum of the input voltage and the voltage across the first capacitor to the second capacitor and a step of applying a sum of the voltage across the first capacitor and a voltage across the second capacitor to the output capacitor. | 03-12-2015 |
20150077174 | HALF-RATIO CHARGE PUMP CIRCUIT - A half-ratio charge pump circuit includes a flying capacitor electrically coupled between a first node and a second node. Eight switches are controlled to carry out first to fourth operating phases during which charges are stored on and transferred from the flying capacitor, thereby generating a positive output voltage at approximately half the positive input voltage, and generating a negative output voltage at approximately half the negative input voltage. | 03-19-2015 |
20150077175 | CHARGE PUMP TIMING CONTROL - Cycle timing of a charge pump is adapted according to monitoring of operating characteristics of a charge pump and/or peripheral elements coupled to the charge pump. In some examples, this adaptation provides maximum or near maximum cycle times while avoiding violation of predefine constraints (e.g., operating limits) in the charge pump and/or peripheral elements. | 03-19-2015 |
20150077176 | PARTIAL ADIABATIC CONVERSION - Operation of a charge pump is controlled to optimize power conversion efficiency by using an adiabatic mode with some operating characteristics and a non-adiabatic mode with other characteristics. The control is implemented by controlling a configurable circuit at the output of the charge pump. | 03-19-2015 |
20150091637 | Amplitude Modulation for Pass Gate to Improve Charge Pump Efficiency - Techniques are presented for improving the efficiency of charge pumps. A charge pump, or a stage of a charge pump, provides its output through a pass gate. For example, this could be a charge pump of a voltage doubler type, where the output is supplied through pass gate transistors whose gates are connected to receive the output of an auxiliary section, also of a voltage doubler type of design. The waveforms provided to the gates of the pass gate transistors are modified so that their low values are offset to a higher value to take into account the threshold voltage of the pass gate transistors. In a voltage doubler based example, this can be implemented by way of introducing diodes into each leg of the auxiliary section. | 04-02-2015 |
20150102854 | High Efficiency Charge Pump Circuit - The present document relates to charge pump voltage doublers for use in integrated circuits. A charge pump circuit configured to generate an output voltage Vout at an output of the circuit from an input voltage Vin at an input of the circuit is described. The circuit further comprises a boosting capacitor coupled at a first side to the output node of the first P-type switch and coupled at a second side to a capacitor control signal. Furthermore, the circuit comprises control circuitry configured to provide a capacitor control-signal-which alternates between a low level and a high level, and configured to generate first and second control signals based on the capacitor control signal for alternating the first and second P-type switches between on-states and off-states, respectively, such that electrical energy is transferred from the input to the output of the circuit using the boosting capacitor. | 04-16-2015 |
20150102855 | SEMICONDUCTOR DEVICE - There is provided a semiconductor device in which an influence of a power source noise is suppressed and the number of pins and the area of the semiconductor device are reduced. A power source line for a first internal circuit and a power source line for a second internal circuit are coupled to a common pin terminal. A ground line for the first internal circuit and a ground line for the second internal circuit are coupled to another common pin terminal. A power source noise generated on the power source line for the first internal circuit during an operation of the first internal circuit is absorbed by a P-channel MOS transistor and a capacitor. A power source noise generated on the ground line is absorbed by an N-channel MOS transistor and the capacitor. | 04-16-2015 |
20150116030 | BODY BIAS CONTROL CIRCUIT - A body bias control circuit including an output coupled to provide a bias voltage to a body terminal. The body bias control circuit is configured to change the bias voltage from a first bias voltage to a second bias voltage over a period of time in which a magnitude of an effective rate of change of the bias voltage varies over the period of time. For voltages between the first and second bias voltages closer to a source voltage, the magnitude of the effective rate of change is smaller than for bias voltages between the first and second bias voltages further from the source voltage. | 04-30-2015 |
20150123727 | LOW VOLTAGE AND HIGH DRIVING CHARGE PUMP - The present disclosure relates to a charge pump circuit having one or more voltage multiplier circuits that enable generation of an output signal having a higher output voltage. In one embodiment, the charge pump circuit comprises a NMOS transistor having a drain connected to a supply voltage and a source connected to a chain of diode connected NMOS transistors coupled in series. A first voltage multiplier circuit is configured to generate a first two-phase output signal having a maximum voltage value that is twice the supply voltage. The first two-phase output signal is applied to the gate of the NMOS transistor, forming a conductive channel between the drain and the source, thereby allowing the supply voltage to pass through the NMOS transistor without a threshold voltage drop. Therefore, degradation of the charge pump output voltage due to voltage drops of the NMOS transistor is reduced, resulting in larger output voltages. | 05-07-2015 |
20150137876 | Method of Reusing Electrical Energy and Related Electrical Energy reusing Circuit - The present disclosure provides a method of reusing electrical energy for a charge pump. The method comprises operating in a reusing phase after a boosting phase is completed; retrieving energy of parasitic capacitance in the reusing phase; and reusing the energy of the parasitic capacitance for an internal circuit. | 05-21-2015 |
20150145591 | CHARGE PUMP WITH REDUCED CURRENT CONSUMPTION - The output voltage of a LP HV charge pump is compared with a voltage reference using a comparator having hysteresis. When the output voltage exceeds the reference voltage, an input clock to the charge pump is turned off, causing the output voltage to fall due to leakage current in the non-volatile memory. After a time delay due to the hysteresis of the comparator, the input clock is turned on, causing the output voltage to rise again until the voltage reference is again exceeded at which time the input clock is again turned off again. The process repeats, resulting in a reduction of average current consumption by the LP HV charge pump. | 05-28-2015 |
20150295492 | SILICON-ON-INSULATOR-BASED VOLTAGE GENERATION CIRCUIT - A silicon-on-insulator (SOI) based positive/negative voltage generation circuit includes: an inverter including an NMOS transistor and a PMOS transistor, a first transfer capacitor coupled to the PMOS transistor, a first output capacitor, a second transfer capacitor coupled to the NMOS transistor, a second output capacitor, a first diode disposed between the first transfer capacitor and the first output capacitor, a second diode disposed between the second transfer capacitor and the second output capacitor, one end of the first output capacitor is coupled to the ground, one end of the second output capacitor is coupled to the ground; wherein an output voltage of the inverter is controlled by a single-phase clock to flip periodically, charge the first transfer capacitor through a parasitic diode of the PMOS transistor, and charge the second transfer capacitor through a parasitic diode of the NMOS transistor. | 10-15-2015 |
20150295493 | CHARGE PUMP APPARATUS AND CHARGE PUMPING METHOD - A charge pumping method includes: generating a first boosted voltage by boosting an input voltage by a boosting mode of a first multiplier; changing the level of a voltage charged in at least one capacitor provided in the inside of a charge pump circuit, in preparation for a change in the boosting mode; and generating a second boosted voltage by boosting the input voltage by a boosting mode of a second multiplier. | 10-15-2015 |
20150303794 | Charge Pump Regulator Circuit - A charge pump regulator circuit includes an oscillator and one or more charge pumps. One or more oscillating signals are generated by the oscillator. Each oscillating signal has a peak-to-peak amplitude that is variable dependent on a variable drive signal. For some embodiments having multiple oscillating signals, each oscillating signal is phase shifted from a preceding oscillating signal. For some embodiments having multiple charge pumps, each charge pump is connected to receive a corresponding one of the oscillating signals. Each charge pump outputs a voltage and current. For some embodiments having multiple charge pumps, the output of each charge pump is phase shifted from the outputs of other charge pumps. A combination of the currents thus produced is provided at about a voltage level to a load. | 10-22-2015 |
20150311784 | CHARGE PUMPS HAVING VARIABLE GAIN AND VARIABLE FREQUENCY - In one embodiment, a circuit comprises a charge pump. A gain control circuit is configured to detect an input voltage and generate a gain control signal to change a gain of the charge pump to maintain the output voltage of the charge pump in a voltage range. A voltage to frequency converter is configured to detect the input voltage and change a frequency of a frequency control signal applied to the charge pump based in the detected input voltage to maintain the frequency in a frequency range so that the output voltage of the charge pump is maintained in the voltage range. | 10-29-2015 |
20150311785 | Low-Noise High Efficiency Bias Generation Circuits and Method - A bias generation method or apparatus defined by any one or any practical combination of numerous features that contribute to low noise and/or high efficiency biasing, including: having a charge pump control clock output with a waveform having limited harmonic content or distortion compared to a sine wave; having a ring oscillator to generating a charge pump clock that includes inverters current limited by cascode devices and achieves substantially rail-to-rail output amplitude; having a differential ring oscillator with optional startup and/or phase locking features to produce two phase outputs suitably matched and in adequate phase opposition; having a ring oscillator of less than five stages generating a charge pump clock; capacitively coupling the clock output(s) to some or all of the charge transfer capacitor switches; biasing an FET, which is capacitively coupled to a drive signal, to a bias voltage via an “active bias resistor” circuit that conducts between output terminals only during portions of a waveform appearing between the terminals, and/or wherein the bias voltage is generated by switching a small capacitance at cycles of said waveform. A threshold voltage bias voltage generation circuit may A charge pump for the bias generation may include a regulating feedback loop including an OTA that is also suitable for other uses, the OTA having a ratio-control input that controls a current mirror ratio in a differential amplifier over a continuous range, and optionally has differential outputs including an inverting output produced by a second differential amplifier that optionally includes a variable ratio current mirror controlled by the same ratio-control input. The ratio-control input may therefore control a common mode voltage of the differential outputs of the OTA. A control loop around the OTA may be configured to control the ratio of one or more variable ratio current mirrors, which may particularly control the output common mode voltage, and may control it such that the inverting output level tracks the non-inverting output level to cause the amplifier to function as a high-gain integrator. | 10-29-2015 |
20150311786 | PUMP CAPACITOR CONFIGURATION FOR SWITCHED CAPACITOR CIRCUITS - A cascade multiplier includes a switch network having switching elements, a phase pump, and a network of pump capacitors coupled with the phase pump and to the switch network. The network of pump capacitors includes first and second capacitors, both of which have one terminal DC coupled with the phase pump, and a third capacitor coupled with the phase pump through the first capacitor. | 10-29-2015 |
20150318782 | CAPACITANCE MULTIPLIER AND METHOD - Capacitance multiplier circuitry provides an increased equivalent capacitance, and may be implemented using a desirably small footprint. As may be implemented in accordance with one or more embodiments, a capacitor provides a first capacitance across first and second plates, and capacitance multiplier circuitry operates with the capacitor to provide a second equivalent capacitance that is a multiple of the first capacitance. The capacitance multiplier circuitry includes a first circuit path having a first resistor between the first plate and a common terminal, and a second circuit path having a switch and a second resistor between the second plate and the common terminal. An amplifier has differential inputs respectively corresponding to the first and second circuit paths and provides the second equivalent capacitance by controlling operation of the switch based upon the differential inputs and the respective resistances provided by the resistors in the first and second circuit paths. | 11-05-2015 |
20150333623 | CHARGE PUMP WITH WIDE OPERATING RANGE - A charge pump at least includes a current source, a first switch, a second switch, a level-shift circuit, and a capacitor. The first switch is coupled between the current source and an internal node. The capacitor is coupled between the internal node and the level-shift circuit. The second switch is coupled between the internal node and an output node. The first switch performs a closing-and-opening operation and the level-shift circuit performs a level-shift operation while the second switch is kept open and the internal node is isolated from the output node. The operating range of the charge pump is effectively widened by using the proposed design. | 11-19-2015 |
20150349809 | RADIO FREQUENCY SWITCH CONTROLLER - Implementations of radio frequency switch controllers within the scope of the appended claims are configured to reduce the impact of the clock signal induced spurs. In particular, implementations of switch controllers described herein include a poly-phase clocking scheme, as opposed to a single phase to clock the charge pump stages of an negative voltage generator. In some implementations poly-phase clocking schemes reduce the clock signal induced spurs and may preclude the need for additional on-chip or off-chip decoupling capacitors that add to the cost and physical size of a complete front end module solution. | 12-03-2015 |
20150364992 | CHARGE PUMP SYSTEM AND CHARGE PUMP PROTECTION CIRCUIT - A charge pump system may include a charge pump including a plurality of boosting units boosting an input voltage input to an input terminal multiple times depending on clock signals and outputting the boosted voltage to an output terminal; and a charge pump protection circuit including a series resistor unit disposed between the output terminal and a ground and including a plurality of resistors connected to each other in series. A portion of the plurality of resistors are disposed in parallel to a portion of the plurality of boosting units. | 12-17-2015 |
20150372590 | CHARGE PUMP, POTENTIAL CONVERSION CIRCUIT AND SWITCHING CIRCUIT - A charge pump includes a positive potential generation circuit that generates a positive potential, and a negative potential generation circuit that generates a negative potential. The positive potential generation circuit includes rectifying elements connected in series between a reference potential node and an output node, and capacitors are connected to a node between each adjacent pair of rectifying elements and to one of a first and second clock signal port. The negative potential generation circuit includes rectifying elements connected in series between the reference potential node and the output node in an opposite direction to that of the first rectifying elements. Capacitors are connected to a node between each adjacent pair of rectifying element in the negative potential generation circuit and one of a third and fourth clock signal port. | 12-24-2015 |
20150372591 | POSITIVE AND NEGATIVE POTENTIAL GENERATING CIRCUIT - A potential generating circuit of includes a charge pump having a first node at which a positive potential is output and a second node at which a negative potential is output. The potential generating circuit also includes a first filter between the first node and a first terminal that removes noise and outputs a filtered positive potential at the first terminal. A first clamp circuit adjusts the level of the filtered positive potential. A second filter is between the second node and a second terminal to remove noise from the negative potential and output a filtered negative potential at the second terminal. A second clamp circuit adjusts the level of the filtered negative potential. In the potential generating circuit there is no direct connection between the first end node and a ground line or between the ground line and the second end node. | 12-24-2015 |
20150372592 | APPARATUS AND METHODS FOR LOW VOLTAGE HIGH PSRR SYSTEMS - Provided herein are apparatus and methods for low voltage high power supply rejection ratio (PSRR) systems. A charge pump converts a supply voltage to a larger charge pump voltage and provides the charge pump voltage to a circuit subsystem. The charge pump voltage is regulated to a state dependent reference. In the steady state the charge pump voltage is regulated with respect to an output voltage of the circuit subsystem; in this way PSRR of the circuit subsystem is enhanced. | 12-24-2015 |
20150381034 | Charge Pump Device and Driving Capability Adjustment Method Thereof - A charge pump device includes a driving stage, for generating a driving signal corresponding to a driving capability, a charge pump circuit, for generating an output voltage according to the driving signal, a comparing circuit, for generating a comparison result according to the output voltage and a reference voltage, a duty cycle detecting circuit, for detecting a length of a duty cycle of an indicating signal indicating the comparing result, to generate a detection result indicating the duty cycle, and a driving capability control circuit, coupled between the duty cycle detecting circuit and the driving stage, for controlling the driving capability corresponding to the driving signal according to the detection result. | 12-31-2015 |
20150381035 | DROOP REDUCTION CIRCUIT FOR CHARGE PUMP BUCK CONVERTER - A Charge Pump Buck Converter (CPBC) includes a BC including an inductor and a CP coupled in parallel. Control logic is coupled to a switch driver coupled to a power switch(es). Control circuitry includes a voltage sensor sensing Vout and a voltage level generator for generating a first voltage level coupled to the CP stage and a second voltage level coupled to a duty cycle/rate generator block providing an input to an under voltage (UV) monitor coupled between OUT and the control logic. The control circuitry disables the CP when Vout>a first Vout level and controls the BC to regulate to a second Vout level>the first Vout level. During handoff between CP and BC during power up if Vout drops below a UV threshold, the UV monitor block modifies an input applied to the control logic for increasing charging supplied to the inductor. | 12-31-2015 |
20150381036 | CHARGE PUMP CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - Efficiency of a charge pump circuit is increased. The charge pump circuit includes serially connected fundamental circuits each including a diode-connected transistor and a capacitor. At least one transistor is provided with a back gate, and the back gate is connected to any node in the charge pump circuit. For example, the charge pump circuit is of a step-up type; in which case, if the transistor is an n-channel transistor, a back gate of the transistor in the last stage is connected to an output node of the charge pump circuit. Back gates of the transistors in the other stages are connected to an input node of the charge pump circuit. In this way, the voltage holding capability of the fundamental circuit in the last stage is increased, and the conversion efficiency can be increased because an increase in the threshold of the transistors in the other stages is prevented. | 12-31-2015 |
20160004265 | RADIO FREQUENCY PEAK DETECTION WITH SUBTHRESHOLD BIASING - A radio-frequency peak amplitude detection circuit includes a load capacitor, a current source that charges the load capacitor and set the bias current for the field effect transistors, and a pair of field effect transistors. The gates of the field effect transistors are biased at a level below the threshold voltage of the transistors. The transistors are arranged in parallel with the capacitor and are operable to drain the capacitor at a rate determined by a differential input at the gates of the transistors. The voltage across the load capacitor is low-pass filtered and has a voltage level representative of the amplitude of the differential input signal. | 01-07-2016 |
20160006348 | CHARGE PUMP APPARATUS - The invention provides a charge pump apparatus including a clock signal generator, a clock freezing circuit, a charge pump circuit, and a feedback circuit. The clock signal generator generates a clock signal. The clock freezing circuit directly receives the clock signal and an enable signal. The clock freezing circuit decides whether to pass or latch a voltage level of the clock signal according to the enable signal to generate a controlled clock signal. The charge pump circuit directly receives the controlled clock signal and operates a charge pump operation on an input voltage to generate a pumping voltage. | 01-07-2016 |
20160006349 | FOUR-PHASE CHARGE PUMP CIRCUIT - A four-phase charge pump circuit including an output stage and multiple boosting stages is provided. The multiple boosting stages are coupled to the output stage in series, and each of the multiple boosting stages is driven by four-phase clock signals. The output stage is driven by two clock signals of the four-phase clock signals and outputs a positive boosted voltage, and thereby the four-phase charge pump circuit is a positive charge pump circuit. Each of the boosting stages includes two branch charge pumps, and each of the two branch charge pumps includes a main pass transistor and a pre-charge transistor. The main pass transistors and the pre-charge transistors of the boosting stages are disposed on an identical deep doped region. | 01-07-2016 |
20160020694 | CHARGE PUMP FOR LOW POWER CONSUMPTION APPARATUS AND ASSOCIATED METHODS - An apparatus includes a first set of circuits adapted to operate in a first mode of operation of the apparatus. The apparatus further includes a second set of circuits adapted to operate in a second mode of operation of the apparatus, where a power consumption of the apparatus is lower in the second mode of operation of the apparatus than in the first mode of operation of the apparatus. The apparatus also includes a charge pump adapted to convert a first supply voltage of the apparatus to a second supply voltage, and the second supply voltage powers the second set of circuits. | 01-21-2016 |
20160065058 | TWO-STATE CHARGE-PUMP CONTROL-LOOP FOR MEMS DVC CONTROL - The present invention generally relates to a DVC having a charge-pump coupled to a MEMS device. The charge-pump is designed to control the output voltage delivered to the electrodes, such as the pull-in electrode or the pull-off electrode, that move the switching element within the MEMS device between locations spaced far from and disposed closely to the RF electrode. | 03-03-2016 |
20160065060 | CONTROL CIRCUIT AND CONTROL METHOD FOR CHARGE PUMP CIRCUIT - A method of controlling a charge pump circuit can include: (i) detecting a difference between an output voltage and an input voltage in real time; (ii) generating an error amplifying signal by comparing the difference between the output voltage and the input voltage against a predetermined difference; and (iii) generating a control voltage signal for controlling the charge pump circuit according to the error amplifying signal, where a frequency of the control voltage signal positively changes along with the difference between the output voltage and said input voltage when the difference between the output voltage and the input voltage is greater than the predetermined difference. | 03-03-2016 |
20160072380 | CHARGE PUMP POWER SUPPLY WITH OUTPUT VOLTAGE SENSING USING RESIDUAL CHARGE ON A FLYING CAPACITOR - A regulated charge pump power supply is implemented with a QP regulation loop providing QP clocking to control pumping operation based on sensing output voltage using residual charge on a flying capacitor Cfly. Cfly is used not only in normal charge pumping operation as an active charge shuttle element, but also to determine/measure output voltage VOUT. Voltage sensing using measured residual charge on Cfly is accomplished by introducing a sample phase into the normal charge pumping operation—after the pump phase and before the charge phase. In the sample phase, VOUT is determined (sampled) based on the residual charge on Cfly corresponding to (Vsense=VOUT−VIN). During the sample phase, the Cfly bottom plate is connected to ground, and the Cfly top plate is sampled (such as with a sense capacitor), with the sample phase completed prior to initiating a charge phase (by connecting the Cfly top plate to VIN). | 03-10-2016 |
20160072383 | System and Method for a Controlled Feedback Charge Pump - According to various embodiments, a circuit includes a charge pump and a feedback circuit. The charge pump includes a first input, a second input configured to receive an offset signal, and an output terminal configured to provide a charge pump signal based on the first and second inputs. The feedback circuit includes a first input coupled to the output of the charge pump, a second input configured to be coupled to a reference signal, an enable input configured to enable and disable the feedback circuit, and a feedback output coupled to the first input of the charge pump. | 03-10-2016 |
20160079848 | BOOTSTRAP CIRCUIT - Bootstrap circuit includes: a first transistor of first conductivity type having a first main electrode, a second main electrode and a control electrode connected to a first power supply terminal, a first node, and a second node, respectively; a second transistor of the first conductivity type having a first main electrode, a second main electrode, and a control electrode connected to the first power supply terminal, the second node and the first node, respectively; a first capacitor having a first end connected to the first node and a second end where a first boost pulse is applied; a second capacitor having a first end connected to the second node and a second end where a second boost pulse having opposite polarity to the first boost pulse is applied; and a boost output terminal which outputs boost voltage higher than first power supply voltage supplied to the first power supply terminal | 03-17-2016 |
20160079849 | CHARGE PUMP INITIALIZATION DEVICE, INTEGRATED CIRCUIT HAVING CHARGE PUMP INITIALIZATION DEVICE, AND METHOD OF OPERATION - An initialization device for a charge pump includes a driving circuit and a bias voltage circuit. The driving circuit is between two power supply nodes. The driving circuit includes a first node configured to be coupled to an output electrode of a capacitor in the charge pump. The bias voltage circuit is coupled to the two power supply nodes. The bias voltage circuit includes a second node coupled to a control terminal of the driving circuit. In response to an applied initialization signal, the bias voltage circuit is configured to output a bias voltage to the second node. The bias voltage has at least two levels that correspond to levels of the applied initialization signal. In response to the bias voltage, the driving circuit is configured to output an output signal having at least two levels that correspond to the at least two levels of the bias voltage. | 03-17-2016 |
20160105100 | Charge Pump System for Reducing Output Ripple and Peak current - A charge pump system includes a plurality of pump units, a control circuit, and a detection circuit. The plurality of pump units are used for generating a pump output voltage. The control circuit is coupled to the plurality of pump units and is used for controlling each pump unit of the plurality of pump units. The detection circuit is coupled to the control circuit and the plurality of pump units and is used for detecting the pump output voltage. When the pump output voltage is greater than a predetermined value, the detection circuit generates and latches a control signal to enable the control circuit. After the control circuit is enabled, when the pump output voltage is detected to be smaller than the predetermined value, the detection circuit generates a first pump enable signal to the control circuit for enabling a first pump unit of the plurality of pump units. | 04-14-2016 |
20160118879 | CHARGE PUMP - Charge-pump devices and corresponding methods are disclosed. A control input of a valve transistor of the charge pump device may be coupled with one of an input terminal or an output terminal via a further transistor. | 04-28-2016 |
20160126830 | CHARGE PUMP CIRCUIT, INTEGRATED CIRCUIT, ELECTRONIC DEVICE AND METHOD THEREFOR - A charge pump circuit for generating a negative voltage has a switched capacitor voltage inverter circuit arranged to receive at least one clock signal and generate a negative voltage therefrom; a regulation control loop providing a feedback path from the output of the switched capacitor voltage inverter circuit to a supply input of the switched capacitor voltage inverter circuit, wherein the regulation control loop has a filter arranged to filter the generated negative voltage; and an output arranged to output the filtered generated negative voltage. | 05-05-2016 |
20160126831 | CHARGE PUMP CIRCUIT, INTEGRATED CIRCUIT, ELECTRONIC DEVICE AND METHOD THEREFOR - A charge pump circuit for generating a negative voltage has: a clock generator arranged to output at least one clock signal; a switched capacitor voltage inverter circuit including capacitive elements wherein the switched capacitor voltage inverter circuit receives the at least one clock signal and generates a negative voltage therefrom. The charge pump circuit further has a regulation control loop providing a feedback path from an output of the switched capacitor voltage inverter circuit to a supply input of the switched capacitor voltage inverter circuit, and an output arranged to output a generated negative voltage. The feedback path has an operational amplifier configured to generate a maximum charging supply voltage from a fed back level-shifted negative voltage and apply the maximum charging supply voltage to the input supply of the switched capacitor voltage inverter to charge at least one of the capacitive elements during a loop start up. | 05-05-2016 |
20160126832 | CIRCUITS, DEVICES, AND METHODS FOR OPERATING A CHARGE PUMP - Circuits, devices, and methods for operating a charge pump. In some implementations, a charge pump module includes a clock circuit configured generate to a first clock signal and a second clock signal, the first clock signal having a lower frequency than the second clock signal. The charge pump module also includes a driving circuit configured to generate a first set of clock signals based on the first clock signal and a second set of clock signals based on the second clock signal, the driving circuit coupled to the clock circuit. The charge pump module further includes a charge pump core including a set of capacitances, the charge pump core configured to charge the set of capacitances based the first set of clock signals and the second set of clock signals. | 05-05-2016 |
20160126834 | CHARGE PUMP CIRCUIT AND METHODS OF OPERATION THEREOF - A charge pump circuit, and associated method and apparatuses, for providing a split-rail voltage supply, the circuit having a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of said states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage and centered on the voltage at the common terminal. | 05-05-2016 |
20160126835 | Variable Frequency Charge Pump - A charge pump circuit that utilizes a sensing circuit for determining the current loading or status of the output supply generated by the charge pump circuit to determine a corresponding frequency for a variable rate clock for the charge pump circuit. When a current load is present, the clock frequency automatically ramps up to a relatively high level to increase the output current of the charge pump circuit. When the current load is removed and the supply is settled out, the clock frequency is automatically reduced to a relatively quieter level and the charge pump circuitry operates at a lower power level. Accordingly, the charge pump circuit is only noisy when it has to be, thus providing optimal power when required and being electrically quiet and operating at lower power at all other times. | 05-05-2016 |
20160149485 | INTERNAL VOLTAGE GENERATION CIRCUITS - An internal voltage generation circuit may include a pump controller and an internal voltage generator. The pump controller suitable for generating a first control signal enabled if a level of an internal voltage signal is lower than a target voltage level and a second control signal enabled if a level of the internal voltage signal is lower than the target voltage level after a predetermined period elapses from a point of time that the internal voltage signal is pumped. The internal voltage generator suitable for pumping the internal voltage signal with a first drivability in response to the first control signal and suitable for pumping the internal voltage signal with a second drivability in response to the second control signal. | 05-26-2016 |
20160156261 | CONTROL CIRCUIT AND METHOD | 06-02-2016 |
20160164401 | CHARGE PUMP CIRCUIT FOR PROVIDING VOLTAGES TO MULTIPLE SWITCH CIRCUITS - A charge pump circuit generates a charge pump voltage that powers a bias circuit. The bias circuit generates a reference current and generates switch currents from the reference current. Gate-source voltages are generated from the switch currents and applied to switching components of switch circuits to connect two nodes. The gate-source voltages can be generated in the bias circuit and provided to the switch circuits. The gate-source voltages can also be generated in the switch circuits. | 06-09-2016 |
20160164402 | FAIL-SAFE INTERFACE - A fail-safe interface circuit arranged to provide an inverter enable input to drive an inverter, the circuit being supplied by a first voltage and comprising: a charge pump comprising a charge pump input and a charge pump output, the charge pump output being coupled to a circuit output; and a pulsed input arranged to supply pulsed power to the charge pump input; wherein the charge pump output is arranged to produce a second voltage distinct from the first voltage only when the pulsed input is supplying pulsed power to the charge pump input, and wherein the circuit output is arranged to provide the inverter enable input when the second voltage is produced at the charge pump output. | 06-09-2016 |
20160164403 | CHARGE PUMP CIRCUIT - A charge pump circuit includes a sub-circuit, which is a pumping stage circuit or an output stage circuit. The sub-circuit includes an input terminal, an output terminal, a transistor, a first capacitive device, a first diode device, and a second diode device. The transistor has a first source/drain (S/D) terminal coupled with the input terminal, a second S/D terminal coupled with the output terminal, and a gate terminal. The first capacitive device has a first end coupled with the gate terminal of the transistor and a second end configured to receive a first driving signal. The first diode device has a cathode coupled with the second S/D terminal of the transistor and an anode coupled with the gate terminal of the transistor. The second diode device has a cathode coupled with the gate terminal of the transistor and an anode coupled with the second S/D terminal of the transistor. | 06-09-2016 |
20160164404 | COLD START DC/DC CONVERTER - A DC/DC converter comprising a first charge pump circuit including first MOS transistors including first depletion MOS transistors, an oscillating circuit connected to the charge pump circuit only at the gates of some at least of the first MOS transistors, including the first depletion MOS transistors. | 06-09-2016 |
20160164513 | VOLTAGE GENERATION APPARATUS - A voltage generation apparatus may include an external voltage sensing circuit configured to generate a first start signal and a second start signal by sensing the magnitude of a first external voltage and the magnitude of a second external voltage. The voltage generation apparatus may include an internal voltage sensing circuit configured to generate a voltage generation signal by comparing an internal voltage with a target voltage. The voltage generation apparatus may include a voltage pumping circuit configured to be activated in response to the first start signal, configured to perform a pumping operation based on the voltage generation signal, and configured to generate the internal voltage. The voltage generation apparatus may include a voltage regulating circuit configured to be activated in response to the first and second start signals, and configured to generate the internal voltage based on the voltage generation signal. | 06-09-2016 |
20160172969 | VOLTAGE GENERATOR | 06-16-2016 |
20160181912 | REGULATION FOR MULTI-PHASE VOLTAGE PUMP SYSTEM | 06-23-2016 |
20160181913 | Negative Charge Pump Feedback Circuit | 06-23-2016 |
20160191022 | Low Noise Charge Pump Method and Apparatus - A charge pump method and apparatus is described having various aspects. Noise injection from a charge pump to other circuits may be reduced by limiting both positive and negative clock transition rates, as well as by limiting drive currents within clock generator driver circuits, and also by increasing a control node AC impedance of certain transfer capacitor coupling switches. A single-phase clock may be used to control as many as all active switches within a charge pump, and capacitive coupling may simplify biasing and timing for clock signals controlling transfer capacitor coupling switches. Any combination of such aspects of the method or apparatus may be employed to quiet and/or simplify charge pump designs over a wide range of charge pump architectures. | 06-30-2016 |
20160191043 | Circuit and Method for Controlling Operation Voltage, and Storage Device - A circuit and a method for controlling operation voltage, and a storage device are provided. The circuit includes: a voltage boost unit adapted for: if receiving a first signal, performing a voltage boost process; and if receiving a second signal, stopping the voltage boost process; a voltage division unit including a plurality of different voltage division coefficients, adapted for performing a voltage division process; a comparison unit adapted for: comparing the divided voltage with a reference voltage; if the divided voltage is low, outputting the first signal; and if not, outputting the second signal; a control unit adapted for performing a descending switching operation on the voltage division coefficients; and an output unit. The establishing speed of the operation voltage is effectively controlled, and an effect on device power consumption and performance caused by the threshold voltage and variations of the threshold voltage in the working process is eliminated. | 06-30-2016 |
20160197551 | CHARGE PUMP CIRCUIT CAPABLE OF REDUCING REVERSE CURRENTS | 07-07-2016 |
20160204695 | CHARGE PUMP CIRCUIT AND METHOD OF CONTROLLING SAME | 07-14-2016 |
20160204696 | LOW VOLTAGE SWITCH CONTROL | 07-14-2016 |
20160204699 | NEGATIVE REFERENCE VOLTAGE GENERATING CIRCUIT AND SYSTEM THEREOF | 07-14-2016 |
20180026527 | REGULATED VOLTAGE SYSTEMS AND METHODS USING INTRINSICALLY VARIED PROCESS CHARACTERISTICS | 01-25-2018 |
20180026529 | CIRCUIT FOR CLAMPING CURRENT IN A CHARGE PUMP | 01-25-2018 |
20180026530 | CHARGE PUMP | 01-25-2018 |