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With specific source of supply or bias voltage

Subclass of:

327 - Miscellaneous active electrical nonlinear devices, circuits, and systems

327524000 - SPECIFIC IDENTIFIABLE DEVICE, CIRCUIT, OR SYSTEM

Patent class list (only not empty are listed)

Deeper subclasses:

Class / Patent application numberDescriptionNumber of patent applications / Date published
327534000 Having particular substrate biasing 596
327538000 Stabilized (e.g., compensated, regulated, maintained, etc.) 507
327544000 Power conservation or pulse type 75
327545000 Including signal protection or bias preservation 14
327531000 Fluctuating or AC source with rectifier or filter 5
20130027119System Incorporating Power Supply Rejection Circuitry and Related Method - A system and method providing power supply rejection. One embodiment provides for power supply rejection in PLL or DLL circuitry. First subcircuitry provides second subcircuitry a supply voltage which is a filtered version of power from an external source. The first subcircuitry includes a first field effect transistor and a first low pass filter coupled to receive a signal from the external power source during operation of the second subcircuitry. The filter is coupled to provide a filtered version of the power source signal to the gate of the first transistor, so that when a first source/drain region of the first transistor is connected to receive power from the external source and the gate of the first transistor receives the filtered version of the power source signal, the second source/drain region of the first transistor provides a first modified version of the power received from the external source.01-31-2013
20130069709AC POWERED LOGIC CIRCUITS AND SYSTEMS INCLUDING SAME - AC powered logic circuits and systems including same are disclosed. According to one aspect, a system including a logic circuit powered using an alternating current (AC) power source includes at least one supply transistor connected to receive voltages of opposite phases from an AC power source such that the at least one supply transistor is strongly on during a first phase of the voltage of the AC power source and is strongly off during a second phase opposite the first phase of the voltage of the AC power source and at least one logic circuit connected to be powered by the AC power source through the at least one supply transistor and producing an output at an output terminal responsive to an input received at an input terminal.03-21-2013
20100207682VOLTAGE CONVERSION CIRCUIT - A voltage conversion circuit with reduced power consumption can be used for a power supply device (08-19-2010
20100321097POWER SUPPLY CIRCUIT FOR SATA CONTROL CHIP - A power supply circuit includes a first power circuit having a first power output terminal and a first ground output terminal, a second power circuit having a second power output terminal and a second ground output terminal, and a SATA control chip having a first input terminal, a second input terminal, a third input terminal, and a fourth input terminal. The first power circuit comprises a first filter circuit. The second power circuit comprises a second filter circuit. The first power output terminal, first ground output terminal, second power output terminal, and second ground output terminal are electrically coupled to the SATA control chip via the first input terminal, second input terminal, third input terminal, and fourth input terminal respectively. The first and second power circuits provide power to the SATA control chip via the first and second filter circuits respectively.12-23-2010
20110267138Synchronous rectifier circutits - This invention relates in Synchronous Rectifier Circuits, comprises: AC input terminal, switch, driving circuit, protect opposite current circuit and a load, to improved conventional Synchronous Rectifier Circuits, can be achieve rectify function.11-03-2011
327548000 With oscillator or interrupter 4
20090167425SEMICONDUCTOR MEMORY DEVICE HAVING BACK-BIAS VOLTAGE IN STABLE RANGE - A back-bias voltage generating circuit controls the back-bias voltage in a predetermined range by detecting the back-bias voltage in case the back-bias voltage level decreases below a predetermined target level. The circuit includes first and second detecting units outputting respective detection signals, which detect a voltage level of the terminal based on respective higher first and lower second target levels. An oscillator generates an oscillation signal that oscillates at a predetermined frequency, in response to a detection signal of the first voltage detecting unit. A charge pumping unit drives the terminal by performing charge pumping in response to the oscillation signal. A voltage level control unit controls the voltage level of the terminal in response to the detection signals, whereby the terminal's voltage level is lower than the first target level and higher than the second target level.07-02-2009
20090231026Magneto-electric-induction conversion system of wireless input device - A magneto-electric-induction conversion system of a wireless input device includes an emitter and a receiver. A plurality of serially-connected resonant circuits, arranged side by side, makes resonance, so transmission energy is enhanced. An electromagnetic wave is transmitted via an inductive antenna, then received and converted by predetermined parallel-connected resonant circuits into an available power source, so that the energy is effectively delivered.09-17-2009
20130135039INTERNAL POWER SUPPLY CIRCUIT, SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - To provide an internal power supply circuit that supplies a power supply voltage to an internal circuit of a semiconductor device via an internal power supply wiring, the internal power supply circuit includes a plurality of power supply units connected in common to the internal power supply wiring and an internal-power-supply control circuit that selects either activation or deactivation with regard to at least a part of the power supply units.05-30-2013
20100052776INTERNAL VOLTAGE GENERATING CIRCUIT - An internal voltage generating circuit includes an oscillation unit configured to generate an oscillation signal, and to change a period of the oscillation signal according to whether is in a burn-in test mode; and a negative voltage pumping unit configured to generate a negative voltage in response to the oscillation signal.03-04-2010
327547000 With selectively or alternately DC or AC input 3
20130027126DUAL BOOST CONVERTER FOR UPS SYSTEM - A power converter includes a power conversion circuit switchably coupled to a first power input and a second power input. The power conversion circuit is operable to generate positive and negative DC output voltages and is configured such that, in a backup mode of operation, the negative DC output voltage is generated using backup power through a first current path of the power conversion circuit that includes a first diode coupled between the second power input and a second DC bus, and, in a line mode of operation, the negative DC output voltage is generated using AC input power through a second current path of the power conversion circuit that bypasses the first diode and includes a second diode coupled between the first power input and the second DC bus.01-31-2013
20120200346Through-Hole-Vias In Multi-Layer Printed Circuit Boards - Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of making and using such PCBs that include layers of laminate; at least one via hole traversing the layers of laminate, and a via conductor contained within the via hole, the via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a metal having a conductivity lower than the conductivity of copper.08-09-2012
20100289565INTEGRATED CIRCUITS AND METHODS FOR ENABLING HIGH-SPEED AC-COUPLED NETWORKS TO SUPPRESS NOISE DURING LOW-FREQUENCY OPERATION - An alternating-current (AC) coupling integrated circuit (IC) suppresses signal errors introduced by a steady-state input signal. The IC includes an operational amplifier, a true direct-current (DC) bias network, a complimentary DC-bias network and first and second feedback elements. The operational amplifier has an inverting input, a non-inverting input and an output. The true DC-bias network has first and second branches that are coupled to one another and the non-inverting input. The complimentary DC-bias network has third and fourth branches that are coupled to one another and the inverting input. First and second feedback elements generate first and second control signals in response to a characteristic of one of the true input signal and the complimentary input signal. The control signals prevent the voltage at the inputs to the operational amplifier from reaching an equivalent, steady-state, DC-bias voltage.11-18-2010
Entries
DocumentTitleDate
20120161856DIE POWER STRUCTURE - A die including a first set of power tiles arranged in a first array and having a first voltage; a second set of power tiles arranged in a second array offset from the first array and having a second voltage; a set of power mesh segments enclosed by the second set of power tiles and having the first voltage; a first power rail passing underneath the set of power mesh segments and the first set of power tiles; and a set of vias operatively connecting the power rail with the set of power mesh segments and the first plurality of power tiles.06-28-2012
20090195295Semiconductor device having power supply system - A semiconductor device is provided which includes: a first semiconductor integrated circuit; a ground line and a power supply line trough which electric power is supplied to the first semiconductor integrated circuit; and a variable impedance component which is connected between the ground line and the power supply line.08-06-2009
20090195296Method for Recovering an On-State Forward Voltage and, Shrinking Stacking Faults in Bipolar Semiconductor Devices, and the Bipolar Semiconductor Devices - In a bipolar semiconductor device such that electrons and holes are recombined in a silicon carbide epitaxial film grown from the surface of a silicon carbide single crystal substrate at the time of on-state forward bias operation; an on-state forward voltage increased in a silicon carbide bipolar semiconductor device is recovered by shrinking the stacking fault area enlarged by on-state forward bias operation. In a method of this invention, the bipolar semiconductor device in which the stacking fault area enlarged and the on-state forward voltage has been increased by on-state forward bias operation, is heated at a temperature of higher than 350° C.08-06-2009
20110193618Semiconductor integrated circuit - A semiconductor integrated circuit includes: a main-interconnect to which supply voltage or reference voltage is applied; a plurality of sub-interconnects; a plurality of circuit cells configured to be connected to the plurality of sub-interconnects; a power supply switch cell configured to control, in accordance with an input control signal, connection and disconnection between the main-interconnect and the sub-interconnect to which a predetermined one of the circuit cells is connected, of the plurality of sub-interconnects; and an auxiliary interconnect configured to connect the plurality of sub-interconnects to each other.08-11-2011
20090121778Anti-Shock Methods for Processing Capacitive Sensor Signals - A low impedance coupling to bias voltage dissipates abnormal charge levels within a microphone in response to a shock event such as dropping or bumping. High impedance coupling to bias voltage is thereafter restored.05-14-2009
20100073072BIASING ARRANGEMENT, ELECTRONIC APPARATUS, BIASING METHOD, AND COMPUTER PROGRAM - A biasing arrangement for an electronic apparatus having an input device connected by wires is disclosed. The biasing arrangement comprises a bias signal generator arranged to provide a bias voltage and a reference voltage; a flying capacitor circuitry having a first set of switches connected to said bias signal generator to selectively connecting and disconnecting the bias voltage and reference voltage, respectively, over a capacitor of the flying capacitor circuitry, and the flying capacitor circuitry further having a second set of switches to selectively connecting and disconnecting the voltage over the capacitor to an output of the flying capacitor circuitry, wherein the first and second sets of switches are not both in a connecting state at any time; and a wired connection between output of the flying capacitor circuitry and the input device of the apparatus. An electronic apparatus, a biasing method, and a computer program are also disclosed.03-25-2010
20100045363DEVICE AND METHOD FOR SHARING CHARGE02-25-2010
20100109754Bias circuit for a switching power supply - A bias circuit for a switching power supply includes a rectifier that is connected to an AC power source and outputs a full wave rectified voltage Vs; a voltage divider, a diode, a first transistor, and a second transistor connected in parallel between Vs and ground; a capacitor connected between a first terminal of the second transistor and ground; and a node between the capacitor and the first terminal of the second transistor providing an output bias voltage Vcc from the bias circuit. A voltage from the voltage divider is provided to a gate of the first transistor, and the diode and a first terminal of the first transistor are connected to a gate of the second transistor.05-06-2010
20100327957METHOD AND SYSTEM TO FACILITATE CONFIGURABLE INPUT/OUTPUT (I/O) TERMINATION VOLTAGE REFERENCE - A method and system to facilitate configurable input/output (I/O) termination voltage reference in a transmitter or receiver. In one embodiment of the invention, the transmitter and receiver, each has a termination circuit to select a suitable termination reference voltage based on the desired coupling type. In one embodiment of the invention, the transmitter has a termination circuit coupled with a transmission driver and the transmitter selects only one of a supply voltage, a ground voltage and a half supply voltage as a termination voltage reference of the transmission driver. The receiver has a termination circuit to select either a supply voltage or a ground voltage as a termination voltage reference of the receiver.12-30-2010
20130088282APPARATUS AND METHOD FOR SUPPLYING POWER TO 300 PIN MSA 40GB TRANSPONDER - The disclosure provides a method and an apparatus for supplying power to a 300 PIN MSA 40 Gb TRANSPONDER. The apparatus comprises a power control module (04-11-2013
20130057334METHOD FOR PROVIDING A SYSTEM ON CHIP WITH POWER AND BODY BIAS VOLTAGES - Embodiments described in the present disclosure relate to a method for providing power for an integrated system, including acts of: providing the system with power, ground and body bias voltages, the body bias voltages comprising a body bias voltage of p-channel MOS transistors, greater or lower than the supply voltage, and a body bias voltage of n-channel MOS transistors, lower or greater than the ground voltage, selecting by means of the system out of the voltages provided, depending on whether a processing unit of the system is in a period of activity or inactivity, voltages to be supplied to bias the bodies of the MOS transistors of the processing unit, and providing the bodies of the MOS transistors of the processing unit with the voltages selected.03-07-2013
20130057333GRAPHENE VALLEY SINGLET-TRIPLET QUBIT DEVICE AND THE METHOD OF THE SAME - The present invention is to provide a graphene valley singlet-triplet qubit device. The device includes a substrate, and a graphene layer formed on the substrate. An energy gap is created between the valence band and the conduction band of the graphene layer. At least one electrical gate is configured on the graphene layer and/or on two sides of the graphene layer. The graphene layer is located in a magnetic field and a voltage is applied to at least one electrical gate, thereby creating a valley singlet-triplet qubit.03-07-2013
20090267682HIGH PRECISION POWER-ON-RESET CIRCUIT WITH AN ADJUSTABLE TRIGGER LEVEL - An electronic device comprising circuitry for providing a Power-on-Reset (POR) signal as a function of a supply voltage level of the circuitry. The circuitry comprises a Vbe-cell or a Vgs-cell comprising a first current path including a first transistor and a second current path including a second transistor. Each transistor has a control terminal for controlling a first current in the first current path and a second current in the second current path, wherein a control voltage level is commonly applied to the control terminals of the first and the second transistor. The control voltage level is derived from the current supply voltage level of the circuitry, and the circuitry further comprises a POR output node for providing a POR output signal, which changes from a first state to a second state in response to the ratio of the magnitudes of the first current and the second current.10-29-2009
20110012670Providing in package power supplies for integrated circuits - A device with an in package power supply may be utilized to supply power to other components. As a result, the overall system size may be reduced and economies may be achieved.01-20-2011
20110012669SEMICONDUCTOR-ON-INSULATOR WITH BACK SIDE CONNECTION - Embodiments of the present invention provide for the removal of excess carriers from the body of active devices in semiconductor-on-insulator (SOI) structures. In one embodiment, a method of fabricating an integrated circuit is disclosed. In one step, an active device is formed in an active layer of a semiconductor-on-insulator wafer. In another step, substrate material is removed from a substrate layer disposed on a back side of the SOI wafer. In another step, an insulator material is removed from a back side of the SOI wafer to form an excavated insulator region. In another step, a conductive layer is deposited on the excavated insulator region. Depositing the conductive layer puts it in physical contact with a body of an active device in a first portion of the excavated insulator region. The conductive layer then couples the body to a contact in a second detached portion of the excavated insulator region.01-20-2011
20130063203SEMICONDUCTOR INTEGRATED CIRCUIT, DESIGN METHOD OF SAME, AND DESIGN APPARATUS OF SAME - According to an embodiment, a semiconductor integrated circuit including first and second lower-layer power supply wires extending in a first direction and first and second upper-layer power supply wires extending in a second direction is provided. First and second connection wires between the upper-layer power supply wires and the lower-layer power supply wires are arranged in a same line along the second direction. First and second position converting wires extending from the connection wires are arranged between the first and second connection wires. First and second upper-side vias provided on the position converting wires are arranged in a same line along the first direction.03-14-2013
20090237144CHIP FOR NON-CONTACT READER/WRITER HAVING POWER-SUPPLY MANAGMENT FUNCTION - A semiconductor integrated-circuit device rectifies a received carrier wave, generates a first power-supply voltage based on the rectified output, and selects, as a power-supply voltage required for operation, one of the first power-supply voltage and a supplied second power-supply voltage. The first power-supply voltage is selected as the power-supply voltage required for operation when the second power-supply voltage is lower than a threshold value. The second power-supply voltage is selected as the power-supply voltage required for operation when the second power-supply voltage is equal to or higher than the threshold value and an instruction to operate in accordance with a predetermined function is given.09-24-2009
20120229197SEMICONDUCTOR DEVICE - The present invention provides a semiconductor device in which an adjustable range of a resistance value of a variable resistance circuit is large. The semiconductor device has an output buffer including a plurality of sets of resistance elements and a plurality of sets of transistors, a plurality of replica circuits, and a plurality of sets of operational amplifiers, and drain currents of the plurality of sets of transistors are adjusted so that output impedances of the output buffer become predetermined values. Therefore, even in the case where the resistance values of the resistance elements largely fluctuate due to fluctuations in manufacture process and the like, the output impedances can be set to predetermined values.09-13-2012
20110140765INTERNAL NEGATIVE VOLTAGE GENERATION DEVICE - An internal negative voltage generation device includes a first internal negative voltage generation block configured to generate a first internal negative voltage which is lower than a ground voltage; a second internal negative voltage generation block configured to generate a second internal negative voltage according to the first internal negative voltage, the second internal negative voltage being higher than the first internal negative voltage and lower than the ground voltage; and an initial driving block configured to additionally drive a second internal negative voltage terminal to the first internal negative voltage during an initial set time interval of an active operation time interval.06-16-2011
20120032730SEMICONDUCTOR INTEGRATED DEVICE - To reduce power consumption of a semiconductor integrated circuit and to reduce delay of the operation in the semiconductor integrated circuit, a plurality of sequential circuits included in a storage circuit each include a transistor whose channel formation region is formed with an oxide semiconductor, and a capacitor whose one electrode is electrically connected to a node that is brought into a floating state when the transistor is turned off. By using an oxide semiconductor for the channel formation region of the transistor, the transistor with an extremely low off-state current (leakage current) can be realized. Thus, by turning off the transistor in a period during which power supply voltage is not supplied to the storage circuit, the potential in that period of the node to which one electrode of the capacitor is electrically connected can be kept constant or almost constant. Consequently, the above objects can be achieved.02-09-2012
20120098589FERROELECTRIC NANOSHELL DEVICES - Disclosed herein are nanoscale devices comprising one or more ferroelectric nanoshells characterized as having an extreme curvature in at least one spatial dimension. Also disclosed are ferroelectric field effect transistors and metal ferroelectric metal capacitors comprising one or more ferroelectric nanoshells. Methods for controlling spontaneous ferroelectric polarization in nanoshell devices are also disclosed.04-26-2012
20100123511Circuit Arrangement for Actuating a Transistor - One example of the invention relates to a circuit arrangement for actuating a high-side transistor which includes a control terminal and a load terminal. The circuit arrangement includes a driver circuit that is designed to generate, in response to a control signal, a driver signal for the control terminal of the high-side transistor. A supply circuit is capacitively coupled to a radio-frequency signal source and is designed to provide a supply voltage to the driver circuit, the supply voltage being referenced to a floating reference potential.05-20-2010
20110169554INTEGRATED SOLAR POWERED DEVICE - A system and method for fabricating a self-powering integrated circuit chip having an integrated circuit, which may be a MEMS or CMOS device or the like and a thin film photovoltaic cell stack overlayed thereupon or on the opposite side of the substrate on which the IC is manufactured upon.07-14-2011
20090224821Sub-Micron High Input Voltage Tolerant Input Output (I/O) Circuit - A method of providing bias voltages for input output connections on low voltage integrated circuits. As integrated circuit voltages drop generally so does the external voltages that those circuits can handle. By placing input and output devices, in series, external voltages can be divided between the devices thereby reducing junction voltages seen by internal devices. By using external voltages as part of a biasing scheme for integrated circuit devices, stress created by the differential between external voltages and internal voltages can be minimized. Additionally device wells can be biased so that they are at a potential that is dependant on the external voltages seen by the low voltage integrated circuit.09-10-2009
20100271110DEVICE FOR THE OPERATION OF ELECTRONIC CIRCUITS ON A HIGH-VOLTAGE POTENTIAL - A device for operating an electronic circuit at a high-voltage potential includes a diode array installed in a high-voltage line, wherein a current is configured to flow over the high-voltage line through the diode array. A voltage drop over the diode array is applied to the electronic circuit, which is configured to provide information ascertained on the high-voltage line. An evaluation unit connected to the electronic circuit via a galvanically separated transmission device receives the information from the electronic circuit.10-28-2010
20090289695VOLTAGE DETECTION CIRCUIT AND VOLTAGE DETECTION METHOD - Disclosed herein is a voltage detection circuit including: a voltage detection section; a first voltage determination section; and a second voltage determination section.11-26-2009
20120293242Semiconductor Device - As semiconductor devices including semiconductors, logic circuits are given. Logic circuits include dynamic logic circuits and static logic circuits and are formed using transistors and the like. Dynamic logic circuits can store data for a certain period of time. Thus, leakage current from transistors causes more severe problems in dynamic logic circuits than in static logic circuits. A logic circuit includes a first transistor whose off-state current is small and a second transistor whose gate is electrically connected to the first transistor. Electric charge is supplied to a node of the gate of the second transistor through the first transistor. Electric charge is supplied to the node through a first capacitor and a second capacitor. On/off of the second transistor is controlled depending on a state of the electric charge. The first transistor includes an oxide semiconductor in a channel formation region.11-22-2012
20110006835MULTI-CHIP SYSTEM - Provided is a multi-chip system. The multi-chip system includes a plurality of chips and a power sequence controller. The power sequence controller supplies a plurality of external power voltages to the plurality of chips according to a predetermined sequence.01-13-2011
20090160530SEMICONDUCTOR DEVICE WITH REDUCED LAYOUT AREA HAVING SHARED METAL LINE BETWEEN PADS - A semiconductor device with a reduced layout area includes pads disposed between a first voltage line and a second voltage line; first and second driver units adjacently disposed at an upper portion or a lower portion of the respective pads; and a metal line disposed between the pads and supplying power commonly to the first and second driver units.06-25-2009
20090140793INTERNAL VOLTAGE GENERATION CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE - An internal voltage generation circuit of a semiconductor memory device controls a dead zone voltage, in which the driving unit that supplies a power supply voltage, does not need to operate. An internal voltage having a dead zone is determined by first and second driving signals based on a level of a reference voltage, and by selectively supplying first and second voltages by means of the first and second driving signals.06-04-2009
20090015318CHARGE PUMP DRIVE CIRCUIT - A charge pump drive circuit includes a first MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and a second MOSFET. The first MOSFET and the second MOSFET are different in channel type and provided to form a complementary inverter circuit. The complementary inverter circuit drives a charge pump circuit based on an input potential inputted to an input terminal. A first gate of the first MOSFET and a second gate of the second MOSFET are connected to the input terminal such that a potential at the first gate is different from a potential at the second gate.01-15-2009
20090096506POWER SUPPLY CIRCUIT - According to an aspect of the present invention, there is provided a power supply circuit including: a detection circuit that is connected to an external power supply voltage and that outputs a first signal indicating whether the external power supply voltage is in a dropped-state in which the external power supply voltage is dropped below a reference voltage; a control circuit that includes: a delay circuit that outputs a second signal acquired by delaying the first signal for a reference time; and a determination circuit that outputs a third signal based on the first signal and the second signal; a generation circuit that generates internal power supply voltage from the external power supply voltage and that supplies the internal power supply voltage; and an interruption circuit that interrupts the internal power supply voltage supplied from the generation circuit based on the third signal.04-16-2009
20090002059Rail to rail full complementary CMOS isolation gate - An isolation gate to provide isolation to a circuit to be isolated for a first voltage and a second voltage includes a voltage source for the first voltage and the second voltage, a first path coupled to the circuit to be isolated and a first control switch to control the first path. The first control switch isolates the circuit to be isolated while said isolation gate is subject to either the first voltage or the second voltage.01-01-2009
20090243705High Voltage Tolerative Driver Circuit - A high voltage tolerative inverter circuit is disclosed, which comprises a PMOS transistor with a source and drain being connected to a first high voltage power supply (VDDQ) and an output terminal, respectively, a gate of the PMOS transistor being controlled by a first signal having a voltage swing between the VDDQ and a low voltage power supply (VSS), and a NMOS transistor with a source and drain being connected to the VSS and the output terminal, a gate of the NMOS transistor being controlled by a second signal having a voltage swing between a second high voltage power supply (VDD) and the VSS, wherein the VDD is lower than the VDDQ, and the voltage swings between the VDDQ and the VSS by the first signal and between the VDD and the VSS by the second signal are always in the same direction.10-01-2009
20080272830Variable Power and Response Time Brown-Out-Reset Circuit - A brown-out-reset circuit having programmable power and response time characteristics. These characteristics may be programmed over an n-bit wide bus for 211-06-2008
20100182073Semiconductor Component with Annularly-Closed Contacting - A semiconductor component includes a substrate, at least one oblong first electrode disposed on the substrate and at least one second electrode disposed on the substrate. The first and/or the second electrode respectively are closed in its longitudinal direction.07-22-2010
20130214850SYSTEM AND METHOD FOR POWERING A WIRELESS SENSOR DEVICE - A system and method for powering a wireless sensor device are disclosed. In a first aspect, the wireless sensor device comprises at least two electrodes configured to be attached to a body and at least two leads coupled to the at least two electrodes. The wireless sensor device also includes a system on chip (SoC) coupled to the at least two leads and a portable power source (V08-22-2013
20100013547VOLTAGE SWITCHING CIRCUIT - Provided is a voltage switching circuit which outputs a voltage with low power consumption without lowering a plurality of voltages due to a threshold voltage of a transistor. The voltage switching circuit according to the present invention selects a voltage from among a plurality of input voltages in response to a selection signal and outputs the selected voltage from an output terminal. The voltage switching circuit includes: a first PMOS transistor for outputting a power supply voltage for operating a logic circuit of a semiconductor device to the output terminal; a second PMOS transistor for outputting a first voltage higher than the power supply voltage to the output terminal; a third PMOS transistor for outputting a second voltage lower than the power supply voltage to the output terminal; and a well potential control section for controlling well voltages of the first and third transistors to be the power supply voltage in a case of outputting the power supply voltage and the second voltage to the output terminal, and controlling the well voltages of the first and third transistors to be the first voltage in a case of outputting the first voltage to the output terminal.01-21-2010
20110057719Semiconductor device having fuse circuit and control method thereof - An internal voltage adjusting circuit of a semiconductor memory device processes a period from activation to deactivation of a reset bar signal by dividing the period into a first period to a third period. In the first period, a peripheral circuit voltage is stabilized to a lowest value to suppress power consumption. In the second period in which a power source voltage is stabilized, the peripheral circuit voltage is set to a highest value to read out optimum internal voltage values from a fuse circuit in a stable manner. In the third period after reading out the optimum internal voltage values, the peripheral circuit voltage is returned to the lowest value to suppress the power consumption. When the reset bar signal is deactivated, the peripheral circuit voltage is set based on the optimum internal voltage values read out from the fuse circuit.03-10-2011
20100123512Booster circuit - Provided is a booster circuit capable of shortening a boost rise time. A PMOS transistor is provided, as a switch circuit for controlling an operation of the booster circuit, between a boosted voltage output terminal and a voltage divider circuit in the booster circuit, and the PMOS transistor has a gate connected to a power supply terminal and a source and a back gate connected to the boosted voltage output terminal. Therefore, the PMOS transistor is turned off immediately after a start of a boosting operation, and hence an inverting input terminal of a comparator circuit is pulled down. Accordingly, the comparator circuit outputs a boosting operation signal, and the booster circuit immediately starts the boosting operation, with the result that the boost rise time may be shortened.05-20-2010
20090072887Temperature dependent clamping of a transistor - An apparatus, comprising a transistor having a source/drain node and a gate, and a circuit coupled between the source/drain node and the gate and configured to limit a voltage between the source/drain node and the gate to a clamping voltage such that the clamping voltage is reduced in response to a rising temperature of the transistor. Also, a method, comprising measuring a first temperature, measuring a second temperature, and reducing a clamped voltage between a source/drain node of a transistor and a gate of the transistor responsive to a difference between the first and second temperatures increasing.03-19-2009
20090102543NEGATIVE VOLTAGE GENERATING CIRCUIT - A negative voltage generating circuit for providing a negative voltage for an electronic circuit, includes a voltage input terminal receiving a positive voltage, a voltage output terminal outputting the negative voltage to the electronic circuit, a pulse generator, a first transistor, a second transistor, a first capacitor, at least one first diode, a second diode, a second capacitor, and a first resistor. When the pulse generator outputs a high level signal, the capacitor is charged, and the full voltage of the capacitor equals the difference between the voltage of the voltage input terminal and the voltage of the at least one first diode. When the pulse generator outputs a low level signal, the capacitor discharges through the first resistor, the voltage output terminal outputs a negative voltage, the value of the negative voltage equals the difference between the voltage of the capacitor and the voltage of the second diode.04-23-2009
20110018613SYSTEM AND METHOD FOR PRE-CHARGING A BOOT CAPACITOR IN A SWITCHING REGULATOR WITH HIGH PRE-BIAS VOLTAGE - An apparatus comprises a voltage regulator including an high side switching transistor and a low side switching transistor. An high side drive controls operation of the high side switching transistor. A low side driver controls operation of the low side switching transistor. A bootstrap capacitor provides an operating voltage to the high side switching driver. The bootstrap capacitor is charged to a predetermined level responsive to a supply voltage. A low side driver drives the low side switching transistor according to a process that charges the bootstrap capacitor to the predetermined level. The process turns on the low side switching transistor for a first predetermined number of cycles and turns off the low side switching transistor for a second predetermined number of cycles. The process is repeated for a predetermined number of times during startup of the voltage regulator when a prebias load is applied to the voltage regulator.01-27-2011
20110115548SELF-POWERED EVENT DETECTION DEVICE - The self-powered detection device comprises at least a non-volatile memory cell (05-19-2011
20110121886CLOCK DETECTOR AND BIAS CURRENT CONTROL CIRCUIT - Provided are a clock detector and a bias current control circuit. The clock detector outputs a digital code corresponding to the frequency of an input clock, and the bias current control circuit controls a bias current supplied to an analog circuit according to the digital code output from the clock detector. Accordingly, when the clock detector and the bias current control circuit are used, it is possible to minimize the power consumption of an analog circuit by controlling a bias current supplied to an analog circuit according to a digital code corresponding to the frequency of an input clock.05-26-2011
20100164605SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit is capable of minimizing/decreasing the increase in the inductance of a package due to a power supply network thereof. The semiconductor integrated circuit includes a first power mesh configured to supply a first power to a first internal circuit, a second power mesh configured to supply a second power to a second internal circuit, the first power and the second power being used for different purposes and being equal in DC level, and a connection unit configured to connect the first power mesh to the second power mesh.07-01-2010
20100194467Devices, Methods, and Systems With MOS-Gated Trench-to-Trench Lateral Current Flow - A DMOS transistor is fabricated with its source/body/deep body regions formed on the walls of a first set of trenches, and its drain regions formed on the walls of a different set of trenches. A gate region that is formed in a yet another set of trenches can be biased to allow carriers to flow from the source to the drain. Lateral current low from source/body regions on trench walls increases the active channel perimeter to a value well above the amount that would be present if the device was fabricated on just the surface of the wafer. Masking is avoided while open trenches are present. A transistor with a very low on-resistance per unit area is obtained.08-05-2010
20100066435Biasing for Transistor-based Apparatuses and Methods - The present disclosure relates to constructing and operating a transistor or other active device with significantly reduced flicker noise.03-18-2010
20090153229Method for Signal Transmission between Semiconductor Substrates, and Semiconductor Component Comprising Such Semiconductor Substrates - An AC voltage signal is transmitted between a semiconductor substrate and a further semiconductor substrate arranged on the first semiconductor substrate by means of an electromagnetic field through one of the two semiconductor substrates by virtue of each semiconductor substrate having a circuit element that serves for transmission. Both circuit elements are directly electrically decoupled.06-18-2009
20100321096DETECTION CIRCUIT FOR OVERDRIVE CONDITIONS IN A WIRELESS DEVICE - A detection circuit that can accurately detect signal peak is described. In an exemplary design, the detection circuit includes a bias voltage generator and a MOS transistor. The bias voltage generator provides a bias voltage as a function of temperature. The MOS transistor receives an input RF signal and the bias voltage and provides a rectified signal, which may be a linear function of the input RF signal and may have reduced deviation with temperature due to the bias voltage. The bias voltage generator may generate the bias voltage based on a temperature-dependent current having a slope selected to reduce deviation in the rectified signal with temperature. An offset canceller may cancel a reference voltage from the rectified signal and provide an output signal. A bulk bias generator may generate a bulk voltage for the bulk of the MOS transistor as a function of temperature to improve operating speed at higher temperature.12-23-2010
20080204120PIN NUMBER REDUCTION CIRCUIT AND METHODOLOGY FOR MIXED-SIGNAL IC, MEMORY IC, AND SOC - The pin number reduction circuit circuits and methodology of the present invention provide a higher pseudo power supply and a lower pseudo power supply for a digital functional section in mixed-signal IC, memory IC, and SOC including analog functional section and digital (or memory) functional section in order to reduce digital noise coupling. The circuit and methodology of the present invention basically includes resistors, capacitors, transistors, and amplifiers. It is noted that analog functional section is coupled between a positive power supply and a negative power supply, which are connected to two pins.08-28-2008
20100283532Startup circuit and high speed cable using the same - A High Definition Multimedia Interface (HDMI) cable carries high speed encoded data, which are transmitted differentially over data channels, along with a clock. A Mobile High-Definition Link (MHL) cable carries high speed data which are multiplexed to achieve smaller connectors with fewer pins. A MHL-to-HDMI cable is proposed, which includes an embedded MHL to HDMI adapter device for demultiplexing the received MHL-formatted signal and outputting an HDMI-formatted signal. The embedded circuit is powered by a combination of power sources, the power being harvested from the high-speed HDMI signals themselves, including a startup circuit harvesting power from a low speed HDMI signal when power from the high-speed HDMI signals is not available.11-11-2010
20120146713Transistors And Electronic Devices Including The Same - A transistor includes a first active layer having a first channel region and a second active layer having a second channel region. A first gate of the transistor is configured to control electrical characteristics of at least the first active layer and a second gate is configured to control electrical characteristics of at least the second active layer. A source electrode contacts the first and second active layers. A drain electrode also contacts the first and second active layers.06-14-2012
20120146711Power Domain Controller With Gated Through Silicon Via Having FET With Horizontal Channel - A semiconductor chip has a gated through silicon via (TSVG). The TSVG may be switched so that the TSVG can be made conducting or non-conducting. The semiconductor chip may be used between a lower level semiconductor chip and a higher semiconductor chip to control whether a voltage supply on the lower level semiconductor chip is connected to or disconnected from a voltage domain in the upper level semiconductor chip. The TSVG comprises an FET controlled by the lower level chip as a switch.06-14-2012
20120146712DESIGN STRUCTURE FOR A REFERENCE VOLTAGE GENERATOR FOR ANALOG TO DIGITAL CONVERTERS - A design structure is provided for a reference voltage generator. The design structure includes a first capacitor and an analog to digital converter having its voltage reference coupled to the first capacitor. The first capacitor supplies the voltage reference to the analog to digital converter. A control loop is configured to resupply charges to the first capacitor that are lost when the first capacitor supplies the voltage reference to the analog to digital converter.06-14-2012
20110304384INTERNAL VOLTAGE GENERATING CIRCUIT - An internal voltage generating circuit includes a supply voltage driving unit, an internal voltage driving unit, and a driving control unit. The supply voltage driving unit is configured to compare a voltage division signal of a supply voltage with a bias voltage, generate a first pull-up signal, and drive the supply voltage in response to the first pull-up signal. The internal voltage driving unit is configured to receive the supply voltage, generate a second pull-up signal, and drive an internal voltage. The driving control unit is configured to select the first pull-up signal or a power supply voltage as a third pull-up signal.12-15-2011
20120306566SEMICONDUCTOR APPARATUS AND METHOD FOR CONTROLLING THE SAME - A semiconductor apparatus comprises a power-up signal generation section configured to generate a power-up signal, a driver configured to drive and output the power-up signal, and a main circuit block configured to perform predetermined functions in response to an output from the driver, wherein the power-up signal generation section and an input terminal of the driver are connected by a disconnectable element.12-06-2012
20100097123Keep-alive for power stage with multiple switch nodes - A keep alive circuit for recharging bootstrap capacitors in multiple totem-pole switching power stages using N-channel field effect transistor or NPN bipolar junction transistor switching devices during 100% or substantially 100% duty cycle operation of one of the totem pole pairs.04-22-2010
20120044014Switching Circuits For Extracting Power From An Electric Power Source And Associated Methods - An integrated circuit chip includes a first input port, a first output port, and first and second transistors electrically coupled in series across the first input port. The second transistor is also electrically coupled across the first output port and is adapted to provide a path for current flowing through the first output port when the first transistor is in its non-conductive state. The integrated circuit chip additionally includes first driver circuitry for driving gates of the first and second transistors to cause the transistors to switch between their conductive and non-conductive states. The integrated circuit chip further includes first controller circuitry for controlling the first driver circuitry such that the first and second transistors switch between their conductive and non-conductive states to at least substantially maximize an amount of electric power extracted from an electric power source electrically coupled to the first input port.02-23-2012
20120154020STACK PACKAGE AND METHOD FOR SELECTING CHIP IN STACK PACKAGE - A stack package having stacked chips includes first voltage dropping units respectively formed in the chips; second voltage dropping units respectively formed in the chips; first signal generation units connected in parallel to a first line formed by connecting the first voltage dropping units in series, respectively formed in the chips, and configured to apply high level signals according to a voltage of the first line; second signal generation units connected in parallel to a second line formed by connecting in series the second voltage dropping units, respectively formed in the chips, and configured to apply high level signals according to a voltage of the second line; and chip selection signal generation units respectively formed in the chips, and configured to combine signals outputted from the first signal generation units and the second signal generation units and generate chip selection signals.06-21-2012
20120154019FIELD-EFFECT MAGNETIC SENSOR - A field-effect magnetic sensor facilitates highly-sensitive magnetic field detection. In accordance with one or more example embodiments, current flow respectively between first and second source/drain terminals and a third source/drain terminal is controlled using inversion layers in separate channel regions for each of the first and second terminals. In response to a magnetic field, a greater amount of current is passed between the third source/drain terminal and one of the first and second source/drain terminals, relative to an amount of current passed between the third source/drain terminal and the other one of the first and second source/drain terminals.06-21-2012
20100244934SOI RADIO FREQUENCY SWITCH WITH ENHANCED ELECTRICAL ISOLATION - At least one conductive via structure is formed from an interconnect-level metal line through a middle-of-line (MOL) dielectric layer, a shallow trench isolation structure in a top semiconductor layer, and a buried insulator layer to a bottom semiconductor layer. The shallow trench isolation structure laterally abuts at least two field effect transistors that function as a radio frequency (RF) switch. The at least one conductive via structure and the at interconnect-level metal line may provide a low resistance electrical path from the induced charge layer in a bottom semiconductor layer to electrical ground, discharging the electrical charge in the induced charge layer. The discharge of the charge in the induced charge layer thus reduces capacitive coupling between the semiconductor devices and the bottom semiconductor layer, and thus secondary coupling between components electrically disconnected by the RF switch is reduced.09-30-2010
20090058504SELF-POWERED VOLTAGE ISLANDS ON AN INTEGRATED CIRCUIT - The present disclosure is directed to self-powered voltage islands on an integrated circuit. A structure in accordance with an embodiment includes: an integrated circuit including a power source; a voltage island; and an on-board power source provided on the voltage island for powering the voltage island independently of the power source of the integrated circuit.03-05-2009
20120169403POWER HARVESTING IN OPEN DRAIN TRANSMITTERS - A transmitter having at least one channel comprising a first differential circuit driven by a differential data signal, the first differential circuit configured to output the differential data at a first and second output and a first control circuit coupled between the first differential circuit and the first and second output, the first control circuit driven by a drive voltage.07-05-2012
20100052770POWER-OFF CONTROLLING CIRCUIT AND POWER-OFF CONTROLLING METHOD - A power-off controlling circuit and a power-off controlling method that control power-off of an integrated circuit based on the size of leakage currents. The power-off controlling circuit includes a model circuit section that includes a model circuit made by modeling a basic circuit of an integrated circuit, a voltage comparing circuit section that compares an output voltage charged by a leakage current occurred at the model circuit and a preset reference voltage, a decision circuit section that measures an arrival time until the output voltage reaches the reference voltage from the compared result and decides a size of the leakage current from the measured result, and a power-off controlling circuit section that controls power-off of the integrated circuit on the basis of the decided size of the leakage current.03-04-2010
20100277224Active Sensor With Operating Mode Changeover - Active sensor for switching over into a special operating mode, wherein the sensor has at least one sensor element, one evaluation circuit and two connecting lines, each with a terminal for transmitting the sensor information, wherein a supply voltage of the sensor is applied to the two connecting lines, wherein the sensor comprises a switchover module with which it is possible to switch over between a normal operating mode and a special operating mode by reversing the polarity of the supply voltage which is applied to the two terminals.11-04-2010
20100271111Bootstrap circuit - Disclosed herein is a bootstrap circuit configured to employ first, second and third transistors of the same conduction type wherein: a node section connecting a gate electrode of the first transistor and a specific one of the source and drain areas of a third transistor to each other is put in a floating state when the third transistor is put in a turned-off state; a gate electrode of the second transistor is connected to a clock supply line which conveys the other one of the two clock signals; and a voltage-variation repression capacitor is provided between the node section and a first voltage supply line.10-28-2010
20100253417Conducting Polymer for Electronic, Photonic and Electromechanical Systems - The present invention concerns doped organic semiconductors composites. In certain aspects, organic polymers are doped with large anions, such as DBS10-07-2010
20100327956GRAPHENE DEVICE AND METHOD OF FABRICATING A GRAPHENE DEVICE - In accordance with an example embodiment of the present invention, a device comprising one or more porous graphene layers, the or each graphene porous layer comprising a multiplicity of pores. The device may form at least part of a flexible and/or stretchable, and or transparent electronic device.12-30-2010
20120319761METHOD FOR OPERATING A SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate having at least a pn-junction arranged in the semiconductor substrate. At least a field electrode is arranged at least next to a portion of the pn-junction, wherein the field electrode is insulated from the semiconductor substrate. A switching device is electrically connected to the field electrode and adapted to apply selectively and dynamically one of a first electrical potential and a second electrical potential, which is different to the first electrical potential, to the field electrode to alter the avalanche breakdown characteristics of the pn-junction.12-20-2012
20120286851SEMICONDUCTOR DEVICE - A register circuit is provided which can hold data even after being powered off and which does not require a save operation and a return operation. In a register circuit including a plurality of register component circuits, a first transistor with small off-state current, and a second transistor with small off-state current, a data holding portion is connected to one of a source and a drain of the first transistor and one of a source and a drain of the second transistor. Since the first transistor and the second transistor have a small off-state current, electric charge does not leak from the data holding portion, and data is held by the data holding portion even after the register circuit is powered off. Thus, a save operation and a return operation are not required.11-15-2012
20130009695ASYNCHRONOUS POWER DISCONNECT - A power disconnect unit within a data transport topology of a NoC includes an asynchronous clock domain adapter unit inserted between a master side manager unit and a slave side manager unit. This configuration allows for the master and slave side managers of the power disconnect unit to be placed physically far apart on the chip, relieving the need to route long power rail signals on the chip. A response data path and associated asynchronous clock domain adapter unit is optionally included on the chip. A path to bypass the asynchronous clock domain adapter units is optionally included on the chip to enable a fully synchronous mode of operation without the data latency cost of the asynchronous adapter unit.01-10-2013
20100090752CMOS RF IC - Provided is a CMOS RF IC comprises an inductor that is formed in the uppermost two or more metal layers among a plurality of metal layers; and a DC bias circuit that is formed in a metal layer provided at the bottom of the metal layers in which the inductor is formed.04-15-2010
20080231344Power-diode driver having expansible isolated sub-drivers using single power source - A power-diode-driver uses a single power source to supply power to the sub-drivers inside. The sub-drivers are well isolated so that they can be safely and easily expanded by connecting to other device or driver. Thus, the power-diode driver has a changeable turn-on time and a highly modulated assembly. And, hence, the present invention is suitable for mass producing reliable power-diode drivers.09-25-2008
20130169350SENSING SUPPLY VOLTAGE SWINGS WITHIN AN INTEGRATED CIRCUIT - An integrated circuit comprising a plurality of sensors configured to sense variations in supply voltage levels at points within the integrated circuit is disclosed. The plurality of sensors are distributed across the integrated circuit and have transistor devices such that process variations in the transistor devices within the sensors are such that a sensing result will have a random voltage offset that has a predetermined probability of lying within a pre-defined voltage offset range. The integrated circuit is configured to transmit results from multiple ones of the plurality of sensors to processing circuitry such that the variations in the supply voltage levels can be determined with a voltage offset range that is reduced compared to the pre-defined voltage offset range.07-04-2013
20130169351TRANSISTOR OPERATING METHOD - A transistor operating method is applicable to a transistor including a first gate, a first gate insulating layer, a semiconductor layer, a source, a drain, a second gate insulating layer and a second gate. The transistor operating method includes: grounding the first gate and the source, applying a negative bias to the second gate and applying a positive bias to the drain, so that the transistor acts as an optical detector; alternatively, grounding the source, grounding or floating the second gate, applying a bias to the first gate and applying a positive bias to the drain, so that the transistor acts as a pixel switch.07-04-2013
20120249222SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes a plurality of dies, wherein each of the dies is configured to enable a power circuit provided therein according to a power control signal, in a state in which the die was determined to be a good die or a fail die.10-04-2012
20130127521Semiconductor Device with Multiple Space-Charge Control Electrodes - A circuit including a semiconductor device having a set of space-charge control electrodes is provided. The set of space-charge control electrodes is located between a first terminal, such as a gate or a cathode, and a second terminal, such as a drain or an anode, of the device. The circuit includes a biasing network, which supplies an individual bias voltage to each of the set of space-charge control electrodes. The bias voltage for each space-charge control electrode can be: selected based on the bias voltages of each of the terminals and a location of the space-charge control electrode relative to the terminals and/or configured to deplete a region of the channel under the corresponding space-charge control electrode at an operating voltage applied to the second terminal.05-23-2013
20130176074Apparatus and Method for Obtaining Auxiliary Voltage from Control Signals - An auxiliary voltage generating unit for a radio frequency switch includes a first input and a second input respectively configured to receive a first control signal and a second control signal, wherein the first control signal and the second control signal are configured to control which one of a plurality of paths in the radio frequency switch is enabled, and at least one output, configured to output an auxiliary voltage, derived from at least one of the first control signal or the second control signal, that is used to operate the radio frequency switch. The auxiliary voltage may be a bias voltage and/or a voltage used to power an inverter used to enable a selected branch as an isolation branch or shunt branch.07-11-2013
20110210783TRANSISTOR INCLUDING REENTRANT PROFILE - A transistor includes a substrate, an electrically conductive material layer, and an electrically insulating material layer. At least a portion of one or more of the substrate, the electrically conductive material layer, and the electrically insulating material layer define a reentrant profile.09-01-2011
20130141156High Electron Mobility Transistors with Multiple Channels - A device includes a source for transmitting an electronic charge through a conduction path; a drain for receiving the electronic charge; a stack for providing at least part of the conduction path; and a gate operatively connected to the stack for controlling a conduction of the electronic charge. The stack includes an insulator layer, an N-polar layer and a barrier layer selected such that, during an operation of the device, the conduction path formed in the N-polar layer includes a two-dimensional electron gas (2DEG) channel and an inversion carrier channel.06-06-2013
20100308898METHOD OF GENERATING ELECTRICAL ENERGY IN AN INTEGRATED CIRCUIT DURING THE OPERATION OF THE LATTER, CORRESPONDING INTEGRATED CIRCUIT AND METHOD OF FABRICATION - An integrated circuit may include a region containing a thermoelectric material and be configured to be subjected to a temperature gradient resulting from a flow of an electric current in a part of the integrated circuit during its operation, and an electrically conducting output coupled to the region for delivering the electrical energy produced by thermoelectric material.12-09-2010
20100308897POWER ISLAND WITH INDEPENDENT POWER CHARACTERISTICS FOR MEMORY AND LOGIC - A power island for a system-on-a-chip (SoC) includes a first segment, a second segment, and a supply line. The first segment includes a hardware device and operates the hardware device at first power characteristics indicative of at least a first voltage. The second segment includes scalable logic and operates the scalable logic at second power characteristics indicative of at least a second voltage. The second power characteristics of the scalable logic are different from the first power characteristics of the hardware device. The supply line receives an external supply signal (VDD) and directs the external supply signal to both the first segment and the second segment. The second segment changes at least one power characteristic of the external supply signal to operate the scalable logic according to the second power characteristics.12-09-2010
20120286850Apparatus for storing a data value in a retention mode - Apparatus for storing a data value in the form of a master-slave latch supporting zig-zag power gating is described. A NAND gate 11-15-2012
20120007660Bias Current Generator - A bias current generator comprising at least one field effect transistor operating as a current source or sink, a capacitive store for storing a first control voltage, and a first switch for selectively connecting the capacitive store to a gate of the at least one field effect transistor.01-12-2012
20120019311ELECTRONIC DEVICES AND METHODS - The present invention relates to an electronic device, which comprises: a first module, comprising an I/O pad for being an interface between the electronic device and an external device, and receiving a first bias source; a second module, coupled to the first module, comprising a register, and receiving a second bias source; and a signal converter, coupled between the first module and the second module. Wherein when one of the first and second bias sources is stable and the other is unstable, the signal converter outputs a first predetermined bias value to the first or second modules receiving the unstable bias source.01-26-2012
20120086502DEVICE AND METHOD FOR MONITORING AN ELECTROCHEMICAL GAS SENSOR - An electrochemical gas sensor testing device that includes a test signal generator that generates a multiplexed signal that includes a first test signal that includes alternating current (AC) and is free from a direct current (DC) component and a second signal that includes a DC bias voltage, an electrochemical cell that includes a counter electrode, a sensing electrode, and an electrolyte, the counter electrode and the sensing electrode being in electrical communication with the electrolyte and each other, the counter electrode being in electrical communication with the signal generator to receive the multiplexed signal generated by the signal generator, and a processor that receives an AC signal from the sensing electrode and that analyzes the AC signal.04-12-2012

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