Class / Patent application number | Description | Number of patent applications / Date published |
327374000 | Accelerating switching | 56 |
20080252356 | SEMICONDUCTOR DEVICE - A semiconductor device is provided which has a driving circuit operable to drive a circuit that has a delay, the semiconductor device including: an auxiliary driving circuit operable to accelerate drive of the driving circuit, which receives a drive signal of the driving circuit as an input signal. | 10-16-2008 |
20080265975 | Method for controlling vertical type MOSFET in bridge circuit - A method for controlling a vertical type MOSFET in a bridge circuit is provided to reduce diode power loss and improve a reverse recovery characteristic. The method includes controlling a forward voltage of a built-in diode of the vertical type MOSFET to be a first forward voltage by setting a gate voltage of the vertical MOSFET to a first gate voltage, so that the vertical type MOSFET is switched into a first off mode; and controlling the forward voltage of the built-in diode of the vertical type MOSFET to be a second forward voltage by setting the gate voltage of the vertical MOSFET to a second gate voltage, so that the vertical type MOSFET is switched into a second off mode. | 10-30-2008 |
20080272822 | Electronic Device for Controlling Actuators | 11-06-2008 |
20090002054 | GATE DRIVE APPARATUS - A gate drive apparatus including a constant-current-pulse gate drive circuit which creates a gate signal for a switching device as a constant-current output, a constant-voltage-pulse gate drive circuit which creates the gate signal as a constant-voltage output, and a decision/switch circuit which switches the operation of the constant-current-pulse gate drive circuit and the operation of the constant-voltage-pulse gate drive circuit. The variance of switching speeds attributed to the variances of threshold voltages and mirror voltages in a plurality of switching devices which are driven by the gate drive apparatus can be suppressed, and the variance of losses can be minimized. | 01-01-2009 |
20090108905 | Dynamic NP-swappable body bias circuit - A dynamic NP-swappable body bias circuit includes a core circuit, a power switch and a body bias controller. The core circuit includes a body bias terminal. The power switch includes a body bias terminal, and connects the core circuit to an external voltage supply. The body bias controller is connected to the body bias terminals of the core circuit and the power switch so that the power switch and the core circuit are under the control of the body bias controller. | 04-30-2009 |
20090195293 | EMITTER-SWITCHED BIPOLAR TRANSISTOR - The invention relates to a power circuit with a emitter-switched bipolar transistor (ESBT) (T | 08-06-2009 |
20090322405 | Enhanced Transistor Gate Drive - An enhanced transistor gate drive is disclosed in which a pair of Kelvin sense leads measure the voltage potential across at the gate and source of the transistor. The difference in the voltage potential of the Kelvin sense lead from the gate and the Kelvin sense lead of the source is provided to a voltage controlled current source, which compares the output of the voltage differentiator to an oscillating voltage input. Changes to the voltage difference between the Kelvin sense connectors will result in more or less voltage being applied at the gate of the transistor, thereby parasitic inductance in the transistor from causing the device to switch on and off. | 12-31-2009 |
20100039160 | Switch - A switch includes a switching transistor, a switching resistor, connected between a control terminal of the switching transistor and a switching control terminal, and an accelerating element. The accelerating element includes a resistance smaller than a resistance of the switching resistor, the accelerating element being adapted to be connected in parallel to the switching resistor upon switching of the switching transistor until a voltage at the control terminal of the switching transistor has reached a predetermined value. | 02-18-2010 |
20100141326 | DRIVER CIRCUIT AND METHOD FOR REDUCING ELECTROMAGNETIC INTERFERENCE - An apparatus and a method switch a load through a power transistor. The apparatus includes: a first current generator for generating a current to charge a capacitance of a control terminal of the power transistor during power on of the power transistor; a second current generator for generating a current to discharge the capacitance during power off of the power transistor. The apparatus is equipped with control circuitry having a storage element for storing a voltage value representative of the potential difference between the control terminal and a conduction terminal of the power transistor when the power transistor operates in the saturation region and a discharge circuit for generating an additional current to discharge the capacitance during the power-off process. The additional current is a function of the potential difference of the control terminal and the stored voltage value from the conduction terminal. | 06-10-2010 |
20110193613 | SWITCHABLE CURRENT SOURCE CIRCUIT AND METHOD - A method and circuit for providing a switched current source output has a precharge mode, in which a charge storage device is charged to a reference voltage, and the gate of an output transistor is discharged. In a discharge mode, the charge storage device is discharged to the gate of the output transistor to raise the gate voltage by an amount depending on the charge flow. | 08-11-2011 |
20110273220 | OPTIMAL MOSFET DRIVER CIRCUIT FOR REDUCING ELECTROMAGNETIC INTERFERENCE AND NOISE - A system and method of controlling the primary switching FET turn-on and turn-off profiles in a switching power converter suppresses voltage and current spikes, reduces power consumption, and reduces system switching time. A combination of fast and slow shunt circuits is used to control current flow through the primary switching FET. The FET switching rate is slowed during the period of maximum current change to limit the magnitude of switching spikes and is allowed to proceed rapidly at other times to reduce switching time and power consumption. | 11-10-2011 |
20120013389 | Capacitively Coupled Switched Current Source - In the preferred embodiment, a current source is switchable between two precisely defined output currents. A terminal of a coupling capacitor is coupled to the gate of an output MOSFET. The other terminal of the capacitor is switched between two reference voltages to toggle the MOSFET to output the selected one of the two currents. A switchable bias voltage source is coupled to the gate only during the on state of the MOSFET to set the gate voltage of the MOSFET. The current output of the current source is quickly and accurately changed. A reference MOSFET is not directly coupled to the output MOSFET, so there are no slow settling components coupled to the gate of the output MOSFET. | 01-19-2012 |
20130181764 | SEMICONDUCTOR INTEGRATED CIRCUIT - A constant current source circuit includes one end connected to a second node as sources of third and fourth transistors, and the other end connected to a second power supply node that supplies a second voltage different from a first voltage. The clamp circuit is configured to form a current path between the second node and the second power supply node. It adjusts the potential of the second node to a certain potential when a first external input signal is switched from a first state to a second state. | 07-18-2013 |
20130222042 | DRIVE CIRCUIT - A drive circuit is provided with a charge pump including a capacitor. The capacitor of the charge pump is configured to be charged in the first stage and to be connected with the gate terminal of the switching device in the second stage. The charge pump is configured to be able to adjust a charging voltage charged in the capacitor according to an order signal. | 08-29-2013 |
20130249619 | SOI SWITCH ENHANCEMENT - The described FET switch topology greatly reduces the off state loading experienced by the gate biasing resistors in a stacked FET structure. The FET switch topology evenly distributes the voltage across the FET switch topology which reduces the voltage across the gate biasing resistors when the stacked FET structure is in an off state. Because the off state loading is reduced, there is a corresponding reduction of the current through bias resistors, which permits a reduction in the size of the bias resistors. This permits a substantial reduction in the area attributed to the bias resistors in an integrated solution. | 09-26-2013 |
20130257510 | HIGH FREQUENCY SWITCH CIRCUIT - A high frequency switch circuit including: a first rectifier circuit including at least one rectifier element having one end connected between the gate terminal of a first MOSFET circuit and a first control terminal and the other end connected to ground, and a second rectifier circuit including at least one rectifier element having one end connected between the gate terminal of a second MOSFET circuit and a second control terminal and the other end connected to ground. The circuit further includes a connecting section connecting the forward-current input terminal side of at least one of the rectifier elements of the first rectifier circuit and one of the main terminal sides of the first MOSFET circuit, and connecting the forward-current input terminal side of at least one of the rectifier elements of the second rectifier circuit and one of the main terminal sides of the second MOSFET circuit. | 10-03-2013 |
20130335133 | Power Switch Acceleration Scheme for Fast Wakeup - A method an apparatus for a power switch acceleration scheme during wakeup is disclosed. In one embodiment, an integrated circuit includes at least one power gated circuit block. The power gated circuit block includes a virtual voltage node from which a voltage is provided to the circuitry of the block when active. Power switches are coupled between the virtual voltage node and a corresponding global voltage node. When the power gated circuit block is powered on, power switches are activated sequentially. The rate at which power switches are activated is increased as the voltage on the virtual voltage node increases. Sequentially activating the power switches may prevent an excess of current inrush into the power gated circuit block. The increase in the rate at which power switches are activated when the voltage on the virtual voltage node is at least at a certain level may allow for a faster wakeup. | 12-19-2013 |
20130342261 | BIAS AND LOAD CIRCUIT, FAST BIAS CIRCUIT AND METHOD - A fast bias circuit including a bias unit, a resistor, a first switch, and a detecting circuit is provided. The resistor has a first terminal coupled to the bias unit to receive a bias voltage, and a second terminal coupled to a bias terminal of a target circuit, wherein the bias terminal is coupled to an input signal. The first switch has a first terminal coupled to the first terminal of the resistor, a second terminal coupled to the second terminal of the resistor, and a control terminal coupled to the detecting circuit. During an initialisation period, the detecting circuit compares the bias voltage with a voltage at the bias terminal of the target circuit to obtain a comparison result, and controls the first switch according to the comparison result. Furthermore, a fast bias method and a bias and load circuit are also provided. | 12-26-2013 |
20140152373 | POWER MODULE HAVING STACKED SUBSTRATES ARRANGED TO PROVIDE TIGHTLY-COUPLED SOURCE AND RETURN CURRENT PATHS - Power modules with reduced parasitic inductances are provided. A power module includes a first substrate including a first electrically-conductive layer and a second substrate including a second electrically-conductive layer. These substrates may be stacked on each other. A scalable network of power switches may be arranged on the substrates. Power bars may be connectable to the electrically-conductive layers through electromechanical interfaces at selectable interface locations. The locations and/or type of interface may be selectable based on the arrangement of the switches. The first and second electrically-conductive layers may be disposed on mutually opposed surfaces of a dielectric layer having a thickness chosen to effect a level of coupling between respective source and return current paths provided by the electrically-conductive layers. The level of coupling may be arranged to increase the mutual inductance within the power module, which can effectively reduce the formation of parasitic inductance in the power module. | 06-05-2014 |
20140184302 | HIGH FREQUENCY SWITCHING DEVICE, AND BIAS VOLTAGE OUTPUTTING DEVICE - A high frequency switch device includes a branch transmission line corresponding to each output terminal provided with a switching part. In the branch transmission line, the switching part includes a transmission side diode provided in such a manner that a cathode thereof is arranged on a side of an input terminal | 07-03-2014 |
20140240024 | Method and Apparatus for Predictive Switching - A method and apparatus for predictive switching an output have been disclosed. | 08-28-2014 |
20140312956 | POST FABRICATION TUNING OF AN INTEGRATED CIRCUIT - An integrated circuit | 10-23-2014 |
20140320193 | SEMICONDUCTOR DEVICE - A semiconductor device includes a first layer of a first-type, a second layer of a second-type formed on the first layer, a third layer of the first type formed on the second layer, a first electrode connected to the second and third layers, a second electrode connected to the first layer, a third electrode embedded in a trench formed through the third and second layers and into the first layer, a fourth electrode embedded in the trench below the third electrode, and an insulating layer formed in the trench around the fourth electrode. The first layer includes a first region that is in contact with the insulating layer and at which a concentration of the first-type dopant is lower than the concentration at a second region that is formed around the first region. | 10-30-2014 |
20140375375 | CONTROLLER FOR A TRANSDUCER, TRANSDUCER, AND CONTROL METHOD - A controller for a converter is designed to receive from a measuring device measurement signals from an output line of the converter, and to analyze the measurement signals in order to generate a switching signal that has a switching frequency, wherein the controller comprises a sampler for generating a sample signal by sampling received measurement signals. The sampler is designed to perform the sampling at a sampling frequency that is less than three times the switching frequency. A converter comprises a controller in accordance with the invention. | 12-25-2014 |
20150035580 | POWER ELECTRONIC DEVICE WITH IMPROVED EFFICIENCY AND ELECTROMAGNETIC RADIATION CHARACTERISTICS - A power electronic device includes first and second electronic switches, each integrated on a package having a low parasitic inductance, a supply terminal and a ground terminal. The first conduction terminal of the first switch may be coupled with the supply terminal, and the second conduction terminal of the second electronic switch may be coupled with the ground terminal. The corresponding control terminals of the switches may be coupled to corresponding pilot drivers. The package may include first and second electric terminals, wherein the second conduction terminal of the first switch is coupled to the first electric terminal, and the first conduction terminal of the second switch is coupled to the second electric terminal. A first inductance may be interposed between the first electric terminal and the output terminal and/or a second inductance interposed between the second electric terminal and the output terminal. | 02-05-2015 |
20150116022 | REDUCTION OF THE INDUCTANCE OF POWER LOOP AND GATE LOOP IN A HALF-BRIDGE CONVERTER WITH VERTICAL CURRENT LOOPS - A half bridge circuit including an isolation substrate, a metal layer on one surface of the isolation substrate, a power loop substrate on the metal layer, an upper switch on the power loop substrate, a lower switch on the power loop substrate and coupled to the upper switch, a capacitor on the power loop substrate and coupled to the upper switch, a first via through the power loop substrate and coupled between the lower switch and the metal layer, and a second via through the power loop substrate and coupled between the capacitor and the metal layer, wherein the power loop substrate has a height and separates the metal layer from the upper switch, lower switch and capacitor by the height. | 04-30-2015 |
20150116023 | RADIO FREQUENCY SWITCH WITH IMPROVED SWITCHING TIME - A radio frequency (RF) switch which comprises an RF domain section having a plurality of RF switching elements. A DC domain section is provided having circuitry configured for controlling the RF switching elements in response to one or more control signals. A resistive load is provided between the RF domain section and the DC domain section. A bypass circuit is configured for selectively bypassing at least a portion of the resistive load. | 04-30-2015 |
20150303376 | MEMRISTIVE RF SWITCHES - A memristive radio frequency (RF) switch circuit comprises a first metal electrode and a second metal electrode arranged on an insulating substrate and separated by an air gap, wherein the air gap is fifty nanometers (50 nm) or less, and wherein applying and removing an enabling voltage to the memristive RF switch enables the memristive RF switch to pass RF signals between the first electrode and the second electrode even when the enabling voltage is removed from the memristive switch, and wherein applying and removing a disabling voltage to the memristive switch disables the memristive switch. | 10-22-2015 |
20160028391 | RADIO FREQUENCY SWITCH WITH LOW OXIDE STRESS - A RF switch circuit includes a voltage divider circuit and a semiconductor device. The semiconductor device has an activated state and a deactivated state. The voltage divider circuit has an input terminal connected to a first line and an output terminal connected to a second line. The first line is connected to a power source. A gate terminal of the semiconductor device is connected to the second line. In the activated state, a source terminal and a drain terminal of the semiconductor device are each selectively connected to ground. In the deactivated state, the source terminal and the drain terminal of the semiconductor device are each selectively connected to the power source. | 01-28-2016 |
20160043710 | APPARATUS AND METHODS FOR CONTROLLING RADIO FREQUENCY SWITCHES - Apparatus and methods for controlling radio frequency (RF) switches are disclosed. Provided herein are apparatus and methods for controlling RF switches. In certain configurations, an RF system includes a charge pump for generating a charge pump voltage, an RF switch, a level shifter for turning on or off the RF switch, and a level shifter control circuit for controlling the level shifter. The charge pump receives a mode signal used to enable or disable the charge pump. Additionally, the level shifter receives power in part from the charge pump voltage, and controls the RF switch based on a switch enable signal. The level shifter control circuit receives the mode signal and biases the level shifter with a bias voltage that changes based on a state of the mode signal. | 02-11-2016 |
20160149568 | PASS SWITCH CIRCUIT WITH IMPROVED TIME RESPONSE CHARACTERISTICS AND METHOD OF CONTROLLING SAME - A pass switch circuit for transferring the voltage of an input node to an output node and a method of controlling the pass switch circuit are disclosed herein. The pass switch circuit includes a pass switch, a first capacitor, and a first switch. The pass switch transfers a voltage level from an input node to an output node. The first capacitor is configured such that the node of one side thereof has a first level of voltage when the voltage of the control node of the pass switch is in a first state. The first switch connects the node of the one side of the first capacitor with the control node of the pass switch. | 05-26-2016 |
327375000 | Saturation prevention | 3 |
20090066400 | Circuit for Switching a Voltage-Controlled Transistor - A circuit comprising a voltage-controlled transistor (T | 03-12-2009 |
20130342262 | SWITCHING CIRCUIT AND CONTROLLER CIRCUIT - New designs of high power switching circuits and controller circuits are provided. Principal silicon bipolar switch is connected in parallel to snubber switch that is formed of a wide bandgap material. The snubber switch is activated during at least one of turn-on and turn-off of the principal silicon switch so as to minimize (or reduce) the switching loss and to bypass safe operation area limitations. | 12-26-2013 |
20140197876 | Semiconductor Device with IGBT Cell and Desaturation Channel Structure - A semiconductor device includes an IGBT cell including a second-type doped drift zone, and a desaturation semiconductor structure for desaturating a charge carrier concentration in the IGBT cell. The desaturation structure includes a first-type doped region forming a pn-junction with the drift zone, and two portions of a trench or two trenches arranged in the first-type doped region and beside the IGBT cell in a lateral direction. Each of the two trench portions or each of the two trenches has a wide part below a narrow part. The wide parts confine a first-type doped desaturation channel region of the first-type doped region at least in the lateral direction. The narrow parts confine a first-type doped mesa region of the first-type doped region at least in the lateral direction. The desaturation channel region has a width smaller than the mesa region in the lateral direction, and adjoins the mesa region. | 07-17-2014 |
327376000 | Turn-on | 11 |
20080290926 | Mass Coupling at Clocked HF-Elements - A circuit for a fill-level measuring device is for the fast switching-on of a high-frequency element on a ground port is disclosed. The circuit comprises a switching unit with a circuit mass; a high-frequency element with a high-frequency mass; and a coupling element that couples the two masses together and at the same time insulates them from each other in a direct-current manner. In this way the switching unit can be arranged on the GND port of the HF-element, without influencing the HF characteristics of said HF element. | 11-27-2008 |
20100148846 | GATE DRIVE CIRCUIT - A gate drive circuit includes a turn-on side circuit for turning on a gate of a power switching device, the turn-on side circuit including a first turn-on side power supply circuit and a second turn-on side power supply circuit, the first turn-on side power supply circuit including: a first turn-on voltage source for supplying a first turn-on voltage; first turn-on wiring; and a first turn-on switch connected in the first turn-on wiring and controlled by a gate drive signal; and the second turn-on side power supply circuit including: a second turn-on voltage source for supplying a second turn-on voltage applied to the gate of the power switching device to set the power switching device in a steady (on) state; second turn-on wiring; a second turn-on switch connected in the second turn-on wiring; and a turn-on side delay circuit for delaying the gate drive signal and passing it to the second turn-on switch. | 06-17-2010 |
20140043089 | DIGITALLY CONTROLLED HIGH SPEED HIGH VOLTAGE GATE DRIVER CIRCUIT - The present invention relates to semiconductor technology. In particular, the present invention relates to high-speed, high voltage switching for a high voltage generator for an X-ray system. Switching elements, e.g. IGBTs or MOS-FETs, are employed for high-speed high voltage switching. However, circuit elements or parasitic elements at an input of the switching element limit the switching speed of the switching element. The present invention proposes applying a higher than allowed voltage to the input of the switching element, e.g. a voltage higher than the maximum allowed gate voltage of an IGBT or MOS-FET, to increase switching speed. A feedback loop is provided for save operation. thus, a switching circuit ( | 02-13-2014 |
20140055190 | GATE DRIVE CIRCUIT - A gate drive circuit for driving an IGBT serving as a power semiconductor device includes a constant-current gate drive circuit that charges a gate capacity of the IGBT at a constant current, and a constant-voltage gate drive circuit that is connected in parallel to the constant-current gate drive circuit between input and output terminals thereof via a series circuit constituted by a MOSFET and a resistor, and charges the gate capacity of the IGBT at a constant voltage, wherein the gate drive circuit charges the gate capacity of the IGBT using both the constant-current gate drive circuit and the constant-voltage gate drive circuit at the time of driving the IGBT. | 02-27-2014 |
20140070869 | SEMICONDUCTOR DEVICE AND CIRCUIT FOR CONTROLLING POTENTIAL OF GATE OF INSULATED GATE TYPE SWITCHING DEVICE - A semiconductor device outputs a signal to control a gate potential a switching device. The semiconductor device includes a first signal output terminal, and is capable of receiving or internally creating a reference signal, which varies between a first potential and a second potential. The semiconductor device can switch between first and second operations. The first operation outputs to the first signal output terminal a signal that is at a third potential when the reference signal is at the first potential, and that is at a fourth potential higher than the third potential when the reference signal is at the second potential. The second operation outputs to the first signal output terminal a signal that is at the fourth potential when the reference signal is at the first potential, and that is at the third potential when the reference signal is at the second potential. | 03-13-2014 |
20140240025 | LATERAL INSULATED GATE TURN-OFF DEVICES - A lateral insulated gate turn-off (IGTO) device includes an n-type layer, a p-well formed in the n-type layer, a shallow n+ type region formed in the well, a shallow p+ type region formed in the well, a cathode electrode shorting the n+ type region to the p+ type region, at least one trenched gate extending through the n+ type region and into the well, a p+ type anode region laterally spaced from the well, and an anode electrode electrically contacting the p+ type anode region. The structure forms a lateral structure of NPN and PNP transistors, where the well forms the base of the NPN transistor. When a turn-on voltage is applied to the gate, the p-base has a reduced width, resulting in the beta of the NPN transistor increasing beyond a threshold to turn on the IGTO device by current feedback. | 08-28-2014 |
20140266392 | BOOTSTRAPPED SWITCHING CIRCUIT WITH FAST TURN-ON - An apparatus and method for implementing a bootstrapped switching circuit having improved (i.e. faster) turn-on time is provided. In an embodiment, an inner switching loop is implemented in a bootstrapped switching circuit where the inner switching loop is configured to turn on an input switch in the bootstrapped drive circuit independent of the drive circuit output. The embodiment decouples the inner switching loop circuitry from the output drive circuit of the bootstrapped switching circuit, which typically has a larger load capacitance than the inner switching loop. This allows the inner switching loop to turn on the input switch in the bootstrapped switching circuit faster and decreases the turn-on time of the bootstrapped switching circuit. | 09-18-2014 |
20140292393 | GATE VOLTAGE GENERATING CIRCUIT - A gate voltage generating circuit to provide a gate voltage to a transistor switch is disclosed. The gate voltage generating circuit includes a first voltage generating circuit and a second voltage generating circuit. The first voltage generating circuit supplies a first voltage to a gate electrode of the transistor switch. The second voltage generating circuit supplies a second voltage to the gate electrode of the transistor switch. The second voltage is larger than a voltage to turn on the transistor switch. The first voltage is larger than the second voltage. | 10-02-2014 |
20150008972 | Circuit Comprising an Accelerating Element - A circuit includes a switching element with a first terminal, a second terminal and a control terminal. The circuit also includes an impedance network coupled between the control terminal and a switching node. The circuit also includes a first accelerating element coupled between the control terminal and a first node. The first node is different from the switching node. The circuit is configured to temporarily activate the first accelerating element when a switching state of the switching element is to be changed. | 01-08-2015 |
20170237421 | DRIVING CIRCUIT FOR POWER SWITCH | 08-17-2017 |
20180026621 | CORRELATED ELECTRON SWITCH | 01-25-2018 |
327377000 | Turn-off | 11 |
20090212843 | SEMICONDUCTOR DEVICE ARRANGEMENT AND METHOD - A semiconductor device arrangement and a method. One embodiment includes at least one power transistor and at least one gate resistor located between a gate of the power transistor and a connecting point in the drive circuit of the power transistor. The semiconductor device arrangement includes a switchable element between the connecting point and a source of the power transistor. | 08-27-2009 |
20090256618 | SWITCHING ELEMENT DRIVING DEVICE AND SWITCHING ELEMENT DRIVING METHOD - A switching element driving device has a first transistor that decreases the gate voltage of a power element at a faster rate than during a normal turn-off, and a second transistor that decreases the gate voltage of the power element at a slower rate than during a normal turn-off. If the gate voltage detected by the gate voltage monitoring means when an overcurrent in the power element is detected by overcurrent detection means is greater than a predetermined value, the gate voltage is decreased by the first transistor, and then, while the power element remains on, the gate voltage is decreased by the second transistor. If the gate voltage detected by the gate voltage monitoring means when an overcurrent in the power element is detected by overcurrent detection means is less than or equal to the predetermined value, the gate voltage is decreased only by the second transistor. | 10-15-2009 |
20100327942 | SEMICONDUCTOR DEVICE ARRANGEMENT AND METHOD - A semiconductor device arrangement and a method. One embodiment includes at least one power transistor and at least one gate resistor located between a gate of the power transistor and a connecting point in the drive circuit of the power transistor. The semiconductor device arrangement includes a switchable element between the connecting point and a source of the power transistor. | 12-30-2010 |
20110215858 | CONTROLLING THE RECOMBINATION RATE IN A BIPOLAR SEMICONDUCTOR COMPONENT - Disclosed is a method for controlling the recombination rate in the base region of a bipolar semiconductor component, and a bipolar semiconductor component. | 09-08-2011 |
20130200939 | SEMICONDUCTOR DEVICE ARRANGEMENT AND METHOD - A semiconductor device arrangement and a method. One embodiment includes at least one power transistor and at least one gate resistor located between a gate of the power transistor and a connecting point in the drive circuit of the power transistor. The semiconductor device arrangement includes a switchable element between the connecting point and a source of the power transistor. | 08-08-2013 |
20130257511 | POWER GOOD SIGNAL GENERATING CIRCUIT - A circuit includes first to fifth resistors and first to third electronic switches. The circuit allows a signal from a first terminal of the second electronic switch to change from a low level to a high level gradually, and to change from a high level to a low level abruptly. | 10-03-2013 |
20140022000 | Switching Circuit with a Base Discharge Switch - According to an exemplary implementation, a switching circuit includes a bipolar junction transistor, a base current supply configured to turn-on the bipolar junction transistor, and a base discharge switch configured to selectively draw current away from a base of the bipolar junction transistor so as to turn-off the bipolar junction transistor. The base discharge switch can further be configured to selectively prevent the base current supply from providing current to the base of the bipolar junction transistor. The base discharge switch may be coupled across the base of the bipolar junction transistor and an emitter of the bipolar junction transistor. The base discharge switch can further be configured to selectively cause the base of the bipolar junction transistor to have a base voltage substantially lower than an emitter voltage of the bipolar junction transistor. | 01-23-2014 |
20140118051 | SEMICONDUCTOR DEVICE ARRANGEMENT AND METHOD - A semiconductor device arrangement and a method. One embodiment includes at least one power transistor and at least one gate resistor located between a gate of the power transistor and a connecting point in the drive circuit of the power transistor. The semiconductor device arrangement includes a switchable element between the connecting point and a source of the power transistor. | 05-01-2014 |
20140184303 | POWER SEMICONDUCTOR DEVICE - A transistor being one of an IGBT and a MOSFET and arranged near a gate control circuit applies a gate control signal from the gate control circuit to the gate of a transistor arranged far from the gate control circuit. A gate control signal is applied via a resistive element to the transistor arranged near the gate control circuit. | 07-03-2014 |
20150028932 | EFFICIENT IGBT SWITCHING - Embodiments of the invention provide IGBT circuit modules with increased efficiencies. These efficiencies can be realized in a number of ways. In some embodiments, the gate resistance and/or voltage can be minimized. In some embodiments, the IGBT circuit module can be switched using an isolated receiver such as a fiber optic receiver. In some embodiments, a single driver can drive a single IGBT. And in some embodiments, a current bypass circuit can be included. Various other embodiments of the invention are disclosed. | 01-29-2015 |
20160028390 | DEVICE AND METHOD FOR CONTROLLING THE TURN-OFF OF A SOLID STATE SWITCH (SGTO) - A circuit for turning OFF a thyristor. The circuit includes at least one first circuit element configured to provide a high reverse turn-OFF voltage to the thyristor gate for a predetermined period of time. Immediately following the predetermined period of time, at least one second circuit element provides a normal reverse turn-OFF voltage to the thyristor gate. The normal reverse turn-OFF voltage is substantially lower than the high reverse turn-OFF voltage. | 01-28-2016 |