Entries |
Document | Title | Date |
20080284488 | Mixer Circuit - A subharmonic mixer circuit having an input stage ( | 11-20-2008 |
20090033404 | Broadband cascode mixer - A mixer has a cascode configuration. With the configuration, the mixer is operated under a low voltage. And, the present invention has a good circuit gain, a good broadband operation and a low power consumption. The mixer can be realized with a CMOS transistor. Hence, the present invention is fit to be applied in a receiver module. | 02-05-2009 |
20090121772 | Multiplier circuit - Disclosed is a multiplier circuit including first and second squaring circuits comprising first and second differential MOS transistors respectively connected in cascode to first and second diode-connected MOS transistors. The first squaring circuit receives a differential sum voltage of a first input voltage and a second input voltage. The second squaring circuit receives a differential subtraction voltage of the first input voltage and the second input voltage. Outputs of the first and second squaring circuits are first and second terminal voltages of the first and second diode-connected MOS transistors. A differential voltage between the first and second terminal voltages corresponds to the product of the first and second input voltages. | 05-14-2009 |
20090174459 | QUADRATURE RADIO FREQUENCY MIXER WITH LOW NOISE AND LOW CONVERSION LOSS - In one embodiment of the invention, a method for convolution of signals is disclosed including generating four phased half duty cycle clocks each being out of phase by a multiple of ninety degrees from the others; coupling the four phased half duty cycle clocks into a four phase half duty cycle mixer; and switching switches in the four phase half duty cycle mixer in response to the four phased half duty cycle clocks to convolve a differential input signal with the four phased half duty cycle clocks to concurrently generate a differential in-phase output signal and a differential quadrature-phase output signal on a dual differential output port. | 07-09-2009 |
20090174460 | Method of third-order transconductance cancellation and linear mixer thereof - A third-order transconductance (g | 07-09-2009 |
20090189673 | MIXER WITH BALANCED LOCAL OSCILLATOR SIGNAL - A mixer includes a first field effect transistor (FET) having a gate that receives a first signal of a balanced local oscillator (LO) signal, a first source/drain coupled to a ground voltage, and a second source/drain; and a second FET having a gate that receives a second signal of the balanced LO signal, a first source/drain that floats, and a second source/drain connected to the second source/drain of the first FET to form a mixing node, the second signal being out of phase with the first signal. A diplexer is connected between the mixing node and each of a radio frequency (RF) port and an intermediate frequency (IF) port. A first LO leakage caused by the first FET is substantially canceled by a second LO leakage caused by the second FET at the mixing node. | 07-30-2009 |
20090243698 | MIXER AND FREQUENCY CONVERTING APPARATUS - A mixer includes: a magnetoresistive effect element including a fixed magnetic layer, a free magnetic layer, and a nonmagnetic spacer layer disposed between the fixed magnetic layer and the free magnetic layer; and a magnetic field applying unit that applies a magnetic field to the free magnetic layer. The mixer is operable, when a first high-frequency signal and a second high-frequency signal as a local signal are inputted, to multiply the first high-frequency signal and the second high-frequency signal using the magnetoresistive effect element and to generate a multiplication signal. A frequency converting apparatus includes the mixer and a filter operable, when a higher frequency and a lower frequency out of frequencies of the first high-frequency signal and the second high-frequency signal are expressed as f | 10-01-2009 |
20090267677 | COMPACT EJECTABLE COMPONENT ASSEMBLIES IN ELECTRONIC DEVICES - Electronic devices are provided with ejectable component assemblies. The ejectable component assembly may include a tray that can be loaded with one or more removable modules, wafers coupled to circuit boards, cages and retaining plates to assist in retaining the tray within the assembly. The ejectable component assembly may include springs operative to engage detents in the tray to retain the tray in the assembly. The ejectable component assembly may include a tray ejector mechanism for ejecting the tray from the assembly. | 10-29-2009 |
20100001781 | Reconfigurable Heterodyne Mixer and Configuration Methods - Heterodyne mixer comprising:
| 01-07-2010 |
20100085104 | MIXER CIRCUIT - Regarding N-channel first transistor and a P-channel second transistor, their first terminals are connected to each other and their second terminals are connected to each other. Regarding third transistor and a fourth transistor, their first terminals are also connected to each other and their second terminals are also connected to each other. For the first transistor through the fourth transistor, a first capacitor through a fourth capacitor used for coupling are provided. A first impedance element through a fourth impedance element are provided in a path where a bias voltage is applied to the first transistor through the fourth transistor. A fifth capacitor is provided between the first terminals of the first-fourth transistors and a first input terminal. A fifth impedance element and a sixth impedance element are provided as differential pair loads. | 04-08-2010 |
20100117711 | SEMICONDUCTOR CHIP AND RADIO FREQUENCY CIRCUIT - A two-terminal semiconductor device is formed on a semiconductor substrate. Two wiring patterns are respectively connected to terminals of the semiconductor device, and two electrode pads are respectively connected to the wiring patterns for connecting a signal input/output circuit formed on a separate substrate. Two parallel wiring patterns are respectively connected to the wiring patterns, and two reactance-circuit connection electrode pads are respectively connected to the parallel wiring patterns for electrically connecting a reactance circuit formed on the separate substrate separately from the signal input/output circuit. | 05-13-2010 |
20100123507 | CIRCUIT AND METHOD FOR IMPLEMENTING FREQUENCY TRIPLED I/Q SIGNALS - A circuit and a method for implementing frequency tripled I/Q signals are proposed, including receiving two input I/Q signals through frequency multipliers so as to generate two frequency multiplied signals and mixing the input I/Q signals and the corresponding frequency multiplied signals through mixers for generating and outputting two I/Q signals with a frequency three times that of the input I/Q signals. The invention eliminates the requirement for high amplitude of the input signals as in the prior art and has lower power consumption and broader bandwidth and can be used as high frequency signal sources in any single chip processes. | 05-20-2010 |
20100156502 | SIGNAL PROCESSOR COMPRISING A FREQUENCY CONVERTER - A signal processor includes a frequency converter of the multiphase type. A first phase mixer (SWC | 06-24-2010 |
20100164595 | DOWN-CONVERTER MIXER - A down-converter mixer may include a Gilbert cell, two transistor differential pairs, which drive output loads, and transistors defining respective tail generators coupled to common source nodes of the differential pairs. The transistors may receive a radio-frequency signal mixable with a local oscillator signal applied symmetrically between the differential pairs to produce in the loads, a signal deriving from down-converting the radio-frequency signal of an amount given by the frequency of the local oscillator signal. An inductor may be coupled to the common source nodes and which resonates with a capacitive load also coupled to the common source nodes, increases the impedance of such common nodes at the local oscillator signal frequency. The inductor may be in an open loop configuration in the absence of feedback from the mixer, and thus may be active both against noise at radio-frequency and distortion at low frequency. | 07-01-2010 |
20100244926 | Apparatus and Method for Downstream Power Management in a Cable System - An apparatus and method is disclosed to calculate the actual received desired channel power from the downstream transmit power of a Cable Modem Termination System (CMTS) when operating at the nominal line voltage and/or at the normal room temperature as per the DOCSIS specification. A Set-top Device produces a Downstream Power Management (DPM) gain measurement signal having a known power level. The Set-top Device embeds the DPM gain measurement signal onto a received downstream multi-channel communication signal. After embedding the DPM gain measurement signal onto the downstream multi-channel communication signal, the Set-top Device downconverts the combined DPM gain measurement signal and downstream multi-channel communication signal to recover one or more communication channels containing information of a broadcast. The Set-top Device measures a power level of a representation of the DPM gain measurement signal embedded within the one or more communication channels containing the information of the broadcast to determine a Set-top Device gain. The Set-top Device measures a power level of the one or more communication channels containing the information of the broadcast. The Set-top Device calculates the actual received desired channel power from the downstream transmit power of the CMTS based on the Set-top Device gain and the power level of the one or more communication channels containing the information of the broadcast. | 09-30-2010 |
20100253411 | Method and system for generating wavelets | 10-07-2010 |
20100301919 | MIXER AND FREQUENCY CONVERTING APPARATUS - A mixer includes a magnetoresistive effect element, a magnetic field applying unit, and an impedance circuit. The magnetoresistive effect element includes a fixed magnetic layer, a free magnetic layer, and a nonmagnetic spacer layer disposed between the fixed magnetic layer and the free magnetic layer, is operable when a first high-frequency signal and a second high-frequency signal as a local signal are inputted, to multiply the first high-frequency signal and the second high-frequency signal according to a magnetoresistive effect to generate a multiplication signal. The magnetic field applying unit applies a magnetic field to the free magnetic layer. The impedance circuit has a higher impedance for the multiplication signal than an impedance for the first high-frequency signal and the second high-frequency signal and is disposed between an input transfer line, which transfers the first high-frequency signal and the second high-frequency signal, and the magnetoresistive effect element. | 12-02-2010 |
20110050319 | Multiplier, Mixer, Modulator, Receiver and Transmitter - A multiplier is provided, for example, for use as a mixer in a modulator of a radio frequency transmitter. The multiplier multiplies a first alternating signal of constant amplitude by a second signal, for example, in the form of a carrier wave from a local oscillator. The multiplier comprises a transconductance stage for converting the first signal to a differential output current and a current switching stage for switching the differential output current in accordance with the second signal. The transconductance stage comprises a plurality of offset pairs of transistors, whose inputs and outputs are connected in parallel. The switching stage comprises cross-coupled pairs of transistors which, together with the transconductance stage, form a Gilbert cell. The relative gains of the transistors of each offset pair are such that a minimum in the third harmonic distortion characteristic of the multiplier occurs substantially at the amplitude of the first signal. | 03-03-2011 |
20110140757 | Analog Processing Elements In A Sum of Products - The technology relates to analog processing of a sum of products. | 06-16-2011 |
20110140758 | ANALOG MULTIPLIER - An analog multiplier includes a bias circuit, a level shifter, a multiplying circuit, and a current mirror. The analog multiplying circuit is used for inputting a first voltage and a second voltage, and outputting a product current. The product current is proportional to a product of the first voltage and the second voltage. The analog multiplier is implemented by a few devices, thereby having a simple architecture and being capable of being driven by a small amount of power. | 06-16-2011 |
20110140759 | PHASE MIXER WITH ADJUSTABLE LOAD-TO-DRIVE RATIO - Phase mixers, clock signal generators, memories and methods for providing an output signal having a phase relative to the phase difference of input clock signals are disclosed. One such phase mixer includes a phase mixer circuit having inputs and an output. The phase mixer is configured to receive a plurality of input clock signals and generate an output clock signal at the output having a phase relative to the plurality of input clock signals. The phase mixer further includes an adjustment circuit coupled to the phase mixer circuit. In some phase mixers, a control circuit coupled to the phase mixer circuit and the adjustment circuit is included. The control circuit is configured to generate a control signal based on the input signals to adjust an electrical load-to-drive ratio of the phase mixer. | 06-16-2011 |
20110169545 | LOW PHASE NOISE RF SIGNAL GENERATING SYSTEM AND METHOD FOR CALIBRATING PHASE NOISE MEASUREMENT SYSTEMS USING SAME - Very low phase noise radio frequency (RF) source having multiple discrete frequency outputs used, for example, to calibrate phase noise measurement systems. The calibrator output frequencies can be tailored for a particular application using a scalable architecture. | 07-14-2011 |
20110169546 | MIX MODE WIDE RANGE MULTIPLIER AND METHOD THEREOF - A mix mode wide range multiplier and method are provided for multiplying a first signal by a second signal to generate an output signal. A reference signal is generated according to a first gain and a reference value, the output signal is generated according to a second gain and the first signal, a target value is generated according to the second signal, the first gain is adjusted to make the reference signal equal to the target value, and the second gain is adjusted to maintain a ratio of the second gain to the first gain. | 07-14-2011 |
20110248766 | COMPACT HIGH LINEARITY MMIC BASED FET RESISTIVE MIXER - A MMIC (microwave monolithic integrated circuit) based FET mixer and method for the same is provided. In particular, adjacent transistors, such as FETs (field effect transistors) share terminals reducing physical layout separation and interconnections. A smaller die size is realized with the improved system geometry herein provided. | 10-13-2011 |
20110254610 | Distributive Resistive Mixer - The invention relates to devices comprising field effect transistors to detect the power of an electromagnetic high frequency signal V | 10-20-2011 |
20110279165 | Low Phase Noise RF Signal Generating System and Phase Noise Measurement Calibrating Method - Very low phase noise radio frequency (RF) source having multiple discrete frequency outputs used, for example, to calibrate phase noise measurement systems. The calibrator output frequencies can be tailored for a particular application using a scalable architecture. | 11-17-2011 |
20110298521 | POLYPHASE HARMONIC REJECTION MIXER - A polyphase harmonic rejection mixer, comprising a plurality of stages following each other; wherein a first stage is arranged to perform at least frequency conversion; and a second stage is arranged to perform at least selective weighting and combining; wherein at least two of the plurality of stages are arranged to perform at least combining. In an embodiment, the first stage ( | 12-08-2011 |
20120007651 | SYSTEM AND METHOD FOR SIGNAL MIXING BASED ON HIGH ORDER HARMONICS - A system and method for signal mixing using high-order harmonics of a local oscillation (LO) signal. In a radio frequency (RF) system, the input RF signal is converted to a lower frequency signal such as an intermediate frequency (IF) signal or a baseband signal for further processing. A voltage controlled oscillator (VCO) is often used to generate a VCO signal which is then divided down to provide the needed LO signals for down conversion. The present invention discloses a system and method for generating a composite harmonic signal based on a linear combination of divided down LO signals with specific phase shifts. Consequently a VCO signal with lower frequency can be used to conserve power. The composite harmonic signal is mixed with the input RF signal to generate a series of mixed signal including one associated with a high-order harmonic of the divided down LO signal. Systems to implement the high order harmonic mixing is also disclosed which comprises a plurality of mixer sections with configurable weighting factors. A combination circuit is used to combine the weighted mixed signals which contains a term corresponding the mixing of the input RF signal with a high order LO harmonic. | 01-12-2012 |
20120161845 | SWITCHING SYSTEM WITH LINEARIZING CIRCUIT - A transistor-based switch is coupled to a replica circuit that includes transistor circuitry similar to that of the switch. The replica circuit biases a switched transistor to promote linear operation of the switch. | 06-28-2012 |
20120262216 | UP-CONVERSION MIXER - According to some embodiments, an up-conversion mixer includes a mixer cell having an output node arranged to provide an output. An input stage is coupled to the mixer cell and arranged to receive an input signal. The mixer cell is configured to generate the output with an up-converted frequency compared to an input frequency of the input signal. The input stage is configured to reduce a third order harmonic term of the output so that an output power plot of the third order harmonic term with respect to an input power has a notch with a local minimum. | 10-18-2012 |
20130009688 | MIXER ARRANGEMENT - A mixer arrangement for generating an analog output signal mixing an analog input signal with a discrete-time mixing signal. The mixer arrangement comprises a plurality of unit elements. Each unit element is adapted to be in an enabled mode in a first state of an enable signal supplied to the unit element, and in a disabled mode in a second state of the enable signal. Each unit element is adapted to generate the output signal of the unit element based on the analog input signal of the mixer arrangement in the enabled mode but not in the disabled mode. The unit elements are connected for generating a common output signal as the sum of the output signals from the unit elements. The arrangement is adapted to generate the analog output signal of the mixer arrangement based on the common output signal. A corresponding method is also disclosed. | 01-10-2013 |
20130015901 | MIXER CIRCUIT AND VARIATION SUPPRESSING METHODAANM Kitsunezuka; MasakiAACI TokyoAACO JPAAGP Kitsunezuka; Masaki Tokyo JP - In a mixer circuit that solves the problem of the extreme increase in circuit complexity that accompanies compensating for amplitude errors and phase errors, a voltage current conversion unit ( | 01-17-2013 |
20130027110 | SQUARING CIRCUIT, INTEGRATED CIRCUIT, WIRELESS COMMUNICATION UNIT AND METHOD THEREFOR - A squaring circuit has current mode triplet metal oxide semiconductor (MOS) devices, including a first MOS device, a second MOS device and a third MOS device each having a source operably coupled to a first current source; and a fourth MOS device, a fifth MOS device and a sixth MOS device each having a source operably coupled to a second current source. The drain of first and fourth MOS device is operably coupled to a first supply, the drain of second and fifth MOS device is operably coupled to a first differential output port and the drain of third and sixth MOS device is operably coupled to a second differential output port. The gate of first, second and sixth MOS device is connected to a first differential input port, and the gate of third, fourth and fifth MOS device is connected to a second differential input port. | 01-31-2013 |
20130038376 | Frequency Tunable Signal Source - A frequency tunable signal source ( | 02-14-2013 |
20130106488 | SUCCESSIVE APPROXIMATION MULTIPLIER-DIVIDER FOR SIGNAL PROCESS AND METHOD FOR SIGNAL PROCESS | 05-02-2013 |
20130113543 | MULTIPLICATION DYNAMIC RANGE INCREASE BY ON THE FLY DATA SCALING - An apparatus having a first circuit and a second circuit is disclosed. The first circuit may be configured to (i) receive two input signals. Each input signal generally carries a respective data value. Each data value may have a respective sign bit and a respective at least one guard bit. The first circuit may also be configured to (ii) scale each data value independently such that all of the respective guard bits have a same value as the respective sign bit and (iii) generate a product value in an output signal by adjusting an intermediate value based on the scaling of the data values. The second circuit may be configured to generate the intermediate value by multiplying the two data values as scaled. | 05-09-2013 |
20130176067 | COMPACT HIGH LINEARITY MMIC BASED FET RESISTIVE MIXER - A MMIC (microwave monolithic integrated circuit) based FET mixer and method for the same is provided. In particular, adjacent transistors, such as FETs (field effect transistors) share terminals reducing physical layout separation and interconnections. A smaller die size is realized with the improved system geometry herein provided. | 07-11-2013 |
20130194022 | SWITCH MODE CIRCULATOR ISOLATED RF MIXER - The present invention relates to a radio frequency mixer circuit comprising a first terminal ( | 08-01-2013 |
20130257507 | Analog Multiplier and Method for Current Shunt Power Measurements - Multiplier circuitry includes first multiplier circuit including a first transistor having an emitter coupled to a first conductor, a base coupled to a second conductor, and a collector coupled to a third conductor, a second transistor having an emitter coupled to the first conductor, a base coupled to a fourth conductor, and a collector coupled to a fifth conductor, a third transistor having an emitter coupled to the second conductor and a base and collector coupled to a supply voltage, and a fourth transistor having an emitter coupled to the fourth conductor and a base and collector coupled to the supply voltage. Chopper includes a first switch to provide a chopped differential signal between the second and fourth conductors and a second switch for un-chopping a first differential output signal produced between the third and fifth conductors to provide an un-chopped differential output signal between the third and fifth conductors. | 10-03-2013 |
20140002173 | MULTI-STAGE PHASE MIXER CIRCUIT | 01-02-2014 |
20140043086 | MIXER - A frequency converter, capable of obtaining resonance characteristics having a high Q factor and a high multiplication signal and having a narrow-band frequency selectivity function, is provided by the following configuration. A magnetoresistance effect element includes a pinned magnetization layer, a free magnetization layer, and a non-magnetic spacer layer disposed between the pinned magnetization layer and the free magnetization layer. In response to an input of a high frequency signal and a local signal, the magnetoresistance effect element generates a voltage signal (multiplication signal) by multiplying the signals by each other using a magnetoresistance effect. A magnetic field generated by a magnetic-field applying unit is applied to the free magnetization layer of the magnetoresistance effect element in a direction perpendicular to a film surface direction or by tilting an angle of the magnetic field from the film surface direction toward a direction perpendicular to the film surface direction. | 02-13-2014 |
20140097882 | MIXER FABRICATION TECHNIQUE AND SYSTEM USING THE SAME - An improved microwave mixer manufactured using multilayer processing includes an integrated circuit that is electrically connected to a top metal layer of a substrate. The microwave mixer includes: a first metal layer; a dielectric substrate on the first metal layer; a second metal layer directly on the substrate, at least two passive circuits arranged on the second metal layer and a top layer metal; a thin dielectric layer on the second metal layer, wherein the top layer metal is directly on the thin dielectric layer; an integrated circuit (IC) attached to the second metal layer, wherein the IC includes at least one combination of non-linear devices, and wherein the IC is directly connected to the passive circuits on the second metal layer; and a protection layer on the IC. | 04-10-2014 |
20140132330 | CIRCUIT FOR THE ARITHMETIC LINKING OF SEVERAL INPUT SIGNALS - A switching unit serves for the arithmetic linking of at least two input signals supplied to the switching unit. For this purpose, the switching unit provides a switching matrix to which the at least two input signals are supplied. The switching matrix applies at least one summation operation to at least two input signals and/or at least one multiplication operation to at least one input signal. Additionally or alternatively, the switching matrix can also connect at least one input signal directly through to a first output. The switching matrix comprises for this purpose several current switches. | 05-15-2014 |
20140145778 | Subharmonic Mixer - A sub-harmonic electronic mixer has at least one field effect transistor (FET) having a gate, source, and drain; and a useful signal input at a useful frequency; and a local oscillator input. The input receives the oscillator signal at a frequency being an integral fraction of the useful frequency, plus or minus a mixing frequency to provide a signal output. A gate of the FET and/or the drain and/or the source receives the useful signal to generate a gate-source voltage and/or a drain-source voltage whereby the gate receives the local oscillator signal to generate a gate-source voltage, and the drain or a source receives the local oscillator signal to generate a drain-source voltage. A phase shift is introduced between the signal received at the gate and the signal received at the drain or source of the FET. | 05-29-2014 |
20140253214 | MULTIPLIER CIRCUIT - A multiplier circuit for multiplying first and second binary values includes a first logic circuit, a priority encoder, a shifter circuit, and an accumulator. The first logic circuit receives the first binary value and a multiplier modifier, and modifies the first binary value based on the multiplier modifier. The multiplier modifier is generated by the priority encoder. The priority encoder also generates a position binary value indicating the position of a most significant set bit in the modified first binary value. The shifter circuit receives the position binary value from the priority encoder and the second binary value and generates an intermediate result. The accumulator accumulates one or more of the intermediate results and generates a final product that is a product of the first and second binary values. | 09-11-2014 |
20140253215 | BINARY ADDER AND MULTIPLIER CIRCUIT - An adder circuit includes first through fourth two-bit adder modules, and first through third result mux blocks for receiving and adding first and second binary values to generate a final sum. A multiplier circuit that multiplies a multiplier and a multiplicand includes a multiplexer, an encoder connected to the multiplexer, a shifter connected to the encoder, and an accumulator connected to the encoder for receiving the multiplier and multiplicand and generating a multiplication product. | 09-11-2014 |
20140285250 | SIGNAL GENERATION CIRCUIT - A signal generation circuit includes a limiter and a mixer. The limiter receives an input signal, allows the input signal to be off a scale at a limit voltage, and generates a phase signal indicating a phase component of the input signal. The mixer receives the input signal and the phase signal, and generates an amplitude signal indicating an amplitude component of the input signal. | 09-25-2014 |
20140354344 | TEST AND MEASUREMENT INSTRUMENT INCLUDING ASYNCHRONOUS TIME-INTERLEAVED DIGITIZER USING HARMONIC MIXING - A test and measurement instrument including a splitter configured to split an input signal having a particular bandwidth into a plurality of split signals, each split signal including substantially the entire bandwidth of the input signal; a plurality of harmonic mixers, each harmonic mixer configured to mix an associated split signal of the plurality of split signals with an associated harmonic signal to generate an associated mixed signal; and a plurality of digitizers, each digitizer configured to digitize a mixed signal of an associated harmonic mixer of the plurality of harmonic mixers. A first-order harmonic of at least one harmonic signal associated with the harmonic mixers is different from an effective sample rate of at least one of the digitizers. | 12-04-2014 |
20150070072 | HARMONIC MIXER - A harmonic mixer includes first through third field effect transistors. A gate electrode of the first field effect transistor is supplied with a positive-phase signal of a first signal. A gate electrode of the second field effect transistor is supplied with a negative-phase signal of the first signal. A source electrode of the second field effect transistor is short-circuited with a source electrode of the first field effect transistor and is grounded. A source electrode of the third field effect transistor is connected to a terminal at which drain electrodes of the first field effect transistor and the second field effect transistor are short-circuited. A gate electrode of the third field effect transistor is supplied with a second signal. A drain electrode of the third field effect transistor outputs a signal. | 03-12-2015 |
20150091632 | TRAVELING WAVE MIXER, SAMPLER, AND SYNTHETIC SAMPLER - An electronic device comprises an input transmission line that receives an input signal, an output transmission line that transmits an output signal, a local oscillator transmission line that transmits a local oscillator signal, multiple amplification and mixing stages arranged in parallel between the input and output transmission lines and each amplifying a received portion of the input signal and mixing the amplified portion of the input signal with the local oscillator signal to produce a portion of the output signal, and multiple amplification stages arranged in parallel between the input and output transmission lines and each amplifying a received portion of the input signal to produce a portion of the output signal. The amplification stages are located proximate an output side of the electronic device, and the amplification and mixing stages are located proximate an input side of the electronic device. | 04-02-2015 |
20180026608 | Integrating Circuit and Signal Processing Module | 01-25-2018 |