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Amplitude control

Subclass of:

327 - Miscellaneous active electrical nonlinear devices, circuits, and systems

327100000 - SIGNAL CONVERTING, SHAPING, OR GENERATING

Patent class list (only not empty are listed)

Deeper subclasses:

Class / Patent application numberDescriptionNumber of patent applications / Date published
327333000 Interstage coupling (e.g., level shift, etc.) 343
327309000 By limiting, clipping, or clamping 88
327307000 Baseline or DC offset correction 63
327308000 Variable attenuator 32
327331000 Maintaining constant level output 21
Entries
DocumentTitleDate
20130038372SEMICONDUCTOR DEVICE - A second driver is provided in addition to a first driver outputting an output signal in accordance with a voltage of an input signal. When the output signal changes from a first voltage level to a second voltage level in accordance with a voltage change of the input signal, a control part controls the second driver to assist the signal change during a period from a change start time until the output signal exceeds a third voltage level. The control part controls the second driver to suppress the signal change during a period from the time when the output signal exceeds the third voltage level until it reaches the second voltage level.02-14-2013
20130027106POWER CONTROL CIRCUIT - A power control circuit includes a voltage output terminal, a control chip, a converter, and a comparator. A voltage input pin of the control chip is connected to a first power source. A voltage pin of the converter is connected to a second power source. A pulse input pin of the converter is connected to a pulse output pin of the control chip. An output pin of the converter is connected to the voltage output terminal. An inverting input terminal of a comparator is connected to a voltage output pin of the control chip. A non-inverting input terminal of the comparator is connected to the second power source through a first resistor and grounded through a second resistor. An output terminal of the comparator is connected to a detecting pin of the control chip and connected to the non-inverting input terminal of the comparator through a third resistor.01-31-2013
20130027107SIGNAL CONVERSION CIRCUIT, ISOLATOR CIRCUIT INCLUDING THE SAME, AND SIGNAL CONVERSION METHOD - In one embodiment a signal conversion circuit includes; 01-31-2013
20100117706HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS - A high-speed signaling system with adaptive transmit pre-emphasis. A transmit circuit has a plurality of output drivers to output a first signal onto a signal path. A receive circuit is coupled to receive the first signal via the signal path and configured to generate an indication of whether the first signal exceeds a threshold level. A first threshold control circuit is coupled to receive the indication from the receive circuit and configured to adjust the threshold level according to whether the first signal exceeds the threshold level. A drive strength control circuit is coupled to receive the indication from the receive circuit and configured to adjust a drive strength of at least one output driver of the plurality of output drivers according to whether the first signal exceeds the threshold level.05-13-2010
20090146721OOB (OUT OF BAND) DETECTION CIRCUIT AND SERIAL ATA SYSTEM - The present invention provides an OOB detection circuit capable of making accurate signal determination even in the case where a characteristic fluctuation occurs in an analog circuit, thereby preventing deterioration in the yield of a product. To an amplitude determining circuit, a characteristic adjustment register for changing setting of an amplitude threshold adjustment mechanism for distinguishing a burst and a squelch from each other provided for the amplitude determining circuit is coupled. The characteristic adjustment register is controlled by a self determination circuit. An output of the amplitude determination circuit is supplied to a time determining circuit and also to the self determination circuit. On the basis of the output of the amplitude determining circuit, the self determination circuit controls the characteristic adjustment register.06-11-2009
20130038373INTEGRATED CIRCUIT DEVICE, CALIBRATION MODULE, AND METHOD THEREFOR - An integrated circuit device comprising at least one calibration module for calibrating an impedance of at least one on-die interconnect line driver in order to adaptively match an impedance between the at least one on-die interconnect line driver and at least one on-die interconnect line conjugated thereto. The at least one calibration module is arranged to receive an indication of an output signal of the at least one line driver, compare the received indication of an output signal to a reference signal and detect a presence or an absence of a voltage overshoot of the output signal of the at least one line driver, and upon detection of a presence or an absence of a voltage overshoot of the output signal of the at least one line driver, cause the adjustment of power supply of the at least one line driver, to be decreased or increased correspondingly.02-14-2013
20100109739ACTIVE GUARDING FOR REDUCTION OF RESISTIVE AND CAPACITIVE SIGNAL LOADING WITH ADJUSTABLE CONTROL OF COMPENSATION LEVEL - In various embodiments, applicants' teachings are related to an active guarding circuit and method for reducing parasitic impedance signal loading on a signal-transmission channel that is shunted by a parasitic impedance. The presence of an electrical signal on the signal-transmission channel causes a leakage current to flow through the parasitic impedance. In various embodiments, the circuit comprises an amplifier and an impedance, one terminal of the impedance is coupled to the signal-transmission channel. The input of the amplifier is coupled to the signal-transmission channel and the output is coupled to the other terminal of the impedance so as to cause a compensation current to flow through the impedance. The gain of the amplifier and the value of the impedance are selected so that the compensation current has a magnitude substantially equal to the leakage current magnitude.05-06-2010
20130049839Circuit Arrangement and Receiver Including the Circuit Arrangement - According to embodiments of the present invention, a circuit arrangement is provided. The circuit arrangement includes a first input terminal and a second input terminal, a first transistor and a second transistor, each of the first transistor and the second transistor having a first controlled terminal, a second controlled terminal and a control terminal, the first controlled terminal of the first transistor being coupled to the first controlled terminal of the second transistor, the control terminal of the first transistor being coupled to the first input terminal, the control terminal of the second transistor being coupled to the second input terminal, and the second controlled terminal of the first transistor being coupled to the second controlled terminal of the second transistor, an input matching circuit coupled to the first input terminal, the second input terminal, the first transistor and the second transistor, a first resistive element coupled between the control terminal of the first transistor and the second controlled terminal of the first transistor, a second resistive element coupled between the control terminal of the second transistor and the second controlled terminal of the second transistor, and an output terminal coupled to the second controlled terminal of the first transistor and the second controlled terminal of the second transistor, wherein the input matching circuit includes a first inductor, a second inductor, a third inductor, a first capacitor and a second capacitor, wherein the first inductor is coupled between the first input terminal and the control terminal of the first transistor, wherein the second inductor is coupled between the first controlled terminal of the first transistor and the first controlled terminal of the second transistor, wherein the third inductor is coupled between the second input terminal and the control terminal of the second transistor, wherein the first capacitor is coupled between the control terminal of the first transistor and the first controlled terminal of the first transistor, and wherein the second capacitor is coupled between the control terminal of the second transistor and the first controlled terminal of the second transistor. According to further embodiments of the present invention, a receiver including the circuit arrangement is provided.02-28-2013
20130069704ONE-WIRE COMMUNICATION CIRCUIT AND ONE-WIRE COMMUNICATION METHOD - A communication circuit facilitating communication between a first equipment and a second equipment including a conversion circuit, an input port, an output port, and a communication port is disclosed. The conversion circuit converts an input signal to a first intermediate signal, and converts a second intermediate signal to an output signal. The input port inputs the input signal to the first conversion circuit. The output port outputs the output signal to the control unit. The communication port inputs the second intermediate signal to the conversion circuit, and outputs the first intermediate signal to the second equipment. A voltage of the first intermediate signal is determined based on a voltage of a power source if the first intermediate signal is logic high, and a voltage of the second intermediate signal is determined based on the voltage of the power source if the second intermediate signal is logic high.03-21-2013
20090302922INPUT AND OUTPUT CIRCUIT APPARATUS - An input and output circuit apparatus includes a signal generating circuit configured to generate a first signal, an input and output circuit configured to receive the first signal from the signal generating circuit and a second signal to generate an output signal responsive to the first signal and the second signal, an operation test circuit having substantially an identical circuit configuration to the input and output circuit, and configured to receive the first signal from the signal generating circuit and a third signal to generate an output signal responsive to the first signal and the third signal, a check circuit configured to generates a check signal indicative of an operating condition of the operation test circuit in response to the output signal of the operation test circuit, and an adjustment circuit configured to adjust the signal generating circuit in response to the check signal output from the check circuit.12-10-2009
20110012664CLOCK SIGNAL AMPLIFIER CIRCUIT - A clock signal amplifier circuit includes: an inverter; a coupling capacitor connected to the input of the inverter; two resistors connected in series between the power supply potential and the ground potential, a connection node of the two resistors being connected to the input of the inverter; a feedback resistor provided between the input and output of the inverter; and two switches configured to perform a same open/close operation according to a control signal, the two switches being provided on any two of a supply path of the power supply potential to the inverter, a supply path of the ground potential to the inverter, and a feedback path of the inverter via the feedback resistor.01-20-2011
20090002047Switching Circuit Which Is Used To Obtain A Doubled Dynamic Range - It permits switching signals with a peak level equal to the source voltage by means of a transistor, the peak to peak level being double the source.01-01-2009
20120235727SIGNAL SHAPING CIRCUIT - A signal shaping circuit that shapes a drive signal and includes a main-signal amplifying circuit that amplifies the drive signal; a preemphasis generating circuit that symmetrically emphasizes a rising portion and a falling portion of the drive signal; a current source that is provided in the main-signal amplifying circuit; and a condenser that couples the main-signal amplifying circuit and the preemphasis generating circuit.09-20-2012
20130162317SYSTEM AND METHOD FOR PROCESSING SIGNAL - A system for processing signals includes an original wave outputting module, a signal sampling module and a signal processing module. The signal processing module includes an SCM, an FGPA chip and an amplifier electrically connected to the SCM. The original wave outputting module outputs an originating wave. The signal sampling module samples the wave, and outputs a plurality of signals. The signal processing module receives the plurality of signals, and outputs an amplified wave. The SCM has a predetermined wave frequency value and a predetermined wave amplitude value. The FGPA chip generates digital signals according to the predetermined wave frequency value. The amplifier amplifies the digital signals according to the predetermined wave amplitude value.06-27-2013
20130207710Enhanced Flexibility Coupler for RF Power Detection and Control - This invention describes a method by which the output power of a circuit or system at any point can be efficiently and cost effectively sampled in a simple and broadband fashion for processing in a closed loop system for applications such as power level control in very broadband circuits. A divider circuit consisting of a selection of passive lumped elements is used to create a very broadband means of sampling the RF power level at any point in a transmission line. Unlike prior art schemes of this nature, this circuit does not rely upon extremely accurate element values and minimization of parasitic reactances. Used in conjunction with a balanced detector-logarithmic or other amplifier combination this invention result in a very broadband low cost simplified realization of the traditional costly bandwidth limited directional coupler-detector combination.08-15-2013
20110285446POWER AMPLIFICATION DEVICE AND COMMUNICATION DEVICE - In a case where two constant envelope signals corresponding to an input signal are generated through analog signal processing, variation in detection sensitivities of amplitudes of those signals is suppressed. At least one of a mixer (11-24-2011
20110285445DRIVE LOOP FOR MEMS OSCILLATOR - Some embodiments regard a method comprising: generating a current according to a movement of the MEMS device; the movement is controlled by a control signal; generating a peak voltage according to the current; and adjusting the control signal when the peak voltage is out of a predetermined range.11-24-2011
20090284299PRINTED CIRCUIT BOARD, AND BACKPLANE DATA TRANSMISSION METHOD - In a receiving-side printed circuit board, a reflected-waveform analyzing unit analyzes a reflected wave generated in a transmission line on a backplane along with transmission of a signal from a transmitting-side printed circuit board, and acquires waveform data that indicates a waveform of the reflected wave. An input signal identifying unit calculates a size of the reflected wave that is currently received based on the waveform data and data on previously received signals. The input signal identifying unit corrects a threshold value by the calculated size, and identifies a state of a bit indicated by the signal from the transmitting-side printed circuit board.11-19-2009
20090066392ELECTRONIC CIRCUIT FOR MEASURING A PHYSICAL PARAMETER SUPPLYING AN ANALOGUE MEASUREMENT SIGNAL DEPENDENT UPON THE SUPPLY VOLTAGE - The electronic circuit (03-12-2009
20110006827SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes: a first flip-flop, a combined circuit and a second flip-flop that form a critical path; a first delay circuit and a third flip-flop that are provided in the post-stage of the combined circuit; a second delay circuit and a fourth flip-flop that are provided in the post-stage of the combined circuit; a first comparison circuit that compares the output of the second flip-flop with the output of the third flip-flop; a second comparison circuit that compares the output of the second flip-flop with the output of the fourth flip-flop: and a control circuit that controls a source voltage supplied to the combined circuit in accordance with the outputs of the comparison circuits. A delay time by the first delay circuit is different from a delay time by the second delay circuit.01-13-2011
20120139605INTEGRATED CIRCUIT AND RELATED CONTROLLING METHOD - An integrated circuit includes: a circuit pin; a detecting circuit coupled to the circuit pin, and arranged to detect a signal level value of the circuit pin when the integrated circuit operates in a first operational mode; a storage circuit coupled to the detecting circuit, and arranged to store the signal level value; and a controlling circuit coupled to the storage circuit, and arranged to set a voltage level of the circuit pin according the signal level value when a processing circuit of the integrated circuit operates in a second operational mode.06-07-2012
20090189668VOLTAGE DETECTING CIRCUIT - A voltage detecting circuit for comparing a voltage to be detected with a reference voltage and outputting an output signal having a level depending on the comparison is disclosed. The voltage detecting circuit includes an inverting amplifier circuit configured to receive an intermediate signal having a level depending on the comparison and output the output signal. The inverting amplifier circuit includes an active element having a control terminal. A threshold voltage of the control terminal is as low as or lower than the reference voltage. The voltage to be detected is applied to the control terminal of the active element.07-30-2009
20100271102Semiconductor integrated circuit - Provided is a semiconductor integrated circuit including: a differential driver that is, disposed between a first power supply and a second power supply and drives differential input signals to generate differential output signals; and a control signal generation circuit that generates a first control signal for controlling a voltage level of each of the differential output signals. When each of a pair of output signals forming the differential output signals is changed from a voltage level corresponding to the first power supply to a voltage level corresponding to the second power supply, an amount of change in the voltage level of the corresponding output signal is controlled based on the first power supply.10-28-2010
20110063010RECTIFYING AND LEVEL SHIFTING CIRCUIT - A circuit includes a differential circuit having at least to two inputs, a first variable impedance circuit, and a second variable impedance circuit. The first variable impedance circuit is between a first branch of the differential circuit and an output. The first variable impedance circuit provides a first variable impedance. The a second variable impedance circuit is between a second branch of the differential circuit and the output. The second variable impedance circuit provides a second variable impedance. The first variable impedance and the second variable impedance vary in accordance with a voltage difference between the two inputs.03-17-2011
20110063009Voltage Trimming Circuit - A voltage trimming circuit is provided. The voltage trimming circuit has an input stage, an up-trimming resistor ladder, a down-trimming resistor ladder and a control means. The input stage has a first input, a second input and an output, wherein the first output is to receive an input voltage, the second input is connected to a connection point and the output is to provide an output voltage based on a difference between the voltage of the first and the second input. The up-trimming resistor ladder is connected between the output of the input stage and the connection point and the down-trimming resistor ladder connected between a ground potential and the connection point. The control means controls the resistance of the up-trimming and the down-trimming resistor ladder to up-trim or down-trim the output voltage.03-17-2011
20100085101RECEPTION COMPARATOR FOR SIGNAL MODULATION UPON A SUPPLY LINE - A receiving stage for a multi-stage signal modulated upon a supply voltage, including: a supply potential terminal and a ground potential terminal, a voltage divider and a low-pass filter, whose input is connected to the supply potential terminal and the ground potential terminal, and which has an output which is arranged to output the low-pass filter output signal. The stage also includes a high comparator having an high threshold value, an output and a receiving signal input that is connected to the output of the low-pass filter and is arranged to receive the low-pass filter output signal; a low comparator having a low threshold value, an output and a receiving signal input that is connected to the output of the low-pass filter and is arranged to receive the low-pass filter output signal; and a high threshold value generator which is arranged to raise the high threshold value if the low-pass filter output signal is less than the high threshold value, and to lower the high threshold value if the low-pass filter output signal is greater than the high threshold value. Finally, the stage includes a low threshold value generator which is arranged to raise the low threshold value if the low-pass filter output signal is less than the low threshold value, and to lower the low threshold value if the low-pass filter output signal is greater than the low threshold value. A method for receiving a multi-stage signal is also provided which operates according to the operating principle of the receiving stage.04-08-2010
20090206906SIGNAL SPLITTER - A controllable-gain circuit (TI, Rt, TS08-20-2009
20100090743INTERFACE TO REGULATE VOLTAGE FOR ASIC POWER MANAGEMENT - A method and apparatus to regulate voltage used to power an ASIC comprising an ASIC having a signal source and a modulator. The modulator establishes a characteristic of a signal created by the signal source to indicate a voltage level to be used to power the ASIC. The signal is communicated to a voltage regulator to apply an optimal voltage to the ASIC.04-15-2010
20090278583CLIPPING CORRECTION SYSTEM AND METHOD FOR CORRECTING CLIPPED SIGNALS IN A RECEIVER - A system and method for restoring a clipped signal may be used in an optical receiver that detects a clipped modulated optical signal. The clipped modulated optical signal is detected to produce a clipped electrical signal including a series of clipped negative peaks and corresponding positive peaks. The clipped signal may be corrected by detecting at least one trigger peak preceding one or more clipped negative peaks to be restored and generating a replacement tip signal segment for the clipped negative peak(s) to be restored. The replacement tip signal segment may be combined with the clipped electrical signal such that the replacement tip signal segment coincides with a clipped end of the clipped negative peak to be restored to produce a restored negative peak.11-12-2009
20090289684PULSE DETECTION DEVICE AND PULSE DETECTION METHOD - A pulse detection device detects a pulse signal having an intermediate potential in a predefined period. Furthermore, the pulse detection device includes a signal fixing section that fixes the intermediate potential of the pulse signal at a low level or a high level. Furthermore, the signal fixing section is preferably a pull-down resistor or a pull-up resistor connected to an input signal line to which the pulse signal is input. Note that a pulse detection method may fix the intermediate potential of the pulse signal at a low level or a high level.11-26-2009
20090261880SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - In order to transfer data at high speed over a long distance, a current mode logic output circuit (CML) having a large number of taps, high accuracy, and a wide switchable range of the amount of pre-emphasis is needed. However, when the amount of emphasis is set by adding unit source-coupled pair circuits, a problem will arise that the output capacitance of the current mode logic output circuit would increase, thus hampering high-speed transmission. An output circuit of the invention is constructed from unit source-coupled pair circuits 10-22-2009
20120293229CIRCUIT AND METHOD FOR PERFORMING ARITHMETIC OPERATIONS ON CURRENT SIGNALS - A circuit for performing arithmetic operations includes a differential capacitive transimpedance amplifier (CTIA) and a cross-multiplexer. The cross multiplexer forwards the current to be integrated out of a plurality of current sources either to the positive input port of the differential CTIA for positive integration in direct mode or to the negative input port of the differential CTIA for negative integration in reverse mode.11-22-2012
20110204952CURRENT DETECTION CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT - The invention provides a current detection circuit for a transistor, that does not influence a current flowing through the transistor, and minimizes a power loss, an increase of the pattern area and so on. A current detection circuit includes a wiring connected to a MOS transistor and forming a current path of a current of the MOS transistor, a current detection MOS transistor of which the gate is connected to the wiring, that flows a current corresponding to the potential of the gate, and a current detector detecting a current flowing through the current detection MOS transistor. The current detection circuit is configured including a load resistor connected to the current detection MOS transistor and a voltage detection circuit detecting a drain voltage of the current detection MOS transistor.08-25-2011
20110267127Integrated circuit, communication unit and method for improved amplitude resolution of an RF-DAC - An integrated circuit comprises a digitally-controlled power generation stage (DPA) for converting an input signal to a radio frequency (RF) carrier, the DPA comprising a plurality of selectable switching devices capable of adjusting an envelope of the RF carrier; and a pulse width modulator (PWM) generator arranged to generate a PWM control signal and operably coupleable to the plurality of selectable switching devices of the DPA. The PWM generator inputs the PWM control signal to a subset of the plurality of the selectable switching devices such that a PWM signal adjusts the envelope RF carrier output from the DPA.11-03-2011
20100201422Automatic Gain Control for Motion Encoder Signals - Disclosed are various embodiments of pulse generation and automatic gain control (“AGC”) circuits and corresponding methods that are especially well suited for use in motion encoding systems. Analog output signals provided by a motion encoder serve as inputs to the pulse generation circuit, where peaks, valleys and/or crosspoints corresponding to such analog signals are first detected and then employed to generate output pulses corresponding thereto. These output pulses are next provided to an AGC circuit as self-generated clock signals which control the time windows over which the analog signals of the motion encoder are sampled and processed by the AGC circuit so as to adjust the gains applied to such analog signals.08-12-2010
20080272821Signal Converting Circuit - A signal conversion circuit 11-06-2008
20080315935Digital Acquistion Device for an Amplitude Modulation Signal - The invention relates to a digital acquisition device for an amplitude modulation signal of a carrier. The acquisition device digitally acquires a useful signal. The useful signal modulates the amplitude of a carrier HF12-25-2008
20120293228LEVEL CONTROL CIRCUIT, LEVEL CONTROL METHOD, AND LEVEL CONTROL SYSTEM - A level control circuit that generates output signal for level control includes: a control information storage that stores control information corresponding to a signal level, a control information circuit that outputs the output signal for level control corresponding to the signal level of a first input signal based on the control information stored in the control information storage; and an information update circuit that updates the control information of the control information storage according to the signal level of a second input signal.11-22-2012
20090051401CALIBRATION CIRCUIT FOR AN ADJUSTABLE CAPACITANCE - A calibration circuit for calibrating an adjustable capacitance of a circuit having a time constant depending on the adjustable capacitance, the calibration circuit generating a calibration signal for calibrating the capacitance and including a calibration loop, suitable to carry out a calibration cycle in several sequential steps. The calibration circuit includes a controllable capacitance for receiving a control signal and including an array of switched capacitors selectively activated by the control signal to connect to a first common node that conducts a voltage value depending on the total capacitance value of the activated capacitors; an assessment unit for comparing this voltage value with a reference voltage to output a logic signal that can transition between first and second logic levels; a control and timing unit to receive the logic signal and change the control signal to carry out a subsequent calibration step that is provided at the end of the integration interval during a comparison interval of a preset duration, which allows a transition of the logic signal to occur prior to the beginning of the consecutive calibration step.02-26-2009
20110204951SEMICONDUCTOR APPARATUS - A semiconductor apparatus for generating an internal voltage includes a control code output block and an internal voltage generation block. The control code output block is configured to output a variable code having a code value corresponding to a voltage level of an internal voltage. The internal voltage generation block is configured to compare the variable code to a setting code and controls the voltage level of the internal voltage according to the comparison.08-25-2011
20090179682High Speed Driver Equalization - The present invention relates to emphasizing and de-emphasizing of an analog data signal. Using a main analog driver (07-16-2009
20110221501TRIMMING CIRCUIT - A trimming circuit is provided. The trimming circuit had at least a trimming cell, and each of the at least trimming cell includes three current paths and a fuse. A first one of the current paths is interrupted when a second one of the current paths is uninterrupted, and the first one of the current paths is uninterrupted when the second one of the current paths is interrupted. When a trimming control signal is at an enable state, a third one of the current paths is uninterrupted, such that the fuse is blown. Based on the status of the fuse, the trimming circuit is capable of trimming an output voltage or an output current of an electric apparatus.09-15-2011
20090201067REFERENCE VOLTAGE GENERATING CIRCUIT, INTEGRATED CIRCUIT DEVICE, AND SIGNAL PROCESSING APPARATUS - A reference voltage generating circuit that generates a reference voltage includes: a first pn junction that generates a first voltage; a second pn junction that has a different current density from the first pn junction; a first resistor that generates a first current having a positive temperature coefficient based on a voltage equivalent to a difference between a forward voltage of the first pn junction and a forward voltage of the second pn junction; a second resistor that generates a first voltage having a positive temperature coefficient based on the first current, wherein the first voltage having the positive temperature coefficient and a voltage having a negative temperature coefficient are added to generate the reference voltage; and a third resistor that generates a temperature-dependent voltage based on the first current having the positive temperature coefficient, wherein the reference voltage and the temperature-dependent voltage are outputted in parallel from first and second output nodes, respectively, and a resistance value of the first resistor and a resistance value of the third resistor are adjusted in the same proportion by a trimming signal.08-13-2009
20110140754REFERENCE FREQUENCY GENERATION CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT, AND ELECTRONIC DEVICE - An oscillator circuit increases and reduces signal levels of first and second oscillation signals in a complementary manner in response to a transition of a signal level of a reference clock. An oscillation control circuit compares each of the signal levels of the first and second oscillation signals to a comparison voltage, and causes the signal level of the reference clock to transition according to results of the comparison. A reference control circuit increases or reduces the comparison voltage so that a difference between a signal level of an intermediate signal which is proportional to respective swings of the first and second oscillation signals and a reference voltage is reduced.06-16-2011
20090002048Reference voltage generating circuit - Disclosed is a reference voltage generating circuit which includes resistors R01-01-2009
20090243691Signal output circuit - Disclosed is a signal output circuit comprising: a first transistor of an emitter follower configuration, which receives an input signal; a second transistor of an emitter follower configuration, which receives the input signal, and has an output connected to an external load (10-01-2009
20090315608Energy Saving Driving Circuit and Associated Method for a Solid State Relay - An energy saving driving circuit and method is provided for use with a solid state relay (SSR). The circuit and method reduce the overall energy required to drive a solid state relay by maintaining the SSR in an “on” state with a minimal maintenance or holding current after applying a turn-on current. The driving circuit includes a control circuit configured for outputting a control signal; a turn-on circuit configured for providing an output current at a first current level for a first time period in response to the control signal; and a holding circuit configured for maintaining said output current at a second reduced current level for a second time period. The maintenance or holding current is reduced in respect of that of a conventional driving current, and in some cases may be an order of magnitude or more less in magnitude than a conventional driving current, thereby resulting in less energy consumed by the SSR.12-24-2009
20090315607PROGRAMMABLE CIRCUIT FOR DRIFT COMPENSATION - Systems and methods relating to programmable circuits are described. Several embodiments relate to systems and methods for controlling the long-term stability and accuracy of circuits that produce waveforms varying in frequency and amplitude. Such embodiments may include a circuit comprising a common vacuum environment that houses a pair of heater-thermocouples. The circuit may compare signals outputted by each heater-thermocouple and then may produce a resultant value based on the comparison. The resultant value may be used by the circuit to control the long-term stability and accuracy of the circuit. Such control of the long-term stability and accuracy of the circuit may include drift compensation associated with certain components of the circuit.12-24-2009
20100156496HIGH VOLTAGE SWITCH WITH REDUCED VOLTAGE STRESS AT OUTPUT STAGE - The present invention discloses a high voltage switching module having reduced stress at its driver output stage which in turn controls the gate of a transistor requiring a high current drive. The switching module includes a negative elevating circuit, a delay module, a pull-up circuit, and a pull down circuit. The negative elevating circuit senses a transition of a logic input signal to generate a control signal. The first pull-up circuit is operatively coupled to this control signal for switching the driver output from a negative voltage to a ground voltage. There is an additional delay module which is configured to provide a delay in the logic input signal. This delayed logic input signal is operatively coupled to the second pull-up stage which takes the output of the driver from GND to VDD. The pull-down circuit is operatively coupled to the negative elevator for controlling a voltage at the driver output to the negative level. The module further comprises a switching circuit that is operatively coupled to the driver output for controlling the passing of a high voltage with high current requirements.06-24-2010
20100156497System And Method For Common Mode Translation - System and method for common mode translation in continuous-time sigma-delta analog-to-digital converters. An embodiment includes a loop filter having an RC network coupled to a differential signal input, a Gm-C/Quantizer/DAC circuit (GQD) coupled to the loop filter, a common-mode level adjust circuit coupled to signal inputs of the GQD, and a tuning circuit coupled to the GQD and the common-mode level adjust circuit. The GQD evaluates an input signal provided by the RC network, computes a difference between a filtered input signal and the feedback quantization signal to generate an error signal, measures the error signal, and compensates for the error signal with sigma-delta noise-shaping. The common-mode level adjust circuit alters a common-mode level of a differential input signal to be substantially equal to a desired common-mode level and the tuning circuit provides a compensation voltage to the common-mode level adjust circuit based on a difference between the common-mode levels.06-24-2010
20100176862Gain Control Circuit and Method of Gain Control - The present invention relates to a gain control circuit, which detects an output signal of a front-end circuit to produce a detection signal. An operation unit performs an accumulation operation to the detection signal and thereby produces an operation signal. In addition, the operation unit also resets the operation unit according to a reset signal. A reset unit produces the reset signal for every predetermined interval of time. A control unit produces a control signal according to the operation signal and a first threshold value for controlling an output gain of the front-end circuit.07-15-2010
20110102047Radio Frequency (RF) Power Detector Suitable for Use in Automatic Gain Control (AGC) - In one form, a power detector includes first and third transistors of a first conductivity type, and second and fourth transistors of a second conductivity type. A control electrode of the first transistor receives a first bias voltage plus a positive component of a differential input signal. The second transistor is coupled in series with the first transistor and has a control electrode receiving a second bias voltage plus a negative component of the differential input signal. The third transistor is biased using the first bias voltage plus the negative component. The fourth transistor is coupled in series with the third transistor and is biased using the second bias voltage plus the positive component. A common interconnection point of the first and third transistors forms an output node. In another form, a power detector compares an output of a power detector core to multiple threshold voltages in corresponding comparators.05-05-2011
20100289551INCREASED RELIABILITY IN THE PROCESSING OF DIGITAL SIGNALS - A method, device and computer program product for providing increased reliability in the processing of digital signals. The device includes a module for performing analog measurement of a received signal intended to occupy two logical states at various instances in time, a module for determining if there is a change in the analog signal level, a module for determining if the change fulfills at least one logical state change condition, wherein a first logical state change condition is based on the speed of change of the analog signal level, and a module for determining that there is a change from one logical state to the other if at least one logical state change condition is fulfilled. The invention provides secure detection of unreliable digital signals that may be generated in harsh environments that are polluted or moist.11-18-2010
20110057703SEMICONDUCTOR DEVICE - A semiconductor device includes an internal circuit to perform a predetermined function at a plurality of different supply power voltages, a power supply voltage region detector to detect a supply power voltage to output a detection signal, a latch to store the signal output from the power supply voltage region detector and output the stored signal as a power supply voltage region signal, and a reset circuit to generate a reset signal to perform a predetermined reset operation on the internal circuit. The latch stores the output signal from the power supply voltage region detector just after the reset operation for the internal circuit is released, and the internal circuit changes an internal setting according to the power supply voltage region signal output from the latch.03-10-2011
20100013537LOW-VOLTAGE DIFFERENTIAL SIGNALING RECEIVER WITH COMMON MODE NOISE SUPPRESSION - The disclosure relates to a method and apparatus for noise suppression in an LVDS receiver by providing improved common mode noise immunity through a bypass circuit. In one embodiment, the disclosure relates to an apparatus for providing Low Voltage Differential signaling (LVDS). The apparatus includes a preamplifier circuit for receiving a DC component of a first signal and providing a first processed DC signal; a first bypass circuit for receiving an AC component of the first signal, the first bypass circuit providing a first AC output signal; a first node for combining the processed DC signal with the first AC output signal to form a first combined output signal; and an amplifier circuit for amplifying the first combined output signal and a second signal to provide a first amplified signal and a second amplified signal, wherein the first bypass circuit is in parallel with the preamplifier circuit.01-21-2010
20130135025DUAL MODE POWER AMPLIFIER CONTROL INTERFACE WITH A TWO-MODE GENERAL PURPOSE INPUT/OUTPUT INTERFACE - In accordance with some embodiments, the present disclosure relates to a dual mode control interface that can be used to provide both a radio frequency front end (RFFE) serial interface and a two-mode general purpose input/output (GPIO) interface within a single digital control interface die. In certain embodiments, the dual mode control interface, or digital control interface, can communicate with a power amplifier. Further, the dual mode control interface can be used to set the mode of the power amplifier.05-30-2013
20090066393SWITCH CIRCUIT - A switch circuit includes a pair of metal oxide semiconductor (MOS) switches and an adjusting unit. Each of the MOS switches has an input terminal and an output terminal. The MOS switches receive a pair of differential input voltages at the input terminals thereof, and output a pair of differential output voltages at the output terminals thereof when the MOS switches conduct. The adjusting unit changes a difference between common mode levels of the input terminals and the output terminals of the MOS switches so as to adjust linearity of differential mode resistances of the MOS switches.03-12-2009
20110109368Sensor Connection Circuit - A circuit for converting the state of a sensor into a signal interpretable by an electronic circuit, including: a comparator of the voltage level of an input terminal with respect to a reference level, the sensor being intended to be connected between a terminal of application of a first power supply voltage and the input terminal; a current-limiting element between said input terminal and the ground; and a switching element in series with the current source and intended to be controlled by a pulse train.05-12-2011
20110018604Configurable Clock Signal Generator - A method to provide a low-power clock signal or a low-noise clock signal is described herein. It is determined whether a low-power mode or a low-noise mode is in use. A voltage reference input of a low-dropout voltage regulator (LDO) is switched to a low-power voltage reference for low-power mode and to a low-noise voltage reference for low-noise mode. The LDO provides a constant voltage output to a crystal oscillator. A clock signal is generated using the crystal oscillator. The clock signal is limited using a low-power limiter to generate a low-power output clock signal and/or is limited using a low-noise limiter to generate a low-noise clock signal. The low-power output clock signal or the low-noise output clock signal is selected using a mux.01-27-2011
20110043267CALIBRATION OF LINEAR TIME-INVARIANT SYSTEM'S STEP RESPONSE - The invention concerns in general measurement of the transfer function of linear time invariant systems, more particular the calibration of such systems based on a measured transfer function. According to a first aspect the present invention an arrangement for measuring the transfer function of a linear time-invariant system is disclosed. According to a second aspect of the present invention the arrangement is implemented into a linear time-invariant circuitry having a transfer function representing the amplitude and phase characteristic of the circuitry, where by means of the arrangement for measuring the transfer function the transfer function can be optimized in accordance with certain criteria on-the-fly, i.e. in or before operation of the circuit. Finally, an effective and simple method for measuring of the transfer function of a linear time-invariant system together with the use or application of the method is shown.02-24-2011
20110121879METHOD OF AUTOMATIC GAIN MODULATION AND APPARATUS IMPLEMENTING THE SAME - Provided is method for automatic audio gain modulation and a related apparatus. In order to prevent the unstable signals as continuously increasing or decreasing the gain when the signals hover around an upper threshold, it's featured that the method is to predict the signal intensity as pre-adding a predict gain in a hold time before outputting signals. By determining whether the prediction exceeds a predetermined threshold or not, the suitable and adjustable gains can be obtained without exceeding the predetermined threshold. In the automatic gain control mechanism, it's to decrease the gain gradually as automatically entering an attack time, or to increase the gain gradually as performing a conventional auto-gain control procedure including entering a release time. The claimed method can modulate the gain automatically by predicting the gain, and confine the signals under a threshold. In addition to avoid sawtooth phenomena, the method can stabilize the signals.05-26-2011
20110241750TUNED RESONANT CIRCUITS - A circuit block which comprises a non-linear capacitor with two different values of capacitance dependent on a value of a voltage of a resonant signal on the capacitor; a plurality of second capacitors each coupled to a respective switch to enable a said second capacitor to be switched in or out of parallel connection with the nonlinear capacitor; and a tuning control, coupled to the second capacitor switches, and sensing an amplitude of the resonant signal. The tuning control circuit is configured to control the second capacitor switches to successively switch the second capacitors in/out of parallel connection with the non-linear capacitor dependent on the amplitude of the resonant signal until the non-linear capacitor has substantially a single one of two different values, such that in a resonant circuit the circuit block then behaves as a fixed value capacitor.10-06-2011
20100013538SEMICONDUCTOR DEVICE - There is provided a current amount adjusting section adjusting a current amount flowing through a power supply line supplying power to an internal circuit which includes a circuit operating based on a clock signal and a ratio of consumed charge amounts by the current flowing at a rising edge of the clock signal and by the current flowing at a falling edge of the clock signal so that noise generated in the power supply line may be restrained.01-21-2010
20090033399Method and Device for Adjusting a Pulse Detection Threshold, and Pulse Detection and Corresponding Receiver - The invention relates to a method for adjusting a pulse detection threshold consisting in detecting a pulse when the edge of said pulse envelop crosses the threshold, in allocating (A) a staring value (TH02-05-2009
20110102048BIAS VOLTAGE GENERATION TO PROTECT INPUT/OUTPUT (IO) CIRCUITS DURING A FAILSAFE OPERATION AND A TOLERANT OPERATION - A method includes controllably generating a first bias voltage from a supply voltage to be within an upper tolerable limit of an operating voltage of one or more constituent active circuit element(s) of an Input/Output (IO) core device of an integrated circuit (IC) to be interfaced with an IO pad, and controllably generating a second bias voltage from an external voltage supplied through the IO pad to be within the upper tolerable limit of the operating voltage of the one or more constituent active circuit element(s) of the IO core device to be interfaced with the IO pad. The method also includes controllably utilizing a control signal generated by the IO core to derive an output bias voltage from the first bias voltage during a driver mode of operation or the second bias voltage during a failsafe mode of operation and a tolerant mode of operation.05-05-2011
20110102046Interfacing between differing voltage level requirements in an integrated circuit system - A method includes controllably generating a first bias voltage from a supply voltage to be within an upper tolerable limit of an operating voltage of one or more constituent active circuit element(s) of an Input/Output (IO) core device of an integrated circuit (IC) to be interfaced with an IO pad, and controllably generating a second bias voltage from an external voltage supplied through the IO pad to be within the upper tolerable limit of the operating voltage of the one or more constituent active circuit element(s) of the IO core device to be interfaced with the IO pad. The method also includes controllably utilizing a control signal generated by the IO core to derive an output bias voltage from the first bias voltage during a driver mode of operation or the second bias voltage during a failsafe mode of operation and a tolerant mode of operation.05-05-2011
20110102045INTERFACING BETWEEN DIFFERING VOLTAGE LEVEL REQUIREMENTS IN AN INTEGRATED CIRCUIT SYSTEM - A method includes controllably generating a first bias voltage from a supply voltage to be within an upper tolerable limit of an operating voltage of an IO receiver, and controllably generating a second bias voltage from an external voltage supplied through an IO pad to be within the upper tolerable limit of the operating voltage of the IO receiver. The method also includes deriving an output voltage from the first bias voltage during a normal condition and a tolerant condition, and deriving the output voltage from the second bias voltage during a failsafe condition. The tolerant condition is a mode of operation where the external voltage supplied through the IO pad varies from zero to a value higher than the supply voltage, and the failsafe condition is a mode of operation where the supply voltage is zero.05-05-2011
20110084751MULTICHANNEL INTERFACING DEVICE HAVING A BALANCING CIRCUIT - The invention relates to an interfacing device for transmission through interconnections used for sending a plurality of electrical signals.04-14-2011
20110074483TECHNIQUE TO REDUCE CLOCK RECOVERY AMPLITUDE MODULATION IN HIGH-SPEED SERIAL TRANSCEIVER - A method is provided for improving clock recovery signal jitter in digital communication based on a phase adjustment technique in a phase interpolation. A clock signal is expressed as the combination of two sinusoidal signals. The phase interpolating process determines the amplitude of the first sinusoidal signal, and the amplitude of the second sinusoidal signal that is 90° out of phase from the first sinusoidal signal. The clock signal is then formed by combining first sinusoidal signal with the second sinusoidal signal by choosing the first and second amplitude such that the amplitude of the clock signal is substantially a constant. Modulation of the clock signal amplitude is significantly improved by the disclosed technique over the conventional technique when the sum of the first and second amplitudes of the two sinusoidal functions is kept a constant.03-31-2011
20110074484SIGNAL INPUT CIRCUIT AND SEMICONDUCTOR DEVICE HAVING THE SAME - A signal input circuit includes an input unit, a first compensation circuit, a second compensation circuit, and an enable circuit. The input unit receives a first input signal to output an output signal to an output node. The first compensation circuit is connected to the output node and discharges the output node in response to a second input signal. The second compensation circuit is connected to the output node and supplies a current to the output node in response to the second input signal. The enable circuit enables the input unit and the first and second compensation circuits in response to at least one operation mode selection signal.03-31-2011
20110248765X-Ray and Gamma Ray Detector Readout Sytem - A readout electronics scheme is under development for high resolution, compact PET (positron emission tomography) imagers based on LSO (lutetium ortho-oxysilicate, Lu10-13-2011
20110175660Semiconductor device, data transmission system and method of controlling semiconductor device - A semiconductor device includes an amplifier section that receives a small-amplitude signal in which data is updated in synch with a clock, and an output section coupled to the output of the amplifier section. In synch with the clock, the amplifier section increases the current of a current source at timings at which the logic level of the small-amplitude signal is capable of undergoing a transition, and decreases the current at timings at which there is no transition. In synch with the clock, the output section drives a load by decreasing output impedance at timings at which the logic level of output data of the amplifier section is capable of undergoing a transition, and prevents flow of a through-current by increasing output impedance at timings at which the logic level does not undergo a transition.07-21-2011
20110210780SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes: a plurality of chips configured to receive an external voltage. Each one of the chips detects a signal delay characteristic of the one of the chips to generate an internal voltage having a level corresponding to the signal delay characteristic.09-01-2011
20120242389SENSOR CONTROL CIRCUIT AND SENSOR SYSTEM - A sensor control circuit according to the present embodiment is provided with an autonomous-oscillation loop part configured to generate a sensor-modulated signal having a carrier signal and an alternating signal output by a sensor and superposed on the carrier signal having the same frequency as the alternating signal, and an amplitude adjustment loop part configured to generate a control signal for amplitude adjustment of the carrier signal, by digital processing of a result of comparison between the carrier signal and a reference voltage level. The autonomous-oscillation loop part includes an amplifier configured to perform amplitude adjustment of the carrier signal, and a switched capacitor having a switch configured to be switched by the control signal, the switched capacitor configured to be capable of controlling a gain of the amplifier in accordance with a switching frequency of the switch.09-27-2012
20110254608LEVEL CONTROL CIRCUIT, LEVEL CONTROL METHOD, AND LEVEL CONTROL SYSTEM - A level control circuit that generates output signal for level control includes: a control information storage that stores control information corresponding to a signal level, a control information circuit that outputs the output signal for level control corresponding to the signal level of a first input signal based on the control information stored in the control information storage; and an information update circuit that updates the control information of the control information storage according to the signal level of a second input signal.10-20-2011
20080204105Power supply device, signal output apparatus and power supply method - A power supply device capable of suitably reducing a loss even in a case where power is supplied to an output device which outputs a high-frequency signal, a signal output apparatus in which a loss is suitably reduced, and a power supply method capable of suitably reducing a loss. The power supply device has a power supply section which supplies a power supply voltage to an output device which is supplied with the power supply voltage and outputs an output signal, and a voltage control section which controls the power supply section so that the power supply voltage follows the envelope of the output signal from the output device.08-28-2008
20100321082METHOD AND DEVICE FOR CONTROLLING A COMMON-MODE VOLTAGE OF A SWITCHED-CAPACITOR SYSTEM, IN PARTICULAR AN ANALOG-TO-DIGITAL CONVERTER - The common-mode voltage of a switched-capacitor system is controlled by determining a current common-mode voltage of the switched-capacitor system, converting (in a flow-through conduction cell) the difference between the current common-mode voltage and a desired common-mode voltage into a resultant current, and reinjecting this resultant current into the switched-capacitor system via a resistive path.12-23-2010
20110187435SEMICONDUCTOR DEVICE - To prevent damage on an element even when a voltage high enough to break the element is input. A semiconductor device of the invention operates with a first voltage and includes a protection circuit which changes the value of the first voltage when the absolute value of the first voltage is higher than a reference value. The protection circuit includes: a control signal generation circuit generating a second voltage based on the first voltage and outputting the generated second voltage; and a voltage control circuit. The voltage control circuit includes a transistor which has a source, a drain, and a gate, and which is turned on or off depending on the second voltage input to the gate and thus controls whether the value of the first voltage is changed based on the amount of current flowing between the source and the drain. The transistor also includes an oxide semiconductor layer.08-04-2011
20110148499SIGNAL GENERATING APPARATUS AND TEST APPARATUS - Provided is a signal generating apparatus that outputs from an output end thereof an output voltage corresponding to input data supplied thereto, comprising: a DA converter that outputs a voltage corresponding to data supplied thereto; a capacitor section that is provided between the output end and a standard potential; a transmission switch that provides a connection or a disconnect between a voltage generating end of the DA converter and the output end; and a control section that causes the DA converter to charge the capacitor section with a voltage corresponding to the input data by repeatedly connecting and disconnecting the transmission switch, thereby causing the voltage of the capacitor section to gradually approach the output voltage corresponding to the input data.06-23-2011
20110181334TRACK AND HOLD CIRCUIT AND RELATED RECEIVING DEVICE WITH TRACK AND HOLD CIRCUIT EMPLOYED THEREIN - An operational circuit includes: a gain control circuit arranged to provide a gain value upon an input signal according to a set of control signals, wherein the gain control circuit includes a first resistor-based network and a second resistor-based network; an operational amplifier coupled to the gain control circuit and arranged to generate an output signal according to the input signal and the gain value; and a first capacitor coupled to the operational amplifier and arranged to hold the output signal between a first input terminal and a first output terminal of the operational amplifier, wherein when the operational circuit is operating, a first terminal of the first capacitor is consistently coupled to the first input terminal of the operational amplifier, and a second terminal of the first capacitor is consistently coupled to the first output terminal of the operational amplifier.07-28-2011
20080315934Integrated Circuit Comprising a Mixed Signal Single-Wire Interface and Method for Operating the Same - The invention relates to an integrated circuit (12-25-2008
20110304375AMPLITUDE-STABILIZED EVEN ORDER PRE-DISTORTION CIRCUIT - An amplitude-stabilized second-order predistortion circuit includes a main cell having a differential input for receiving a differential input voltage, a differential output for providing a differential output voltage, and a load control input for receiving a load control voltage; a replica cell having a differential input for receiving a differential level of peak input voltage, a differential peak output voltage, and a load control input; and a control circuit coupled to the differential output of the replica cell and driving the load control inputs of the main cell and the replica cell. The main cell and the replica cell are multiplier cells each having a variable load. The control circuit includes a first amplifier for generating a single-ended peak signal and a second amplifier for generating the load control voltage from the difference between the replica cell single-ended peak output signal and a single-ended peak reference signal.12-15-2011
20120105125ELECTRONIC CIRCUIT AND METHOD FOR OPERATING A CIRCUIT IN A STANDBY MODE AND IN AN OPERATIONAL MODE - A method and an electronic circuit, the electronic circuit includes: a first circuit; a leakage measurement circuit arranged to determine a leakage level of the first circuit when the first circuit is in a standby mode, and to determine an information maintenance level of a supply voltage in response to the leakage level; and a voltage supply circuit arranged to provide to the first circuit a supply voltage of a functional level when the first circuit is in a functional mode, and to provide to the first circuit a supply voltage of the information maintenance level when the first circuit is in the standby mode; wherein the first circuit is arranged to maintain information when provided with the supply voltage of the information maintenance level.05-03-2012
20110156791OUTPUT CIRCUIT OF SEMICONDUCTOR DEVICE - An output circuit of a semiconductor device includes a signal selector configured to receive first and second input data signals and sequentially outputting the first and second input data signals in response to a phase signal; and an output level controller configured to control a voltage level of an output signal of the signal selector based on the first and second input data signals.06-30-2011
201200016715V TOLERANT CIRCUIT FOR CML TRANSCEIVER IN AC-COUPLE - A high voltage tolerant transceiver operating at a low voltage is provided, including two input/output pads to receive a receive signal and transmit a transmit signal; a transmitter block to transmit the transmit signal; a receiver block to receive the receive signal and provide an amplified signal; at least one of the transmitter block and the receiver block further comprising at least two NMOS transistors having their gate coupled to a low power supply to receive the low voltage, their substrate coupled to ground, and their source coupled to the input/output pad. Also provided is a circuit to isolate the output of a transmitter from high voltages, including a first transistor and a second transistor. Also provided is a substrate isolating circuit, including a first transistor, a second transistor, and a third transistor so that the substrate voltage is isolated from a high voltage in the pads. Further provided is a bias isolating circuit so that an input bias voltage is isolated from a high voltage in the pads.01-05-2012
20120013381Semiconductor integrated circuit and power supply voltage control method - A semiconductor integrated circuit includes a selector to selectively output and supply to a monitoring target voltage terminal one of a power supply voltage from an outside of the semiconductor integrated circuit and a predetermined reference voltage depending on an adjusting mode signal, a voltage monitoring circuit to monitor a voltage fluctuation at the monitoring target voltage terminal and converting the voltage fluctuation that is monitored into a control signal, and an input and output circuit to output the control signal to the outside.01-19-2012
20120013382Semiconductor Integrated Circuit Device - The present invention is directed to perform fine low-voltage control without largely increasing the circuit layout area in a low-power consumption structure. In the case of shifting a region to a low-speed mode, a system controller outputs a request signal and an enable signal to a power switch controller and a low-power drive circuit, respectively, to turn off a power switch and to perform a control so that the voltage level of a virtual reference potential becomes about 0.2 V to about 0.3V. The region operates on voltages between a power supply voltage and a virtual reference potential, so that it is controlled in the low-speed mode.01-19-2012
20120206184DETERMINING AUTOMATIC GAIN CONTROL LEVELS - An apparatus comprises an integrated circuit (IC) and a resistor external to the IC. The IC includes a current output digital-to-analog converter (IDAC) circuit configured to provide an adjustable specified current to a resistor external to the apparatus, a voltage sensing circuit configured to sense the voltage of the external resistor, and an automatic gain control (AGC) circuit configured to receive threshold information using the adjustable specified current.08-16-2012
20090134927DIGITAL POTENTIOMETER SYSTEM - A system or circuit for simulating a potentiometer, thermistor, or the like. A pulse stream, having a duty cycle which is varied as a changing pulse width or as a differing number of time slices per time period, may be input to the system. The pulse stream to a transistor or switch-like mechanism may allow a controlled connection of a fixed value resistor to a reference voltage or ground to provide various resultant values of impedance or resistance. A measuring circuit connected to the output of the system may determine a value which is of the fixed value resistor divided by the duty cycle of the pulse train effectively controlling the connection of the resistor to ground. One or more additional circuits may be connected in parallel to achieve greater accuracy.05-28-2009
20120306559Compliance Methods for Source Measure Units Operating with Digital Control Loops - A source-measure unit (SMU) may be implemented with respective digital control loops for output voltage and output current. The digital control loop associated with the output that is being regulated may be the setpoint control loop while the digital control loop associated with the other output may be the compliance control loop. The digital loop controller may switch between the setpoint control loop and the compliance control loop without generating a mode-change glitch, by maintaining a single integrator. The compliance methods may differ in how and when the decision is made to select which of the measured signals provides the error signal to the integrator. Thus, there may be no issue with integrator wind-up, which might be the case if there were two complete control loops operating continuously.12-06-2012
20120062303METHOD AND APPARATUS FOR REDUCING INPUT DIFFERENTIAL PAIRS FOR DIGITAL-TO-ANALOG CONVERTER VOLTAGE INTERPOLATION AMPLIFIER - For voltage interpolation amplifiers used in digital-to-analog converter architecture, the number of input differential pairs required by the voltage interpolation amplifier may be reduced such that an N-bit voltage interpolation amplifier comprises N+1 input differential pairs connected through a resistor attenuation network to provide a binary-weighted effective transconductance. In comparison to conventional voltage interpolation amplifier designs, the number of input differential pairs and power consumed by the circuit is significantly reduced, thereby creating a more area- and power-efficient voltage interpolation amplifier.03-15-2012
20120154012Circuit and Method for Controlling Multi-Channel Power - A circuit and a method for controlling multi-channel power are disclosed. The method includes: according to a channel selection signal in the previous clock cycle, select one channel signal from the received at least one channel signal in the previous clock cycle; according to an amplification factor control signal in the previous clock cycle, amplify the selected one channel signal to acquire a first signal; perform A/D conversion on the first signal to acquire a second signal; and according to the second signal, generate an amplification factor control signal in the next clock cycle, so that according to the amplification multiple control signal in the next clock cycle, amplify the selected one channel signal in the next clock cycle when the next clock cycle comes. The scheme can be used to detect the multi-channel optical power and its circuit implementation is simple.06-21-2012
20110089988Self-Calibrating R-2R Ladder and Method Thereof - A method and apparatus are provided for calibrating a ladder circuit. The apparatus includes: a logic unit for receiving a first logical signal, a second logical signal, and N control bits and for outputting N alternative control bits and an additional control bit, where N is an integer greater than 1; a core circuit for receiving the N alternative control bits, the additional control bit, and a tuning word, and for outputting an output signal, wherein the core circuit comprises N−1 series elements, N shunt elements with a connectivity controlled by the N alternative control bits, respectively, and a termination element with a connectivity controlled by the additional control bit; and a calibration circuit for receiving the first logical signal, the second logical signal, and the output signal and for outputting the tuning word. When the first logical signal is 0, the apparatus operates in a normal mode and the output signal follows the N control bits; when the first logical signal is 1, the apparatus operates in a calibration mode and the output signal follows the second logical signal. When the apparatus operates in the calibration mode, the tuning word is adjusted in a closed loop manner so as to make the output signal substantially the same regardless of a value of the second logical signal.04-21-2011
20100289550ELECTRONIC CIRCUIT FOR THE TRANSMISSION OF HIGH-FREQUENCY SIGNALS - The invention relates to an electronic circuit for transmitting high-frequency signals. Said electronic circuit comprises an amplification circuit featuring frequency-dependent amplification which remains the same or drops in a vicinity of a threshold frequency (f11-18-2010
20120126873CONSTANT CURRENT CIRCUIT AND REFERENCE VOLTAGE CIRCUIT - Provided is a constant current circuit and a reference voltage circuit with improved line regulation without needing a start-up circuit. The constant current circuit includes: a constant current generation circuit including NMOS transistors and a resistor; a current mirror circuit including a pair of depletion mode NMOS transistors, for allowing a current of the constant current generation circuit to flow; and a feedback circuit for maintaining constant voltages of source terminals of the pair of depletion mode NMOS transistors.05-24-2012
20110181335INTERFACE CIRCUIT, LSI, SERVER DEVICE, AND METHOD OF TRAINING THE INTERFACE CIRCUIT - Power consumption is increased in an interface circuit having a signal processing function for waveform shaping due to influence of a circuit added for waveform shaping. Also, since a plurality of boards are connected to a backplane in a system, they are not exchanged in accordance with distances while there are boards being far or near are mixed, but a common board is used. Thus, it is necessary to prepare a configuration of an interface circuit meeting the longest transfer distance. An interface circuit disabling a part of or all of operations of a waveform shaping circuit is provided. Accordingly, in accordance with transfer distances, switching of operation ranges of waveform shaping circuit inside the interface circuit is possible, and operation ranges of the waveform shaping circuit can be limited, and power consumption of the interface circuit, an LSI including the interface circuit, and a server device can be reduced.07-28-2011
20120133411ADAPTIVE GAIN ADJUSTMENT SYSTEM - Techniques for adaptive gain adjustment in a signal processing path to achieve greater dynamic range. In an exemplary embodiment, a digital gain is applied to a digital input signal based on a detected level of the digital input signal. A corresponding analog gain is applied to the output of a digital-to-analog converter for converting the digital input signal to an analog signal, the product of the digital gain and the analog gain being kept constant. In an exemplary embodiment, a zero cross detector is employed to update the digital and analog gains only in the vicinity of zero crossings detected in the signal. In a further exemplary embodiment, a peak detector is employed to instantaneously adjust the digital and analog gains to avoid clipping in the signal path.05-31-2012
20110215856Method And Apparatus For Automatic Gain Control for Nonzero Saturation Rates - A method for automatic gain control comprising the steps of measuring a signal using compressed sensing to produce a sequence of blocks of measurements, applying a gain to one of the blocks of measurements, adjusting the gain based upon a deviation of a saturation rate of the one of the blocks of measurements from a predetermined nonzero saturation rate and applying the adjusted gain to a second of the blocks of measurements. Alternatively, a method for automatic gain control comprising the steps of applying a gain to a signal, computing a saturation rate of the signal and adjusting the gain based upon a difference between the saturation rate of the signal and a predetermined nonzero saturation rate.09-08-2011
20120081165HIGH VOLTAGE TOLERATIVE DRIVER - A high voltage tolerative inverter circuit includes a first PMOS transistor with a source connected to VDDQ and drain connected to a first node; a second PMOS transistor with a source connected to the first node and a drain connected to an output; a first NMOS transistor with a source connected to VSS and a drain connected to a second node; a second NMOS transistor with a source connected to the second node and a drain connected to the output. A gate of the first PMOS transistor is controlled by a first signal having a voltage swing between VDDQ and VSS. A gate of the first NMOS transistor and the second PMOS transistor are controlled by a second signal having a voltage swing between VDD and VSS. VDD is lower than VDDQ. A gate of the second NMOS transistor is biased with a first voltage greater than VSS.04-05-2012
20120092056Hysteresis Device - A hysteresis device produces an output signal in accordance with hysteresis characteristics that changes at a plurality of thresholds with respect to an input signal. The hysteresis apparatus includes an input signal adjusting section that outputs an adjustment signal in which an offset level corresponding to each of the plurality of thresholds is added to the input signal, a comparator that outputs a first signal based on the adjustment signal, the first signal being binarized, and a determining section that controls the input signal adjusting section to switch the offset level for each of the plurality of thresholds, that acquires the first signal for each switching of the offset level, and that produces a present output signal based on a previous output signal and the first signal corresponding to the threshold relating to a range to which the input signal is belonged.04-19-2012
20120092055ELECTRONIC DEVICE AND METHOD FOR KICKBACK NOISE REDUCTION OF SWITCHED CAPACITIVE LOADS AND METHOD OF OPERATING THE ELECTRONIC DEVICE - An electronic device which includes a first stage having an input capacitance, a switch, a buffer and a second stage having an input sensitive to charge injection and/or voltage glitches. An input of the buffer and the input of the second stage are coupled together at a first node which is configured to be coupled to a voltage source for supplying a reference voltage to the input of the first stage having the input capacitance. In a first configuration of the switch, the switch is arranged to either connect the input of the first stage to the first node and to disconnect the input of the first stage from an output of the buffer. In a second configuration of the switch, to connect the input of the first stage to the output of the buffer and to disconnect the input of the first stage from the first node.04-19-2012
20130015900COUNTERMEASURE METHOD AND DEVICE FOR PROTECTING DATA CIRCULATING IN AN ELECTRONIC MICROCIRCUIT - The disclosure relates to a countermeasure method in an electronic microcircuit, comprising successive process phases executed by a circuit of the microcircuit, and adjusting a power supply voltage between power supply and ground terminals of the circuit, as a function of a random value generated for the process phase, at each process phase executed by the circuit.01-17-2013
20130021081CIRCUITRY AND METHOD FOR DIFFERENTIAL SIGNAL DETECTION WITH INTEGRATED REFERENCE VOLTAGE - Differential signal detection circuitry with an integrated reference voltage. The reference voltage is added as an offset to the output voltage, and its integration ensures that variations in the reference voltage closely track variations in the signal. Accordingly, the detection threshold for the signal being detected remains more consistent over variations in the circuit manufacturing process, power supply voltage and operating temperature.01-24-2013
20110273216LOAD CONDITION CONTROLLED POWER MODULE - In accordance with various aspects of the present invention, a method and circuit for reducing power consumption of a power module during idle conditions is provided. In an exemplary embodiment, a power module is configured for reducing power during idle mode by disengaging at least one power output from a power input. A power module may include one or more power outputs and one or more power module circuits, with power input connected to the power outputs through the power module circuit(s). The power module circuit may include a current measuring system, a control circuit, and a switch. The current measuring system provides an output power level signal that is proportional to the load at the power output. If current measuring system behavior indicates that a power output is drawing substantially no power from the power input, the switch disengages the power input from the power output.11-10-2011
20080218237MULTI-LEVEL MULTI-PIN DIFFERENTIAL INTERFACE - A digital interface system that includes a first circuit that transmits a set of voltage levels and a second circuit that receives the set of voltage levels and generates a set of voltage differential levels based on the set of voltage levels. The set of voltage differential levels corresponds to a first predetermined value. Each of the voltage levels is different from another of the voltage levels.09-11-2008
20130135026QUASI-TRANSLATOR, FOURIER MODULATOR, FOURIER SPECTROMETER, MOTION CONTROL SYSTEM AND METHODS FOR CONTROLLING SAME, AND SIGNAL PROCESSOR CIRCUIT - A quasi-translator for economically producing pure, smooth translational motion with broad arcuate or error-free motion regardless of orientation, which is useful in numerous interferometer applications including spectroscopy, a Fourier modulator and a Fourier spectrometer are provided. The quasi-translator utilizes a support, an arm including a driving magnet on a first end and a driven element on a second end, an axis for rotation of the arm, a bearing system that controls the rotation of the arm about the axis, a drive coil and a drive amplifier to drive the arm in the arcuate motion. The quasi-translator may be employed in a Fourier modulator to change the optical path difference of the interferometer/quasi-translator at a substantially constant rate of change. The quasi-translator and/or Fourier modulator may be used in a Fourier spectrometer to create an optical spectrum from a light beam and/or electrical signal created from the light beam.05-30-2013
20130093490INTERNAL VOLTAGE GENERATION CIRCUIT AND METHOD - An internal voltage generation method includes the steps of: setting first to third sections by using a reference voltage; determining to which section an internal voltage level corresponds, among the first to third sections; and generating the internal voltage by controlling a voltage pumping amount according to a section corresponding to the internal voltage level.04-18-2013
20130093489SIGNAL CONVERTER EQUIPPED WITH OVERVOLTAGE PROTECTION MECHANISM - A signal converter equipped with an overvoltage protection mechanism includes a pulse width modulation unit, a timing processing unit, an overvoltage detection unit, a pulse width control unit and a multi-level conversion unit. The pulse width modulation unit converts an analog signal into a pulse signal. The timing processing unit converts the pulse signal into a digital signal and outputs the digital signal to the overvoltage detection unit. When the digital signal is higher than the maximum limitation or less than the minimum limitation, the overvoltage detection unit outputs an over-threshold signal to the pulse width control unit to allow the pulse width modulation unit to perform feedback adjustment and prevent the multilevel conversion unit connected to the timing processing unit from causing burnout of downstream circuits because the multilevel conversion unit outputs maximum power intensity of signal over a long time.04-18-2013
20110267128PARAMETER SETTING CIRCUIT AND METHOD FOR INTEGRATED CIRCUITS - A parameter setting circuit and method for an integrated circuit apply a pulse current to a pin of the integrated circuit during a programming mode of the integrated circuit, and then extract the difference between the voltage on the pin and the DC component of the voltage on the pin to determine a setting signal for parameter setting to an internal circuit of the integrated circuit. By this way, an input pin, an output pin or an input/output pin of the integrated circuit may be used as the pin implementing the parameter setting function.11-03-2011
20130127512MULTI-LEVEL CHIP INPUT - Aspects of the instant disclosure are directed toward apparatuses that generate a power-related adjustment signal in response to the power signal. Digital-input-signal pads are included to communicate digital signals with a circuit external to the apparatus. Further, digital-input processing circuitry receives the digital signals from the digital-input-signal pad, and processes the received digital signals. Additionally, configuration circuitry applies the power-related adjustment signal to signals received at the digital-input-signal pad and, in response, detects the digital signals received.05-23-2013
20120274380INTERNAL VOLTAGE GENERATION CIRCUIT - An internal voltage generation circuit includes a first detection unit, a second detection unit, a control unit, and a voltage pumping unit. The first detection unit compares an internal voltage with a first reference voltage to generate a first detection signal when the first detection unit is activated in response to a first enable signal. The second detection unit compares the internal voltage with a second reference voltage to generate a second detection signal. The control unit generates the first enable signal and a second enable signal in response to the first detection signal and the second detection signal. The voltage pumping unit generates the internal voltage in response to the second enable signal.11-01-2012
20110234288INTERNAL VOLTAGE GENERATING CIRCUIT FOR PREVENTING VOLTAGE DROP OF INTERNAL VOLTAGE - An internal voltage generating circuit is utilized to perform a TDBI (Test During Burn-in) operation for a semiconductor device. The internal voltage generating circuit produces an internal voltage at a high voltage level, as an internal voltage, in not only a standby section but also in an active section in response to a test operation signal activated in a test operation. Accordingly, dropping of the internal voltage in the standby section of the test operation and failure due to open or short circuiting are prevented. As a result, reliability of the semiconductor chip, by preventing the generation of latch-up caused by breakdown of internal circuits, is assured.09-29-2011
20110291733TRANSMITTER, INTERFACE DEVICE, AND CAR MOUNTED COMMUNICATION SYSTEM - A transmitter includes a capacitor from one end of which a charge voltage is derived; a first constant current source to generate a charge current for the capacitor; a second constant current source to generate a discharge current for the capacitor; a charge/discharge controller to perform charge/discharge control of the capacitor based on a logic level of a transmission input signal and a comparison result between the charge voltage and a reference voltage; an output stage to generate the transmission output signal, wherein a slew rate of which is set in response to the charge voltage, and wherein an amplitude of the transmission output signal is set in response to an output side power source voltage; a reference voltage generator to fluctuate the reference voltage depend on the output side power source voltage; and a constant current controller to fluctuate a current value of the charge current and the discharge current depend on the reference voltage.12-01-2011
20100007399PRE-DRIVER FOR BRIDGE CIRCUIT - A pre-driver for driving a high-side transistor of a bridge driver is connected to a bridge driver including first and second drive transistors connected in series between a high voltage power supply and ground. A reference circuit generates a reference voltage that varies depending on the output voltage of the bridge driver. In response to the reference voltage, the regulator circuit generates an internal power supply voltage that is substantially higher than the output voltage by a constant value. A buffer circuit generates a drive voltage for driving the first drive transistor based on the internal power supply voltage and the output voltage.01-14-2010
20120293227CAPACITOR CONTROLLED SWITCH SYSTEM - A switch controller is provided that uses one or more capacitors to generate a slow turn on/slow turn off switch control signals to suppress audible switching noise in an audio switch. In some embodiments, an analog inverter and a capacitor are used to generate the switch control signals, while in other embodiments two capacitors are used to generate the switch control signals. To conserve power between switching states, routing logic is provided that ties the switch control signals to respective voltage rails and disables selected portions of the switch controller.11-22-2012
20120299630TRIMMING CIRCUIT AND SEMICONDUCTOR DEVICE - Provided are a trimming circuit which does not need a dedicated terminal to which a current for cutting a fuse is input, and also a semiconductor device including the trimming circuit. The trimming circuit includes: an input terminal connected to a pad which is an external terminal of an internal circuit; a fuse provided between a power supply terminal and an output terminal; and a diode provided between the input terminal and the output terminal. The trimming circuit performs trimming by applying, to the pad, such a voltage that the diode is biased in the forward direction.11-29-2012

Patent applications in class Amplitude control

Patent applications in all subclasses Amplitude control