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ENCAPSULATED

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257 - Active solid-state devices (e.g., transistors, solid-state diodes)

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Class / Patent application numberDescriptionNumber of patent applications / Date published
257788000 With specified encapsulant 145
257796000 With heat sink embedded in encapsulant 5
20130056885ENCAPSULATED SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - An encapsulated semiconductor device includes: a first conduction path formative plate (03-07-2013
20110291304METHOD OF MAKING MICROELECTRONIC PACKAGE USING INTEGRATED HEAT SPREADER STIFFENER PANEL AND MICROELECTRONIC PACKAGE FORMED ACCORDING TO THE METHOD - A method of making a microelectronic package, and a microelectronic package made according to the method. The method includes: bonding and thermally coupling a plurality of IC dies to an IHS panel to yield a die-carrying IHS panel; mounting the die-carrying IHS panel onto a substrate panel including a plurality of package substrates to yield a combination including the die-carrying IHS panel mounted to the substrate panel; and singulating the combination to yield a plurality of microelectronic packages, each of the packages including: an IHS component of the IHS panel, one of the plurality IC dies bonded and thermally coupled to said IHS component, and one of the plurality of package substrates, said IHS component and said one of the plurality of IC dies being mounted to said one of the plurality of package substrates to form said each of the packages.12-01-2011
20080237898SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME, HEAT SINK, SEMICONDUCTOR CHIP, INTERPOSER SUBSTRATE, AND GLASS PLATE - A semiconductor device of the present invention includes: a laminate structure, including a semiconductor chip, partially sealed with a resin; and a stress relief section for relieving a stress during resin sealing, provided as a convex section including a plain top surface on an uppermost section of the laminate structure, the stress relief section being provided in an annular shape on a peripheral region of the uppermost section so as to come into contact with the sealing resin. This makes it possible to improve the manufacturing yield of the semiconductor device in which the member of the uppermost section is exposed.10-02-2008
20090057929SEMICONDUCTOR DEVICE - A power module includes: an encapsulation-target portion having at least one semiconductor element; and an encapsulation member that has first and second planes between which the encapsulation-target portion is interposed, and that encapsulates the encapsulation-target portion. The encapsulation member has, on the at least one semiconductor element, at least one opening that exposes part of a surface of the encapsulation-target portion the surface being on a side of the first plane. Thus, a semiconductor device of which size can be reduced can be provided.03-05-2009
20090096115Semiconductor package and method for fabricating the same - A semiconductor package and a method for fabricating the same are disclosed. The present invention discloses mounting and electrically connecting a semiconductor chip to a chip carrier, forming an interfacial layer or a heat-dissipating member having the interfacial layer on the semiconductor chip, and forming an encapsulant for covering the semiconductor chip, the interfacial layer or the heat dissipating member. The method further includes cutting the encapsulant along edges of the interfacial layer, and removing the redundant encapsulant on the interfacial layer so as to expose the semiconductor chip or the heat-dissipating member without forming burr or heavily wearing cutting tools.04-16-2009
257795000 With specified filler material 5
20100078834Semiconductor Device and Method of Forming a Protective Layer on a Backside of the Wafer - A semiconductor device is made by forming solder bumps on a first side of a semiconductor wafer. A protective layer is formed on a second side of the semiconductor wafer opposite the first side. The protective layer can be adhesive paste, laminated film, spin-coated resin, epoxy based elastomer, organic rubbery material, polystyrene, polyethylene terephthalate, or other polymer material. The semiconductor wafer is singulated into semiconductor die. The semiconductor die is mounted to a carrier. A molding compound is formed around the semiconductor die. The protective layer provides stress relief for the semiconductor die. The protective layer is removed from the semiconductor die. The protective layer can provide a thermal dissipation, in which case it is made with metal or polymer-based material with a filler such as alumina, zinc oxide, silicon dioxide, silver, aluminum, and aluminum nitride.04-01-2010
20130119565Rotating Curing - A system for and a method of curing a material is provided. A material, such as an underfill material, is rotated during a curing process. The curing system may include a chamber, a holder to support one or more workpieces, and a rotating mechanism. The rotating mechanism rotates the workpieces during the curing process. The chamber may include one or more heat sources and fans, and may further include a controller. The curing process may include varying the rotation speed, continuously rotating, periodically rotating, or the like.05-16-2013
20090001614SEMICONDUCTOR DEVICE WITH A BUFFER REGION WITH TIGHTLY-PACKED FILLER PARTICLES - An embodiment of a semiconductor device includes a supporting member, a semiconductor die mounted on a portion of the supporting member, a buffer region, and a plastic encapsulation. The buffer region covers a portion of the die, and includes a resin and filler particles packed within the resin. The filler particles have a mix of filler sizes and are tightly packed within the resin. The buffer region has a first dielectric constant and a first loss tangent. The plastic encapsulation encloses at least part of the supporting member and the die. The plastic encapsulation includes a plastic material of a second dielectric constant and a second loss tangent, where the second dielectric constant is larger than the first dielectric constant and the second loss tangent is larger than the first loss tangent.01-01-2009
20120187585MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE AND MOBILE COMMUNICATION DEVICE - A manufacturing method of a semiconductor device includes: sealing a semiconductor chip with a sealing resin containing a filler; exposing a part of the filler; etching at least a part of the exposed filler; and forming a metal film at least at a part of a surface of the sealing resin including inner surfaces of holes formed at the surface of the sealing resin by the etching.07-26-2012
20130168876MODULE PACKAGE AND PRODUCTION METHOD - The invention relates to a module package which comprises a module substrate 07-04-2013
Entries
DocumentTitleDate
20090194890Integrated Circuit and Memory Module - Embodiments of the invention relate generally to an integrated circuit and a memory module. In an embodiment of the invention, an integrated circuit is provided. The integrated circuit may include a semiconductor carrier including at least one electrically inactive region on an upper surface thereof, a passivation layer structure disposed above the upper surface of the semiconductor carrier, and at least one lithographic trench in the passivation layer structure above the at least one electrically inactive region on the upper surface of the semiconductor carrier.08-06-2009
20100140815SEMICONDUCTOR DEVICE AND METHOD OF FORMING AN INTERCONNECT STRUCTURE FOR 3-D DEVICES USING ENCAPSULANT FOR STRUCTURAL SUPPORT - A semiconductor device has a first interconnect structure formed over a first side of a substrate. A semiconductor die is mounted to the first interconnect structure. An encapsulant is deposited over the semiconductor die and first interconnect structure for structural support. A portion of a second side of the substrate, opposite the first side of the substrate, is removed to reduce its thickness. The encapsulant maintains substrate robustness during thinning process. A TSV is formed through the second side of the substrate to the first interconnect structure. A second interconnect structure is formed in the TSV. The TSV has a first insulating layer formed over the second side of the substrate and first conductive layer formed over the first insulating layer and into the TSV. The second interconnect structure has a second conductive layer formed over the first conductive layer in an area away from the TSV.06-10-2010
20090001613INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OVERHANG DIE - An integrated circuit package system comprising: forming a substrate having a solder mask with a support structure formed from the solder mask; mounting a first integrated circuit device over the support structure; connecting the substrate and the first integrated circuit device; and encapsulating the first integrated circuit device and the support structure.01-01-2009
20100072634PLANAR ENCAPSULATION AND MOLD CAVITY PACKAGE IN PACKAGE SYSTEM - An integrated circuit package system includes: providing a substrate; mounting a first package above the substrate, the first package having a mold cavity exposing an exposed portion on a first integrated circuit from a first package encapsulation; mounting a second package above the first package and attached to the exposed portion of the first integrated circuit; mounting a structure above the second package and connected to the substrate around the first package; and encapsulating the first package and the second package with an outer encapsulation having a completely planar top or a planar top co-planar to a top surface of the structure.03-25-2010
20130032955Low-K Dielectric Layer and Porogen - A system and method for a low-k dielectric layer are provided. A preferred embodiment comprises forming a matrix and forming a porogen within the matrix. The porogen comprises an organic ring structure with fewer than fifteen carbons and a large percentage of single bonds. Additionally, the porogen may have a viscosity greater than 1.3 and a Reynolds numbers less than 0.5.02-07-2013
20100038804INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOLD GATE - An integrated circuit package system includes: providing a substrate; forming a conductive layer over the substrate; forming a mold gate layer having an organic material without polymerization over the conductive layer; and attaching an integrated circuit over the substrate adjacent the mold gate layer.02-18-2010
20100044887METHOD FOR PRODUCING CIRCUIT SUBSTRATE, AND CIRCUIT SUBSTRATE - The method for producing a circuit substrate of the present invention is characterized in that the circuit substrate is produced using as sheet a circuit substrate sheet including an uncured layer a part of which, the part being other than a part at which a circuit chip is disposed, is selectively curable before or after disposal of said circuit chip, wherein the uncured layer has a softness that enables embedding of the circuit chip in the circuit substrate sheet upon pressing the circuit chip that has been disposed on a surface of the uncured layer. According to the method for producing the circuit substrate of the present invention, the circuit chip can be embedded inwards with high accuracy, and the circuit substrate can be produced easily with high accuracy.02-25-2010
20100109169SEMICONDUCTOR PACKAGE AND METHOD OF MAKING THE SAME - A stiffener is provided for use in making semiconductor devices. The stiffener and method of use provided prevent or reduce warpage of a semiconductor package during the assembly process. More particularly, the stiffener functions to prevent or reduce warpage during molding of an assembly of wafers and/or dies. The stiffener may be positioned above the backside or non-active side of an assembly of wafer and/or dies during molding. The presence of the stiffener prevents or reduces warpage caused by CTE mismatch between the mold material and the wafer and/or under the high temperatures encountered in the process of molding. After molding, the stiffener may continue to provide support to the assembly.05-06-2010
20130082407Integrated Circuit Package And Method - A method of making integrated circuit package assemblies including encapsulating a plurality of dies in an encapsulation layer having an exterior surface and attaching a heat sink strip to the exterior surface of the encapsulation layer. An integrated circuit package assembly and an intermediate product used in making an integrated circuit package assembly are also disclosed.04-04-2013
20120181708SUBSTRATE FOR MOUNTING SEMICONDUCTOR, SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A substrate for mounting a semiconductor includes a first insulation layer having first and second surfaces on the opposite sides and having a penetrating hole penetrating through the first insulation layer, an electrode formed in the penetrating hole in the first insulation layer and having a protruding portion protruding from the second surface of the first insulation layer, a first conductive pattern formed on the first surface of the first insulation layer and connected to the electrode, a second insulation layer formed on the first surface of the first insulation layer and the first conductive pattern and having a penetrating hole penetrating through the second insulating layer, a second conductive pattern formed on the second insulation layer and for mounting a semiconductor element, and a via conductor formed in the penetrating hole in the second insulation layer and connecting the first and second conductive patterns.07-19-2012
20090267239POSITIVE PHOTOSENSITIVE RESIN COMPOSITION - A photosensitive resin composition comprising parts by mass of polycondensate (A) having a structure resulting from dehydration condensation between one or two or more tetracarboxylic acid dianhydride and one or two or more armatic diamines having mutually ortho-positioned amino and phenolic hydroxyl groups and 1 to 100 parts by mass of photosensitive diazonaphthoquinone compound (B), wherein the polycondensate (A) has a weight average molecular weight of 3000 to 70,000.10-29-2009
20130069252Semiconductor Device and Method of Forming Semiconductor Die with Active Region Responsive to External Stimulus - A semiconductor device has a first semiconductor die including an active region formed on a surface of the first semiconductor die. The active region of the first semiconductor die can include a sensor. An encapsulant is deposited over the first semiconductor die. A conductive layer is formed over the encapsulant and first semiconductor die. An insulating layer can be formed over the first semiconductor die. An opening is formed in the insulating layer over the active region. A transmissive layer is formed over the first semiconductor die including the active region. The transmissive layer includes an optical dielectric material or an optical transparent or translucent material. The active region is responsive to an external stimulus passing through the transmissive layer. A plurality of bumps is formed through the encapsulant and electrically connected to the conductive layer. A second semiconductor die is disposed adjacent to the first semiconductor die.03-21-2013
20120223444SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - An electronic device includes: a substrate having first and second surfaces, wherein the first surface is opposite to the second surface; a first electronic element mounted on the first surface of the substrate; a second electronic element mounted on the second surface of the substrate; and a resin mold sealing the first electronic element and the first surface of the substrate. The resin mold further seals the second electronic element on the second surface of the substrate. The second surface of the substrate has a portion, which is exposed from the resin mold. The second electronic element is not disposed on the portion of the second surface.09-06-2012
20090250825PROCESS FOR PRODUCING ACID ANHYDRIDE-BASED EPOXY RESIN CURING AGENT, ACID ANHYDRIDE-BASED EPOXY RESIN COMPOSITION, AND CURED PRODUCT AND OPTICAL SEMICONDUCTOR DEVICE USING THE SAME - The present invention relates to a process for producing an acid anhydride-based epoxy resin curing agent, an acid anhydride-based epoxy resin curing agent, an epoxy resin composition, and a cured product and optical semiconductor device using the same. The process for producing an acid anhydride-based epoxy resin curing agent according to the present invention comprises heating a mixture containing a polyvalent carboxylic acid anhydride and a polyester resin in the presence of hydrogen gas and a hydrogenation catalyst.10-08-2009
20090008804Power semiconductor package - A power semiconductor package that includes a semiconductor die having at least two power electrodes and a conductive clip electrically and mechanically coupled to each power electrode.01-08-2009
20100171228INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit package system includes forming a substrate with a device thereover, forming an encapsulation having a planar top surface to cover the device and the substrate spanning to an extraction side of the encapsulation, and forming a recess in the encapsulation from the planar top surface.07-08-2010
20110285035SEALED CAVITY - Embodiments disclosed herein generally include methods of sealing a cavity in a device structure. The cavity may be opened by etching away sacrificial material that may define the cavity volume. Material from below the cavity may be sputter etched and redeposited over and in passageways leading to the cavity to thereby seal the cavity. Material may be sputter etched from above the cavity and redeposited in the passageways leading to the cavity as well. The sputter etching may occur in a substantially inert atmosphere. As the sputter etching is a physical process, little or no sputter etched material will redeposit within the cavity itself. The inert gases may sweep out any residual gases that may be present in the cavity after the cavity has been opened. Thus, after the sputter etching, the cavity may be substantially filled with inert gases that do not negatively impact the cavity.11-24-2011
20090115075METHOD FOR MANUFACTURING THIN SUBSTRATE USING A LAMINATE BODY - Provided is a laminated body comprising a substrate to be ground and a support, where the substrate may be ground to a very small (thin) thickness and can then be separated from the support without damaging the substrate. One embodiment is a laminated body comprising a substrate to be ground, a curable silicone adhesive layer in contact with the substrate to be ground, a photothermal conversion layer comprising a light absorbing agent and a heat decomposable resin, and a light transmitting support. After grinding the substrate surface which is opposite that in contact with the adhesive layer, the laminated body is irradiated through the light transmitting layer and the photothermal conversion layer decomposes to separate the substrate and the light transmitting support.05-07-2009
20090102068SYSTEM AND METHOD TO MANUFACTURE AN IMPLANTABLE ELECTRODE - The method of the preferred embodiments includes the steps of providing a base having a frame portion and a center portion; building a preliminary structure coupled to the base; removing a portion of the preliminary structure to define a series of devices and a plurality of bridges; removing the center portion of the base such that the frame portion defines an open region, wherein the plurality of bridges suspend the series of devices in the open region defined by the frame; and encapsulating the series of devices. The method is preferably designed for the manufacture of semiconductor devices, and more specifically for the manufacture of encapsulated implantable electrodes. The method, however, may be alternatively used in any suitable environment and for any suitable reason.04-23-2009
20090230569DEVICE COMPRISING A SEMICONDUCTOR CMPONENT, AND A MANUFACTURING METHOD - A device having at least one semiconductor component, which is covered by a protective material on its outer surface. The invention provides for the outer surface to be provided with a surface structure so as to enlarge the heat transfer area to the protective material. The invention furthermore relates to a manufacturing method.09-17-2009
20090032976SEMICONDUCTOR DEVICE MANUFACTURING METHOD - Provided are a semiconductor device producing method making production steps therein simple while preventing a matter that wire bonding cannot be attained due to contamination of a bonding pad and preventing the generation of a warp in an adherend such as a substrate, a lead frame, or a semiconductor element, thereby improving the yield; an adhesive sheet used in this method; and a semiconductor device obtained by this method. The invention includes a pre-setting step of pre-setting a semiconductor element 02-05-2009
20090189300Sealing Film and a Semiconductor Device Using the Same - The present invention provides a sealing film excellent in filling properties and adhesiveness as a sealing film which comprises a resin layer containing the following (A), (B) and (C) and having a flow within the range of 150 to 1800 μm at 80° C.: (A) a resin component containing (a1) a high-molecular-weight component comprising crosslinking functional groups and having a weight-average molecular weight of 100,000 or more and a Tg within the range of −50 to 50° C. and (a2) a thermoplastic component comprising an epoxy resin as main component, (B) a filler having an average particle size within the range of 1 to 30 μm, and (C) a colorant, as well as a method for manufacturing the same and a semiconductor device using the same. The present invention also provides a sealing film excellent in adhesiveness and shape retention as a sealing film which comprises a resin layer containing the above (A), (B) and (C) and having a resin layer having a viscosity within the range of 10000 to 100000 Pa·s in a B-stage state at 50 to 100° C. in thermosetting viscoelasticity measurement, as well as a semiconductor device using the same.07-30-2009
20090121363Process for Producing Circuit Substrate and Circuit Substrate Obtained in Accordance With the Process - A process for producing a circuit substrate having a resin sheet having embedded circuit chips which is obtained by embedding circuit chips into a resin sheet, which comprises steps of (a) arranging and fixing circuit chips on a substrate for processing, (b) coating the substrate for processing on which the circuit chips have been arranged and fixed with a liquid material for forming a resin sheet of an energy curing type to form an uncured coating layer, (c) curing the uncured coating layer by impressing energy to form a layer of a resin sheet having embedded circuit chips, and (d) removing the substrate for processing from the layer of a resin sheet having embedded circuit chips, and a circuit substrate obtained in accordance with the process. A circuit substrate having a resin sheet having embedded circuit chips for controlling pixels of displays and the like can be produced efficiently with excellent quality and excellent productivity.05-14-2009
20080265443Semiconductor device and method of manufacturing the same - A semiconductor device is disclosed, which comprises a semiconductor element in which a laminated film composed of a plurality of layers including an insulating film is formed on a surface of a semiconductor substrate, and a portion of the laminated film is removed from the surface of the semiconductor substrate so that the semiconductor substrate is exposed at the portion, a mounting substrate on which the semiconductor element is mounted, and a resin layer which seals at least a surface side of the semiconductor element with resin.10-30-2008
20100078832SENSOR NODE MODULE - A method of manufacturing a sensor node module includes forming a protruding structure on a carrier. A sensor die is applied onto the protruding structure with an active sensing surface of the sensor die facing the carrier. The sensor die is encapsulated with mold material, wherein the protruding structure prevents the mold material from covering the active sensing surface. The carrier and the protruding structure are removed from the sensor die.04-01-2010
20100078831INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SINGULATION PROCESS - An integrated circuit package system includes: providing a die attach pad; forming a package contact pad adjacent the die attach pad; attaching an integrated circuit over the die attach pad; attaching a die connector to the integrated circuit and the package contact pad; and forming an encapsulant over the die connector and the integrated circuit, the encapsulant having an encapsulant edge from a sawless singulation process.04-01-2010
20100078833CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided are a thin circuit device with show-through of thin metal wires prevented and a method of manufacturing the circuit device. A circuit device mainly includes: a substrate including a first substrate and second substrates; pads formed respectively on upper surfaces of the second substrates; a semiconductor element fixed on an upper surface of the first substrate; thin metal wires each connecting the semiconductor elements and a corresponding one of the pads; and a sealing resin with which the semiconductor element and the thin metal wires are covered, and which thereby seals the circuit device with the semiconductor element and the thin metal wires disposed therein. Furthermore, filler particles located in the uppermost portion of the sealing resin are covered with a resin material constituting the sealing resin.04-01-2010
20110062603Encapsulation architectures for utilizing flexible barrier films - An article and method of using spacer layer regions is provided, containing a gas compound, to reduce gas permeation through barrier films overlying a substrate comprising creating a spacer layer between one or more of the barrier films, wherein the spacer layer comprises at least one inert gaseous compound. In another embodiment, an article and method is provided comprising creating alternating thin films of hybridized sol-gel spin-on glass and PDMS based and olefin based elastomers.03-17-2011
20110062602INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FAN-IN PACKAGE AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing a base substrate; connecting a base component directly to the base substrate; mounting a stack component over the base component; attaching a flattened exposed interconnect directly on the stack component; and applying an encapsulant over the stack component with a portion of the flattened exposed interconnect exposed.03-17-2011
20110204528POSTIVE-TYPE PHOTOSENSITIVE RESIN COMPOSITION, METHOD FOR PRODUCING RESIST PATTERN, AND ELECTRONIC COMPONENT - A positive tone photosensitive composition comprising: (A) an alkali-soluble resin having a phenolic hydroxyl group; (B) a phenol resin modified by a compound having an unsaturated hydrocarbon group containing 4 to 100 carbon atoms; (C) a compound that generates an acid by the action of light; (D) a thermal cross-linker that crosslinks the ingredient (A) and the ingredient (B) by heating; and (E) a solvent.08-25-2011
20100102461Semiconductor device and method of manufacturing the same - A semiconductor device including a substrate, a semiconductor chip mounted on the substrate, and an encapsulation resin encapsulating the semiconductor chip, wherein the encapsulation resin contains a first resin region composed of a first resin composition, a second resin region composed of a second resin composition, and a mixed layer formed between the first resin region and the second resin region so as to have the first resin composition and the second resin composition mixed therein is provided.04-29-2010
20090166896SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - Objects are to reduce damage to a semiconductor integrated circuit by external stress and to increase the manufacturing yield of a thinned semiconductor integrated circuit. A single crystal semiconductor layer separated from a single crystal semiconductor substrate is used for a semiconductor element included in the semiconductor integrated circuit. Moreover, a substrate which is formed into a thin shape and provided with the semiconductor integrated circuit is covered with a resin layer. In a separation step, a groove for separating a semiconductor element layer is formed in the supporting substrate, and a resin layer is provided over the supporting substrate in which the groove is formed. After that, the resin layer and the supporting substrate are cut in the groove so as to be divided into a plurality of semiconductor integrated circuits.07-02-2009
20080237895Semiconductor device - The invention provides a semiconductor device including a rectangular chip provided on a mounting region of a substrate, a liquid resin layer provided under the rectangular chip and on a side surface of the chip, and a plurality of dams formed on the substrate so as to extend along the side surface of the rectangular chip. The configuration allows the semiconductor device to be provided with the substrate having a reduced size which is achieved by preventing a liquid resin from flowing out.10-02-2008
20080284047Chip Package with Stiffener Ring - Various semiconductor chip packages and methods of making the same are provided. In one aspect, a method of manufacturing is provided that includes providing a substrate that has a first side and a first plurality of passive devices in the first side. A polymeric stiffener ring is formed on the first side. The stiffener ring embeds the first plurality of passive devices without covering a central portion of the first surface of the substrate. A semiconductor chip is mounted on the central portion of the first surface of the substrate.11-20-2008
20080272503Semiconductor Device and Method for Making Same - A transfer mold process for encapsulation of a matrix array package of dice on a substrate is proposed wherein the flow of the mold compound between dice is at least partly obstructed. In other words, the flow velocity of the mold compound between dice is constrained with the goal of approximating it to the flow velocity above the dice. It is to be understood that every limitation of the flow velocity between the dice, even if it does not result in equal or uniform velocity throughout the cross-sectional area, will bring about a positive effect in terms of reducing the clustering of filler particles in certain areas of the mold compound. The semiconductor device thus produced is part of the present disclosure.11-06-2008
20110006444MICROMECHANICAL COMPONENT AND METHOD FOR PRODUCING A MICROMECHANCAL COMPONENT HAVING A THIN-LAWYER CAP - A micromechanical component having a substrate, a micromechanical functional layer situated above the substrate, and an encapsulation layer situated above the functional layer, and a method for producing the micromechanical component are provided, the encapsulation layer having at least one trench, and a bridging of the trench by at least one electrically insulating connection link is provided.01-13-2011
20080251949Molding apparatus, molded semiconductor package using multi-layered film, fabricating and molding method for fabricating the same - Example embodiments include molding apparatuses, semiconductor packages, a fabricating methods for fabricating the same. The molding apparatus may include a first mold die for adhering a partially completed package, a second mold die including a cavity formed such that the partially completed package is positioned inside the cavity and a molding resin for encapsulating the partially completed package inserted into the cavity, and a multi-layered film supply unit for supplying a multi-layered film to the cavity of the second mold die. The semiconductor package may include a substrate, a semiconductor chip electrically connected to the substrate, a molding resin for encapsulating the semiconductor chip and an electrical portion of the substrate, and a marking film, adhered to an outer surface of the molding resin such that a mark is marked in the marking film.10-16-2008
20120139131WAFER MOLD MATERIAL AND METHOD FOR MANUFACTURING SEMICONDUCTOR APPARATUS - The invention provides a wafer mold material for collectively subjecting a wafer having semiconductor devices on a surface thereof to resin molding, wherein the wafer mold material has a resin layer containing a filler and at least any one of an acrylic resin, a silicone resin having an epoxy group, an urethane resin, and a polyimide silicone resin, and the wafer mold material is formed into a film-like shape. There can be a wafer mold material that enables collective molding (wafer molding) with respect to a wafer having semiconductor devices formed thereon, has excellent transference performance with respect to a large-diameter thin-film wafer, can provide a flexible hardened material with low-stress properties, and can be preferably used as a mold material in a wafer level package with less warp of a formed (molded) wafer.06-07-2012
20090321965ELECTRONIC DEVICE HAVING A WIRING SUBSTRATE - A semiconductor chip of the present invention has a wiring substrate and a chip part. The wiring substrate has an insulating resin layer having a first major surface and a second major surface, and a first wiring layer disposed on the insulating resin layer on the second major surface side. The chip part has a projection electrode on the bottom surface. The insulating resin layer holds the chip part such that the bottom and side surfaces of the chip part are in contact with the insulating resin layer, and the top surface of the chip part is exposed on the insulating layer on the first major surface side. The projection electrode of the chip part is connected with the first wiring layer.12-31-2009
20090051051SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device includes a first insulator film having a first opening, a first wiring layer extending from the first opening onto the first insulator film, a first semiconductor chip mounted on the first insulator film so as to be electrically coupled with the first wiring layer, and a resin portion applied on the first insulation film to cover the first semiconductor chip.02-26-2009
20090230568Adhesive Film for Semiconductor and Semiconductor Device Therewith - There is provided an adhesive film for a semiconductor, comprising a thermoplastic resin (A), an epoxy resin (B) and a curing agent (C), wherein a minimum melt viscosity of said adhesive film for a semiconductor is 0.1 Pa·s to 500 Pa·s both inclusive in a temperature range of 50° C. to 180° C. both inclusive at a temperature-rise rate of 10° C./min from room temperature and a content of volatile component is 5.0% or less.09-17-2009
20130214434SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - It is an object of the present invention to provide a peeling method that causes no damage to a layer to be peeled and to allow not only a layer to be peeled with a small surface area but also a layer to be peeled with a large surface area to be peeled entirely. Further, it is also an object of the present invention to bond a layer to be peeled to various base materials to provide a lighter semiconductor device and a manufacturing method thereof. Particularly, it is an object to bond various elements typified by a TFT, (a thin film diode, a photoelectric conversion element comprising a PIN junction of silicon, or a silicon resistance element) to a flexible film to provide a lighter semiconductor device and a manufacturing method thereof.08-22-2013
20080315440Method of Manufacturing a Plurality of Semiconductor Devices and Carrier Substrate - Individual devices (12-25-2008
20100187700Method and apparatus for manufacturing an electronic module, and electronic module - A substrate which has at least one component, such as a semiconductor chip, arranged on it is manufactured from a film made of plastic material laminated onto a surface of the substrate and of the at least one component, where the surface has at least one contact area. First, the film to be laminated onto the surface of the substrate and the at least one component, or a film composite including the film, is arranged in a chamber such that the chamber is split by the film or film composite into a first chamber section and a second chamber section, which is isolated from the first chamber section so as to be gastight. A higher atmospheric pressure is provided or produced in the first chamber section than in the second chamber section; and contact is made between the surface of the substrate arranged in the second chamber section and the at least one component and the film or the film composite, which contact brings about the lamination of the film onto the surface.07-29-2010
20100181688SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes a semiconductor chip, and an encapsulation resin which covers and encapsulates the semiconductor chip, the semiconductor chip having a recess formed in the surficial portion thereof; the recess having, on the deeper side than a predetermined portion thereof, a portion having a larger width than the predetermined portion has; and the encapsulation resin being anchored in the recess.07-22-2010
20100258957SEMICONDUCTOR PACKAGE STRUCTURE AND ENCAPSULATING MODULE FOR MOLDING THE SAME - A semiconductor package structure and encapsulating module for molding the same and an encapsulating mold for molding the same are provided. The encapsulating mold is used for packaging a substrate having a chip so as to mold the substrate having the chip as a package structure. The encapsulating mold has a pressing surface, a smooth surface and a cavity. The smooth surface having a curvature radius is connected with the pressing surface and disposed at a mouth of the cavity. When the encapsulating mold and an encapsulating lower mold are jointed to hold the substrate, the pressing surface contacts and presses the substrate.10-14-2010
20090079097ELECTRONIC COMPONENT WITH WIRE BONDS IN LOW MODULUS FILL ENCAPSULANT - An electronic component that has a support structure with a plurality of electrical conductors, a series of wire bonds, each of the wire bonds extending from one of the electrical conductors respectively, each of the wire bonds having an end section contacting the electrical conductor and an intermediate section contiguous with the end section, a bead of dam encapsulant encapsulating the electrical conductors and the end section of each of the wire bonds, and a bead of fill encapsulant contacting the bead of dam encapsulant and encapsulating the intermediate portion of each of the wire bonds. The dam encapsulant has a higher modulus of elasticity than the fill encapsulant.03-26-2009
20090079096INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE DEVICE UNITS - An integrated circuit package system comprising forming a first device unit, having a first external interconnect, and a second device unit, having a second external interconnect, in an array configuration; mounting an integrated circuit die over the first device unit; connecting the integrated circuit die and the first external interconnect; and encapsulating the integrated circuit die, the first device unit, and the second device unit with both the first external interconnect and the second external interconnect partially exposed.03-26-2009
20120193816Electronic Component and Method for Producing an Electronic Component - An electronic component having an encapsulation which has at least two double layers is described. In addition, a method for producing an electronic component in which a layer sequence is encapsulated is described.08-02-2012
20100213621Moisture-proof device, moisture-proof IC, and method for increasing moisture-proof capability of IC - Method for increasing the moisture-proof capability of a chip includes coating moisture-proof glue at the chink of the chip. More particularly, when the packaging structure carries a chink exposed to outside of the chip, the chink is coated with the moisture-proof glue for preventing moisture from entering the internal part of the chip so as to increase the moisture-proof capability of the chip.08-26-2010
20090278265ELECTRONIC COMPONENT AND RESIN PACKAGING METHOD FOR ELECTRONIC COMPONENT - An electronic component, in which the outer perimeter portion of a component (11-12-2009
20090212446Semiconductor Device - A semiconductor device including: a die pad, a die on the die pad, and resin encapsulating the die and forming an isolation thickness over the die pad, the resin including a mounting aperture and a major surface configured for mounting to an external device, the major surface having a non warpage compensation portion adjacent the die and a warpage compensation portion in a relatively thermally inactive zone with an approximate discontinuity and/or abrupt change in gradient between the non warpage compensation portion and the warpage compensation portion.08-27-2009
20090321963INJECTION MOLDED METAL STIFFENER FOR PACKAGING APPLICATIONS - In some embodiments, an injection molded metal stiffener for packaging applications is presented. In this regard, an apparatus is introduced comprising a microelectronic device package substrate, a microelectronic device coupled with a top surface of the package substrate, and an injection-molded, metal stiffener coupled with the package substrate, wherein the stiffener includes a central opening and at least partially surrounds the microelectronic device. Other embodiments are also disclosed and claimed.12-31-2009
20110109000SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME - Provided are a semiconductor package and a method of forming the same. The semiconductor package includes a stress reliever disposed on a part (more specifically, a weak part) of a semiconductor chip. The stress reliever relieves thermal and/or physical stresses caused by a molding layer. As a result, the semiconductor chip does not suffer from the thermal and/or physical stresses.05-12-2011
20110024923Wafer level hermetic bond using metal alloy with keeper layer - Systems and methods for forming an encapsulated device include a hermetic seal which seals an insulating environment between two substrates, one of which supports the device. The hermetic seal is formed by an alloy of two metal layers, one deposited on a first substrate and the other deposited on the second substrate. At least one of the substrates may include a raised feature formed under at least one of the metal layers. One of the metal layer may have a diffusion barrier layer and a “keeper” layer formed thereover, wherein the keeper layers keeps the metal confined to a particular area. By using such a “keeper” layer, the substrate components may be heated to clean their surfaces, without activating or spending the bonding mechanism.02-03-2011
20110024922SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD - The present invention include a semiconductor device and a method therefor, the method includes disposing a sheet-shaped resin at a side opposite to the chip mounting portion mounting semiconductor chips to be mounted on the chip mounting portion, and forming a resin sealing portion between the sheet-shaped resin and the chip mounting portion, to seal the semiconductor chips. According to an aspect of the present invention, it is possible to provide a semiconductor device and a fabrication method therefor, by which it is possible to reduce the size of the package and to prevent the generation of an unfilled portion in a resin sealing portion or a filler-removed portion or to prevent the exposure of wire from the resin sealing portion.02-03-2011
20100164125METHOD OF EVALUATING THE FLAME RETARDANCY OF SEALING RESIN AND TEST SAMPLE FOR EVALUATION OF FLAME RETARDANCY - A method of evaluating the flame retardancy of a sealing resin comprises a step of fusion cutting a heating element by causing the heating element to generate heat by the passage of electric current to a test sample of a molded body of the sealing resin including the heating element therein; a step of igniting the sealing resin by continuing the passage of electric current even after the heating element is fusion-cut; and a step of measuring voltage and/or current applied in a period from when the heating element is fusion-cut to the ignition of the sealing resin. The test sample is used in the method of evaluating the flame retardancy and provided with a heating wire; conducting terminals made of metal having an electric resistance lower than the heating wire and connected to both ends of the heating wire; and a sealing resin layer covering the outer periphery of the heating wire. The evaluation can be performed on the flame retardancy of the sealing resin used for the electronic equipment based on its actual use.07-01-2010
20110241226METHOD FOR PRODUCING A MICROFLUID COMPONENT, AS WELL AS MICROFLUID COMPONENT - A method for producing a microfluid component includes: Producing a single polymer layer made of at least one plastic or a plastic composite and having a microfluid structure, fitting the polymer layer with at least one semiconductor element, and/or with at least one electronic component, and/or with an optical or optoelectronic component, sealing the microfluid structure.10-06-2011
20090315192Method of manufacturing semiconductor device and semiconductor device - A method of manufacturing a semiconductor device includes at least bonding wires between electrode pads on a main surface of a semiconductor chip and connection pads on a wiring board. The wires form loop shapes from the electrode pads of the semiconductor chip. The method of manufacturing a semiconductor device also includes at least forming flat parts on the loop-shaped wires, and using a sealing material to seal the semiconductor chip such as to bury the flat parts.12-24-2009
20090032977SEMICONDUCTOR DEVICE - The present invention is disclosed a semiconductor device which enables to easily perform a visual inspection of the bonded state between a lead and a land of wiring board. This semiconductor device comprises a lead in which at least a part of the lower surface thereof is exposed form the lower surface of the encapsulation resin and the end face thereof is exposed from the lateral surface of the encapsulation resin. The lower surface of the lead is provided with a groove which reaches the outer end edge of the lead.02-05-2009
20100059899IC CARD AND MANUFACTURING METHOD THEREOF - This IC card is provided with a module having an inlet, an adhesive layer covering the module, and a first base material and second base material sandwiching the module with interposition of the adhesive layer. The module is disposed on one face of the first base material with interposition of a viscous layer which has a thickness that varies according to the thickness at each area of the module, and its two ends are narrower than its other parts when viewed from the outer face side of the first base material or the outer face side of the second base material. According to this IC card, it is possible to offer the IC card with a flat surface, and without occurrence of strain in the embedded IC chip.03-11-2010
20110248412CHIP IDENTIFICATION FOR ORGANIC LAMINATE PACKAGING AND METHODS OF MANUFACTURE - A chip identification for organic laminate packaging and methods of manufacture is provided. The method includes forming a material on a wafer which comprises a plurality of chips. The method further includes modifying the material to provide a unique identification for each of the plurality of chips on the wafer. The organic laminate structure includes a chip with a device and a material placed on the chip which is modified to have a unique identification mark for the chip.10-13-2011
20110210454Phase Separated Curable Compositions - A curable composition, suitable for underfill encapsulant, has two distinct phase domains after cure, a continuous phase and a discontinuous phase, in which one phase has a modulus value of 2 GPa or greater, and the second phase has a modulus value at least 1 Gpa less than the first phase, characterized in that the phases are generated in situ as the composition cures.09-01-2011
20090001612INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DUAL SIDE CONNECTION - An integrated circuit package system comprising: connecting an integrated circuit die with a bottom connection structure; placing an adhesive encapsulation over the integrated circuit die and the bottom connection structure with the bottom connection structure exposed; and placing a top connection structure over the adhesive encapsulation at an opposing side to the bottom connection structure.01-01-2009
20100244284METHOD FOR ULTRA THIN WAFER HANDLING AND PROCESSING - A method for thin wafer handling and processing is provided. In one embodiment, the method comprises providing a wafer having a plurality of semiconductor chips, the wafer having a first side and a second side. A plurality of dies are attached to the first side of the wafer, at least one of the dies are bonded to at least one of the plurality of semiconductor chips. A wafer carrier is provided, wherein the wafer carrier is attached to the second side of the wafer. The first side of the wafer and the plurality of dies are encapsulated with a planar support layer. A first adhesion tape is attached to the planar support layer. The wafer carrier is then removed from the wafer and the wafer is diced into individual semiconductor packages.09-30-2010
20100244283METHOD OF JOINING ELECTRONIC COMPONENT AND THE ELECTRONIC COMPONENT - Dummy electrodes (09-30-2010
20110175242METHOD OF FORMING A SEMICONDUCTOR DIE - In one embodiment, semiconductor die having non-rectangular shapes and die having various different shapes are formed and singulated from a semiconductor wafer.07-21-2011
20080203588PACKAGED INTEGRATED CIRCUIT - A packaged integrated circuit has an integrated circuit over a support structure. A plurality of bond wires connected between active terminals of the integrated circuit and the support structure. An encapsulant overlies the support structure, the integrated circuit, and the bond wires. The encapsulant has a first open location in the encapsulant so that a first bond wire is exposed and a second open location in the encapsulant so that a second bond wire is exposed. First and second conductive structures are exposed outside the packaged integrated circuit and are located at the first and second open locations, respectively, and electrically connected to the first and second bond wires, respectively.08-28-2008
20100320624DIE PACKAGE INCLUDING ENCAPSULATED DIE AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a die package including an encapsulated die, including: a die including pads on one side thereof; an encapsulation layer covering lateral sides of the die; a support layer covering the encapsulation layer and one side of the die; a passivation layer formed on the other side of the die such that the pads are exposed therethrough; and a redistribution layer formed on the passivation layer such that one part thereof is connected with the pad. Here, since one side of the die is supported by the support layer and the encapsulation layer is formed on only the lateral side of the die, the warpage of the die package due to the difference in thermal expansion coefficient can be minimized.12-23-2010
20100148377INTERMEDIATE STRUCTURE OF SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - An intermediate structure for semiconductor devices includes a wiring board, a plurality of semiconductor chips mounted on the wiring board, and a sealing body for collectively sealing the plurality of semiconductor chips and having a region with a different thickness.06-17-2010
20120146247PRE-TREATMENT OF MEMORY CARDS FOR BINDING GLUE AND OTHER CURABLE FLUIDS - A memory device is disclosed including at least one surface pre-treated to roughen the surface for better adhesion of a curable fluid such as glue or ink on the surface. The surface of the memory device may be pre-treated by scoring lines in the surface with a laser or by forming discrete deformations with a particle blaster. The surface may also be roughened by providing a roughened pattern on a mold plate during an encapsulation process. In further examples, the surface may be chemically pre-treated to roughen the surface and/or increase the adhesion energy of the surface.06-14-2012
20110215484Integrally Molded Die And Bezel Structure For Fingerprint Sensors And The Like - A biometric sensor device, such as a fingerprint sensor, comprises a substrate to which is mounted a die on which is formed a sensor array and at least one conductive bezel. The die and the bezel are encased in a unitary encapsulation structure to protect those elements from mechanical, electrical, and environmental damage, yet with a portion of the sensor array and the bezel exposed or at most thinly covered by the encapsulation or other coating material structure.09-08-2011
20110115101ELECTRONIC CIRCUIT - An electronic circuit includes at least two organic components interconnected by conductor tracks and having a common carrier substrate. The components and the conductor tracks are formed from layer portions. An uppermost layer portion, remote from the carrier substrate, of the electronic circuit is of a patterned configuration comprising an electrically conducting material. The patterned uppermost layer portion on its side remote from the carrier substrate is provided with at least one protective layer arranged in congruent relationship with the uppermost layer portion. The at least two organic components include at least one first component of a first component type and at least one second component of a second component type different therefrom. Components of the same component type are respectively protected by a protective layer of the same composition and/or the same structure corresponding to that component type and differing from one another according to the corresponding component type.05-19-2011
20110304062CHIP PACKAGE STRUCTURE, CHIP PACKAGE MOLD CHASE AND CHIP PACKAGE PROCESS - A chip package structure including a carrier, a chip and a molding compound is provided. The chip is disposed on the carrier. The molding compound encapsulates a portion of the carrier and the chip. The top surface of the molding compound has a pin one dot and a pin gate contact. The pin one dot is located at a first corner on the top surface. The pin gate contact is located at a second corner except the first corner. The invention further provides a chip package mold chase and a chip package process using to form the chip package structure.12-15-2011
20120098146FORMATION OF BARRIER LAYER ON DEVICE USING ATOMIC LAYER DEPOSITION - The configuration of one or more barrier layers for encapsulating a device is controlled by setting parameters of atomic layer deposition (ALD). A substrate formed with the device is placed on a susceptor and exposed to multiple cycles of source precursor gas and reactant precursor gas injected by reactors of a deposition device. By adjusting one or more of (i) the relative speed between the susceptor and the reactors, (ii) configuration of the reactors, and (iii) flow rates of the gases injected by the reactors, the configuration of the layers deposited on the device can be controlled. By controlling the configuration of the deposited layers, defects in the deposited layers can be prevented or reduced.04-26-2012
20110049730Device Comprising an Encapsulation Unit - A device in accordance with one embodiment comprises a component (03-03-2011
20120205821EXTERNAL GETTERING METHOD AND APPARATUS - Disclosed embodiments include external gettering provided by electronic packaging. An external gettering element for a semiconductor substrate, which may be incorporated as part of an electronic packaging for the structure, is disclosed. Semiconductor structures and stacked semiconductor structures including an external gettering element are also disclosed. An encapsulation mold compound providing external gettering is also disclosed. Methods of fabricating such devices are also disclosed.08-16-2012
20120025404FILM FOR FLIP CHIP TYPE SEMICONDUCTOR BACK SURFACE - The present invention relates to a film for flip chip type semiconductor back surface to be formed on the back surface of a semiconductor element flip chip-connected to an adherend, the film for flip chip type semiconductor back surface having a tensile storage elastic modulus at 25° C. after thermal curing within a range of from 10 GPa to 30 GPa, in which the tensile storage elastic modulus at 25° C. after thermal curing of the film for flip chip type semiconductor back surface falls within a range of from 4 times to 20 times the tensile storage elastic modulus at 25° C. before thermal curing thereof.02-02-2012
20120061860Method for Constructing an Electrical Circuit, and Electrical Circuit - A method for constructing an electrical circuit that includes at least one semiconductor chip encapsulated with a potting compound is disclosed. The method includes applying a galvanic layer arrangement for forming an electrochemical element on an element of the electrical circuit including the at least one semiconductor chip.03-15-2012
20120061857Electronic Packaging With A Variable Thickness Mold Cap - An electronic package with improved warpage compensation. The electronic package includes a mold cap having a variable thickness. The variable thickness can have a mound or dimple design. In another embodiment, a method is provided for reducing unit warpage of an electronic package by designing the topography of a mold cap to compensate for warpage.03-15-2012
20090085231METHOD OF REDUCING MEMORY CARD EDGE ROUGHNESS BY PARTICLE BLASTING - A method of forming a semiconductor package with smooth edges, and a semiconductor package formed thereby is disclosed. In embodiments, after encapsulation, a panel of semiconductor packages may undergo a first cutting process which cuts the curvilinear edges of the packages. Next, the partially singulated panel of packages may undergo an abrasion process for smoothing the cut curvilinear edges. The abrasion process may occur by forcing abrasive particles over the jagged side edges of a semiconductor package as a result of a pressure differential above and below the semiconductor packages. Upon completion of the abrasive process, a second cutting process may be performed which cuts along straight edges and singulates the respective packages from the panel.04-02-2009
20120061859INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULANT CONTAINMENT AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing a substrate; forming layers having non-horizontal strip patterns and non-vertical strip patterns over the substrate; mounting an integrated circuit device on the substrate adjacent the non-horizontal strip patterns and the non-vertical strip patterns; and applying an encapsulation over the integrated circuit device, the encapsulation restricted by the layers to prevent the encapsulation from reaching an edge of the substrate.03-15-2012
20110074048SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device of the present invention includes: a base material (03-31-2011
20120211904Semiconductor Device and Method of Forming Mold Underfill Using Dispensing Needle Having Same Width as Semiconductor Die - A semiconductor device has a semiconductor die mounted over a surface of a substrate. A mold underfill dispensing needle has a width substantially equal to a width of the semiconductor die. The dispensing needle is placed in fluid communication with a side of the semiconductor die. A mold underfill is deposited from an outlet of the dispensing needle evenly across a width of the semiconductor die into an area between the semiconductor die and substrate without motion of the dispensing needle. The dispensing needle has a shank and the outlet in a T-configuration. The dispensing needle can have a plurality of pole portions between a shank and the outlet. The dispensing needle has a plate between a shank and the outlet. The outlet has an upper edge with a length substantially equal to or greater than a length of a lower edge of the outlet.08-23-2012
20120126433METHODS AND SYSTEMS FOR FABRICATION OF MEMS CMOS DEVICES IN LOWER NODE DESIGNS - A method for manufacturing an integrated circuit including producing layers that form one or more electrical and/or electronic elements on a semiconductor material substrate. Then, producing ILD layers above the layers forming one or more electrical and/or electronic elements, including the steps of depositing a first layer of etch stopper material, depositing a second layer of dielectric material above and in contact with the first layer, forming at least one track extending through the first and second layers, and filling the at least one track with a non-metallic material.05-24-2012
20110180943Thin Film Wafer Level Package - Anchor designs for thin film packages are disclosed that, in a preferred embodiment are a combination of SiGe-filled trenches and Si-oxide-filled spacing. Depending on the release process, additional manufacturing process steps are performed in order to obtain a desired mechanical strength. For aggressive release processes, additional soft sputter etch and a Ti—TiN interlayer in the anchor region may be added. The ratio of the total SiGe—SiGe anchor area to the SiO07-28-2011
20120248633THIN-FILM DEVICE, METHOD OF MANUFACTURING THE SAME, AND METHOD OF MANUFACTURING IMAGE DISPLAY APPARATUS - There is provided a method of manufacturing a thin-film device, the method including forming a first substrate on a supporting base by a coating method, the first substrate being formed by using a resin material; forming a second substrate on the first substrate by using any one of a thermosetting resin and energy ray-curable resin; forming an active element on the second substrate; and removing the supporting base from the first substrate. The resin material used to form the first substrate has a glass transition temperature of at least 180° C.10-04-2012
20120248632PHOTOSENSITIVE ADHESIVE COMPOSITION, FILM-LIKE ADHESIVE, ADHESIVE SHEET, ADHESIVE PATTERN, SEMICONDUCTOR WAFER WITH ADHESIVE LAYER, SEMICONDUCTOR DEVICE - The present invention relates to a photosensitive adhesive composition that has thermal press bondability to an adherent after being patterned by exposure and development and enables alkali development, wherein a storage elastic modulus at 110° C. after exposure and further heat curing is not less than 10 MPa.10-04-2012
20100052190SEMICONDUCTOR DEVICE - A semiconductor device includes: a base plate; a semiconductor element provided on the base plate; a holder provided on an opposite side of the semiconductor element from the base plate and holding terminals electrically connected to the semiconductor element; a casing surrounding the semiconductor element and opposed to a side surface of the holder; and a sealing resin filled among the base plate, the casing, and the holder. The side surface of the holder is provided with a first protrusion protruding toward the casing. The first protrusion is nearer to the base plate than a major surface of the holder on an opposite side from the base plate. A surface of the first protrusion on an opposite side from the base plate is at least partly buried in the sealing resin.03-04-2010
20120187583METHODS AND APPARATUSES TO STIFFEN INTEGRATED CIRCUIT PACKAGE - A dam stiffener for a package substrate is presented. In an embodiment, the dam stiffener comprises a thermally curable polymer, and is simultaneously cured with the underfill material to act as stiffener to the substrate. In another embodiment, a curable reservoir material can be dispensed to fill the space between the integrated circuit die and the dam stiffener, forming a thick reservoir layer, acting as an additional stiffener for the package substrate.07-26-2012
20120187582INJECTION MOLDING SYSTEM AND METHOD OF CHIP PACKAGE - The injection molding system comprises a substrate, an inner cover, a molding tool, and a bottom plate. The substrate is used to locate at least one semiconductor device under molding and the inner cover with at least one first injection via, cavity and runner placed over the substrate. In addition, the molding tool includes at least one second injecting via aligned with the runner and the bottom plate is placed under the substrate. Furthermore, a filling material is filled into the cavity and runner of the inner cover during molding. In order to avoid overflowing the filling material, the system further comprises an O-ring placed between the molding tool and the inner cover. The inner radius of the O-ring corresponds with the inner radius of the injection via and is aligned with it.07-26-2012
20120261841Article and Panel Comprising Semiconductor Chips, Casting Mold and Methods of Producing the Same - A panel with a reconfigured wafer including semiconductor chips arranged in rows and columns on semiconductor device positions includes: at least one semiconductor chip having a front, a rear and edge sides provided per semiconductor device position. The reconfigured wafer includes: a front side that forms a coplanar area with the front sides of the at least one semiconductor chip and a plastic housing composition embedding the edge sides and the rear side of the at least one semiconductor chip. The reconfigured wafer includes, on a rear side of the wafer, structures configured to stabilize the panel. The structures are composed of the plastic housing composition and are formed as thickenings of the reconfigured wafer.10-18-2012
20110121468SEMICONDUCTOR PACKAGE AND METHOD OF MAKING SAME - An improved semiconductor package includes thermal tape placed over a top side of a die that is attached to a substrate with an underfill material. The tape extends to the substrate. The tape deforms with heat and entraps the die and underfill material. Air bubbles are trapped between the tape and the die and underfill material. The tape can be weighted and lined with an adhesive material. The tape aids in preventing the die from cracking due to mishandling.05-26-2011
20120319304SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD - A semiconductor device and manufacturing method. One embodiment provides a semiconductor chip. An encapsulating material covers the semiconductor chip. A metal layer is over the semiconductor chip and the encapsulating material. At least one of a voltage generating unit and a display unit are rigidly attached to at least one of the encapsulating material and the metal layer.12-20-2012
20120319303Wafer level hermetic bond using metal alloy with keeper layer - Systems and methods for forming an encapsulated device include a hermetic seal which seals an insulating environment between two substrates, one of which supports the device. The hermetic seal is formed by an alloy of two metal layers, one deposited on a first substrate and the other deposited on the second substrate. At least one of the substrates may include a raised feature formed under at least one of the metal layers. The two metals may for an alloy of a predefined stoichiometry in at least two locations on either side of the midpoint of the raised feature. This alloy may have advantageous features in terms of density, mechanical, electrical or physical properties that may improve the hermeticity of the seal, for example.12-20-2012
20120319302Semiconductor Device and Method of Forming RF FEM and RF Transceiver in Semiconductor Package - A semiconductor device has a first semiconductor die containing a low pass filter and baluns. The first semiconductor die has a high resistivity substrate. A second semiconductor die including a bandpass filter is mounted to the first semiconductor die. The second semiconductor die has a gallium arsenide substrate. A third semiconductor die including an RF switch is mounted to the first semiconductor die. A fourth semiconductor die includes an RF transceiver. The first, second, and third semiconductor die are mounted to the fourth semiconductor die. The first, second, third, and fourth semiconductor die are mounted to a substrate. An encapsulant is deposited over the first, second, third, and fourth semiconductor die and substrate. A plurality of bond wires is formed between the second semiconductor die and first semiconductor die, and between the third semiconductor die and first semiconductor die, and between the first semiconductor die and substrate.12-20-2012
20120267801INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING MOLD FLASH PREVENTION TECHNOLOGY - An integrated circuit package system that includes: a support structure including an electrical contact; a solder mask over the support structure, the solder mask including a solder mask flange, the solder mask flange directly on a support structure first surface; an integrated circuit over the support structure; and encapsulant over the integrated circuit and in contact with the solder mask flange. A mold system that includes a first mold having a projection along a first mold bottom surface, the projection between a first cavity and a recess.10-25-2012
20120326339SEMICONDUCTOR DEVICE, AND METHOD AND APPARATUS FOR MANUFACTURING THE SAME - According to one embodiment, a manufacturing method of a semiconductor device is disclosed. The method includes: stacking and adhering a second semiconductor chip on a first semiconductor chip via an adhesive layer; adjusting at least one of an elasticity modulus of the adhesive layer, a sink amount of the adhesive layer, a thickness of a protective film at a surface of the first chip, and an elasticity modulus of the protective film such that “y” in a following formula is 70 or less; and sealing the chips by a molding resin with filler particles.12-27-2012
20120286434BLANK INCLUDING A COMPOSITE PANEL WITH SEMICONDUCTOR CHIPS AND PLASTIC PACKAGE MOLDING COMPOUND AND METHOD AND MOLD FOR PRODUCING THE SAME - A blank and a semiconductor device include a composite panel with semiconductor chips embedded in a plastic package molding compound. The blank includes a composite panel with semiconductor chips arranged in rows and columns in a plastic package molding compound with active upper sides of the semiconductor chips forming a coplanar surface area with the upper side of the composite panel. The blank further includes an orientation indicator impressed into the plastic package molding compound when the semiconductor chips are embedded within the molding compound.11-15-2012
20090321964Stress Buffer Layer for Ferroelectric Random Access Memory - An F-RAM package having a semiconductor die containing F-RAM circuitry, a mold compound, and a stress buffer layer that is at least partially located between the semiconductor die and the mold compound. Also, a method for making an F-RAM package that includes providing a semiconductor die containing F-RAM circuitry, forming a patterned stress buffer layer over the semiconductor die, and forming a mold compound coupled to the stress buffer layer.12-31-2009
20130020726PACKAGE MODULE STRUCTURE FOR HIGH POWER DEVICE WITH METAL SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a package module structure of a high power device using a metal substrate that can improve reliability by minimizing stress due to a thermal expansion coefficient difference between a metal substrate and a semiconductor device includes: preparing a metal substrate; forming an oxide layer by selectively anodizing the metal substrate; forming a mounting groove for mounting a semiconductor device by etching a portion of the oxide layer; installing a shock-absorbing substrate that is made of a material having a thermal expansion coefficient in a range similar to a material of a semiconductor device to expose the entirety or a portion of a bottom portion of the mounting groove; mounting the semiconductor device in the shock-absorbing substrate exposed to the mounting groove; and electrically connecting an electrode terminal of the semiconductor device and an electrode line formed in an upper surface of the oxide layer.01-24-2013
20080224333SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device is disclosed that includes a wiring board having a via formed therein; a semiconductor element provided on the wiring board; a resist layer covering a surface of the wiring board, the resist layer having an opening in a part thereof positioned on the via; and a sealing resin covering the surface of the via in the opening and the resist layer, and sealing the semiconductor device.09-18-2008
20130093105SEALING FILM AND A SEMICONDUCTOR DEVICE USING THE SAME - A method for sealing electrodes on a semiconductor device using a sealing film which includes a resin layer having a flow within the range of 150 to 1800 μm at 80° C., or having a resin layer with a viscosity within the range of 10,000 to 100,000 Pa·s in a B-stage state at 50 to 100° C. in thermosetting viscoelasticity measurement, and containing: (A) both (a1) a high-molecular-weight component including crosslinking functional groups and having a weight-average molecular weight of 100,000 or more and a Tg within the range of −50 to 50° C. and (a2) a thermosetting component including an epoxy resin as a main component, (B) a filler having an average particle size within the range of 1 to 30 μm, and (C) a colorant.04-18-2013
20130113121RESIN PASTE COMPOSITION - The present invention relates to a resin paste composition including an organic compound, and a granular aluminum powder having an average particle diameter of from 2 to 10 μm and a flake-shaped silver powder having an average particle diameter of from 1 to 5 μm which are uniformly dispersed in the organic compound, and a semiconductor device manufactured by bonding a semiconductor element onto a supporting member through the resin paste composition and then encapsulating the resulting bonded product. According to the present invention, it is possible to provide a resin paste composition used for bonding an element such as semiconductor chips onto a lead frame which is excellent in not only electrical conductivity and bonding property but also working efficiency without using a large amount of rare and expensive silver, and a semiconductor device having a high productivity and a high reliability.05-09-2013
20130140718CHIP IDENTIFICATION FOR ORGANIC LAMINATE PACKAGING AND METHODS OF MANUFACTURE - A chip identification for organic laminate packaging and methods of manufacture is provided. The method includes forming a material on a wafer which comprises a plurality of chips. The method further includes modifying the material to provide a unique identification for each of the plurality of chips on the wafer. The organic laminate structure includes a chip with a device and a material placed on the chip which is modified to have a unique identification mark for the chip.06-06-2013
20130175710Display Device and Method of Manufacturing Thereof - A novel display device with higher reliability having a structure of blocking moisture and oxygen, which deteriorate the characteristics of the display device, from penetrating through a sealing region and a method of manufacturing thereof is provided. According to the present invention, a display device and a method of manufacturing the same comprising: a display portion formed by aligning a light-emitting element using an organic light-emitting material between a pair of substrate, wherein the display portion is formed on an insulating layer formed on any one of the substrates, the pair of substrates is bonded to each other with a sealing material formed over the insulating layer while surrounding a periphery of the display portion, at least one layer of the insulating layer is made of an organic resin material, the periphery has a first region and a second region, the insulating layer in the first region has an opening covered with a protective film, the sealing material is formed in contact with the opening and the protective film, an outer edge portion of the insulating layer in the second region is covered with the protective film or the sealing material.07-11-2013
20130119563ANISOTROPIC CONDUCTIVE FILM COMPOSITION AND SEMICONDUCTOR DEVICE BONDED BY THE SAME - An anisotropic conductive film composition for bonding a semiconductor device, the composition including: a binder system including a urethane resin having a glass transition temperature of about 100° C. or higher, a radical polymerizable compound, an organic peroxide, and conductive particles.05-16-2013
20130187295SENSOR MODULE, PRODUCTION METHOD OF A SENSOR MODULE, AND INJECTION MOLD FOR ENCAPSULATING A SENSOR MODULE - A sensor module an injection mold for covering the sensor module, and to a production method for a covered sensor module including a chip carrier and a sensor chip disposed thereon. A channel is formed between the chip carrier and the sensor chip, by which a medium can be fed to the sensor chip.07-25-2013
20130200534SEALANT LAMINATED COMPOSITE, SEALED SEMICONDUCTOR DEVICES MOUNTING SUBSTRATE, SEALED SEMICONDUCTOR DEVICES FORMING WAFER, SEMICONDUCTOR APPARATUS, AND METHOD FOR MANUFACTURING SEMICONDUCTOR APPARATUS - Described herein is a sealant laminated composite for collectively sealing a semiconductor device's mounting surface of a substrate on which semiconductor devices are mounted or a semiconductor device's forming surface of a wafer on which semiconductor devices are formed. The composite can include a support wafer and an uncured resin layer constituted of an uncured thermosetting resin formed on one side of the support wafer. In certain aspects, the sealant laminated composite is very versatile, even when a large diameter or thin substrate or wafer is sealed. In certain aspects, this can prevent the substrate or wafer from warping and the semiconductor devices from peeling; can collectively seal a semiconductor device's mounting surface of a substrate on which semiconductor devices are mounted or a semiconductor device's forming surface of a wafer on which semiconductor devices are formed on a wafer level; and can provide a sealant laminated composite that is excellent in the heat resistance and humidity resistance after sealing.08-08-2013
20120061858Semiconductor Device and Method of Forming Mold Underfill Using Dispensing Needle Having Same Width as Semiconductor Die - A semiconductor device has a semiconductor die mounted over a surface of a substrate. A mold underfill dispensing needle has a width substantially equal to a width of the semiconductor die. The dispensing needle is placed in fluid communication with a side of the semiconductor die. A mold underfill is deposited from an outlet of the dispensing needle evenly across a width of the semiconductor die into an area between the semiconductor die and substrate without motion of the dispensing needle. The dispensing needle has a shank and the outlet in a T-configuration. The dispensing needle can have a plurality of pole portions between a shank and the outlet. The dispensing needle has a plate between a shank and the outlet. The outlet has an upper edge with a length substantially equal to or greater than a length of a lower edge of the outlet.03-15-2012
20120086135INTERPOSERS, ELECTRONIC MODULES, AND METHODS FOR FORMING THE SAME - In various embodiments, an electronic module features a first cavity in a first side of a substrate, a fill hole extending from the first cavity, and a second cavity in a second side of the substrate. The second cavity is in fluidic communication with the fill hole, and a die is encapsulated within the second cavity.04-12-2012
20130207281MICROELECTRONIC SUBSTRATE COMPRISING A LAYER OF BURIED ORGANIC MATERIAL - Microelectronic substrate comprising at least: 08-15-2013

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