Class / Patent application number | Description | Number of patent applications / Date published |
257746000 | Composite material (e.g., fibers or strands embedded in solid matrix) | 55 |
20080211095 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE - A semiconductor device where an outside connection terminal of a semiconductor element and an electrode of a wiring board are connected to each other via a conductive adhesive, the conductive adhesive includes a first conductive adhesive; and a second conductive adhesive covering the first conductive adhesive; wherein the first conductive adhesive contains a conductive filler including silver (Ag); and the second conductive adhesive contains a conductive filler including a metal selected from a group consisting of tin (Sn), zinc (Zn), cobalt (Co), iron (Fe), palladium (Pd), and platinum (Pt). | 09-04-2008 |
20080237858 | ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME - An electronic device includes a conductive pattern formed on a first insulating film, a second insulating film formed on the conductive pattern and the first insulating film, a hole formed in the second insulating film on the conductive pattern, carbon nanotubes formed in the hole to extend from a surface of the conductive pattern, and a buried film buried in clearances among the carbon nanotubes in the hole. | 10-02-2008 |
20080246148 | Electrical Interconnect Structures Having Carbon Nanotubes Therein and Methods of Forming Same - Integrated circuit devices include electrically conductive interconnects containing carbon nanotubes. An electrical interconnect includes a first metal region. A first electrically conductive barrier layer is provided on an upper surface of the first metal region and a second metal region is provided on the first electrically conductive barrier layer. The first electrically conductive barrier layer includes a material that inhibits out-diffusion of the first metal from the first metal region and the second metal region includes a catalytic metal therein. An electrically insulating layer having an opening therein is provided on the second metal region. A plurality of carbon nanotubes are provided as a vertical electrical interconnect in the opening. | 10-09-2008 |
20090051032 | PATTERNED NANOSCOPIC ARTICLES AND METHODS OF MAKING THE SAME - Nanowire articles and methods of making the same are disclosed. A conductive article includes a plurality of inter-contacting nanowire segments that define a plurality of conductive pathways along the article. The nanowire segments may be semiconducting nanowires, metallic nanowires, nanotubes, single walled carbon nanotubes, multi-walled carbon nanotubes, or nanowires entangled with nanotubes. The various segments may have different lengths and may include segments having a length shorter than the length of the article. A strapping material may be positioned to contact a portion of the plurality of nanowire segments. The strapping material may be patterned to create the shape of a frame with an opening that exposes an area of the nanowire fabric. Such a strapping layer may also be used for making electrical contact to the nanowire fabric especially for electrical stitching to lower the overall resistance of the fabric. | 02-26-2009 |
20090206483 | NANOTUBE AND METAL COMPOSITE INTERCONNECTS - Nanotube and metal composite interconnects are generally described. In one example, an apparatus includes an interlayer dielectric (ILD) and one or more interconnect structures coupled to the ILD, the one or more interconnect structures including a composite of metal and one or more nanotubes. | 08-20-2009 |
20090243103 | SYNTHESIS OF ZEOLITE CRYSTALS AND FORMATION OF CARBON NANOSTRUCTURES IN PATTERNED STRUCTURES - A method is provided for incorporating zeolite crystals in patterned structures, the zeolite crystals having pores (channels) with an orientation which is defined by the topology of the zeolite crystal type and the geometry of the patterned structure, resulting in pores parallel with the length axis of the patterned structures. The patterned structures may be vias (vertical contacts) and trenches (horizontal lines) in a semiconductor substrate. These zeolite crystals can advantageously be used for dense and aligned nanocarbon growth or in other words growth of carbon nanostructures such as carbon nanotubes (CNT) within the pores of the zeolite structure. The growth of CNT is achieved within the porous structure of the zeolite crystals whereby the pores can be defined as confined spaces (channels) in nanometer dimensions acting as a micro-reactor for CNT growth. A method for growing carbon nanostructures within zeolite crystals is also provided, by adding, after creation of the zeolite crystals, a novel compound within the porous structure of the zeolite crystals whereby said novel compound is acting as a carbon source to create the carbon nanostructures. The improved growth method gives a significantly higher carbon density (yield) compared to state of the art techniques. | 10-01-2009 |
20090294966 | CARBON NANOTUBES AS INTERCONNECTS IN INTEGRATED CIRCUITS AND METHOD OF FABRICATION - A method of making an electrode, such as an interconnect for a semiconductor device, includes forming aligned carbon nanotubes using dielectrophoresis. | 12-03-2009 |
20100193952 | Integrated circuit die containing particale-filled through-silicon metal vias with reduced thermal expansion - A method, apparatus and system with an electrically conductive through hole via of a composite material with a matrix forming a continuous phase and embedded particles, with a different material property than the matrix, forming a dispersed phase, the resulting composite material having a different material property than the matrix. | 08-05-2010 |
20100301479 | DEVICES CONTAINING SILVER COMPOSITIONS DEPOSITED BY MICRO-DEPOSITION DIRECT WRITING SILVER CONDUCTOR LINES - Embodiments of the invention relate to a silicon semiconductor device, and a conductive thick film composition for use in a solar cell device. | 12-02-2010 |
20100327444 | SHEET STRUCTURE, SEMICONDUCTOR DEVICE AND METHOD OF GROWING CARBON STRUCTURE - The sheet structure includes a plurality of linear structure bundles including a plurality of linear structures of carbon atoms arranged at a first gap, and arranged at a second gap larger than the first gap, a graphite layer formed in a region between the plurality of linear structure bundles and connected to the plurality of linear structure bundles, and a filling layer filled in the first gap and the second gap and retaining the plurality of linear structure bundles and the graphite layer. | 12-30-2010 |
20110042813 | PRINTED ELECTRONICS - Printed electronic device comprising a substrate onto at least one surface of which has been applied a layer of an electrically conductive ink comprising functionalized graphene sheets and at least one binder. A method of preparing printed electronic devices is further disclosed. | 02-24-2011 |
20110049714 | Illuminant - The invention relates to an illuminant ( | 03-03-2011 |
20110156255 | CARBON NANOTUBE-BASED FILLER FOR INTEGRATED CIRCUITS - A variety of characteristics of an integrated circuit chip arrangement with a chip and package-type substrate are facilitated. In various example embodiments, a carbon nanotube-filled material ( | 06-30-2011 |
20110198755 | SOLDER ALLOY AND SEMICONDUCTOR DEVICE - A solder alloy includes 5 to 15% by mass of Sb, 3 to 8% by mass of Cu, 0.01 to 0.15% by mass of Ni, and 0.5 to 5% by mass of In. The remainder thereof includes Sn and unavoidable impurities. Thereby, highly reliable solder alloy and semiconductor device suppressing a fracture in a semiconductor element and improving crack resistance of a solder material can be obtained. | 08-18-2011 |
20110266675 | DIRECTIONAL SELF-ASSEMBLY OF BIOLOGICAL ELECTRICAL INTERCONNECTS - A method for controlled nucleation and growth of microtubules on substrates. The substrate is functionalized with a nucleating agent for microtubule growth. The method can be employed to generate nanoscale structures on substrates or between substrates by additional attachment of MT capture agents which function to capture the ends of growing MT to form connecting MT structures. The method can be used to form 2-and 3-D structures on or between substrates and can function to establish interconnects between nanoscale devices or molecular electronic devices and electrodes. A specific method for metallization of biological macromolecules and structures is provided which can be applied to metallized the MT formed by the growth and capture method. The metallization method is biologically benign and is particularly useful for copper metallization of MTs. | 11-03-2011 |
20110298132 | ULTRA-LOW POWER SWNT INTERCONNECTS FOR SUB-THRESHOLD CIRCUITS - Ultra-low power single metallic single-wall-nano-tube (SWNT) interconnects for sub-threshold circuits are provided. According to some embodiments, an interconnect structure for use in electronic circuits can generally comprise a first substrate, a second substrate, and an interconnect. The first substrate can be spaced apart from the second substrate. The interconnect is preferably a single wall carbon nanotube (SWNT) interconnect. The SWNT interconnect can be disposed between the first and second substrates to electrically connect the substrates. The substrates can form parts of electrical components (e.g., a transistor, processor, memory, filters, etc.) operating in a subthreshold operational state. Other aspects, features, and embodiments are claimed and described. | 12-08-2011 |
20110304047 | Method for Producing a Composite Material, Associated Composite Material and Associated Semiconductor Circuit Arrangements - A method for producing a composite material, associated composite material and associated semiconductor circuit arrangements is disclosed. A plurality of first electrically conducting material particles are applied to a carrier substrate and a second electrically conducting material is galvanically deposited on a surface of the first material particles in such a way that the second material mechanically and electrically bonds the plurality of first material particles to one another. | 12-15-2011 |
20110309507 | METHODOLOGY FOR EVALUATION OF ELECTRICAL CHARACTERISTICS OF CARBON NANOTUBES - The present disclosure relates to a structure comprising
| 12-22-2011 |
20120025378 | SOLDER INTERCONNECT ON IC CHIP - A semiconductor chip suited for being electrically connected to a circuit element includes a line and a bump. The bump is connected to the line and is adapted to be electrically connected to the line. A plane that is horizontal to an active surface of the semiconductor chip is defined. The area that the connection region of the line and the bump is projected on the plane is larger than 30,000 square microns or has an extension distance larger than 500 microns. | 02-02-2012 |
20120068342 | ELECTRICALLY CONDUCTIVE ADHESIVE FOR TEMPORARY BONDING - The present disclosure relates to the field of fabricating microelectronic devices, wherein a conductive adhesive is used as a temporary microelectronic wafer bonding adhesive to prevent damage to microelectronic devices resulting from electrical charge build-up on the microelectronic devices during the formation of through-silicon vias. | 03-22-2012 |
20120112346 | THIN-FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - Provided are a thin-film transistor (TFT) substrate and a method of manufacturing the same. The method includes: forming a passivation film by forming an insulating film on a substrate; forming a photoresist pattern by forming a photoresist film on the passivation film, exposing the photoresist film to light, and developing the photoresist film; performing a first dry-etching by dry-etching the passivation film using the photoresist pattern as an etch mask; performing a baking to reduce a size of the photoresist pattern; performing a second dry-etching to form a contact hole by dry-etching the passivation film again using the photoresist pattern as a mask; removing the photoresist pattern; and forming a pixel electrode of a carbon composition that includes carbon nanotubes and/or graphene on a top surface of the passivation film. | 05-10-2012 |
20120211889 | METHOD FOR CONTACTING AGGLOMERATE TERMINALS OF SEMICONDUCTOR PACKAGES - A plastic package ( | 08-23-2012 |
20120248607 | Semiconductor die having fine pitch electrical interconnects - A die has interconnect pads on an interconnect side near an interconnect edge and has at least a portion of the interconnect side covered by a conformal dielectric coating, in which an interconnect trace over the dielectric coating forms a high interface angle with the surface of the dielectric coating. Because the traces have a high interface angle, a tendency for the interconnect materials to “bleed” laterally is mitigated and contact or overlap of adjacent traces is avoided. The interconnect trace includes a curable electrically conductive interconnect material; that is, it includes a material that can be applied in a flowable form, and thereafter cured or allowed to cure to form the conductive traces. Also, a method includes, prior to forming the traces, subjecting the surface of the conformal dielectric coating with a CF | 10-04-2012 |
20120326310 | NANOSCALE INTERCONNECTS FABRICATED BY ELECTRICAL FIELD DIRECTED ASSEMBLY OF NANOELEMENTS - The invention provides a fast, scalable, room temperature process for fabricating metallic nanorods from nanoparticles or fabricating metallic or semiconducting nanorods from carbon nanotubes suspended in an aqueous solution. The assembled nanorods are suitable for use as nanoscale interconnects in CMOS-based devices and sensors. Metallic nanoparticles or carbon nanotubes are assembled into lithographically patterned vias by applying an external electric field. Since the dimensions of nanorods are controlled by the dimensions of vias, the nanorod dimensions can be scaled down to the low nanometer range. The aqueous assembly process is environmentally friendly and can be used to make nanorods using different types of metallic particles as well as semiconducting and metallic nanaotubes. | 12-27-2012 |
20130056873 | SEMICONDUCTOR DEVICE - According to an embodiment of the present invention, a device includes a substrate, a base body formed on or above the substrate, and a pair of wirings. The base body has a line shape in a plan view and extends along a length direction. The pair of wirings includes first and second catalyst layers formed on both side surfaces of the base body in the length direction of the base body with sandwiching the base body; and first and second graphene layers formed on both side surfaces of the base body in a manner of contacting the first and second catalyst layers, respectively, and extending along the length direction of the base body, the graphene layers includes a plurality of graphenes laminated perpendicularly with respect to both side surfaces of the base body, respectively. | 03-07-2013 |
20130134591 | Bonding Material for Semiconductor Devices - A semiconductor device is provided which has internal bonds which do not melt at the time of mounting on a substrate. A bonding material is used for internal bonding of the semiconductor device. The bonding material is obtained by filling the pores of a porous metal body having a mesh-like structure and covering the surface thereof with Sn or an Sn-based solder alloy. | 05-30-2013 |
20130154093 | ANISOTROPIC CONDUCTIVE FILM COMPOSITION, ANISOTROPIC CONDUCTIVE FILM, AND SEMICONDUCTOR DEVICE BONDED BY THE SAME - An anisotropic conductive film composition for bonding an electronic device may include a hydrogenated bisphenol A epoxy monomer represented by Formula 1 or a hydrogenated bisphenol A epoxy oligomer represented by Formula 2: | 06-20-2013 |
20130154094 | ANISOTROPIC CONDUCTIVE FILM COMPOSITION, ANISOTROPIC CONDUCTIVE FILM, AND SEMICONDUCTOR DEVICE - A semiconductor device is bonded by an anisotropic conductive film composition. The anisotropic conductive film composition includes an ethylene-vinyl acetate copolymer, a polyurethane resin, and organic fine particles. The anisotropic conductive film composition has a melt viscosity of about 2,000 to about 8,000 Pa·s at 80° C. | 06-20-2013 |
20130154095 | SEMICONDUCTOR DEVICES CONNECTED BY ANISOTROPIC CONDUCTIVE FILM COMPRISING CONDUCTIVE MICROSPHERES - A semiconductor device includes an anisotropic conductive film for connecting the semiconductor device. The anisotropic conductive film includes a first conductive layer that has first conductive particles. The first conductive particles include cores containing silica or a silica composite, and have a 20% K-value ranging from about 7,000 N/mm | 06-20-2013 |
20130168861 | ELECTRICALLY CONDUCTIVE DEVICE AND MANUFACTURING METHOD THEREOF - An electrically conductive device and a manufacturing method thereof are provided. According to the method, a protein tube portion and a conductor penetrating through the protein tube portion are formed on a graphene layer, and the conductor is in electrical contact with the graphene layer. A dummy dielectric material layer surrounding the protein tube portion can be formed on the graphene layer for support. The graphene layer can be protected from damage during the formation of the protein tube portion and the conductor because no etching process is employed in the formation. The method can facilitate the application of graphene in semiconductor devices as conductive interconnects. | 07-04-2013 |
20130264711 | NANOTUBE ELECTRONICS TEMPLATED SELF-ASSEMBLY - A fabricated substrate has at least one plurality of posts. The plurality is fabricated such that the two posts are located at a predetermined distance from one another. The substrate is exposed to a fluid matrix containing functionalized carbon nanotubes. The functionalized carbon nanotubes preferentially adhere to the plurality of posts rather than the remainder of the substrate. A connection between posts of the at least one plurality of posts is induced by adhering one end of the functionalized nanotube to one post and a second end of the functionalized carbon nanotube to a second post. | 10-10-2013 |
20130334689 | APPARATUS AND METHOD FOR LOW CONTACT RESISTANCE CARBON NANOTUBE INTERCONNECT - An apparatus comprises a first dielectric layer formed over a substrate, a first metal line embedded in the first dielectric layer, a second dielectric layer formed over the first dielectric layer, a second metal line embedded in the second dielectric layer, an interconnect structure formed between the first metal line and the second metal line, a first carbon layer formed between the first metal line and the interconnect structure and a second carbon layer formed between the second metal line and the interconnect structure. | 12-19-2013 |
20140084468 | SEMICONDUCTOR DEVICE CONNECTED BY ANISOTROPIC CONDUCTIVE FILM - A semiconductor device includes a first connecting member having a first electrode, a second connecting member having a second electrode, and an anisotropic conductive film between the first connecting member and the second connecting member, the anisotropic conductive film electrically connecting the first and second electrodes to each other. The anisotropic conductive film includes a polymer binder resin, an epoxy resin, conductive particles, and a curing agent. The epoxy resin includes a naphthalene ring-containing epoxy resin and a dicyclopentadiene ring-containing epoxy resin. The naphthalene ring-containing epoxy resin is included in an amount of 100 parts by weight to 500 parts by weight based on 100 parts by weight of the dicyclopentadiene ring-containing epoxy resin. | 03-27-2014 |
20140124931 | SEMICONDUCTOR DEVICE CONNECTED BY ANISOTROPIC CONDUCTIVE FILM - A semiconductor device connected by an anisotropic conductive film, the anisotropic conductive film including a polyurethane resin; at least one other resin selected from the group of an ethylene-vinyl acetate copolymer resin, an acrylonitrile resin, and a styrene resin; isobornyl acrylate; and conductive particles. | 05-08-2014 |
20140138828 | SEMICONDUCTOR DEVICE BONDED BY ANISOTROPIC CONDUCTIVE FILM - A semiconductor device including a first connecting member including a first electrode; a second connecting member including a second electrode; and an anisotropic conductive film between the first connecting member and the second connecting member, the anisotropic conductive film bonding the first electrode to the second electrode, wherein the anisotropic conductive film exhibits linear indentations in an inter-terminal space of the second connecting member after pre-compression and primary compression of the anisotropic conductive film onto the first and second connecting members. | 05-22-2014 |
20140138829 | INTERCONNECTION STRUCTURE AND METHOD FOR FABRICATING THE SAME - The present invention relates to an interconnection structure and a method for fabricating the same. According to the present invention, cavities are formed between the interconnection dielectric by using a sacrificial layer, carbon nanotubes are used as the interconnection material for local interconnection between via holes, graphene nanoribbons are used as the interconnection material for metal lines, and cavities are included in the interconnection dielectric. In addition, the conventional CMOS BEOL Cu interconnection technique is applied to the intermediate interconnection level and the global interconnection level. In this way, the high parasitic resistance and parasitic capacitance in the Cu interconnection technique, which may occur when the local interconnection is relatively small in size, can be effectively overcome. | 05-22-2014 |
20140191399 | WIRING MATERIAL AND SEMICONDUCTOR MODULE USING THE SAME - There is provided a wiring material including a core layer made of metal and a clad layer made of metal and a fiber in which the core layer is copper or an alloy containing copper and the clad layer is formed of copper or the alloy containing copper and the fiber having a thermal expansion coefficient lower than that of copper, the wiring material having a stacked structure in which at least one surface of the core layer is closely adhered to the clad layer, and the fiber in the clad layer is arranged so as to be parallel to the surface of the core layer. | 07-10-2014 |
20140210084 | SEMICONDUCTOR DEVICE CONNECTED BY ANISOTROPIC CONDUCTIVE FILM - A semiconductor device connected by an anisotropic conductive film, the anisotropic conductive film including a binder resin; a first radical polymerization material having one or two (meth)acrylate reactive groups in a structure thereof and a second radical polymerization material having at least three (meth)acrylate reactive groups in a structure thereof; and conductive particles, the anisotropic conductive film having a moisture permeability of 170 g/m | 07-31-2014 |
20140231996 | STACKED TYPE SEMICONDUCTOR DEVICE AND PRINTED CIRCUIT BOARD - The printed circuit board ( | 08-21-2014 |
20140319684 | SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE HAVING THE SAME - It is an object of the present invention to provide a wireless chip of which mechanical strength can be increased. Moreover, it is an object of the present invention to provide a wireless chip which can prevent an electric wave from being blocked. The invention is a wireless chip in which a layer having a thin film transistor is fixed to an antenna by an anisotropic conductive adhesive or a conductive layer, and the thin film transistor is connected to the antenna. The antenna has a dielectric layer, a first conductive layer, and a second conductive layer. The dielectric layer is sandwiched between the first conductive layer and the second conductive layer. The first conductive layer serves as a radiating electrode and the second conductive layer serves as a ground contact body. | 10-30-2014 |
20140374905 | FORMATION OF CONDUCTIVE CIRCUIT, CONDUCTIVE CIRCUIT, AND CONDUCTIVE INK COMPOSITION - A conductive circuit is formed by printing a pattern of an ink composition and curing the pattern. The ink composition is a substantially solvent-free, liquid, addition curable, ink composition comprising (A) an organopolysiloxane having at least two alkenyl groups, (B) an organohydrogenpolysiloxane having at least two SiH groups, (C) conductive particles having an average particle size ≧5 μm, (D) conductive micro-particles having an average particle size <5 μm, (E) a thixotropic agent, and (F) a hydrosilylation catalyst. | 12-25-2014 |
20150014853 | SEMICONDUCTOR DEVICES COMPRISING EDGE DOPED GRAPHENE AND METHODS OF MAKING THE SAME - A method of forming an edge-doped graphene channel is described. The method involves selectively removing graphene from a graphene layer on a substrate in the presence of a dopant to form graphene channels. The dopant forms bonds with carbon atoms on the edge of the graphene such that the graphene channels are edge doped. An article of manufacture is also provided which includes a substrate layer, one or more edge-doped graphene channels on the substrate layer and a layer of an etch mask material on and coextensive with the one or more graphene channels. An article of manufacture is also provided which includes a substrate layer and one or more edge-doped graphene channels on the substrate layer, wherein each of the one or more the graphene channels has a width less than 100 nm and a carrier density greater than 5×10 | 01-15-2015 |
20150054158 | FUNCTIONAL MATERIAL - A functional material includes at least two kinds of particles selected from the group consisting of first metal composite particles, second metal composite particles and third metal composite particles. The first metal composite particles, the second metal composite particles and the third metal composite particles each contain two or more kinds of metal components. The melting point T1(° C.) of the first metal composite particles, the melting point T2(° C.) of the second metal composite particles and the melting point T3(° C.) of the third metal composite particles satisfy a relationship of T1>T2>T3. | 02-26-2015 |
20150061133 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME - According to one embodiment, a semiconductor device using a graphene film comprises a catalytic metal layer formed on a groundwork substrate includes a contact via, and a multilayered graphene layer formed in a direction parallel with a surface of the substrate. The catalytic metal layer is formed to be connected to the contact via and covered with an insulation film except one side surface. The multilayered graphene layer is grown from the side surface of the catalytic metal layer which is not covered with the insulation film. | 03-05-2015 |
20150137370 | ELECTRICALLY CONDUCTIVE DEVICE AND MANUFACTURING METHOD THEREOF - An electrically conductive device and a manufacturing method thereof are provided. According to an exemplary embodiment, an electrically conductive device includes a graphene layer on a substrate, a protein tube portion on the graphene layer, and a conductor penetrating through the protein tube potion to the graphene layer, wherein the conductor is in electrical contact with the graphene layer. | 05-21-2015 |
20150137371 | Nanoscale Interconnects Fabricated by Electrical Field Directed Assembly of Nanoelements - The invention provides a fast, scalable, room temperature process for fabricating metallic nanorods from nanoparticles or fabricating metallic or semiconducting nanorods from carbon nanotubes suspended in an aqueous solution. The assembled nanorods are suitable for use as nanoscale interconnects in CMOS-based devices and sensors. Metallic nanoparticles or carbon nanotubes are assembled into lithographically patterned vias by applying an external electric field. Since the dimensions of nanorods are controlled by the dimensions of vias, the nanorod dimensions can be scaled down to the low nanometer range. The aqueous assembly process is environmentally friendly and can be used to make nanorods using different types of metallic particles as well as semiconducting and metallic nanotubes. | 05-21-2015 |
20150333031 | SEMICONDUCTOR DEVICE WITH MECHANICAL LOCK FEATURES BETWEEN A SEMICONDUCTOR DIE AND A SUBSTRATE - An embodiment of a method of attaching a semiconductor die to a substrate includes placing a bottom surface of the die over a top surface of the substrate with an intervening die attach material. The method further includes contacting a top surface of the semiconductor die and the top surface of the substrate with a conformal structure that includes a non-solid, pressure transmissive material, and applying a pressure to the conformal structure. The pressure is transmitted by the non-solid, pressure transmissive material to the top surface of the semiconductor die. The method further includes, while applying the pressure, exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter. Before placing the die over the substrate, conductive mechanical lock features may be formed on the top surface of the substrate, and/or on the bottom surface of the semiconductor die. | 11-19-2015 |
20160020192 | Non-Circular Die Package Interconnect - A computing component may consist of a die package that has at least a board, first computing layer, and second computing layer. Dielectric layers can separate each of the board, first computing layer, and second computing layer. The first computing layer may be disposed between the board and second computing layer. One or more interconnects can continuously extend from the second computing layer to the board with a non-circular cross-section shape. | 01-21-2016 |
20160071803 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a semiconductor device is disclosed. The device includes a first interconnect, and an insulating film provided on the first interconnect, and being with a through hole communicating with the first interconnect. A catalyst layer is provided on the first interconnect of a bottom portion of the through hole. The catalyst layer has a form of a continuous film, and includes catalyst material and impurity. A first plug is provided in the through hole and is in contact with the catalyst layer, and includes a carbon nanotube layer. A second interconnect is disposed above the first interconnect and connected to the first interconnect via the first plug. | 03-10-2016 |
20160086889 | CARBON NANOTUBE INTERCONNECT STRUCTURE, AND METHOD OF MANUFACTURING THE SAME - A carbon nanotube interconnect structure of an embodiment has a first interconnect layer, a first interlayer insulating film on the first interconnect layer, a second interlayer insulating film on the first interlayer insulating film, a contact hole penetrating through the first interlayer insulating film and the second interlayer insulating film, a catalyst metal film on a portion of the first interconnect layer located at a lower end of the contact hole, a second interconnect layer on the second interlayer insulating film, and carbon nanotubes on the catalyst metal film located in the contact hole. The carbon nanotubes electrically connecting the first interconnect layer and the second interconnect layer. | 03-24-2016 |
20160093584 | ADHESIVE COMPOSITION, ELECTRONIC-COMPONENT-MOUNTED SUBSTRATE AND - There are provided are an adhesive composition that keeps storage stability and further gives a cured product wherein metallic bonds are formed in the state that the cured product wets its components and is satisfactorily spread between the components (or parts), thereby turning excellent in adhesive property, electroconductivity, and reliability for mounting such as TCT resistance or high-temperature standing resistance; an electronic-component-mounted substrate using the same; and a semiconductor device. The adhesive composition comprises electroconductive particles (A) and a binder component (B), wherein the electroconductive particles (A) include a metal (a1) having a melting point equal to or higher than the reflow temperature and containing no lead, and a metal (a2) having a melting point lower than the reflow temperature and containing no lead, and the binder component (B) includes a thermosetting resin composition (b1) and an aliphatic dihydroxycarboxylic acid (b2). | 03-31-2016 |
20160148894 | CONDUCTIVE DIE ATTACH FILM FOR LARGE DIE SEMICONDUCTOR PACKAGES AND COMPOSITIONS USEFUL FOR THE PREPARATION THEREOF - Provided herein are conductive die attach films having advantageous properties for use in a variety of applications, e.g., for the preparation of large die semiconductor packages. Also provided are formulations useful for the preparation of such films, as well as methods for making such formulations. In additional aspects of the present invention, there are provided conductive networks prepared from compositions according to the present invention. In additional aspects, the invention further relates to articles comprising such conductive die attach films adhered to a suitable substrate therefor. | 05-26-2016 |
20160163652 | COATED FULLERENES, COMPOSITES AND DIELECTRICS MADE THEREFROM - The present invention relates to coated fullerenes comprising a layer of at least one inorganic material covering at least a portion of at least one surface of a fullerene and methods for making. The present invention further relates to composites comprising the coated fullerenes of the present invention and further comprising polymers, ceramics, and/or inorganic oxides. A coated fullerene interconnect device where at least two fullerenes are contacting each other to form a spontaneous interconnect is also disclosed as well as methods of making. In addition, dielectric films comprising the coated fullerenes of the present invention and methods of making are further disclosed. | 06-09-2016 |
20160172320 | MAGNETIC INTERMETALLIC COMPOUND INTERCONNECT | 06-16-2016 |
20160379951 | MAGNETIC INTERMETALLIC COMPOUND INTERCONNECT - The present disclosure relates to the field of fabricating microelectronic packages, wherein magnetic particles distributed within a solder paste may be used to form a magnetic intermetallic compound interconnect. The intermetallic compound interconnect may be exposed to a magnetic field, which can heat a solder material to a reflow temperature for attachment of microelectronic components comprising the microelectronic packages. | 12-29-2016 |