Class / Patent application number | Description | Number of patent applications / Date published |
257507000 | With single crystal insulating substrate (e.g., sapphire) | 46 |
20080197447 | METHOD FOR MANUFACTURING A STRUCTURE OF SEMICONDUCTOR-ON-INSULATOR TYPE - A method for manufacturing an insulated semiconductor layer, including: forming a porous silicon layer on a single-crystal silicon surface; depositing an insulating material so that it penetrates into the pores of the porous silicon layer; eliminating the insulating material to expose the upper surface of the porous silicon; and growing by epitaxy a semiconductor layer. | 08-21-2008 |
20080203521 | Semiconductor substrate, semiconductor device, method for manufacturing semiconductor substrate, and method for manufacturing semiconductor device - A semiconductor substrate comprising: a semiconductor base; dielectric layers of mutually different film thicknesses formed on the semiconductor base; and semiconductor layers of mutually different film thicknesses formed on the dielectric layers. | 08-28-2008 |
20080224257 | Semiconductor device - A semiconductor device includes a silicon-on-insulator substrate having a supporting substrate, an electrically insulating layer on the supporting substrate, and a semiconductor layer on the insulating layer. The semiconductor layer includes element regions for providing semiconductor elements and an isolation region located around the element region and extending to the insulating layer. The element regions are electrically isolated from each other by the isolation region. The semiconductor device further includes a thermal conductor disposed in the isolation region of the semiconductor layer and extending from a front side to a back side of the silicon-on-insulator substrate by penetrating through the insulating layer and the supporting substrate. | 09-18-2008 |
20080237779 | SOI substrate and method for manufacturing SOI substrate - An SOI substrate and a manufacturing method of the SOI substrate, by which enlargement of the substrate is possible and its productivity can be increased, are provided. A step (A) of cutting a first single crystal silicon substrate to form a second single crystal silicon substrate which has a chip size; a step (B) of forming an insulating layer on one surface of the second single crystal silicon substrate, and forming an embrittlement layer in the second single crystal substrate; and a step (C) of bonding a substrate having an insulating surface and the second single crystal silicon substrate with the insulating layer therebetween, and conducting heat treatment to separate the second single crystal silicon substrate along the embrittlement layer, and forming a single crystal silicon thin film on the substrate having an insulating surface, are conducted. | 10-02-2008 |
20080237780 | SOI substrate and method for manufacturing SOI substrate - An SOI substrate and a manufacturing method of the SOI substrate, by which enlargement of the substrate is possible and its productivity can be increased, are provided. A step (A) of cutting a single crystal silicon substrate to form a single crystal silicon substrate which is n (n is an optional positive integer, n≧1) times as large as a size of one shot of an exposure apparatus; a step (B) of forming an insulating layer on one surface of the single crystal silicon substrate, and forming an embrittlement layer in the single crystal substrate; and a step (C) of bonding a substrate having an insulating surface and the single crystal silicon substrate with the insulating layer therebetween, and conducting heat treatment to separate the single crystal silicon substrate along the embrittlement layer, and forming a single crystal silicon thin film on the substrate having an insulating surface are conducted. | 10-02-2008 |
20080246109 | SOI substrate, method for manufacturing the same, and semiconductor device - An SOI substrate having an SOI layer that can be used in practical applications even when a substrate with low upper temperature limit, such as a glass substrate, is used, is provided. A semiconductor device using such an SOI substrate, is provided. In bonding a single-crystal semiconductor layer to a substrate having an insulating surface or an insulating substrate, a silicon oxide film formed using organic silane as a material on one or both surfaces that are to form a bond is used. According to the present invention, a substrate with an upper temperature limit of 700° C. or lower, such as a glass substrate, can be used, and an SOI layer that is strongly bonded to the substrate can be obtained. In other words, a single-crystal semiconductor layer can be formed over a large-area substrate that is longer than one meter on each side. | 10-09-2008 |
20080308897 | Substrate for manufacturing semiconductor device and manufacturing method thereof - A substrate with which a semiconductor device with excellent electric characteristics and high reliability can be manufactured is provided. An aspect of the invention is a method for manufacturing a substrate for manufacturing a semiconductor device: a first silicon oxide film, a silicon nitride film, and a second silicon oxide film are stacked in this order over a surface of a semiconductor substrate by a thermal CVD method, and then a weakened layer is formed at a given depth of the semiconductor substrate; the semiconductor substrate and a substrate having an insulating surface are arranged to face each other, and the second silicon oxide film provided for the semiconductor substrate and a supporting substrate are bonded to each other; and the semiconductor substrate is separated at the weakened layer by heat treatment, whereby a semiconductor film separated from the semiconductor substrate is left over the substrate having the insulating surface. | 12-18-2008 |
20080315351 | Semiconductor substrate and maehtod for manufacturing the same - A semiconductor device and a method for manufacturing thereof are provided. The method includes a step of forming a first insulating film containing silicon and oxygen as its composition over a single-crystal semiconductor substrate, a step of forming a second insulating film containing silicon and nitrogen as its composition over the first insulating film, a step of irradiating the second insulating film with first ions to form a separation layer in the single-crystal semiconductor substrate, a step of irradiating the second insulating film with second ions so that halogen is contained in the first insulating film, and a step of performing heat treatment to separate the single-crystal semiconductor substrate with a single-crystal semiconductor film left over the supporting substrate. | 12-25-2008 |
20090001504 | Method for Transferring Semiconductor Element, Method for Manufacturing Semiconductor Device, and Semiconductor Device - A transistor formed on a monocrystalline Si wafer is temporarily transferred onto a first temporary supporting substrate. The first temporarily supporting substrate is heat-treated at high heat so as to repair crystal defects generated in a transistor channel of the monocrystalline Si wafer when transferring the transistor. The transistor is then made into a chip and transferred onto a TFT substrate. In order to transfer the transistor which has been once separated from the monocrystalline Si wafer, a different method from a stripping method utilizing ion doping is employed. | 01-01-2009 |
20090065891 | Semiconductor Substrate And Process For Producing It - A process for producing a semiconductor substrate comprising a carrier wafer and a layer of single-crystalline semiconductor material: | 03-12-2009 |
20090261449 | METHOD FOR MANUFACTURING SOI SUBSTRATE AND SEMICONDUCTOR DEVICE - An object is to provide an SOI substrate with excellent characteristics even in the case where a single crystal semiconductor substrate having crystal defects is used. Another object is to provide a semiconductor device using such an SOI substrate. A single crystal semiconductor layer is formed by an epitaxial growth method over a surface of a single crystal semiconductor substrate. The single crystal semiconductor layer is subjected to first thermal oxidation treatment to form a first oxide film. A surface of the first oxide film is irradiated with ions, whereby the ions are introduced to the single crystal semiconductor layer. The single crystal semiconductor layer and a base substrate are bonded with the first oxide film interposed therebetween. The single crystal semiconductor layer is divided at a region where the ions are introduced by performing thermal treatment, so that the single crystal semiconductor layer is partly left over the base substrate. The single crystal semiconductor layer left over the base substrate is irradiated with laser light. The single crystal semiconductor layer left over the base substrate is subjected to second thermal oxidation treatment to form a second oxide film. Then, the second oxide film is removed. | 10-22-2009 |
20100032793 | METHODS FOR RELAXATION AND TRANSFER OF STRAINED LAYERS AND STRUCTURES FABRICATED THEREBY - The present invention provides methods for forming at least partially relaxed strained material layers on a target substrate. The methods include forming islands of the strained material layer on an intermediate substrate, at least partially relaxing the strained material islands by a first heat treatment, and transferring the at least partially relaxed strained material islands to the target substrate. The at least partial relaxation is facilitated by the presence of low-viscosity or compliant layers adjacent to the strained material layer. The invention also provides semiconductor structures having an at least partially relaxed strained material layer, and semiconductor devices fabricated using an at least partially relaxed strained material layer. | 02-11-2010 |
20100109119 | METHOD OF FORMING A GUARD RING OR CONTACT TO AN SOI SUBSTRATE - Embodiments of the present invention provide a microelectronic structure including a conductive element contacting a bulk semiconductor region of a substrate, the bulk semiconductor region being separated from a semiconductor-on-insulator (“SOI”) layer of the substrate by a buried dielectric layer. The microelectronic structure includes a trench isolation region overlying the buried dielectric layer, the trench isolation region sharing an edge with the SOI layer; a conformal layer overlying the trench isolation region, the conformal layer having a top surface and an opening defining a wall extending from the top surface towards the trench isolation region, the top surface including a lip portion adjacent to the wall; a dielectric layer overlying the top surface of the conformal layer; and a conductive element in conductive communication with the bulk semiconductor region, the conductive element consisting essentially of at least one of a semiconductor, a metal, and a conductive compound of a metal, and extending through the dielectric layer, the opening in the conformal layer, the trench isolation region, and the buried dielectric layer, and the conductive element contacting the lip portion. | 05-06-2010 |
20100109120 | SINGLE CRYSTAL SILICON STRUCTURES - A single crystal silicon etching method includes providing a single crystal silicon substrate having at least one trench therein. The single crystal silicon substrate is exposed to an anisotropic etchant that undercuts the single crystal silicon. By controlling the length of the etch, single crystal silicon islands or smooth vertical walls in the single crystal silicon may be created. | 05-06-2010 |
20100127343 | Glass-Ceramic-Based Semiconductor-On-Insulator Structures and Method For Making The Same - Methods and apparatus for forming a semiconductor on glass-ceramic structure provide for: subjecting an implantation surface of a donor semiconductor wafer to an ion implantation process to create an exfoliation layer of the donor semiconductor wafer; bonding the implantation surface of the exfoliation layer to a precursor glass substrate using electrolysis; separating the exfoliation layer from the donor semiconductor wafer to thereby form an intermediate semiconductor on precursor glass structure; sandwiching the intermediate semiconductor on precursor glass structure between first and second support structures; applying pressure to one or both of the first and second support structures; and subjecting the intermediate semiconductor on precursor glass structure to heat-treatment step to crystallize the precursor glass resulting in the formation of a semiconductor on glass-ceramic structure. | 05-27-2010 |
20100133647 | Semiconductor devices and semiconductor device manufacturing methods - Semiconductor devices and semiconductor device manufacturing methods. The semiconductor device manufacturing methods may form a memory cell having a silicon on insulator (SOI) structure only in one or more localized regions of a bulk semiconductor substrate by use selective etching. Accordingly, a different bias voltage may be applied to a peripheral device than to a memory cell having the SOI structure. | 06-03-2010 |
20100155882 | METHOD FOR BONDING TWO SUBSTRATES - The invention relates to a method for bonding two substrates by applying an activation treatment to at least one of the substrates, and performing the contacting step of the two substrates under partial vacuum. Due to the combination of the two steps, it is possible to carry out the bonding and obtain high bonding energy with a reduced number of bonding voids. The invention is in particular applicable to a substrate of processed or at least partially processed devices. | 06-24-2010 |
20100193900 | SOI SUBSTRATE AND SEMICONDUCTOR DEVICE USING AN SOI SUBSTRATE - A base is formed of a material, such as SiC, having mechanical characteristics higher than those of silicon for forming a semiconductor layer, and the base and the semiconductor layer are bonded through an insulating layer. After bonding, an SOI substrate is formed by mechanically separating the semiconductor layer from the base, and the separated semiconductor layer is reused for forming the subsequent SOI substrate. Thus, a large SOI substrate having a diameter of 400 mm or more, which has been difficult to obtain by conventional methods, can be obtained. | 08-05-2010 |
20100237458 | SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device and a method for manufacturing thereof are provided. The method includes a step of forming a first insulating film containing silicon and oxygen as its composition over a single-crystal semiconductor substrate, a step of forming a second insulating film containing silicon and nitrogen as its composition over the first insulating film, a step of irradiating the second insulating film with first ions to form a separation layer in the single-crystal semiconductor substrate, a step of irradiating the second insulating film with second ions so that halogen is contained in the first insulating film, and a step of performing heat treatment to separate the single-crystal semiconductor substrate with a single-crystal semiconductor film left over the supporting substrate. | 09-23-2010 |
20100244185 | SEMICONDUCTOR DEVICE, SINGLE-CRYSTAL SEMICONDUCTOR THIN FILM-INCLUDING SUBSTRATE, AND PRODUCTION METHODS THEREOF - The present invention provides a semiconductor device, a single-crystal semiconductor thin film-including substrate, and production methods thereof, each allowing single-crystal semiconductor thin film-including single-crystal semiconductor elements produced by being transferred onto a low heat resistant insulating substrate to have enhanced transistor characteristics. | 09-30-2010 |
20100289115 | SOI SUBSTRATE AND METHOD FOR MANUFACTURING SOI SUBSTRATE - An oxide film having a thickness “t | 11-18-2010 |
20100301448 | SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME - Provided is a semiconductor and a method for forming the same. The method includes forming a buried insulating layer locally in a substrate. The substrate is etched to form an opening exposing the buried insulating layer, and a silicon pattern spaced in at least one direction from the substrate is formed on the buried insulating layer. A first insulating layer is formed to enclose the silicon pattern. | 12-02-2010 |
20100327397 | METHOD FOR MANUFACTURING SIMOX WAFER AND SIMOX WAFER - This method for manufacturing a SIMOX wafer includes: forming a mask layer on one surface side of a silicon single crystal wafer, which has an opening on a region where a BOX layer is to be formed; implanting oxygen ions through the opening of the mask layer into the silicon single crystal wafer to a predetermined depth, and locally forming an oxygen implantation region; annealing the silicon single crystal wafer with the mask layer, and oxidizing the oxygen implantation region so as to form the BOX layer; and removing a coated oxide film that covers the whole silicon single crystal wafer which is formed in the annealing of the silicon single crystal wafer, wherein the mask layer has a lamination comprising an oxide film and either one or both of a polysilicon film and an amorphous silicon film. | 12-30-2010 |
20110042781 | CHIP PACKAGE AND FABRICATION METHOD THEREOF - The invention is related to a chip package including: a semiconductor substrate having at least one bonding pad region and at least one device region, wherein the semiconductor substrate includes a plurality of heavily doped regions in the bonding pad region, and two of the heavily doped regions are insulatively isolated; a plurality of conductive pad structures disposed over the bonding pad region; at least one opening disposed at a sidewall of the chip package to expose the heavily doped regions; and a conductive pattern disposed in the opening to electrically contact with the heavily doped region. | 02-24-2011 |
20110108944 | Nitride semiconductor free-standing substrate, method of manufacturing the same and nitride semiconductor device - A nitride semiconductor free-standing substrate includes a diameter of not less than 40 mm, a thickness of not less than 100 μm, a dislocation density of not more than 5×10 | 05-12-2011 |
20110147883 | SEMICONDUCTOR BODY WITH A BURIED MATERIAL LAYER AND METHOD - Disclosed is a method for forming a buried material layer in a semiconductor body, and a semiconductor arrangement including a buried material layer. | 06-23-2011 |
20110186959 | DIAMOND SOI WITH THIN SILICON NITRIDE LAYER - A method and structure for a semiconductor device, the device including a handle wafer, a diamond layer formed directly on a front side of the handle wafer, and a thick oxide layer formed directly on a back side of the handle wafer, the oxide of a thickness to counteract tensile stresses of the diamond layer. Nitride layers are formed on the outer surfaces of the diamond layer and thick oxide layer and a polysilicon is formed on outer surfaces of the nitride layers. A device wafer is bonded to the handle wafer to form the semiconductor device. | 08-04-2011 |
20110298084 | METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT - A method for manufacturing a semiconductor element of the present invention, has: a laser irradiation step of focusing a pulsed laser beam inside of a substrate constituting a wafer, thereby forming a plurality of isolated processed portions along an intended dividing line inside of the substrate, and creating a fissure that runs from the processed portions at least to the surface of the substrate and links adjacent processed portions; and a wafer division step of dividing the wafer along the intended dividing line. | 12-08-2011 |
20120098087 | FORMING AN EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR (ETSOI) LAYER - Solutions for forming an extremely thin semiconductor-on-insulator (ETSOI) layer. In one embodiment, a method includes providing a wafer including a plurality of semiconductor-on-insulator (SOI) layer regions separated by at least one shallow trench isolation (STI); amorphizing the plurality of SOI layer regions by implanting the plurality of SOI layer regions with an implant species; and removing a portion of the amorphized SOI layer region to form at least one recess in the amorphized SOI layer region. | 04-26-2012 |
20120119323 | SOS SUBSTRATE HAVING LOW SURFACE DEFECT DENSITY - A method of making bonded SOS substrate with a semiconductor film on or above a sapphire substrate by implanting ions from a surface of the semiconductor substrate to form an ion-implanted layer; activating at least a surface of one of the sapphire substrate and the semiconductor substrate from which the ions have been implanted; bonding the surface of the semiconductor substrate and the surface of the sapphire substrate at a temperature of from 50° C. to 350° C.; heating the bonded substrates at a maximum temperature of from 200° C. to 350° C.; and irradiating visible light from a sapphire substrate side or a semiconductor substrate side to the ion-implanted layer of the semiconductor substrate to make the interface of the ion-implanted layer brittle at a temperature of the bonded body higher than the temperature at which the surfaces were bonded, to transfer the semiconductor film to the sapphire substrate. | 05-17-2012 |
20120126362 | SOS SUBSTRATE HAVING LOW DEFECT DENSITY IN THE VICINITY OF INTERFACE - A bonded SOS substrate having a semiconductor film on or above a surface of a sapphire substrate is obtained by a method with the steps of implanting ions from a surface of a semiconductor substrate to form an ion-implanted layer; activating at least a surface from which the ions have been implanted; bonding the surface of the semiconductor substrate and the surface of the sapphire substrate at a temperature of 50° C. to 350° C.; heating the bonded substrates at a maximum temperature from 200° C. to 350° C. to form a bonded body; and irradiating visible light from a sapphire substrate side or a semiconductor substrate side to the ion-implanted layer of the semiconductor substrate for embrittling an interface of the ion-implanted layer, while keeping the bonded body at a temperature higher than the temperature at which the surfaces of the semiconductor substrate and the sapphire substrate were bonded. | 05-24-2012 |
20120161276 | SEMICONDUCTOR DEVICE COMPRISING AN ISOLATION TRENCH INCLUDING SEMICONDUCTOR ISLANDS - The present invention provides semiconductor devices and methods for fabricating the same, in which superior dielectric termination of drift regions is accomplished by a plurality of intersecting trenches with intermediate semiconductor islands. Thus, a deep trench arrangement can be achieved without being restricted by the overall width of the isolation structure. | 06-28-2012 |
20120161277 | SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICE MANUFACTURING METHODS - Semiconductor devices and semiconductor device manufacturing methods. The semiconductor device manufacturing methods may form a memory cell having a silicon on insulator (SOI) structure only in one or more localized regions of a bulk semiconductor substrate by use selective etching. Accordingly, a different bias voltage may be applied to a peripheral device than to a memory cell having the SOI structure. | 06-28-2012 |
20120187525 | SEMICONDUCTOR-ON-INSULATOR DEVICE WITH ASYMMETRIC STRUCTURE - Device structures with a reduced junction area in an SOI process, methods of making the device structures, and design structures for a lateral diode. The device structure includes one or more dielectric regions, such as STI regions, positioned in the device region and intersecting the p-n junction between an anode and cathode. The dielectric regions, which may be formed using shallow trench isolation techniques, function to reduce the width of a p-n junction with respect to the width area of the cathode at a location spaced laterally from the p-n junction and the anode. The width difference and presence of the dielectric regions creates an asymmetrical diode structure. The volume of the device region occupied by the dielectric regions is minimized to preserve the volume of the cathode and anode. | 07-26-2012 |
20120223410 | REGION-DIVIDED SUBSTRATE, SEMICONDUCTOR DEVICE HAVING REGION-DIVIDED SUBSTRATE, AND METHOD FOR MANUFACTURING THE SAME - A region-divided substrate includes: a substrate having a first surface and a second surface opposite to the first surface and having a plurality of partial regions, which are divided by a plurality of trenches, wherein each trench penetrates the substrate from the first surface to the second surface; a conductive layer having an electrical conductivity higher than the substrate and disposed on a sidewall of one of the plurality of partial regions from the first surface to the second surface; and an insulator embedded in each trench. | 09-06-2012 |
20120280355 | SOS SUBSTRATE WITH REDUCED STRESS - There is provided an SOS substrate with reduced stress. The SOS substrate is a silicon-on-sapphire (SOS) substrate comprising a sapphire substrate and a monocrystalline silicon film on or above the sapphire substrate. The stress of the silicon film of the SOS substrate as measured by a Raman shift method is 2.5×10 | 11-08-2012 |
20120319232 | Self-Aligned Dual Depth Isolation and Method of Fabrication - FDSOI devices and methods for the fabrication thereof are provided. In one aspect, a method for fabricating a device includes the following steps. A wafer is provided having a substrate, a BOX and a SOI layer. A hardmask layer is deposited over the SOI layer. A photoresist layer is deposited over the hardmask layer and patterned into groups of segments. A tilted implant is performed to damage all but those portions of the hardmask layer covered or shadowed by the segments. Portions of the hardmask layer damaged by the implant are removed. A first etch is performed through the hardmask layer to form a deep trench in the SOI layer, the BOX and at least a portion of the substrate. The hardmask layer is patterned using the patterned photoresist layer. A second etch is performed through the hardmask layer to form shallow trenches in the SOI layer. | 12-20-2012 |
20130069196 | STRUCTURE AND METHOD TO MINIMIZE REGROWTH AND WORK FUNCTION SHIFT IN HIGH-K GATE STACKS - The present invention provides a semiconductor structure comprising high-k material portions that are self-aligned with respect to the active areas in the semiconductor substrate and a method of fabricating the same. The high-k material is protected from oxidation during the fabrication of the semiconductor structure and regrowth of the high-k material and shifting of the high-k material work function is prevented. | 03-21-2013 |
20130168803 | Semiconductor-On-Insulator Devices and Associated Methods - Semiconductor-on-insulator (SOI) devices and associated methods are provided. In one aspect, for example, a method for making a SOI device can include forming a device layer on a front side of a semiconductor layer, bonding a first substrate to the front side of the device layer, processing the semiconductor layer on a back side opposite the device layer to form a processed surface, and bonding a second substrate to the processed surface. In some aspects, the method can further include removing the first substrate from the front side to expose the device layer. In one aspect, forming the device layer can include forming optoelectronic circuitry at the front side of the semiconductor layer. | 07-04-2013 |
20130200486 | EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR (ETSOI) LAYER - Various aspects include extremely thin semiconductor-on-insulator (ETSOI) layers. In one embodiment, an ETSOI layer includes a plurality of shallow trench isolations (STI) defining a plurality of distinct semiconductor-on-insulator (SOI) regions, the distinct SOI regions having at least three different thicknesses; at least one recess located within the distinct SOI regions; and an oxide cap over the at least one recess. | 08-08-2013 |
20130207226 | RECESSED DEVICE REGION IN EPITAXIAL INSULATING LAYER - A method for isolating semiconductor devices is described wherein an epitaxial insulating layer is grown on a semiconductor substrate. The epitaxial insulating layer is etched to form a recessed region within the layer. An epitaxial semiconductor material is grown with the recessed region to form a semiconductor device region separated from other potential device regions by non-recessed portions of the epitaxial insulating layer. | 08-15-2013 |
20130320485 | SEMICONDUCTOR DEVICE - An SOI or PSOI device including a device structure having a plurality of doped semiconductor regions. One or more of the doped semiconductor regions is in electrical communication with one or more electrical terminals. The device further includes an insulator layer located between a bottom surface of the device structure and a handle wafer. The device has an insulator trench structure located between a side surface of the device structure and a lateral semiconductor region located laterally with respect to the device structure. The insulator layer and the insulator trench structure are configured to insulate the device structure from the handle wafer and the lateral semiconductor region, and the insulator trench structure includes a plurality of insulator trenches. | 12-05-2013 |
20140145297 | MIM-CAPACITOR AND METHOD OF MANUFACTURING SAME - An integrated circuit includes a support, at least three metal layers above the support, the metal layers having a top metal layer with a top plate and a bottom metal layer with a bottom plate, dielectric material between the top and bottom plates to form a capacitor, and plural oxide layers above the support, such oxide layers including a top oxide layer, each oxide layer respectively covering a corresponding metal layer. The top oxide layer covers the top metal layer and has an opening exposing at least part of the top plate. A method of forming the integrated circuit by providing a support with metal and oxide layers, including a bottom plate, forming a cavity exposing the bottom plate, filling the cavity with dielectric, applying a further metal layer having a top plate and a further oxide layer, and forming an opening to expose the top plate. | 05-29-2014 |
20140175598 | SILICON-ON-INSULATOR RADIO FREQUENCY DEVICE AND SILICON-ON-INSULATOR SUBSTRATE - A silicon-on-insulator radio frequency device and a silicon-on-insulator substrate are provided. In the silicon-on-insulator radio frequency device, a pit is formed on a surface of a high resistivity silicon plate which is close to a buried oxide layer. The pit may be filled with an insulating material, thereby increasing an equivalent surface resistance of the high resistivity silicon plate; or no insulating material is filled into the pit, that is, the pit remains a vacuum state or is only filled with air, which can increase the equivalent surface resistance of the high resistivity silicon plate as well. In such, an eddy current generated on a surface of the high resistivity silicon plate under the action of a radio frequency signal may be reduced. As a result, loss of the radio frequency signal is reduced and the linearity of the radio frequency signal is improved. | 06-26-2014 |
20140264723 | DEVICES INCLUDING A DIAMOND LAYER - A device includes a substrate layer, a diamond layer, and a device layer. The device layer is patterned. The diamond layer is to conform to a pattern associated with the device layer. | 09-18-2014 |
20150091129 | HEAT DISSIPATIVE ELECTRICAL ISOLATION/INSULATION STRUCTURE FOR SEMICONDUCTOR DEVICES AND METHOD OF MAKING - An isolation structure can include a structure material with thermal conductivity greater than silicon dioxide, yet electrical conductivity such that the structure material can replace silicon dioxide as an insulator. At least one column can extend to a target layer from a top surface of a semiconductor device near an active area of the device. At least one lateral portion can extend from the column(s) substantially parallel to the target layer and can extend between multiple columns in the target layer, such as in a cavity formed by lateral etching. The structure material can include, for example, aluminum nitride (AlN). | 04-02-2015 |