Class / Patent application number | Description | Number of patent applications / Date published |
257444000 | Light sensor elements overlie active switching elements in integrated circuit (e.g., where the sensor elements are deposited on an integrated circuit) | 13 |
20080203516 | IMAGE DEVICE AND METHOD OF FABRICATING THE SAME - An image device and a method of fabricating the image device include a substrate pattern formed to define an opening and to include a portion of a photodiode for receiving light. Stacked metal interconnection patterns and an interlayer dielectric layer are formed beneath the substrate pattern. A height of the opening equals a height of the substrate pattern, such that an exposed portion of a top surface of the interlayer dielectric layer provides a bottom surface of the opening. An external connection electrode is positioned on the bottom surface of the opening. | 08-28-2008 |
20080217718 | METHOD, APPARATUS, AND SYSTEM TO REDUCE GROUND RESISTANCE IN A PIXEL ARRAY - Methods, devices, and systems for an image sensor device are disclosed. An image sensor device comprises an array of image pixels wherein each pixel is configured for sensing light incident on the pixel. An image sensor device may further comprise a ground contact shared between at least two image pixels of the plurality. The ground contacts may be provided in an even pattern, a random pattern, or a repeating random pattern across the array. The image sensor device may further include an array of shared pixel structures comprising a plurality of pixels, wherein a ground contact may be evenly or randomly placed within each pixel structure across the array of pixel structures. | 09-11-2008 |
20090224351 | CMOS sensor with approximately equal potential photodiodes - A MOS or CMOS based active pixel sensor designed for operation with zero or close to zero potential across the pixel photodiodes to minimize or eliminate dark current. In this preferred embodiment, the voltage potential across the pixel photodiode structures is maintained constant and close to zero, preferably less than 1.0 volts. This preferred embodiment enables the photodiode to be operated at a constant bias condition during the charge detection cycle. In preferred embodiments the pixel photodiodes are produced with a continuous pin or nip photodiode layer laid down over pixel electrodes of the sensor. In other preferred embodiments the pixel photodiode structures are produced beside and physically isolated from the regions where CMOS circuits are formed. In some of these preferred embodiments the isolated pixel photodiode structures are comprised of crystalline germanium deposited in cavities in a silicon substrate. This embodiment can be adapted especially for imaging at short wave infrared frequencies. Preferred embodiments are adapted for correlated double sampling. | 09-10-2009 |
20090230496 | SOLID-STATE IMAGING DEVICE - Disclosed herein is a solid-state imaging device including: a semiconductor substrate; a sensor of impurity diffusion layer formed on the surface layer of said semiconductor substrate; a negative charge accumulation layer formed on said sensor from an insulating material containing a first metallic substance; and an interfacial layer formed between said sensor and said negative charge accumulation layer from an insulating material containing a second metallic substance having greater electronegativity than said first metallic substance. | 09-17-2009 |
20100230772 | ARRAY OF ALPHA PARTICLE SENSORS - An array of radiation sensors or detectors is integrated within a three-dimensional semiconductor IC. The sensor array is located relatively close to the device layer of a circuit (e.g., a microprocessor) to be protected from the adverse effects of the ionizing radiation particles. As such, the location where the radiation particles intersect the device layer can be calculated with coarse precision (e.g., to within 10 s of microns). | 09-16-2010 |
20110115043 | SOLID-STATE IMAGE SENSOR AND IMAGING DEVICE - According to an aspect of the invention, a solid-state image sensor having a plurality of pixels includes a plurality of lower electrode, a photoelectric conversion layer, an upper electrode, a wiring portion and a plurality of connection portions. The plurality of lower electrodes respectively corresponds to the plurality of pixels. The photoelectric conversion layer is stacked on the lower electrodes. The upper electrode is stacked on the photoelectric conversion layer. The wiring portion supplies, to the upper electrode, a voltage to generate an electric field between the upper electrode and the lower electrode. The plurality of connection portions connects the wiring portion and the upper electrode. The plurality of connection portions are disposed in a circumference region which is a region other than a sensor region in which a plurality of photoelectric conversion elements are arranged. The plurality of connection portions is disposed in a symmetrical arrangement. | 05-19-2011 |
20110156197 | Interwafer interconnects for stacked CMOS image sensors - An image sensor includes a sensor wafer and a circuit wafer electrically connected to the sensor wafer. The sensor wafer includes unit cells with each unit cell having at least one photodetector and a charge-to-voltage conversion region. The circuit wafer includes unit cells with each unit cell having an electrical node associated with each unit cell on the sensor wafer. An inter-wafer interconnect is connected between each unit cell on the sensor wafer and a respective unit cell on the circuit wafer. The location of at least a portion of the inter-wafer interconnects is shifted or disposed at a different location with respect to the location of one or both components connected to the shifted inter-wafer interconnects. The locations of the inter-wafer interconnects can be disposed at different locations with respect to the locations of the charge-to-voltage conversion regions or with respect to the locations of the electrical nodes. | 06-30-2011 |
20120319225 | DYNAMICALLY CONFIGURABLE PHOTOVOLTAIC CELL ARRAY - Embodiments of the present invention relate to photovoltaic cells. Specifically, the present invention relates to photovoltaic (PV) cells configurable for energy conversion and imaging. In a typical embodiment, each photovoltaic cell (PV) in the photovoltaic array is divided into a pixel-based array. Each photovoltaic cell is coupled to a set of switches and the photovoltaic cell is dynamically configured for energy conversion or imaging based on the settings of at least one of the switches. | 12-20-2012 |
20140084408 | Semiconductor Device and Production Method for a Semiconductor Device - A semiconductor device includes a carrier substrate having at least one conductor track, at least one converter element structured at least partly from a further semiconductor substrate, and conductive structures formed on a respective converter element. The at least one converter element is electrically linked to the at least one conductor track via at least one at least partly conductive supporting element arranged between a contact side of the carrier substrate and an inner side of the converter element. The inner side is oriented toward the carrier substrate. The at least one converter element is arranged on the contact side of the carrier substrate such that the inner side of the converter element is kept spaced apart from the contact side of the carrier substrate. The at least one converter element and the conductive structures formed thereon are completely embedded into at least one insulating material. | 03-27-2014 |
20140306313 | SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREFOR, AND ELECTRONIC APPARATUS - A semiconductor device includes: a first semiconductor chip; and a second semiconductor chip that is stacked on the first semiconductor chip. The first semiconductor chip includes a first wiring portion of which a side surface is exposed at a side portion of the first semiconductor chip. The second semiconductor chip includes a second wiring portion of which a side surface is exposed at a side portion of the second semiconductor chip. The respective side surfaces of the first wiring portion and the second wiring portion, which are exposed at the side portions of the first semiconductor chip and the second semiconductor chip, are covered by a conductive layer, and the first wiring portion and the second wiring portion are electrically connected to each other through the conductive layer. | 10-16-2014 |
20150349014 | SOLID-STATE IMAGING DEVICE, MEMBERS FOR THE SAME, AND IMAGING SYSTEM - The present invention provides a solid-state imaging device including a pad capable of reducing inferior connection with an external terminal. The solid-state imaging device includes a first substrate provided, on its front face, with photoelectric conversion elements, a first wiring structure, a second substrate provided, on its front face, with at least a part of peripheral circuits, and a second wiring structure. The first substrate, the first wiring structure, the second wiring structure, and the second substrate are provided in this order. The first wiring structure includes a wiring layer including wirings made mainly of copper. The second wiring structure includes a wiring layer including wirings made mainly of copper. Wirings made mainly of copper in the first wiring structure are bonded with wirings made mainly of copper in the second wiring structure. The solid-state imaging device includes a pad formed of a conductive element made mainly of aluminum. | 12-03-2015 |
20150364515 | IMAGE SENSOR COMPRISING ISOLATED GERMANIUM PHOTODETECTORS INTEGRATED WITH A SILICON SUBSTRATE AND SILICON CIRCUITRY - In accordance with the invention, an improved image sensor comprises an array of germanium photosensitive elements integrated with a silicon substrate and integrated with silicon readout circuits. The silicon transistors are formed first on a silicon substrate, using well known silicon wafer fabrication techniques. The germanium elements are subsequently formed overlying the silicon by epitaxial growth. The germanium elements are advantageously grown within surface openings of a dielectric cladding. Wafer fabrication techniques are applied to the elements to form isolated germanium photodiodes. Since temperatures needed for germanium processing are lower than those for silicon processing, the formation of the germanium devices need not affect the previously formed silicon devices. Insulating and metallic layers are then deposited and patterned to interconnect the silicon devices and to connect the germanium devices to the silicon circuits. The germanium elements are thus integrated to the silicon by epitaxial growth and integrated to the silicon circuitry by common metal layers. | 12-17-2015 |
20150370204 | FIXING UNIT OF PLATE-SHAPED MEMBER, PVD PROCESSING APPARATUS AND FIXING METHOD OF PLATE-SHAPED MEMBER - A fixing unit fixes a plate-shaped member to a fixing base member. The fixing unit includes: a pressing unit configured to press the plate-shaped member toward the fixing base member; and a plurality of positioning units, installed at the fixing base member to be in contact with side surfaces of the plate-shaped member, and configured to place the plate-shaped member with respect to the fixing base member. Each of the positioning units includes: a shaft to be installed at the fixing base member; and a slide part movable along the shaft, and the slide part includes a contact part to be in contact with one of the side surfaces of the plate-shaped member and a clearance part formed on the contact part to have a smaller width than that of the contact part. | 12-24-2015 |