Entries |
Document | Title | Date |
20080251811 | SEMICONDUCTOR DEVICE | 10-16-2008 |
20090001411 | Semiconductor device - A semiconductor device includes a spaced-channel IGBT and an antiparalell diode that are formed in a same semiconductor substrate. The IGBT includes a base layer and insulated gate trenches by which the base layer is divided into a body region connected to an emitter and a floating region disconnected from the emitter. The IGBT is formed in a cell region of an IGBT region, and the diode is formed in a diode region. A boundary region of the IGBT region is located between the cell region and the diode region. A spacing between adjacent gate trenches in the boundary region is less than a spacing between adjacent gate trenches between which the floating region is located in the cell region. | 01-01-2009 |
20090114947 | Semiconductor device and inverter circiut having the same - A semiconductor device includes a semiconductor substrate, an insulated gate transistor formed to the semiconductor substrate, a diode formed to the semiconductor substrate, and a control transistor formed to the semiconductor substrate. A first current terminal of the insulated gate transistor is coupled to a cathode of the diode at a high potential side. A second current terminal of the insulated gate transistor is coupled to an anode of the diode at a low potential side. The control transistor is configured to turn off the insulated gate transistor by reducing a potential of a gate terminal of the insulated gate transistor when the diode conducts an electric current. | 05-07-2009 |
20090173966 | INTEGRATED LOW LEAKAGE DIODE - An integrated low leakage diode suitable for operation in a power integrated circuit has a structure similar to a lateral power MOSFET, but with the current flowing through the diode in the opposite direction to a conventional power MOSFET. The anode is connected to the gate and the comparable MOSFET source region which has highly doped regions of both conductivity types connected to the channel region to thereby create a lateral bipolar transistor having its base in the channel region. A second lateral bipolar transistor is formed in the cathode region. As a result, substantially all of the diode current flows at the upper surface of the diode thereby minimizing the substrate leakage current. A deep highly doped region in contact with the layers forming the emitter and the base of the vertical parasitic bipolar transistor inhibits the ability of the vertical parasitic transistor to fully turn on. | 07-09-2009 |
20090267112 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SEMICONDUCTOR DEVICE - A semiconductor device arrangement comprises a semiconductor device and an injector device. The semiconductor device comprises a first current electrode region of a first conductivity type, a second current electrode region of the first conductivity type, a drift region between the first and the second current electrode regions, and at least one floating region of a second conductivity type formed in the drift region. The injector device is arranged to receive an activation signal when the semiconductor device is turned on and to inject charge carriers of the second conductivity type into the drift region and the at least one floating region in response to receiving the activation signal. | 10-29-2009 |
20090283798 | Semiconductor device and manufacturing method thereof - A semiconductor device includes an n-conductive type semiconductor substrate having a main side and a rear side, a p-conductive type layer arranged over the main side of the substrate, a main side n-conductive type region arranged in the p-conductive type layer, a rear side n-conductive type layer arranged over the rear side of the substrate, a first trench which reaches the substrate and penetrates the main side n-conductive type region and the p-conductive type layer, a second trench which reaches an inside of the p-conductive type layer, a second electrode layer, which is embedded in the second trench and connected to the p-conductive type layer. Hereby, the semiconductor device, in which the recovery property of a diode cell can be improved without damaging the property of a MOS transistor cell or an IGBT cell and the surge withstand property does not deteriorate, can be obtained. | 11-19-2009 |
20090321784 | Semiconductor Device and Method of Forming Lateral Power MOSFET with Integrated Schottky Diode on Monolithic Substrate - A monolithic semiconductor device has an insulating layer formed over a first substrate. A second substrate is disposed over the first insulating layer. A power MOSFET with body diode is formed over the second substrate. A Schottky diode is formed over the second substrate in proximity to the MOSFET. An insulation trench is formed within the second substrate between the MOSFET and Schottky diode. The isolation trench surrounds the MOSFET and first Schottky diode. A first electrical connection is formed between a source of the MOSFET and an anode of the Schottky diode. A second electrical connection is formed between a drain of the MOSFET and a cathode of the Schottky diode. The Schottky diode reduces charge build-up within the body diode and reverse recovery time of the first power MOSFET. The power MOSFET and integrated Schottky can be used in power conversion or audio amplifier circuit. | 12-31-2009 |
20100006890 | ESD Protection Device with Increased Holding Voltage During Normal Operation - An ESD protection circuit including an SCR having at least one PNP transistor and at least one NPN transistor such that at least one of the PNP transistor and the NPN transistor having an additional second collector. The circuit further including at least one control circuit coupled to the at least one second collector to control holding voltage of the SCR. | 01-14-2010 |
20100078675 | CIRCUIT DEVICE - Provided is a circuit device having a configuration in which thermal interference between built-in elements is suppressed and being miniaturized in total size. A hybrid integrated circuit device of the present invention includes: a circuit substrate, a sealing resin and leads. The circuit substrate in its upper surface is incorporated with a hybrid integrated circuit formed of semiconductor elements and the like respectively fixed to heat spreaders. The sealing resin coats the circuit substrate and thus seals the hybrid integrated circuit. The leads each extend to the outside while being fixed to a pad formed of a conductive pattern. In this hybrid integrated circuit device, the semiconductor elements are mounted on the respective heat spreaders at positions offset from each other, and thereby are arranged to be spaced away from each other. | 04-01-2010 |
20100090248 | Semiconductor device having IGBT and FWD on same substrate - A semiconductor device includes: a semiconductor substrate; an IGBT element including a collector region; a FWD element including a cathode region adjacent to the collector region; a base layer on the substrate; multiple trench gate structures including a gate electrode. The base layer is divided by the trench gate structures into multiple first and second regions. Each first region includes an emitter region contacting the gate electrode. Each first region together with the emitter region is electrically coupled with an emitter electrode. The first regions include collector side and cathode side first regions, and the second regions include collector side and cathode side second regions. At least a part of the cathode side second region is electrically coupled with the emitter electrode, and at least a part of the collector side second region has a floating potential. | 04-15-2010 |
20100140658 | Method of manufacturing semiconductor device including insulated gate bipolar transistor and diode - In a method of manufacturing a semiconductor device, a semiconductor substrate of a first conductivity type having first and second surfaces is prepared. Second conductivity type impurities for forming a collector layer are implanted to the second surface using a mask that has an opening at a portion where the collector layer will be formed. An oxide layer is formed by enhanced-oxidizing the collector layer. First conductivity type impurities for forming a first conductivity type layer are implanted to the second surface using the oxide layer as a mask. A support base is attached to the second surface and a thickness of the semiconductor substrate is reduced from the first surface. An element part including a base region, an emitter region, a plurality of trenches, a gate insulating layer, a gate electrode, and a first electrode is formed on the first surface of the semiconductor substrate. | 06-10-2010 |
20100163922 | INSULATED GATE SEMICONDUCTOR DEVICE - By integrating a diode and a resistor connected in parallel into the same chip as an IGBT and connecting a cathode of the diode to a gate of the IGBT, the value of dv/dt can be limited to a predetermined range inside the chip of the IGBT without a deterioration in turn-on characteristics. Since the chip includes a resistor having such a resistance that a dv/dt breakdown of the IGBT can be prevented, the IGBT can be prevented from being broken by an increase in dv/dt at a site (user site) to which the chip is supplied. | 07-01-2010 |
20100163923 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device may include a semiconductor substrate having a first deep N well and/or a second deep N well, a first isolation layer over a first deep N well, and/or a first P well over a first deep N well. A semiconductor device may include an NMOS transistor over a first P well and/or a PMOS transistor over a first deep N well at an opposite side of a first isolation layer. A semiconductor device may include a second P well over a second deep N well, a second isolation layer interposed between a second deep N well and a second P well, and/or an emitter including first type impurities over a second deep N well. A semiconductor device may include a third isolation layer over a second P well, a collector including first type impurities over a second P well, and/or a base formed over a second P well and/or having a bottom surface to make contact with an emitter. | 07-01-2010 |
20100187567 | Semiconductor device - A semiconductor device includes a semiconductor substrate having a first surface and a second surface. A main region and a sensing region are formed on the first surface side of the semiconductor substrate. A RC-IGBT is formed in the main region and a sensing element for passing electric currents proportional to electric currents flowing through the RC-IGBT is formed in the sensing region. A collector region and a cathode region of the sensing element are formed on the second surface side of the semiconductor substrate. The collector region is located directly below the sensing region in a thickness direction of the semiconductor substrate. The cathode region is not located directly below the sensing region in the thickness direction. | 07-29-2010 |
20100213506 | COMPONENT ARRANGEMENT INCLUDING A MOS TRANSISTOR HAVING A FIELD ELECTRODE - A component arrangement including a MOS transistor having a field electrode is disclosed. One embodiment includes a gate electrode, a drift zone and a field electrode, arranged adjacent to the drift zone and dielectrically insulated from the drift zone by a dielectric layer a charging circuit, having a rectifier element connected between the gate electrode and the field electrode. | 08-26-2010 |
20100224908 | SEMICONDUCTOR DEVICE - A semiconductor device according to the present invention includes a substrate; a nitride semiconductor layer formed above the substrate and having a laminated structure including at least three layers; a heterojunction bipolar transistor formed in a region of the nitride semiconductor layer; and a field-effect transistor formed in a region of the nitride semiconductor layer, the region being different from the region in which the heterojunction bipolar transistor is formed. | 09-09-2010 |
20100224909 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A first well region of a second conductivity type is formed in the portion of the semiconductor layer of the first conductivity type located in an element portion in which a vertical element is disposed, while a second well region of the second conductivity type is formed in the portion of the semiconductor layer located in a peripheral portion surrounding the element portion. A field insulating film is formed on the portion of the semiconductor layer located in a field portion interposed between the element portion and the peripheral portion. A depletion stop region of the first conductivity type having an impurity concentration higher than that of the semiconductor layer is formed in a surface portion of the semiconductor layer located under at least the portion of the field insulating film adjacent to the peripheral portion. | 09-09-2010 |
20100230717 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a first semiconductor layer of non-doped Al | 09-16-2010 |
20100244092 | POWER SEMICONDUCTOR APPARATUS - A power semiconductor apparatus which is provided with a first power semiconductor device using Si as a base substance and a second power semiconductor device using a semiconductor having an energy bandgap wider than the energy bandgap of Si as a base substance, and includes a first insulated metal substrate on which the first power semiconductor device is mounted, a first heat dissipation metal base on which the first insulated metal substrate is mounted, a second insulated metal substrate on which the second power semiconductor device is mounted, and a second heat dissipation metal base on which the second insulated metal substrate is mounted. | 09-30-2010 |
20100270586 | WIDE BAND GAP SEMICONDUCTOR DEVICE - A semiconductor device having high reliability and high load short circuit withstand capability while maintaining a low ON resistance is provided, by using a WBG semiconductor as a switching element of an inverter circuit. In the semiconductor device for application to a switching element of an inverter circuit, a band gap of a semiconductor material is wider than that of silicon, a circuit that limits a current when a main transistor is short circuited is provided, and the main transistor that mainly serves to pass a current, a sensing transistor that is connected in parallel to the main transistor and detects a microcurrent proportional to a current flowing in the main transistor, and a lateral MOSFET that controls a gate of the main transistor on the basis of an output of the sensing transistor are formed on the same semiconductor. | 10-28-2010 |
20100270587 | REVERSE-CONDUCTING SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SUCH A REVERSE-CONDUCTING SEMICONDUCTOR DEVICE - A reverse-conducting semiconductor device (RC-IGBT) including a freewheeling diode and an insulated gate bipolar transistor (IGBT), and a method for making the RC-IGBT are provided. A wafer has first and second sides emitter and collector sides of the IGBT, respectively. At least one layer of a first or second conductivity type is created on the second side before at least one layer of a different conductivity type is created on the second side. The at least one layer of the first or second conductivity type and the at least one layer of the different conductivity type are arranged alternately in the finalized RC-IGBT. A second electrical contact, which is in direct electrical contact with the layers of the first or second and different conductivity types, is created on the second side. A shadow mask is applied on the second side, and the layer of the first or second conductivity type is created through the shadow mask. Another layer of the first or second conductivity type can be created on the second side, and a shadow mask is applied on the other layer of the first or second conductivity type, and at least one electrically conductive island, which is part of a second electrical contact in the finalized RC-IGBT, is created through the shadow mask. The electrically conductive island is used as a mask for the creation of the layer of the different conductivity type, and those parts of the other layer of the first conductivity type which are covered by an electrically conductive island form the layer of the first or second conductivity type. | 10-28-2010 |
20100289059 | Power semiconductor devices integrated with clamp diodes having separated gate metal pads to avoid breakdown voltage degradation - A structure of power semiconductor device integrated with clamp diodes having separated gate metal pad is disclosed. The separated gate metal pads are wire bonded together on the gate lead frame. This improved structure can prevent the degradation of breakdown voltage due to electric field in termination region blocked by polysilicon. | 11-18-2010 |
20100301386 | INTEGRATED STRUCTURE OF IGBT AND DIODE AND METHOD OF FORMING THE SAME - An integrated structure of an IGBT and a diode includes a plurality of doped cathode regions, and a method of forming the same is provided. The doped cathode regions are stacked in a semiconductor substrate, overlapping and contacting with each other. As compared with other doped cathode regions, the higher a doped cathode region is disposed, the larger implantation area the doped cathode region has. The doped cathode regions and the semiconductor substrate have different conductive types, and are applied as a cathode of the diode and a collector of the IGBT. The stacked doped cathode regions can increase the thinness of the cathode, and prevent the wafer from being overly thinned and broken. | 12-02-2010 |
20100301387 | SEMICONDUCTOR DEVICE AND METHOD FOR ITS PRODUCTION - A semiconductor system is described, which is made up of a highly n-doped silicon substrate and a first n-silicon epitaxial layer, which is directly contiguous to the highly n-doped silicon substrate, and having a p-doped SiGe layer, which is contiguous to a second n-doped silicon epitaxial layer and forms a heterojunction diode, which is situated above the first n-doped silicon epitaxial layer and in which the pn-junction is situated within the p-doped SiGe layer. The first n-silicon epitaxial layer has a higher doping concentration than the second n-silicon epitaxial layer. Situated between the two n-doped epitaxial layers is at least one p-doped emitter trough, which forms a buried emitter, a pn-junction both to the first n-doped silicon epitaxial layer and also to the second n-doped silicon epitaxial layer being formed, and the at least one emitter trough being completely enclosed by the two epitaxial layers. | 12-02-2010 |
20110037096 | Heterojunction Bipolar Transistors and Methods of Manufacture - Semiconductor structures and methods of manufacture semiconductors are provided which relate to heterojunction bipolar transistors. The method includes forming two devices connected by metal wires on a same wiring level. The metal wire of a first of the two devices is formed by selectively forming a metal cap layer on copper wiring structures. | 02-17-2011 |
20110042716 | ESD protection device structure - An ESD protection device structure includes a well having a first conductive type, a first doped region having a second conductive type disposed in the well, a second doped region having the first conductive type, and a third doped region having the second conductive type disposed in the well. The second doped region is disposed within the first doped region so as to form a vertical BJT, and the first doped region, the well and the third doped region forms a lateral BJT, so that pulse voltage that the ESD protection structure can tolerate can be raised. | 02-24-2011 |
20110042717 | INTEGRATED LOW LEAKAGE DIODE - An integrated low leakage diode suitable for operation in a power integrated circuit has a structure similar to a lateral power MOSFET, but with the current flowing through the diode in the opposite direction to a conventional power MOSFET. The anode is connected to the gate and the comparable MOSFET source region which has highly doped regions of both conductivity types connected to the channel region to thereby create a lateral bipolar transistor having its base in the channel region. A second lateral bipolar transistor is formed in the cathode region. As a result, substantially all of the diode current flows at the upper surface of the diode thereby minimizing the substrate leakage current. A deep highly doped region in contact with the layers forming the emitter and the base of the vertical parasitic bipolar transistor inhibits the ability of the vertical parasitic transistor to fully turn on. | 02-24-2011 |
20110049563 | MOS GATE POWER SEMICONDUCTOR DEVICE - A MOS-gate power semiconductor device is provided which includes: one or more P-type wells formed under one or more of a gate metal electrode and a gate bus line and electrically connected to an emitter metal electrode; and one or more N-type wells formed in the P-type well and electrically connected to one or more of the gate metal electrode and the gate bus line. According to this configuration, it is possible to suppress deterioration and/or destruction of a device due to an overcurrent. | 03-03-2011 |
20110062489 | POWER DEVICE WITH SELF-ALIGNED SILICIDE CONTACT - An improved power device with a self-aligned suicide and a method for fabricating the device are disclosed. An example power device is a vertical power device that includes contacts formed on gate and body contact regions by an at least substantially self-aligned silicidation (e.g., salicide) process. The example device may also include one or more sidewall spacers that are each at least substantially aligned between edges of the gate region and the body contact region. The body contact region may also be implanted into the device in at least substantial self-alignment to the sidewall spacer. The method may also include an at least substantially self-aligned silicon etch. | 03-17-2011 |
20110062490 | MOS GATE POWER SEMICONDUCTOR DEVICE - A MOS-gate power semiconductor device includes: a main device area including an active area and an edge termination area; and an auxiliary device area horizontally formed outside the main device area so as to include one or more diodes. Accordingly, it is possible to protect a circuit from an overcurrent and thus to prevent deterioration and/or destruction of a device due to the overcurrent. | 03-17-2011 |
20110073905 | SEMICONDUCTOR DEVICE AND POWER CONVERTER USING IT - A semiconductor device and a power converter using it wherein a switching power device and a flywheel diode are connected in series, the flywheel diode includes a region having a Schottky junction to operate as a Schottky diode and a region having a pn junction to operate as a pn diode and control operation is performed such that when current flows forwardly through the flywheel diode, the pn diode operates and when the flywheel diode recovers backwardly, the Schottky diode operates mainly. | 03-31-2011 |
20110133246 | INTERNAL COMBUSTION ENGINE IGNITER SEMICONDUCTOR DEVICE - An internal combustion engine igniter semiconductor device is disclosed which is low cost yet secures energy withstand and reverse surge withstand capability. An IGBT includes a clamping diode between a collector electrode and a gate electrode. The IGBT has two n-type buffer layers of differing impurity concentrations between a p | 06-09-2011 |
20110169047 | POWER SEMICONDUCTOR DEVICES INTEGRATED WITH CLAMP DIODES HAVING SEPARATED GATE METAL PADS TO AVOID BREAKDOWN VOLTAGE DEGRADATION - A structure of power semiconductor device integrated with clamp diodes having separated gate metal pad is disclosed. The separated gate metal pads are wire bonded together on the gate lead frame. This improved structure can prevent the degradation of breakdown voltage due to electric field in termination region blocked by polysilicon or gate metal. | 07-14-2011 |
20110180844 | POWER SEMICONDUCTOR DEVICES INTEGRATED WITH CLAMP DIODES HAVING SEPARATED GATE METAL PADS TO AVOID BREAKDOWN VOLTAGE DEGRADATION - A structure of power semiconductor device integrated with clamp diodes having separated gate metal pads is disclosed. The separated gate metal pads are wire bonded together on the gate lead frame. This improved structure can prevent the degradation of breakdown voltage due to electric field in termination region blocked by polysilicon or gate metal. | 07-28-2011 |
20110204414 | REVERSE-CONDUCTING SEMICONDUCTOR DEVICE - A reverse-conducting semiconductor device includes a freewheeling diode and an insulated gate bipolar transistor (IGBT) on a common wafer. Part of the wafer forms a base layer with a base layer thickness. The IGBT includes a collector side and an emitter side arranged on opposite sides of the wafer. A first layer of a first conductivity type and a second layer of a second conductivity type are alternately arranged on the collector side. The first layer includes at least one first region with a first region width and at least one first pilot region with a first pilot region width. The second layer includes at least one second region with a second region width and at least one second pilot region with a second pilot region width. Each second region width is equal to or larger than the base layer thickness, whereas each first region width is smaller than the base layer thickness. Each second pilot region width is larger than each first pilot region width. Each first pilot region width is equal to or larger than two times the base layer thickness, and the sum of the areas of the second pilot regions is larger than the sum of the areas of the first pilot regions. | 08-25-2011 |
20110220963 | METHOD AND APPARATUS OF FORMING BIPOLAR TRANSISTOR DEVICE - The present disclosure provides a semiconductor device having a transistor. The transistor includes a substrate. The transistor includes a collector region that is formed in a portion of the substrate. The transistor includes a base region that is surrounded by the collector region. The transistor includes an emitter region that is surrounded by the based region. The transistor includes an isolation structure that is disposed adjacent the emitter region. The transistor includes a gate structure that is disposed over a portion of the emitter region and a portion of the isolation structure. | 09-15-2011 |
20110233608 | CONNECTION ARRANGEMENT FOR SEMICONDUCTOR POWER MODULES - A semiconductor power module includes at least two sub modules. The sub modules include at least one respective transistor having a collector, an emitter, and a gate. The module includes a connection arrangement having a collector terminal unit for connecting the collectors of the at least two sub modules collectively to external circuit components, at least two emitter terminal units for connecting the respective emitters of the at least two sub modules individually to external circuit components, and at least two gate terminal units for connecting the respective gates of the at least two sub modules individually to external circuit components. | 09-29-2011 |
20110241069 | Low side zener reference voltage extended drain SCR clamps - In an ultra high voltage lateral DMOS-type device (UHV LDMOS device), a central pad that defines the drain region is surrounded by a racetrack-shaped source region with striations of alternating n-type and p-type material radiating outwardly from the pad to the source to provide for an adjustable snapback voltage. | 10-06-2011 |
20110254050 | REVERSE CONDUCTING IGBT - An insulated gate bipolar transistor (IGBT) is provided comprising a semiconductor substrate having the following regions in sequence: (i) a first region of a first conductive type having opposing surfaces, a column region of a second conductive type within the first region extending from a first of said opposing surfaces; (ii) a drift region of the second conductive type; (iii) a second region of the first conductive type, and (iv) a third region of the second conductive type. There is provided a gate electrode disposed to form a channel between the third region and the drift region, a first electrode operatively connected to the second region and the third region, a second electrode operatively connected to the first region and the column region. The arrangement of the IGBT is such that the column region is spaced from a second surface of the opposing surfaces of the first region, whereby a forward conduction path extends sequentially through the third region, the second region, the drift region, and the first region, and whereby a reverse conduction path extends sequentially through the second region, the drift region, the first region and the column region. Reverse conduction of the IGBT occurs through a thyristor structure which is embedded in the IGBT. Such an IGBT structure is advantageous over a reverse conducting IGBT structure in which an anti-parallel diode is integrated or embedded because it provides improved reverse conduction and snapback performance. | 10-20-2011 |
20110254051 | SEMICONDUCTOR DEVICE - A semiconductor device includes an n-conductive type semiconductor substrate having a main side and a rear side, a p-conductive type layer arranged over the main side of the substrate, a main side n-conductive type region arranged in the p-conductive type layer, a rear side n-conductive type layer arranged over the rear side of the substrate, a first trench which reaches the substrate and penetrates the main side n-conductive type region and the p-conductive type layer, a second trench which reaches an inside of the p-conductive type layer, a second electrode layer, which is embedded in the second trench and connected to the p-conductive type layer. Hereby, the semiconductor device, in which the recovery property of a diode cell can be improved without damaging the property of a MOS transistor cell or an IGBT cell and the surge withstand property does not deteriorate, can be obtained. | 10-20-2011 |
20110278643 | SEMICONDUCTOR UNIT AND SEMICONDUCTOR APPARATUS USING SAME - A semiconductor unit of certain aspects of the invention includes electrically conductive plates in the shape of the letter L, each consisting of a horizontally disposed leg portion and a vertically disposed flat body portion that is perpendicular to a cooling plate adhered to the bottom of the semiconductor unit. A pair of the vertically disposed flat body portions sandwiches a semiconductor chip. Owing to this construction, the heat generated in the semiconductor chip can be conducted away through the both surfaces of the chip, thus improving cooling performance. Since the heat is conducted away through the leg portions of the L-shaped electrically conductive plates a projected planar area occupied by the cooling plate required for cooling the semiconductor unit is reduced. Therefore, the size of the semiconductor unit can be reduced. | 11-17-2011 |
20110284924 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR UNIT, AND POWER SEMICONDUCTOR DEVICE - A semiconductor device includes: an insulating substrate; a first electrode pattern and a second electrode pattern provided apart from each other on a major surface of the insulating substrate; a semiconductor element connected to the first electrode pattern; an electrode terminal connected to the second electrode pattern; and a connection wiring. The connection wiring electrically connects the first electrode pattern and the second electrode pattern with each other and has a thermal resistance larger than that of the first electrode pattern. | 11-24-2011 |
20110309408 | SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING SAME - A semiconductor device provided with: an island and an island which are separated from each other; leads which approach the islands at one end; a control element which is attached to the island and is connected to a lead through a thin metal wire; and a switching element which is attached to the island and is connected to the lead through a metal wire. Further, the thin metal wire and the thin metal wire are arranged so as to the intersect. | 12-22-2011 |
20120001227 | Power semiconductor module - A power semiconductor module includes a plurality of sets of semiconductor switching elements, a molded resin casing containing the semiconductor switching elements, screw holders for receiving mounting screws formed at bottom regions of four corners of the molded resin casing, first terminal blocks having main circuit terminals, and arranged on a central region of a top surface of the molded resin casing, and second terminal blocks having control terminals arranged at a side edge of the molded resin casing apart. Insulating separation walls having a configuration of a rib erect from a surface of the second terminal blocks, and are interposed between groups of the control terminals corresponding to the sets of semiconductor switching elements, and between the screw holder including the mounting screw therein on the molded resin casing and the control terminal at a high voltage side adjacent to the screw holder. | 01-05-2012 |
20120007140 | ESD self protecting NLDMOS device and NLDMOS array - In an NLDMOS array, the source fingers are terminated by p+ Pbody diffusions or Pbody diffusions. The drain-source spacing is reduced by arranging p+ Pbody regions for contacting the Pbody, in line with n+ source regions to define source fingers with interdigitated p+ Pbody regions. | 01-12-2012 |
20120007141 | SEMICONDUCTOR DEVICE HAVING SEMICONDUCTOR SUBSTRATE INCLUDING DIODE REGION AND IGBT REGION - A semiconductor device, including a semiconductor substrate in which a diode region and an IGBT region are formed, is provided. A lifetime control region is formed within a diode drift region. The diode drift region and the IGBT drift region are a continuous region across a boundary region between the diode region and the IGBT region. A first separation region and a second separation region are formed within the boundary region. The first separation region is formed of a p-type semiconductor, formed in a range extending from an upper surface of the semiconductor substrate to a position deeper than both of a lower end of an anode region and a lower end of a body region, and bordering with the anode region. The second separation region is formed of a p-type semiconductor, formed in a range extending from the upper surface of the semiconductor substrate to a position deeper than both of the lower end of the anode region and the lower end of the body region, and bordering with the body region. The second separation region is separated from the first separation region. | 01-12-2012 |
20120007142 | SEMICONDUCTOR DEVICE HAVING SEMICONDUCTOR SUBSTRATE INCLUDING DIODE REGION AND IGBT REGION - Provided is a semiconductor device including a semiconductor substrate in which a diode region and an IGBT region are formed. A separation region formed of a p-type semiconductor is formed in a range between the diode region and the IGBT region and extending from an upper surface of the semiconductor substrate to a position deeper than both a lower end of an anode region and a lower end of a body region. A diode lifetime control region is formed within a diode drift region. A carrier lifetime in the diode lifetime control region is shorter than that in the diode drift region outside the diode lifetime control region. An end of the diode lifetime control region on an IGBT region side is located right below the separation region. | 01-12-2012 |
20120018777 | THREE LEVEL POWER CONVERTING DEVICE - Aspects of the invention are directed to a three-level power converter that has, as one phase, a bidirectional switching element connected to the series connection point of a series circuit of a first insulated gate bi-polar transistor (“IGBT”) and second IGBT and an intermediate electrode of a direct current power supply. Also included is a fuse connected between the bidirectional switching element and the intermediate electrode of the direct current power supply, and an overcurrent shutdown unit provided in each gate drive circuit of the first and second IGBTs, are provided as protection from a power supply short circuit phenomenon occurring in the event of a short circuit failure of any of the IGBTs or diodes. | 01-26-2012 |
20120025264 | SEMICONDUCTOR DEVICE HAVING DIODE-BUILT-IN IGBT AND SEMICONDUCTOR DEVICE HAVING DIODE-BUILT-IN DMOS - A semiconductor device includes: a semiconductor substrate; a diode-built-in insulated-gate bipolar transistor having an insulated-gate bipolar transistor and a diode, which are disposed in the substrate, wherein the insulated-gate bipolar transistor includes a gate, and is driven with a driving signal input into the gate; and a feedback unit for detecting current passing through the diode. The driving signal is input from an external unit into the feedback unit. The feedback unit passes the driving signal to the gate of the insulated-gate bipolar transistor when the feedback unit detects no current through the diode, and the feedback unit stops passing the driving signal to the gate of the insulated-gate bipolar transistor when the feedback unit detects the current through the diode. | 02-02-2012 |
20120037955 | Transistor Component with Reduced Short-Circuit Current - A transistor component includes in a semiconductor body a source zone and a drift zone of a first conduction type, and a body zone of a second conduction type complementary to the first conduction type, the body zone arranged between the drift zone and the source zone. The transistor component further includes a source electrode in contact with the source zone and the body zone, a gate electrode adjacent the body zone and dielectrically insulated from the body zone by a gate dielectric layer, and a diode structure connected between the drift zone and the source electrode. The diode structure includes a first emitter zone adjoining the drift zone in the semiconductor body, and a second emitter zone of the first conduction type adjoining the first emitter zone. The second emitter zone is connected to the source electrode and has an emitter efficiency γ of less than 0.7. | 02-16-2012 |
20120043581 | SEMICONDUCTOR DEVICE - In a semiconductor device, an IGBT cell includes a trench passing through a base layer of a semiconductor substrate to a drift layer of the semiconductor substrate, a gate insulating film on an inner surface of the trench, a gate electrode on the gate insulating film, a first conductivity-type emitter region in a surface portion of the base layer, and a second conductivity-type first contact region in the surface portion of the base layer. The IGBT cell further includes a first conductivity-type floating layer disposed within the base layer to separate the base layer into a first portion including the emitter region and the first contact region and a second portion adjacent to the drift layer, and an interlayer insulating film disposed to cover an end of the gate electrode. A diode cell includes a second conductivity-type second contact region in the surface portion of the base layer. | 02-23-2012 |
20120043582 | SEMICONDUCTOR DEVICE HAVING BOTH IGBT AREA AND DIODE AREA - There is known a semiconductor device in which an IGBT structure is provided in an IGBT area and a diode structure is provided in a diode area, the IGBT area and the diode area are both located within a same substrate, and the IGBT area is adjacent to the diode area. In this type of semiconductor device, a phenomenon that carriers accumulated within the IGBT area flow into the diode area when the IGBT structure is turned off. In order to prevent this phenomenon, a region of shortening lifetime of carriers is provided at least in a sub-area that is within said IGBT area and adjacent to said diode area. In the sub-area, emitter of IGBT structure is omitted. | 02-23-2012 |
20120056242 | SEMICONDUCTOR DEVICE INCLUDING INSULATED GATE BIPOLAR TRANSISTOR AND DIODE - A semiconductor device includes a vertical IGBT and a vertical free-wheeling diode in a semiconductor substrate. A plurality of base regions is disposed at a first-surface side portion of the semiconductor substrate, and a plurality of collector regions and a plurality of cathode regions are alternately disposed in a second-surface side portion of the semiconductor substrate. The base regions include a plurality of regions where channels are provided when the vertical IGBT is in an operating state. The first-side portion of the semiconductor substrate include a plurality of IGBT regions each located between adjacent two of the channels, including one of the base regions electrically coupled with an emitter electrode, and being opposed to one of the cathode regions. The IGBT regions include a plurality of narrow regions and a plurality of wide regions. | 03-08-2012 |
20120080718 | SEMICONDUCTOR DEVICE - The present teachings provide a semiconductor device comprising: an IGBT element region, a diode element region and a boundary region provided between the IGBT element region and the diode element region are formed in one semiconductor substrate. The boundary region comprises a second conductivity type first diffusion region, a first conductivity type second diffusion region, and a second conductivity type third diffusion region. A first drift region of the IGBT element region contiguously contacts the first diffusion region of the boundary region, and a second drift region of the diode element region contiguously contacts the first diffusion region of the boundary region. A first body region of the IGBT element region contiguously contacts the second diffusion region of the boundary region, and a second body region of the diode element region contiguously contacts the second diffusion region of the boundary region. | 04-05-2012 |
20120091503 | HIGH-VOLTAGE ESD PROTECTION DEVICE - The present invention discloses a high-voltage ESD protection device including a silicon controlled rectifier and a first PNP transistor. The silicon controlled rectifier includes a high-voltage P-well and N-well; a first N+ and P+ diffusion region are formed in the high-voltage P-well; a second N+ and P+ diffusion region are formed in the high-voltage N-well. The first PNP transistor comprises an N-type buried layer; a low-voltage N-well formed in the N-type buried layer; and a base, emitter and collector formed in the low-voltage N-well. The base and emitter are shorted together; the collector is shorted to the second N+ diffusion region and the second P+ diffusion region; the first N+ diffusion region is shorted to the first P+ diffusion region to act as a ground terminal. The high-voltage ESD protection device can effectively adjust the ESD trigger voltage and improve the snapback sustaining voltage after the device is switched on. | 04-19-2012 |
20120119256 | POWER SEMICONDUCTOR MODULE - In a semiconductor module according to certain aspects the invention, a U-terminal and an M-terminal overlap each other in a manner to reduce inductance and to further to reduce the size of snubber capacitor. In certain aspects of the invention, a P-terminal, M-terminal, N-terminal, and U-terminal are arranged such that the U-terminal, through which currents flow in and out, is arranged farthest away from control electrodes to reduce the noises superposed to control electrodes, and the P-terminal, M-terminal, N-terminal, and U-terminal are aligned to facilitate attaching external connection bars thereto. A power semiconductor module according to aspects of the invention can facilitate reducing the wiring inductance inside and outside the module, reducing the electromagnetic noises introduced into the control terminals, and attaching the external wirings to the terminals thereof simply and easily. | 05-17-2012 |
20120132954 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate with a first surface and a second surface. The semiconductor substrate has an element region including an IGBT region and a diode region located adjacent to the IGBT region. An IGBT element is formed in the IGBT region. A diode element is formed in the diode region. A heavily doped region of first conductivity type is located on the first surface side around the element region. An absorption region of first conductivity type is located on the second surface side around the element region. A third semiconductor region of second conductivity type is located on the second surface side around the element region. | 05-31-2012 |
20120132955 | SEMICONDUCTOR DEVICE - A diode region and an IGBT region are formed in a semiconductor layer of a semiconductor device. A lifetime controlled region is formed in the semiconductor layer. In a plan view, the lifetime controlled region has a first lifetime controlled region located in the diode region and a second lifetime controlled region located in a part of the IGBT region. The second lifetime controlled region extends from a boundary of the diode region and the IGBT region toward the IGBT region. In the plan view, a tip of the second lifetime controlled region is located in a forming area of the body region in the IGBT region. | 05-31-2012 |
20120132956 | SEMICONDUCTOR COMPONENT WITH HIGH BREAKTHROUGH TENSION AND LOW FORWARD RESISTANCE - A semiconductor component having a semiconductor body is disclosed. In one embodiment, the semiconductor component includes a drift zone of a first conductivity type, a drift control zone composed of a semiconductor material which is arranged adjacent to the drift zone at least in places, a dielectric which is arranged between the drift zone and the drift control zone at least in places. A quotient of the net dopant charge of the drift control zone, in an area adjacent to the accumulation dielectric and the drift zone, divided by the area of the dielectric arranged between the drift control zone and the drift zone is less than the breakdown charge of the semiconductor material in the drift control zone. | 05-31-2012 |
20120153349 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided is a semiconductor device including: a first gate wiring line connected to a gate electrode through an upper surface of the gate electrode that is not covered with a first interlayer insulating film; a second interlayer insulating film formed on the first interlayer insulating film so as to cover a region other than part of an upper surface of the first gate wiring line; and a second gate wiring line connected to the first gate wiring line through the upper surface of the first gate wiring line that is not covered with the second interlayer insulating film, the second gate wiring line having a width larger than a width of the first gate wiring line in plan view. | 06-21-2012 |
20120161201 | FAST SWITCHING LATERAL INSULATED GATE BIPOLAR TRANSISTOR (LIGBT) WITH TRENCHED CONTACTS - A lateral insulated gate bipolar transistor (LIGBT) includes a drain-anode adjoining trenched contact penetrating through an insulating layer and extending into an epitaxial layer, directly contacting to a drain region and an anode region, and the drain region vertically contacting to the anode region along sidewall of the drain-anode adjoining trenched contact. The LIGBT further comprises a breakdown voltage enhancement doping region wrapping around the anode region. The LIGBTs in accordance with the invention offer the advantages of high breakdown voltage and low on-resistance as well as high switching speed. | 06-28-2012 |
20120175673 | SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF - A semiconductor device includes an output port that has a first lateral double diffused metal oxide semiconductor (LDMOS) device and an electrostatic discharge protection device that has a second LDMOS device and a bipolar transistor and that protects the output port from electrostatic discharge. A breakdown voltage of the second LDMOS device is equal to or lower than a breakdown voltage of the first LDMOS device. | 07-12-2012 |
20120193676 | Diode structures with controlled injection efficiency for fast switching - This invention discloses a semiconductor device disposed in a semiconductor substrate. The semiconductor device includes a first semiconductor layer of a first conductivity type on a first major surface. The semiconductor device further includes a second semiconductor layer of a second conductivity type on a second major surface opposite the first major surface. The semiconductor device further includes an injection efficiency controlling buffer layer of a first conductivity type disposed immediately below the second semiconductor layer to control the injection efficiency of the second semiconductor layer. | 08-02-2012 |
20120205714 | APPARATUS AND METHOD FOR PROTECTION OF ELECTRONIC CIRCUITS OPERATING UNDER HIGH STRESS CONDITIONS - Apparatus and methods for electronic circuit protection under high stress operating conditions are provided. In one embodiment, an apparatus includes a substrate having a first p-well, a second p-well adjacent the first p-well, and an n-type region separating the first and second p-wells. An n-type active area is over the first p-well and a p-type active area is over the second p-well. The n-type and p-type active areas are electrically connected to a cathode and anode of a high reverse blocking voltage (HRBV) device, respectively. The n-type active area, the first p-well and the n-type region operate as an NPN bipolar transistor and the second p-well, the n-type region, and the first p-well operate as a PNP bipolar transistor. The NPN bipolar transistor defines a relatively low forward trigger voltage of the HRBV device and the PNP bipolar transistor defines a relatively high reverse breakdown voltage of the HRBV device. | 08-16-2012 |
20120217541 | IGBT WITH INTEGRATED MOSFET AND FAST SWITCHING DIODE - A power semiconductor device comprising a trench IGBT, a trench MOSFET and a fast switching diode for reduction of turn-on loss is disclosed. The inventive semiconductor power device employs a fast switching diode instead of body diode in the prior art. Furthermore, the inventive semiconductor power device further comprises an additional ESD protection diode between emitter metal and gate metal. | 08-30-2012 |
20120217542 | BIDIRECTIONAL SWITCH - A bidirectional switch includes a semiconductor element and a substrate potential stabilizer. The semiconductor element includes a first ohmic electrode and a second ohmic electrode, and a first gate electrode and a second gate electrode, which are sequentially formed on the first ohmic electrode between the first ohmic electrode and the second ohmic electrode. The substrate potential stabilizer sets a potential of the substrate lower than higher one of a potential of the first ohmic electrode or a potential of the second ohmic electrode. | 08-30-2012 |
20120248499 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate including a semiconductor layer, a power device formed in the semiconductor substrate, a plurality of concentric guard rings formed in the semiconductor substrate and surrounding the power device, and voltage applying means for applying successively higher voltages respectively to the plurality of concentric guard rings, with the outermost concentric guard ring having the highest voltage applied thereto. | 10-04-2012 |
20120267682 | SEMICONDUCTOR DEVICE - A semiconductor device in which the wiring resistance and parasitic inductance of a semiconductor package configuring a power semiconductor module is reduced. In the semiconductor device, a semiconductor chip with an IGBT formed therein and a diode chip are mounted over the upper surface of a die pad. An emitter pad of the semiconductor chip and an anode pad of the diode chip are coupled with a lead by an Al wire. One end of the lead is located in a higher position than the upper surface of the die pad in order to shorten the length of the Al wire for coupling the emitter pad and the lead. | 10-25-2012 |
20120286325 | APPARATUS FOR ELECTROSTATIC DISCHARGE PROTECTION - An apparatus includes an electrostatic discharge (ESD) protection device. In one embodiment, the protection device electrically coupled between a first node and a second node of an internal circuit to be protected from transient electrical events. The protection device includes a bipolar device or a silicon-controlled rectifier (SCR). The bipolar device or SCR can have a modified structure or additional circuitry to have a selected holding voltage and/or trigger voltage to provide protection over the internal circuit. The additional circuitry can include one or more resistors, one or more diodes, and/or a timer circuit to adjust the trigger and/or holding voltages of the bipolar device or SCR to a desired level. The protection device can provide protection over a transient voltage that ranges, for example, from about 100 V to 330V. | 11-15-2012 |
20120305985 | POWER SEMICONDUCTOR DEVICE COMPRISING A PLURALITY OF TRENCH IGBTS - A power semiconductor device with improved avalanche capability structures is disclosed. By forming at least an avalanche capability enhancement doped regions with opposite conductivity type to epitaxial layer underneath an ohmic contact doped region which surrounds at least bottom of trenched contact filled with metal plug between two adjacent gate trenches, avalanche current is enhanced with the disclosed structures. | 12-06-2012 |
20120313141 | FAST SWITCHING HYBRID IGBT DEVICE WITH TRENCHED CONTACTS - A hybrid IGBT device having a VIGBT and LDMOS structures comprises at least a drain trenched contact filled with a conductive plug penetrating through an epitaxial layer, and extending into a substrate; a vertical drain region surrounding at least sidewalls of the drain trenched contact, extending from top surface of the epitaxial layer to the substrate, wherein the vertical drain region having a higher doping concentration than the epitaxial layer. | 12-13-2012 |
20120319163 | SEMICONDUCTOR DEVICE INCLUDING INSULATED GATE BIPOLAR TRANSISTOR AND DIODE - A semiconductor device includes an IGBT forming region and a diode forming region. The IGBT forming region includes an IGBT operating section that operates as an IGBT and a thinned-out section that does not operate as an IGBT. The IGBT operating section includes a channel region, and the thinned-out section includes a first anode region. The diode forming region includes a second anode region. When an area density is defined as a value calculated by integrating a concentration profile of second conductivity type impurities in each of the channel region, the first anode region, and the second anode region in a depth direction, an area density of the channel region is higher than an area density of the first anode region and an area density of the second anode region. | 12-20-2012 |
20130001639 | SEMICONDUCTOR DEVICE COMPRISING SEMICONDUCTOR SUBSTRATE HAVING DIODE REGION AND IGBT REGION - A semiconductor device includes a semiconductor substrate in which a diode region and an IGBT region are formed, wherein a lower surface side of the semiconductor substrate comprises a low impurity region provided between a second conductivity type cathode region of the diode region and a first conductivity type collector region of the IGBT region. The low impurity region includes at least one of a first conductivity type first low impurity region which has a lower density of first conductivity type impurities than that in the collector region and a second conductivity type second low impurity region which has a lower density of second conductivity type impurities than that in the cathode region. | 01-03-2013 |
20130009205 | SEMICONDUCTOR DEVICE - A semiconductor device has a first conductivity-type semiconductor substrate, second conductivity-type channel regions, and second conductivity-type thinning-out regions. The channel regions and the thinning-out regions are formed adjacent to a substrate surface of the semiconductor substrate. Further, a hole stopper layer is formed in each of the thinning-out regions to divide the thinning-out region into a first part adjacent to the substrate surface and a second part adjacent to a bottom of the thinning-out region. The hole stopper layer has an area density of equal to or less than 4.0×10 | 01-10-2013 |
20130009206 | SEMICONDUCTOR DEVICE - In a semiconductor device in which a diode and an IGBT are formed in a main region of a same semiconductor substrate, in order to obtain a sufficiently large sense IGBT current in a stable manner, a sense region is provided with a first region in which a distance from an end of a main cathode region on a side of the sense region in a plan view of the semiconductor substrate is equal to or longer than 615 μm. Alternatively, in order to obtain a sufficiently large sense diode current in a stable manner, the sense region is provided with a second region in which a distance from the main cathode region in a plan view of the semiconductor substrate is equal to or shorter than 298 μm. The sense region may be provided with both the first region and the second region. | 01-10-2013 |
20130015495 | Stacked Half-Bridge Power Module - According to an exemplary embodiment, a stacked half-bridge power module includes a high side device having a high side power terminal coupled to a high side substrate and a low side device having a low side power terminal coupled to a low side substrate. The high side and low side devices are stacked on opposite sides of a common conductive interface. The common conductive interface electrically, mechanically, and thermally couples a high side output terminal of the high side device to a low side output terminal of the low side device. The high side device and the low side device can each include an insulated-gate bipolar transistor (IGBT) in parallel with a diode. | 01-17-2013 |
20130015496 | Power Semiconductor DeviceAANM Konno; AkitoyoAACI HitachiAACO JPAAGP Konno; Akitoyo Hitachi JPAANM Azuma; KatsunoriAACI HitachiAACO JPAAGP Azuma; Katsunori Hitachi JPAANM Ando; TakashiAACI HitachiAACO JPAAGP Ando; Takashi Hitachi JP - A power semiconductor device is provided in which reliability can be improved when the parallel number of semiconductor devices increases. When a bonding face on collector electrode is on an upper side, and a bonding face on emitter electrode is on a lower side, a collector electrode joint region as a joint region between a collector trace and a collector electrode on a chip mounted substrate and an emitter electrode joint region as a joint region between an emitter trace and an emitter electrode are located at a same position in an up-and-down direction and are adjacent in a right-and-left direction at an interval of 2 mm or more and 4 mm or less. | 01-17-2013 |
20130032855 | Semiconductor Arrangement - A semiconductor arrangement includes a first and second controllable vertical n-channel semiconductor chip. Each of the controllable vertical n-channel semiconductor chips has a front side, a rear side opposite the front side, a front side main contact arranged on the front side, a rear side main contact arranged on the rear side, and a gate contact arranged on the front side for controlling an electric current between the front side main contact and the rear side main contact. The rear side contacts of the first and second semiconductor chips are electrically connected to one another. | 02-07-2013 |
20130062661 | INTEGRATED CIRCUIT DEVICE - An integrated circuit device includes a semiconductor substrate and a first transistor and a second transistor constructed in the semiconductor substrate. The first transistor has a first operating voltage higher than a second operating voltage of a second transistor. The first transistor includes a first drain structure, a first source structure, an isolation structure and a first gate structure. The first source structure includes a high voltage first-polarity well region, a first-polarity body region, a heavily doped first-polarity region, a second-polarity grade region and a heavily doped second-polarity region. The heavily doped second-polarity region is surrounded by the second-polarity grade region. The second-polarity grade region is surrounded by the first-polarity body region. The second transistor includes a second drain structure, a second source structure, a second gate structure and a first-polarity drift region. The first-polarity drift region and the first-polarity body region have the same dopant concentration. | 03-14-2013 |
20130062662 | SEMICONDUCTOR DEVICE - In a semiconductor device, at least one of the ratio (collector contact area/collector active area) in the High Side IGBT and the ratio (contact area on p | 03-14-2013 |
20130075784 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device including a semiconductor substrate in which a diode region and an IGBT region are formed is provided. The diode region includes a first layer embedded in a diode trench reaching a diode drift layer from an upper surface side of the semiconductor substrate, and a second layer which is buried in the first layer and which has a lower end located deeper than a boundary between a diode body layer and the diode drift layer. The second layer pressures the first layer in a direction from inside to outside of the diode trench. A lifetime control region is formed in the diode drift layer at least at the depth of the lower end of the second layer, and a crystal defect density inside the lifetime control region is higher than a crystal defect density outside the lifetime control region. | 03-28-2013 |
20130087829 | SEMICONDUCTOR DEVICE - In a semiconductor device including an IGBT and a freewheeling diode (FWD), W | 04-11-2013 |
20130099279 | POWER SEMICONDUCTOR DEVICE - An exemplary power semiconductor device with a wafer having an emitter electrode on an emitter side and a collector electrode on a collector side, an (n-) doped drift layer, an n-doped first region, a p-doped base layer, an n-doped source region, and a gate electrode, all of which being formed between the emitter and collector electrodes. The emitter electrode contacts the base layer and the source region within a contact area. An active semiconductor cell is formed within the wafer, and includes layers that lie in orthogonal projection with respect to the emitter side of the contact area of the emitter electrode. The device also includes a p-doped well, which is arranged in the same plane as the base layer, but outside the active cell. The well is electrically connected to the emitter electrode at least one of directly or via the base layer. | 04-25-2013 |
20130146941 | SEMICONDUCTOR DEVICE - A semiconductor device includes a transistor having a gate electrode, a first electrode, and a second electrode and first and second protection circuits each having one end commonly connected to the gate electrode and the other end connected to the first and second electrodes, respectively. The first and second protection circuits are formed in first and second polysilicon layers, respectively, formed separately on a single field insulating film. | 06-13-2013 |
20130153956 | SILICON ON INSULATOR INTEGRATED HIGH-CURRENT N TYPE COMBINED SEMICONDUCTOR DEVICE - A silicon on insulator integrated high-current N type combined semiconductor device, which can improve the current density, comprises a P type substrate and a buried oxide layer arranged thereon. A P type epitaxial layer divided into a region I and a region II is arranged on the buried oxide layer. The region I comprises an N type drift region, a P type deep well, an N type buffer well, a P type drain region, an N type source region and a P type body contact region; a field oxide layer and agate oxide layer are arranged on a silicon surface, and a polysilicon lattice is arranged on the gate oxide layer. The region II comprises an N type triode drift region, a P type deep well, an N type triode buffer well, a P type emitting region, an N type base region, an N type source region and a P type body contact region; a field oxide layer and a gate oxide layer are arranged on a silicon surface, and a polysilicon lattice is arranged on the gate oxide layer. It is characterized in that the N type base region is wrapped in the N type buffer region, and the drain electrode metal on the P type drain region is connected with the base electrode metal on the N type base region by a metal layer. In this invention, the current density of the device has been obviously improved without increasing the device area and reducing other performances of the device. | 06-20-2013 |
20130168731 | SEMICONDUCTOR POWER DEVICE HAVING WIDE TERMINATION TRENCH AND SELF-ALIGNED SOURCE REGIONS FOR MASK SAVING - A trench semiconductor power device with a termination area structure is disclosed. The termination area structure comprises a wide trench and a trenched field plate formed not only along trench sidewall but also on trench bottom of the wide trench by doing poly-silicon CMP so that the body ion implantation is blocked by the trenched field plate on the trench bottom to prevent the termination area underneath the wide trench from being implanted. Moreover, a contact mask is used to define both trenched contacts and source regions of the device for saving a source mask. | 07-04-2013 |
20130175575 | EFFICIENT IGBT SWITCHING - Embodiments of the invention provide IGBT circuit modules with increased efficiencies. These efficiencies can be realized in a number of ways. In some embodiments, the gate resistance and/or voltage can be minimized. In some embodiments, the IGBT circuit module can be switched using an isolated receiver such as a fiber optic receiver. In some embodiments, a single driver can drive a single IGBT. And in some embodiments, a current bypass circuit can be included. Various other embodiments of the invention are disclosed. | 07-11-2013 |
20130181254 | SEMICONDUCTOR DEVICE - In a semiconductor device having a semiconductor substrate on which a diode and an IGBT are formed, a cathode region of the diode and a collector region of the IGBT are formed in a range exposed to one surface of the semiconductor substrate. On the surface, a first conductor layer that is in contact with the cathode region, and a second conductor layer that is in contact with the collector region are formed. The work function of the second conductor layer is larger than the work function of the first conductor layer. | 07-18-2013 |
20130187196 | Integrated Circuit Including Field Effect Transistor Structures with Gate and Field Electrodes and Methods for Manufacturing and Operating an Integrated Circuit - An integrated circuit includes a first and a second field effect transistor structure. The first field effect transistor structure includes a first gate electrode structure and a first field electrode structure. The second field effect transistor structure includes a second gate electrode structure and a second field electrode structure. The first and the second gate electrode structures are electrically separated from each other. The first and the second field electrode structures are separated from each other. | 07-25-2013 |
20130214328 | POWER SEMICONDUCTOR APPARATUS - A power semiconductor apparatus which is provided with a first power semiconductor device using Si as a base substance and a second power semiconductor device using a semiconductor having an energy bandgap wider than the energy bandgap of Si as a base substance, and includes a first insulated metal substrate on which the first power semiconductor device is mounted, a first heat dissipation metal base on which the first insulated metal substrate is mounted, a second insulated metal substrate on which the second power semiconductor device is mounted, and a second heat dissipation metal base on which the second insulated metal substrate is mounted. | 08-22-2013 |
20130221404 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME - A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises a first doped region, a second doped region, a doped strip and a top doped region. The first doped region has a first type conductivity. The second doped region is formed in the first doped region and has a second type conductivity opposite to the first type conductivity. The doped strip is formed in the first doped region and has the second type conductivity. The top doped region is formed in the doped strip and has the first type conductivity. The top doped region has a first sidewall and a second sidewall opposite to the first sidewall. The doped strip is extended beyond the first sidewall or the second sidewall. | 08-29-2013 |
20130228823 | REVERSE-CONDUCTING SEMICONDUCTOR DEVICE - A reverse-conducting semiconductor device (RC-IGBT) including a freewheeling diode and an insulated gate bipolar transistor (IGBT), and a method for making the RC-IGBT are provided. A first layer of a first conductivity type is created on a collector side before a second layer of a second conductivity type is created on the collector side. An electrical contact in direct electrical contact with the first and second layers is created on the collector side. A shadow mask is applied on the collector side, and a third layer of the first conductivity type is created through the shadow mask. At least one electrically conductive island, which is part of a second electrical contact in the finalized RC-IGBT, is created through the shadow mask. The island is used as a mask for creating the second layer, and those parts of the third layer which are covered by the island form the second layer. | 09-05-2013 |
20130248926 | SEMICONDUCTOR DEVICE - A horizontal semiconductor device having multiple unit semiconductor elements, each of said unit semiconductor element formed by an IGBT including: a semiconductor substrate of a first conductivity type; a semiconductor region of a second conductivity type formed on the semiconductor substrate; a collector layer of the first conductivity type formed within the semiconductor region; a ring-shaped base layer of the first conductivity type formed within the semiconductor region such that the base layer is off said collector layer but surrounds said collector layer; and a ring-shaped first emitter layer of the second conductivity type formed in said base layer, wherein movement of carriers between the first emitter layer and the collector layer is controlled in a channel region formed in the base layer, and the unit semiconductor elements are disposed adjacent to each other. | 09-26-2013 |
20130256746 | SEMICONDUCTOR DEVICE - Aspects of the invention can include a semiconductor device that includes an output stage IGBT and a Zener diode on the same semiconductor substrate. The IGBT can include a first p well layer, an n emitter region on the surface region of the first p well layer, a gate electrode deposited on a gate insulating film, and an emitter electrode on the emitter region. The Zener diode can include a p | 10-03-2013 |
20130277711 | Oscillation Free Fast-Recovery Diode - In one implementation, a diode providing a substantially oscillation free fast-recovery includes at least one anode diffusion formed at a front side of a semiconductor die, and a cathode layer formed at a back side of the semiconductor die. The diode also includes a drift region and a buffer layer situated between the drift region and the cathode layer to enable the substantially oscillation free fast-recovery by the diode. In one implementation, the buffer layer is N type doped using hydrogen as a dopant. | 10-24-2013 |
20130299871 | LATERAL TRANSISTOR ON POLYMER - Representative implementations of devices and techniques provide a high-voltage device on a semiconductor substrate. An insulating polymer layer is formed on an opposite surface to the high-voltage device, the insulating polymer layer having a thickness of at least twice that of the semiconductor substrate. | 11-14-2013 |
20130299872 | TRENCH POLY ESD FORMATION FOR TRENCH MOS AND SGT - A semiconductor device includes a semiconductor material disposed in a trench with polysilicon lining at least the bottom of the trench. The semiconductor material includes differently doped regions configured as a PNP or NPN structure formed in the trench with differently doped regions located side by side across a width of the trench. It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. | 11-14-2013 |
20130307019 | SEMICONDUCTOR DEVICE - A semiconductor device is disclosed. The semiconductor device is capable of obtaining a high reverse recovery resistant amount by allowing sheet resistance of a peripheral portion in a p type diffusion region that is in contact with a metal electrode through an insulating film on a surface to be as high as possible and reducing an increase in cost if possible. The semiconductor device includes: a p type diffusion region that is disposed in a surface layer of the one main surface of an n type semiconductor substrate; and a voltage-resistant region that surrounds the p type diffusion region. | 11-21-2013 |
20130334567 | SEMICONDUCTOR DEVICE HAVING DIODE-BUILT-IN IGBT AND SEMICONDUCTOR DEVICE HAVING DIODE-BUILT-IN DMOS - A semiconductor device includes: a semiconductor substrate; a diode-built-in insulated-gate bipolar transistor having an insulated-gate bipolar transistor and a diode, which are disposed in the substrate, wherein the insulated-gate bipolar transistor includes a gate, and is driven with a driving signal input into the gate; and a feedback unit for detecting current passing through the diode. The driving signal is input from an external unit into the feedback unit. The feedback unit passes the driving signal to the gate of the insulated-gate bipolar transistor when the feedback unit detects no current through the diode, and the feedback unit stops passing the driving signal to the gate of the insulated-gate bipolar transistor when the feedback unit detects the current through the diode. | 12-19-2013 |
20130341674 | Reverse Conducting IGBT - A semiconductor device includes a first emitter region of a first conductivity type, a second emitter region of a second conductivity type complementary to the first type, a drift region of the second conductivity type, and a first electrode. The first and second emitter regions are arranged between the drift region and first electrode and each connected to the first electrode. A device cell of a cell region includes a body region of the first conductivity type adjoining the drift region, a source region of the second conductivity type adjoining the body region, and a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric. A second electrode is electrically connected to the source and body regions. A parasitic region of the first conductivity type is disposed outside the cell region and includes at least one section with charge carrier lifetime reduction means. | 12-26-2013 |
20140001512 | Semiconductor Device and Power Conversion Apparatus Using the Same | 01-02-2014 |
20140021509 | SEMICONDUCTOR CONFIGURATION HAVING REDUCED ON-STATE RESISTANCE - A semiconductor configuration, which includes an epitaxial layer of the first conductivity type disposed on a highly doped substrate of first conductivity type; a layer of a second conductivity type introduced into the epitaxial layer; and a highly doped layer of the second conductivity type provided at the surface of the layer of the second conductivity type. Between the layer of the second conductivity type and the highly doped substrate of the first conductivity type, a plurality of Schottky contacts, which are in the floating state, are provided mutually in parallel in the area of the epitaxial layer. | 01-23-2014 |
20140034999 | POWER DEVICE INTEGRATION ON A COMMON SUBSTRATE - A semiconductor structure for facilitating an integration of power devices on a common substrate includes a first insulating layer formed on the substrate and an active region having a first conductivity type formed on at least a portion of the first insulating layer. A first terminal is formed on an upper surface of the structure and electrically connects with at least one other region having the first conductivity type formed in the active region. A buried well having a second conductivity type is formed in the active region and is coupled with a second terminal formed on the upper surface of the structure. The buried well and the active region form a clamping diode which positions a breakdown avalanche region between the buried well and the first terminal. A breakdown voltage of at least one of the power devices is a function of characteristics of the buried well. | 02-06-2014 |
20140048847 | DIODE, SEMICONDUCTOR DEVICE, AND MOSFET - Disclosed is a technique capable of reducing loss at the time of switching in a diode. A diode disclosed in the present specification includes a cathode electrode, a cathode region made of a first conductivity type semiconductor, a drift region made of a low concentration first conductivity type semiconductor, an anode region made of a second conductivity type semiconductor, an anode electrode made of metal, a barrier region formed between the drift region and the anode region and made of a first conductivity type semiconductor having a concentration higher than that of the drift region, and a pillar region formed so as to connect the barrier region to the anode electrode and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region. The pillar region and the anode are connected through a Schottky junction. | 02-20-2014 |
20140061720 | SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device includes a first main electrode, a base layer of a first conductivity type, a barrier layer of the first conductivity type, a diffusion layer of a second conductivity type, a base layer of the second conductivity type, a first conductor layer, a second conductor layer, and a second main electrode. Bottoms of the barrier layer of the first conductivity type and the diffusion layer of the second conductivity type are positioned on the first main electrode side of lower ends of the first conductor layer and the second conductor layer. The barrier layer of the first conductivity type and the diffusion layer of the second conductivity type form a super junction proximally to tips of the first conductor layer and the second conductor layer. | 03-06-2014 |
20140070269 | SEMICONDUCTOR DEVICE - There is provided a semiconductor device such that it is possible to average the temperatures of a plurality of semiconductor chips simply by providing gate resistors. The semiconductor device includes a semiconductor module wherein a plurality of circuit substrates on which are mounted one or more semiconductor chips having a gate terminal and a gate resistor connected to the gate terminal are disposed in parallel, wherein the disposition distance of the gate resistor from the semiconductor chip is set based on the temperature of the semiconductor chip. | 03-13-2014 |
20140070270 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD - IGBT and diode are formed with optimal electrical characteristics on the same semiconductor substrate. IGBT region and FWD region are provided on the same semiconductor substrate. There are a plurality of trenches at predetermined intervals in the front surface of an n | 03-13-2014 |
20140077260 | SEMICONDUCTOR DEVICE - The semiconductor device includes a plurality of first flat plates containing a material that absorbs an electromagnetic wave at a high frequency. Any of the first flat plates is disposed above the first connecting wire, and any other of the first flat plates is disposed above the second connecting wire. | 03-20-2014 |
20140077261 | POWER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING POWER SEMICONDUCTOR DEVICE - An upper part of the termination region of the semiconductor substrate, an upper surface of the first diffusion layers and an upper surface of the first oxide film is etched in such a manner that the level of the upper surface of the semiconductor substrate in the termination region including the first oxide film and the first diffusion layers is lower than the level of the upper surface of the semiconductor substrate in the cell region. Then, a second oxide film is formed on the semiconductor substrate. An electrode is formed on the second oxide film so as to extend from the first region toward the cell region to the first diffusion layers in such a manner that the level of an upper surface of the electrode is lower than the level of the upper surface of the semiconductor substrate in the cell region. | 03-20-2014 |
20140084335 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device in which a lifetime control region can be formed within a predetermined range with high positioning accuracy is provided. In a semiconductor device, an IGBT element region and a diode element region may be formed in one semiconductor substrate. The IGBT element region may include a second conductivity type drift layer and a first conductivity type body layer. The diode element region may include a second conductivity type drift layer and a first conductivity type anode layer. A concentration of heavy metal included in the drift layer of the diode element region may be set higher than a concentration of the heavy metal included in the drift layer of the IGBT element region. | 03-27-2014 |
20140084336 | SEMICONDUCTOR DEVICE - According to one embodiment, an IGBT region includes: a collector layer of a first conductivity type, a drift layer of a second conductivity type, a body layer of the first conductivity type, and a second electrode extending to the drift layer and the body layer via a first insulating film in a stacking direction of a first electrode and the collector layer. A diode region includes: a cathode layer of the second conductivity type, the drift layer, an anode layer of the first conductivity type, and a conductive layer extending to the drift layer and the anode layer via a second insulating film in the stacking direction. The second electrode and the conductive layer are separated from one another at a predetermined distance. | 03-27-2014 |
20140084337 | SEMICONDUCTOR DEVICE - A collector layer of a first conductivity type is provided in the IGBT region and the boundary region and functions as a collector of the IGBT in the IGBT region. A cathode layer of a second conductivity type is provided in the diode region apart from the collector layer and functions as a cathode of the diode. A drift layer of the second conductivity type is provided in the IGBT region, the boundary region, and the diode region, the drift layer being provided on sides of the collector layer and the cathode layer opposite the first electrode. A diffusion layer of the first conductivity type is provided in the boundary region on a side of the drift layer opposite the first electrode. | 03-27-2014 |
20140091359 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate having one main surface in which an anode of a diode is formed. At a distance from the outer periphery of the anode, a guard ring is formed to surround the anode. The anode includes a p | 04-03-2014 |
20140103393 | Surface Mountable Power Components - According to an exemplary implementation, a power component includes a component substrate and a power semiconductor device electrically and mechanically coupled to the component substrate. The power component also includes at least one first peripheral contact and at least one second peripheral contact situated on the component substrate. A power semiconductor device is situated between the at least one first peripheral contact and the at least one second peripheral contact. The at least one first peripheral contact, the at least one second peripheral contact, and a surface electrode of the power semiconductor device are configured for surface mounting. The at least one first peripheral contact can be electrically coupled to the power semiconductor device. | 04-17-2014 |
20140117408 | UNIT POWER MODULE AND POWER MODULE PACKAGE COMPRISING THE SAME - Disclosed herein is a unit power module including: a first semiconductor chip having one surface on which a 1-1-th electrode and a 1-2-th electrode spaced apart from the 1-1-th electrode are formed and the other surface on which a 1-3-th electrode is formed, a second semiconductor chip having one surface on which a 2-1-th electrode is formed and the other surface on which a 2-2-th electrode is formed, a first metal plate contacting the 1-1-th electrode of the first semiconductor chip and the 2-1-th electrode of the second semiconductor chip, a second metal plate contacting the 1-2-th electrode of the first semiconductor chip and spaced apart from the first metal plate, a third metal plate contacting the 1-3-th electrode of the first semiconductor chip and the 2-2-th electrode of the second semiconductor chip, and a sealing member formed to surround the first metal plate, the second metal plate, and the third metal plate. | 05-01-2014 |
20140124832 | SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device includes: a first electrode; a second electrode; a first semiconductor layer provided between the first electrode and the second electrode; a second semiconductor layer provided between the first semiconductor layer and the second electrode, and the second semiconductor layer having a lower impurity concentration than the first semiconductor layer; a first semiconductor region provided between part of the second semiconductor layer and the second electrode; a second semiconductor region provided between a portion different from the part of the second semiconductor layer and the second electrode, and the second semiconductor region being in contact with the first semiconductor region; and a third semiconductor region provided between at least part of the first semiconductor region and the second electrode. | 05-08-2014 |
20140131767 | Dual Compartment Semiconductor Package - According to an exemplary embodiment, a dual compartment semiconductor package includes a conductive clip having first and second compartments. The first compartment is electrically and mechanically connected to a top surface of the first die. The second compartment electrically and mechanically connected to a top surface of a second die. The dual compartment semiconductor package also includes a groove formed between the first and second compartments, the groove preventing contact between the first and second dies. The dual compartment package electrically connects the top surface of the first die to the top surface of the second die. The first die can include an insulated-gate bipolar transistor (IGBT) and the second die can include a diode. A temperature sensor can be situated adjacent to, over, or within the groove for measuring a temperature of the dual compartment semiconductor package. | 05-15-2014 |
20140138737 | HIGH VOLTAGE MOSFET DIODE REVERSE RECOVERY BY MINIMIZING P-BODY CHARGES - This invention discloses a method for manufacturing a semiconductor power device in a semiconductor substrate comprises an active cell area and a termination area. The method comprises the steps of a) growing and patterning a field oxide layer in the termination area and also in the active cell area on a top surface of the semiconductor substrate b) depositing and patterning a polysilicon layer on the top surface of the semiconductor substrate at a gap distance away from the field oxide layer; c) performing a blank body dopant implant to form body dopant regions in the semiconductor substrate substantially aligned with the gap area followed by diffusing the body dopant regions into body regions in the semiconductor substrate; d) implanting high concentration body-dopant regions encompassed in and having a higher dopant concentration than the body regions e) applying a source mask to implant source regions having a conductivity opposite to the body region with the source regions encompassed in the body regions and surrounded by the high concentration body-dopant regions; and f) etching contact trenches into the source, body contact, and body regions. | 05-22-2014 |
20140138738 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a channel region, having: a first trench gate, in which a bottom end in a depth direction protrudes into a first drift region, and a non-channel region, having: a second trench gate, in which a bottom end in the depth direction protrudes into a second drift region, that is adjacent to the first trench gate, and protruding length of the second trench gate is shorter than the protruding length of the first trench gate that protrudes into the first drift region. | 05-22-2014 |
20140145241 | SEMICONDUCTOR DEVICE - The present invention implements an equivalent circuit to a semiconductor device for an upper arm by electrically connecting a terminal for E | 05-29-2014 |
20140159108 | METHOD OF FORMING AN ESD DEVICE AND STRUCTURE THEREFOR - In one embodiment, an ESD device is configured to include a trigger device that assists in forming a trigger of the ESD device. The trigger device is configured to enable a transistor or a transistor of an SCR responsively to an input voltage having a value that is no less than the trigger value of the ESD device. | 06-12-2014 |
20140159109 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate on which a diode region and an IGBT region are formed. The diode region of the semiconductor substrate includes a first conductive type specific semiconductor region that is formed in a portion of an area facing a front surface of the semiconductor substrate, a second conductive type anode region that is formed in another portion of the area facing the front surface of the semiconductor substrate and is formed along a lower side of the specific semiconductor region, and a first conductive type diode drift region that is formed on a lower side of the anode region. The specific semiconductor region is separated from the diode drift region by the anode region, and is electrically connected to the trench gate electrode. | 06-12-2014 |
20140167104 | INTERFACE PROTECTION DEVICE WITH INTEGRATED SUPPLY CLAMP AND METHOD OF FORMING THE SAME - Protection circuit architectures with integrated supply clamps and methods of forming the same are provided herein. In certain implementation, an integrated circuit interface protection device includes a first diode protection structure and a first thyristor protection structure electrically connected in parallel between a signal pin a power high supply. Additionally, the protection device includes a second diode protection structure and a second thyristor protection structure electrically connected in parallel between the signal pin and a power low supply. Furthermore, the protection device includes a third diode protection structure and a third thyristor protection structure electrically connected in parallel between the power high supply and the power low supply. The third thyristor protection structure and the third diode protection structure are synthesized as part of the integrated circuit interface and can share at least a portion of the wells and/or diffusion regions associated with the first and second thyristor protection structures. | 06-19-2014 |
20140167105 | DEVICES FOR MONOLITHIC DATA CONVERSION INTERFACE PROTECTION AND METHODS OF FORMING THE SAME - Apparatus and methods for monolithic data conversion interface protection are provided herein. In certain implementations, a protection device includes a first silicon controlled rectifier (SCR) and a first diode for providing protection between a signal node and a power high supply node, a second SCR and a second diode for providing protection between the signal node and a power low supply node, and a third SCR and a third diode for providing protection between the power high supply node and the power low supply node. The SCR and diode structures are integrated in a common circuit layout, such that certain wells and active regions are shared between structures. Configuring the protection device in this manner enables in-suit input/output interface protection using a single cell. The protection device is suitable for monolithic data conversion interface protection in sub 3V operation. | 06-19-2014 |
20140175508 | SEMICONDUCTOR DEVICE WITH SCHOTTKY BARRIER DIODE - A semiconductor device includes a first conductivity-type drift region including an exposed portion, a plurality of second conductivity-type body regions, a first conductivity-type source region, a gate portion and a Schottky electrode. The drift region is defined in a semiconductor layer, and the exposed portion exposes on a surface of the semiconductor layer. The body regions are disposed on opposite sides of the exposed portion. The source region is separated from the drift region by the body region. The gate portion is disposed to oppose the body region. The exposed portion is formed with a groove, and the Schottky electrode is disposed in the groove. The Schottky electrode has a Schottky contact with the exposed portion. | 06-26-2014 |
20140191282 | SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device includes a base layer, a second conductivity type semiconductor layer, a first insulating film, and a first electrode. The first insulating film is provided on an inner wall of a plurality of first trenches extending from a surface of the second conductivity type semiconductor layer toward the base layer side, but not reaching the base layer. The first electrode is provided in the first trench via the first insulating film, and provided in contact with a surface of the second conductivity type semiconductor layer. The second conductivity type semiconductor layer includes a first second conductivity type region, and a second second conductivity type region. The first second conductivity type region is provided between the first trenches. The second second conductivity type region is provided between the first second conductivity type region and the base layer, and between a bottom part of the first trench and the base layer. The second second conductivity type region is smaller in a quantity of second conductivity type impurities than the first second conductivity type region. | 07-10-2014 |
20140209972 | SEMICONDUCTOR DEVICE - In a semiconductor device, gate electrodes in a first group are connected with a first gate pad and gate electrodes in a second group are connected with a second gate pad. The gate electrodes in the first group and the gate electrodes in the second group are controllable independently from each other through the first gate pad and the second gate pad. When turning off, after a turn-off voltage with which an inversion layer is not formed is applied to the gate electrodes in the second group, a turn-off voltage with which an inversion layer is not formed is applied to the gate electrodes in the first group. | 07-31-2014 |
20140217465 | SEMICONDUCTOR DEVICE - A semiconductor device in which a diode region and an IGBT region are formed on a same semiconductor substrate is provided. The diode region includes a plurality of first conductivity type anode layers exposed to a surface of the semiconductor substrate and separated from each other. The IGBT region includes a plurality of first conductivity type body contact layers that are exposed to the surface of the semiconductor substrate and separated from each other. The anode layer includes at least one or more of the first anode layers. The first anode layer is formed in a position in the proximity of at least IGBT region, and an area of a plane direction of the semiconductor substrate in each of the first anode layers is larger than the area of a plane direction of the semiconductor substrate in the body contact layer in the closest proximity of the diode region. | 08-07-2014 |
20140217466 | SEMICONDUCTOR DEVICE - An n-type region encloses an n-type well region is disclosed in which is disposed a high-side drive circuit. A high resistance polysilicon thin film configuring a resistive field plate structure of a high breakdown voltage junction termination region is disposed in spiral form on the n-type region. An OUT electrode, a ground electrode, and a Vcc | 08-07-2014 |
20140231867 | DIODE AND SEMICONDUCTOR DEVICE INCLUDING BUILT-IN DIODE - A diode is provided with a pillar region formed so as to extend between a barrier region and an anode electrode, contact the barrier region, and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region; and a barrier height adjusting region formed so as to be located between the pillar region and the anode electrode, and contact the pillar region and the anode electrode. The barrier height adjusting region includes at least one component selected from the group consisting of a second conductivity type semiconductor having a concentration lower than that of an anode region, the first conductivity type semiconductor having a concentration lower than that of the pillar region, and an i-type semiconductor. The barrier height adjusting region and the anode electrode are connected through a Schottky junction. | 08-21-2014 |
20140252409 | Circuit Including a Switching Element, a Rectifying Element, and a Charge Storage Element - A circuit can include a pair of switching elements that have terminals electrically connected to terminals of a power supply and have other terminals electrically connected to an output terminal. The circuit can include rectifying elements and one or more charge storage elements. The circuit may be used as a Buck converter. The rectifying element(s) and charge storage element(s) may help to reduce ringing at an output terminal of the circuit during normal operation and reduce the likelihood of exceeding a breakdown voltage between current-carrying electrodes of a switching element within the circuit during a switching operation. | 09-11-2014 |
20140264434 | MONOLITHIC IGNITION INSULATED-GATE BIPOLAR TRANSISTOR - In a general aspect, an apparatus can include an insulated-gate bipolar transistor (IGBT) device disposed in a semiconductor region. The apparatus can further include a plurality of clamping diodes. The plurality of clamping diodes can be coupled in series between a collector terminal of the IGBT device and a gate terminal of the IGBT device. The apparatus can also include a gate pad disposed over at least a portion of the plurality of clamping diodes. The at least a portion of the plurality of clamping diodes can be configured, during operation of the apparatus, to have a voltage of at least 120 V applied across them. | 09-18-2014 |
20140284658 | SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device includes a first and second electrode, a first, second, third and fourth semiconductor region, and a first intermediate metal film. The first region is provided above the first electrode and has a first impurity concentration. The second region is provided above the first region and has a second impurity concentration lower than the first impurity concentration. The third region is provided above the second region and has a third impurity concentration. The fourth region is provided above the second region and has a fourth impurity concentration lower than the third impurity concentration. The second electrode is provided above the third region and the fourth region and is in ohmic contact with the third region. The intermediate metal film is provided between the second electrode and the fourth region. The intermediate metal film forms Schottky junction with the fourth region. | 09-25-2014 |
20140291724 | Insulated Gate Bipolar Transistor Including Emitter Short Regions - A semiconductor device includes an IGBT having a semiconductor body including a transistor cell array in a first area. A junction termination structure is in a second area surrounding the transistor cell array at a first side of the semiconductor body. An emitter region of a first conductivity type is at a second side of the semiconductor body opposite the first side. The device further includes a diode. One of the diode anode and cathode includes the body region. The other one of the anode and the cathode includes a plurality of distinct first emitter short regions of a second conductivity type at the second side facing the transistor cell array, and at least one second emitter short region of the second conductivity type at the second side facing the junction termination structure. The at least one second emitter short region is distinct from the first emitter short regions. | 10-02-2014 |
20140299916 | MONOLITHIC CELL FOR AN INTEGRATED CIRCUIT AND ESPECIALLY A MONOLITHIC SWITCHING CELL - A cell includes at least two semiconductor structures of the same nature, these two structures both employing voltages and currents that are unidirectional, each structure having an anode ( | 10-09-2014 |
20140306266 | HIGH-CURRENT N-TYPE SILICON-ON-INSULATOR LATERAL INSULATED-GATE BIPOLAR TRANSISTOR - A high-current, N-type silicon-on-insulator lateral insulated-gate bipolar transistor, including: a P-type substrate, a buried-oxide layer disposed on the P-type substrate, an N-type epitaxial layer disposed on the oxide layer, and an N-type buffer trap region. A P-type body region and an N-type central buffer trap region are disposed inside the N-type epitaxial layer; a P-type drain region is disposed in the buffer trap region; N-type source regions and a P-type body contact region are disposed in the P-type body region; an N-type base region and a P-type emitter region are disposed in the buffer trap region; gate and field oxide layers are disposed on the N-type epitaxial layer; polycrystalline silicon gates are disposed on the gate oxide layers; and a passivation layer and metal layers are disposed on the surface of the symmetrical transistor. P-type emitter region output and current density are improved without increasing the area of the transistor. | 10-16-2014 |
20140306267 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device including a semiconductor substrate in which a diode region and an IGBT region are formed is provided. In the semiconductor device, the diode region includes a second conductivity type cathode layer. An impurity concentration of second conductivity type impurities of the cathode layer is distributed in a curve pattern having at least two peaks, and the impurity concentration of the second conductivity type impurities is higher than that of first conductivity type impurities at all depths of the cathode layer. | 10-16-2014 |
20140332847 | Composite One-Piece IGBT Device and Producing Method Thereof - A composite one-piece IGBT power device is disclosed to solve a problem that existing devices' turning-on/off speed is not high enough. The composite one-piece IGBT device of the present invention comprises at least two IGBT devices. Drift regions of the at least two IGBT devices connect with each other and electrodes of the at least two IGBT devices are led out separately from each other. The composite one-piece IGBT device may also consist of four IGBT devices. The drift regions of the four IGBT devices connect with each other. The composite IGBT device may also be embodied as two IGBT devices connected with each other. One of the two IGBT devices acts as a primary switching device for switching a large current, and the other acts as an auxiliary device for accelerating the switching action of the primary switching device. The composite IGBT device of the present invention is formed through a producing method which adds a few steps such as forming grooves to the conventional IGBT manufacturing process. The present invention is inexpensive and easy to implement, and provides a benefit of further increasing an operating speed by using two or more IGBT devices which promote each other's turning-on/off speed. | 11-13-2014 |
20140339601 | DUAL-TUB JUNCTION-ISOLATED VOLTAGE CLAMP DEVICES FOR PROTECTING LOW VOLTAGE CIRCUITRY CONNECTED BETWEEN HIGH VOLTAGE INTERFACE PINS AND METHODS OF FORMING THE SAME - Dual-tub junction-isolated voltage clamp devices and methods of forming the same are provided herein. The voltage clamp device can provide junction-isolated protection to low voltage circuitry connected between first and second high voltage interface pins. In certain implementations, a voltage clamp device includes a PNPN protection structure disposed in a p-well, a PN diode protection structure disposed in an n-well positioned adjacent the p-well, a p-type tub surrounding the p-well and the n-well, and an n-type tub surrounding the p-type tub. The p-type tub and the n-type tub provide junction isolation, the p-type tub can be electrically floating, and the n-type tub can be electrically connected to the second pin. The first and second pins can operate at a voltage difference below the junction isolation breakdown, and the second pin can operate with higher voltage than the first pin. | 11-20-2014 |
20140361333 | SEMICONDUCTOR DEVICE - When a semiconductor substrate of a semiconductor device is viewed from above, an isolation region, an IGBT region, and a diode region are all formed adjacent to each other. A deep region that is connected to a body region and an anode region is formed in the isolation region. A drift region is formed extending across the isolation region, the IGBT region, and the diode region, inside the semiconductor substrate. A collector region that extends across the isolation region, the IGBT region and the diode region, and a cathode region positioned in the diode region, are formed in a region exposed on a lower surface of the semiconductor substrate. A boundary between the collector region and the cathode region is in the diode region, in a cross-section that cuts across a boundary between the isolation region and the diode region, and divides the isolation region and the diode region. The collector region formed in the isolation region has a higher dopant impurity concentration than the collector region in the IGBT region. | 12-11-2014 |
20140361334 | SEMICONDUCTOR DEVICE - In a semiconductor device including an IGBT and a freewheeling diode W≧2×L1/K | 12-11-2014 |
20140374795 | SEMICONDUCTOR SYSTEM FOR A CURRENT SENSOR IN A POWER SEMICONDUCTOR - A semiconductor system for a current sensor in a power semiconductor includes: on a substrate, a multiple arrangement of transistor cells having an insulated gate electrode, whose emitter terminals are connected in a first region via a first conductive layer to at least one output terminal and whose emitter terminals are connected in a second region via a second conductive layer to at least one sensor terminal, which is situated outside of a first cell region boundary, which encloses the transistor cells of the first region and the second region, a trench structure belonging to the first cell region boundary being developed between the transistor cells of the second region and the sensor terminal. | 12-25-2014 |
20150008481 | LATERAL POWER SEMICONDUCTOR TRANSISTORS - The invention generally relates to a lateral power semiconductor transistor for example in integrated circuits. In particular the invention relates to Lateral Insulated Gate Bipolar Transistors or other lateral bipolar devices such as PIN diodes. The invention also generally relates to a method of increasing switching speed of a lateral bipolar power semiconductor transistor. There is provided a lateral bipolar power semiconductor transistor comprising a first floating semiconductor region of the first conductivity type located laterally spaced to an anode/drain region and a second floating semiconductor region of the second conductivity type located laterally adjacent the first floating semiconductor region, and a floating electrode placed above and in direct contact to the first and second floating semiconductor regions. | 01-08-2015 |
20150014743 | IGBT with Emitter Electrode Electrically Connected with an Impurity Zone - An IGBT includes a semiconductor portion with IGBT cells. Each IGBT cell includes a source zone of a first conductivity type, a body zone of a second, complementary conductivity type, and a drift zone of the first conductivity type separated from the source zone by the body zone. An emitter electrode includes a main layer and an interface layer. The interface layer directly adjoins at least one of the body zone and a supplementary zone of the second conductivity type. A contact resistance between the semiconductor portion and the interface layer is higher than between the semiconductor portion and a material of the main layer. For example, the interface layer may reduce diode emitter efficiency and reverse recovery losses in IGBTs. | 01-15-2015 |
20150021658 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes an emitter electrode and a first field plate disposed on one surface of a substrate and spaced apart from each other, a collector electrode disposed on the other surface of the substrate, a trench gate disposed in the substrate, a field diffusion junction disposed in the substrate, and a first contact connecting the trench gate and the first field plate. The first field plate has a first part extending toward the emitter electrode with respect to the first contact and having a first width, and a second part extending toward the field diffusion junction with respect to the first contact and having a second width. The second width is greater than the first width. | 01-22-2015 |
20150028383 | Power MOS Transistor with Integrated Gate-Resistor - A transistor device comprises: at least one individual transistor cell arranged in a transistor cell field on a semiconductor body, each individual transistor cell comprising a gate electrode; a gate contact, electrically coupled to the gate electrodes of the transistor cells and configured to switch on the at least one transistor cell by providing a gate current in a first direction and configured to switch off the at least one transistor cell by providing a gate current in a second direction, the second direction being opposite to the first direction; at least one gate-resistor structure monolithically integrated in the transistor device, the gate-resistor structure providing a first resistance for the gate current when the gate current flows in the first direction, and providing a second resistance for the gate current, which is different from the first resistance, when the gate current flows in the second direction. | 01-29-2015 |
20150028384 | GaN TRANSISTORS WITH POLYSILICON LAYERS FOR CREATING ADDITIONAL COMPONENTS - A GaN transistor with polysilicon layers for creating additional components for an integrated circuit and a method for manufacturing the same. The GaN device includes an EPI structure and an insulating material disposed over EPI structure. Furthermore, one or more polysilicon layers are disposed in the insulating material with the polysilicon layers having one or more n-type regions and p-type regions. The device further includes metal interconnects disposed on the insulating material and vias disposed in the insulating material layer that connect source and drain metals to the n-type and p-type regions of the polysilicon layer. | 01-29-2015 |
20150035005 | MONOLITHIC IGBT AND DIODE STRUCTURE FOR QUASI-RESONANT CONVERTERS - This invention discloses a semiconductor power device formed in a semiconductor substrate. The semiconductor power device further includes a channel stop region near a peripheral of the semiconductor substrate wherein the channel stop region further includes a peripheral terminal of a diode corresponding with another terminal of the diode laterally opposite from the peripheral terminal disposed on an active area of the semiconductor power device. In an embodiment of this invention, the semiconductor power device is an insulated gate bipolar transistor (IGBT). | 02-05-2015 |
20150035006 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A semiconductor device includes a first-conductivity-type semiconductor layer including an active region in which a transistor having impurity regions is formed and a marginal region surrounding the active region, a second-conductivity-type channel layer formed between the active region and the marginal region and forming a front surface of the semiconductor layer, at least one gate trench formed in the active region to extend from the front surface of the semiconductor layer through the channel layer, a gate insulation film formed on an inner surface of the gate trench, a gate electrode formed inside the gate insulation film in the gate trench, and at least one isolation trench arranged between the active region and the marginal region to surround the active region and extending from the front surface of the semiconductor layer through the channel layer, the isolation trench having a depth equal to that of the gate trench. | 02-05-2015 |
20150041849 | IGNITION CONTROL SHORT CIRCUIT PROTECTION - In a general aspect, an apparatus can include an insulated-gate bipolar transistor device (IGBT), a gate driver circuit (driver) coupled with a gate terminal of the IGBT and a low-resistance switch device coupled between an emitter terminal of the IGBT and an electrical ground terminal, the low-resistance switch device being coupled with the electrical ground terminal via a resistor. The apparatus can also include a current sensing circuit coupled with the driver and a current sense signal line coupled with the current sensing circuit and a current sense node, the current sense node being disposed between the low-resistance switch device and the resistor. The apparatus can further include a control circuit configured, when the driver is off, to detect, based on a voltage on the current sense node, when a current through the resistor is above a threshold value and disable the IGBT in response to the detection. | 02-12-2015 |
20150041850 | SEMICONDUCTOR DEVICE HAVING SWITCHING ELEMENT AND FREE WHEEL DIODE AND METHOD FOR CONTROLLING THE SAME - A semiconductor device includes a switching element having: a drift layer; a base region; an element-side first impurity region in the base region; an element-side gate electrode sandwiched between the first impurity region and the drift layer; a second impurity region contacting the drift layer; an element-side first electrode coupled with the element-side first impurity region and the base region; and an element-side second electrode coupled with the second impurity region, and a FWD having: a first conductive layer; a second conductive layer; a diode-side first electrode coupled to the second conductive layer; a diode-side second electrode coupled to the first conductive layer; a diode-side first impurity region in the second conductive layer; and a diode-side gate electrode in the second conductive layer sandwiched between first impurity region and the first conductive layer and having a first gate electrode as an excess carrier injection suppression gate. | 02-12-2015 |
20150060939 | SCR WITH FIN BODY REGIONS FOR ESD PROTECTION - An electrostatic discharge protection circuit is disclosed. A method of manufacturing a semiconductor structure includes forming a semiconductor controlled rectifier including a first plurality of fingers between an n-well body contact and an anode in an n-well, and a second plurality of fingers between a p-well body contact and a cathode in a p-well. | 03-05-2015 |
20150060940 | ELECTRONIC DEVICE - An improvement is achieved in the performance of an electronic device. A first semiconductor device and a second semiconductor device are mounted over the upper surface of a wiring board such that, e.g., in plan view, the orientation of the second semiconductor device intersects the orientation of the first semiconductor device. That is, the first semiconductor device is mounted over the upper surface of the wiring board such that a first emitter terminal and a first signal terminal are arranged along an x-direction in which the pair of shorter sides of the wiring board extend. On the other hand, the second semiconductor device is mounted over the upper surface of the wiring board such that a second emitter terminal and a second signal terminal are arranged along a y-direction in which the pair of longer sides of the wiring board extend. | 03-05-2015 |
20150091054 | SCRs with Checker Board Layouts - An Electro-Static Discharge (ESD) protection circuit includes a plurality of groups of p-type heavily doped semiconductor strips (p+ strips) and a plurality of groups of n-type heavily doped semiconductor strips (n+ strips) forming an array having a plurality of rows and columns. In each of the rows and the columns, the plurality of groups of p+ strips and the plurality of groups of n+ strips are allocated in an alternating layout. The ESD protection circuit further includes a plurality of gate stacks, each including a first edge aligned to an edge of a group in the plurality of groups of p+ strips, and a second edge aligned to an edge of a group in the plurality of groups of n+ strips. | 04-02-2015 |
20150102383 | POWER DEVICE CASSETTE WITH AUXILIARY EMITTER CONTACT - A press pack module includes a collector module terminal, an emitter module terminal, a gate module terminal, and an auxiliary module terminal. Each IGBT cassette within the module includes a set of shims, two contact pins, and an IGBT die. The first contact pin provides part of a first electrical connection between the gate module terminal and the IGBT gate pad. The second contact pin provides part of a second electrical connection between the auxiliary module terminal and a shim that in turn contacts the IGBT emitter pad. The electrical connection between the auxiliary emitter terminal and each emitter pad of the many IGBTs is a balanced impedance network. The balanced network is not part of the high current path through the module. By supplying a gate drive signal between the gate and auxiliary emitter terminals, simultaneous IGBT turn off in high speed and high current switching conditions is facilitated. | 04-16-2015 |
20150115315 | High Voltage Semiconductor Power Switching Device - A three terminal high voltage Darlington bipolar transistor power switching device includes two high voltage bipolar transistors, with collectors connected together serving as the collector terminal. The base of the first high voltage bipolar transistor serves as the base terminal. The emitter of the first high voltage bipolar transistor connects to the base of the second high voltage bipolar transistor (inner base), and the emitter of the second high voltage bipolar transistor serves as the emitter terminal. A diode has its anode connected to the inner base (emitter of the first high voltage bipolar transistor, or base of the second high voltage bipolar transistor), and its cathode connected to the base terminal. Similarly, a three terminal hybrid MOSFET/bipolar high voltage switching device can be formed by replacing the first high voltage bipolar transistor of the previous switching device by a high voltage MOSFET. | 04-30-2015 |
20150115316 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a drift layer having a first conduction type; a base layer having a second conduction type and formed on the drift layer; an emitter layer having the first conduction type and formed in a surface layer portion of the base layer; a buffer layer having the first conduction type and formed in the drift layer separated from the base layer; a collector layer having the second conduction type and formed selectively in the buffer layer; a gate insulation film in contact with a channel region of the base layer between the drift layer and the emitter layer; a gate electrode formed on the gate insulation film; a first electrode electrically connected to the base layer and the emitter layer; and a second electrode electrically connected to the buffer layer and the collector layer. The buffer layer has a carrier density smaller than a space charge density. | 04-30-2015 |
20150129929 | Semiconductor Device - A semiconductor device is provided that includes a composite semiconductor body including a high voltage depletion-mode transistor and a low voltage enhancement-mode transistor. The high voltage depletion-mode transistor is stacked on the low voltage enhancement-mode transistor so that an interface is formed between the high voltage depletion-mode transistor and the low voltage enhancement-mode transistor. The low voltage enhancement-mode transistor includes a current path coupled in series with a current path of the high voltage depletion-mode transistor, and a control electrode is arranged at the interface. | 05-14-2015 |
20150295042 | SEMICONDUCTOR DEVICE - The present application discloses a semiconductor device in which an IGBT region and a diode region are formed on one semiconductor substrate. The IGBT region includes: a collector layer; an IGBT drift layer; a body layer; a gate electrode; and an emitter layer. The diode region includes: a cathode layer; a diode drift layer; an anode layer; a trench electrode; and an anode contact layer. The diode region is divided into unit diode regions by the gate electrode or the trench electrode. In a unit diode region adjacent to the IGBT region, when seen in a plan view of the front surface of the semiconductor substrate, the anode layer and the anode contact layer are mixedly placed, and the anode contact layer is placed at least in a location opposite to the emitter layer with the gate electrode interposed therebetween. | 10-15-2015 |
20150303190 | Semiconductor Device Having an Insulated Gate Bipolar Transistor Arrangement and a Method for Forming Such a Semiconductor Device - A semiconductor device includes an insulated gate bipolar transistor (IGBT) arrangement. The IGBT arrangement includes a carrier confinement reduction region laterally arranged between a cell region and a sensitive region. The IGBT arrangement is configured or formed so that the cell region has a first average density of free charge carriers in an on-state of the IGBT arrangement, the carrier confinement reduction region has a second average density of free charge carriers in the on-state of the IGBT arrangement and the sensitive region has a third average density of free charge carriers in the on-state of the IGBT arrangement. The first average density of free charge carriers is larger than the second average density of free charge carriers and the second average density of free charge carriers is larger than the third average density of free charge carriers. | 10-22-2015 |
20150318277 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes: a semiconductor layer; a first doped well region disposed in a portion of the semiconductor layer; a first doped region disposed in the first doped well region; a second doped well region of an asymmetrical cross-sectional profile disposed in another portion of the semiconductor layer; second, third, and fourth doped regions formed in the second doped well region; a first gate structure disposed over a portion of the semiconductor layer, practically covering the second doped well region; and a second gate structure embedded in a portion of the semiconductor layer, penetrating a portion of the second doped well region. | 11-05-2015 |
20150318385 | SEMICONDUCTOR DEVICE - A first semiconductor device presented by the specification includes a semiconductor substrate that includes an anode region and a cathode region. The anode region includes a first conductivity type first region having a maximum impurity concentration of the first conductivity type at a position that is at a first depth from a surface of the semiconductor substrate and a first conductivity type second region having a maximum impurity concentration of the first conductivity type at a position that is at a second depth, and on a surface side of the semiconductor substrate than the first depth, and a third region provided between the first region and the second region, and having an impurity concentration of the first conductivity type that is equal to or less than 1/10 (one-tenth) of a impurity concentration of the surface of the semiconductor substrate. | 11-05-2015 |
20150325570 | HIGH VOLTAGE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A high voltage semiconductor device is provided, comprising a high voltage metal-oxide-semiconductor transistor (HVMOS), and a normally-on low voltage metal-oxide-semiconductor transistor (LVMOS) electrically connected to the HVMOS. The HVMOS has a first collector and a first emitter, and the LVMOS has a second collector and a second emitter, wherein the second collector of the LVMOS is electrically connected to the first emitter of the HVMOS. The LVMOS electrically connected to the HVMOS provides an electro-static discharge bipolar transistor (ESD BJT), such as a NPN-type ESD BJT. | 11-12-2015 |
20150380396 | SCRs with Checker Board Layouts - An Electro-Static Discharge (ESD) protection circuit includes a plurality of groups of p-type heavily doped semiconductor strips (p+ strips) and a plurality of groups of n-type heavily doped semiconductor strips (n+ strips) forming an array having a plurality of rows and columns. In each of the rows and the columns, the plurality of groups of p+ strips and the plurality of groups of n+ strips are allocated in an alternating layout. The ESD protection circuit further includes a plurality of gate stacks, each including a first edge aligned to an edge of a group in the plurality of groups of p+ strips, and a second edge aligned to an edge of a group in the plurality of groups of n+ strips. | 12-31-2015 |
20150380401 | SEMICONDUCTOR DEVICE - A semiconductor device includes a first element portion including an IGBT and a second element portion including a circuit that controls the IGBT on the same semiconductor substrate. The novel structure reduces the size of the entire circuit and includes a drift region on a front surface of the substrate; a region in a surface layer of the drift region which is opposite to the substrate; an insulator layer that passes through the region in a depth direction and reaches the drift region, the insulator layer provided at a boundary between the first and second element portions, and separating the region into a first region in the first element portion and having the emitter potential of the IGBT and a second region in the second element portion; and a first contact electrode that contacts the second region, and that is electrically connected to an emitter electrode of the IGBT. | 12-31-2015 |
20150380534 | Power Semiconductor Device And Corresponding Module - Power semiconductor device having a wafer, including emitter and collector electrodes arranged on opposite sides, wherein a gate electrode arranged on the emitter side has a conductive gate layer and an insulating layer arranged in the following order between the collector and emitter side: a p doped collector layer, an (n−) doped drift layer, an n doped enhancement layer, a p based base layer having a first and second base region, and an (n+) doped first and second emitter layer, wherein the emitter electrode contacts the first emitter layer and the first base region at an emitter contact area, wherein the second emitter layer is insulated from a direct contact to the emitter electrode by the insulating layer and wherein the second emitter layer is separated from the first emitter layer by the base layer. | 12-31-2015 |
20160005844 | SEMICONDUCTOR DEVICE - A semiconductor device in which an IGBT region and a diode region are formed on one semiconductor substrate is disclosed. The IGBT region includes: a body layer of a first conductivity type that is formed on a front surface of the semiconductor substrate; a body contact layer of the first conductivity type that is partially formed on a front surface of the body layer and has a higher impurity concentration of the first conductivity type than the body layer; an emitter layer of a second conductivity type that is partially formed on the front surface of the body layer; a drift layer; a collector layer; and a gate electrode. In the semiconductor device, a part of the body contact layer placed at a long distance from the diode region is made larger than a part of the body contact layer placed at a short distance from the diode region. | 01-07-2016 |
20160013163 | ELECTRONIC DEVICE | 01-14-2016 |
20160027867 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor layer having a first p-type semiconductor region at a first surface and a first n-type semiconductor region at a second surface opposite the first. A second n-type semiconductor region having a n-type dopant concentration lower than the first n-type semiconductor region is between the first p-type and first n-type semiconductor regions. A third n-type semiconductor region is disposed between the second n-type semiconductor region and the first p-type semiconductor region. a fourth n-type semiconductor region is disposed between the first n-type semiconductor region and the second n-type semiconductor region. The fourth n-type semiconductor region has a stored carrier lifetime longer than the third n-type semiconductor region and a crystal lattice defect level is higher in the third n-type semiconductor than in the fourth n-type semiconductor region. An anode is disposed on the first surface and a cathode is disposed on the second surface. | 01-28-2016 |
20160035867 | Reverse-Conducting IGBT - A reverse-conducting IGBT includes a semiconductor body having a drift region arranged between first and second surfaces. The semiconductor body further includes first collector regions arranged at the second surface and in Ohmic contact with a second electrode, backside emitter regions and in Ohmic contact with the second electrode. In a horizontal direction substantially parallel to the first surface, the first collector regions and backside emitter regions define an rc-IGBT area. The semiconductor body further includes a second collector region of the second conductivity type arranged at the second surface and in Ohmic contact with the second electrode. The second collector region defines in the horizontal direction a pilot-IGBT area. The rc-IGBT area includes first semiconductor regions in Ohmic contact with the first electrode and arranged between the drift region and first electrode. The pilot-IGBT area includes second semiconductor regions of the same conductivity type as the first semiconductor regions. | 02-04-2016 |
20160035869 | SEMICONDUCTOR DEVICE - A semiconductor device formed on a substrate of a first conductivity type, including a base layer of a second conductivity disposed on a first face of the substrate, an anode layer with a higher dopant amount in a portion of the base layer, an IGBT region formed on the base layer, a diode region formed on the anode layer, a trench extending from the top of the IGBT and diode regions in to the substrate. The area occupied by the diode region is different from the area occupied by the IGBT region, but they share collector and emitter electrodes. The contact area between the diode anode layer and the emitter electrode may be adjusted by the arrangement of trenches. | 02-04-2016 |
20160043073 | SEMICONDUCTOR DEVICE - An IGBT is disposed in an IGBT portion, and an FWD is disposed in an FWD portion. A p-type base region and an n | 02-11-2016 |
20160071841 | IGBT WITH A BUILT-IN-DIODE - When an IGBT has a barrier layer | 03-10-2016 |
20160079235 | SEMICONDUCTOR DEVICE - A semiconductor device includes first electrode, first semiconductor layer of first conductivity type on the first electrode, second semiconductor layer of second conductivity type on the first semiconductor layer, third semiconductor layer of the first conductivity type on second semiconductor layer, fourth semiconductor layer of the second conductivity type selectively located on the third semiconductor layer, gate electrode through the third and fourth semiconductor layers and into the second semiconductor layer and insulated therefrom, second electrode on the fourth semiconductor layer, fifth semiconductor layer of the second conductivity type between the first electrode and the second semiconductor layer, sixth semiconductor layer of the first conductivity type on the second semiconductor layer contacting the second electrode, and seventh semiconductor layer of the first conductivity type in the second and sixth semiconductor layers, such that the bottom thereof is closer to the first electrode than the bottom of the gate insulating film. | 03-17-2016 |
20160079236 | SEMICONDUCTOR DEVICE - A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a fourth semiconductor region of the first conductivity type, a fifth semiconductor region of the first conductivity type provided on the third semiconductor region and the fourth semiconductor region, and a sixth semiconductor region of the second conductivity type. The third semiconductor region is provided on the first semiconductor region and has a dopant concentration that is lower than a dopant concentration of the first semiconductor region. The fourth semiconductor region is provided on the second semiconductor region adjacent to the third semiconductor region. A dopant contained in the fourth semiconductor region extends to a level that is deeper than a level of a dopant contained in the third semiconductor region. | 03-17-2016 |
20160079238 | Semiconductor Device with Field Electrode Structures, Gate Structures and Auxiliary Diode Structures - A semiconductor device includes field electrode structures extending in a direction vertical to a first surface in a semiconductor body. Cell mesas are formed from portions of the semiconductor body between the field electrode structures and include body zones that form first pn junctions with a drift zone. Gate structures between the field electrode structures control a current flow through the body zones. Auxiliary diode structures with a forward voltage lower than the first pn junctions are electrically connected in parallel with the first pn junctions, wherein semiconducting portions of the auxiliary diode structures are formed in the cell mesas. | 03-17-2016 |
20160079369 | SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device includes first and second electrodes, and a first semiconductor region provided between the first and second electrodes. A first element region includes a second semiconductor region provided between the first semiconductor region and the first electrode, a third semiconductor region provided between the first semiconductor region and the second electrode, a fourth semiconductor region provided between the third semiconductor region and the second electrode, and a third electrode provided in the first, third and fourth semiconductor regions. A second element region includes a fifth semiconductor region provided between the first semiconductor region and the first electrode, and a sixth semiconductor region provided between the first semiconductor region and the second electrode. An isolation region includes a seventh semiconductor region provided between the first semiconductor region and the second electrode. The isolation region is positioned between the first and second element regions. | 03-17-2016 |
20160086941 | SEMICONDUCTOR DEVICE - A semiconductor device includes: an FET structure that is formed next to a looped trench on a semiconductor substrate and that has an n | 03-24-2016 |
20160093725 | SEMICONDUCTOR DEVICE - In the reverse-conducting IGBT according to the present invention, an n-type buffer layer surrounds a p-type collector layer. A p-type separation layer surrounds an n-type cathode layer. The n-type buffer layer separates the p-type collector layer and the p-type separation layer from each other. The p-type separation layer separates the n-type cathode layer and the n-type buffer layer from each other. Therefore, the present invention makes it possible to reduce snapback. | 03-31-2016 |
20160099242 | SEMICONDUCTOR DEVICE EMPLOYING TRENCHES FOR ACTIVE GATE AND ISOLATION - A semiconductor device includes a semiconductor layer of a first conductivity type formed on a substrate; a first trench formed in the semiconductor layer including a first trench gate; a second trench formed in the semiconductor layer and extending into the substrate and including a second trench gate; a first transistor device formed in the semiconductor layer adjacent the first trench. The second trench encircles active area of the first transistor device to provide electrical isolation of the first transistor device. | 04-07-2016 |
20160111414 | SCR WITH FIN BODY REGIONS FOR ESD PROTECTION - An electrostatic discharge protection circuit is disclosed. A method of manufacturing a semiconductor structure includes forming a semiconductor controlled rectifier including a first plurality of fingers between an n-well body contact and an anode in an n-well, and a second plurality of fingers between a p-well body contact and a cathode in a p-well. | 04-21-2016 |
20160111415 | Insulated Gate Bipolar Transistor Comprising Negative Temperature Coefficient Thermistor - An embodiment of an IGBT comprises an emitter terminal at a first surface of a semiconductor body. The IGBT further comprises a collector terminal at a second surface of the semiconductor body. A first zone of a first conductivity type is in the semiconductor body between the first and second surfaces. A collector injection structure adjoins the second surface, the collector injection structure being of a second conductivity type and comprising a first part and a second part at a first lateral distance from each other. The IGBT further comprises a negative temperature coefficient thermistor adjoining the first zone in an area between the first and second parts. | 04-21-2016 |
20160111419 | SEMICONDUCTOR DEVICE - In order to realize an SJ-MOSFET and an IGBT on a single chip and realize a new arrangement configuration for an SJ-MOSFET section and an IGBT section in a single semiconductor chip, provided is a semiconductor device including a semiconductor substrate; two or more super-junction transistor regions provided on the semiconductor substrate; and one or more IGBT regions that are provided in regions sandwiched by the two or more super-junction transistor regions, in a cross section obtained by cleaving along a pane perpendicular to the semiconductor substrate. | 04-21-2016 |
20160126156 | SEMICONDUCTOR DEVICE - A ground working tool comprising a tubular base body with an inner receiving space for receiving a cylindrical core of solid ground material, connector mechanism for connecting the tubular base body with a rotary drive and locking mechanism for locking the core in the receiving space of the tubular base body. The locking mechanism involves at least one locking unit having a guide rail being disposed at an inner side of the tubular base body and arranged with a deviation angle relative to a tangential direction of the tubular base body and the locking unit further comprises at least one locking element, which is moveably mounted on the guide rail between a radially outer releasing position and a radially inner locking position, in which the core is clamped within the receiving space by means of the at least one locking element. | 05-05-2016 |
20160126168 | SEMICONDUCTOR DEVICE - A first switching element and a second switching element are thermally connected to each other since the first switching element and the second switching element are fixed on a second substrate. An upper arm is capable of increasing the current capacity of the semiconductor device because of the parallel connection of the first switching element and the second switching element. The lower arm is capable of increasing the current capacity of the semiconductor device because of the parallel connection of the first switching element and the second switching element. | 05-05-2016 |
20160133620 | Power Semiconductor Device with Temperature Protection - A temperature protected power semiconductor device has a substrate which includes a power field effect transistor (FET) and a thermosensitive element. The power FET has a gate electrode connected to a gate, a drift region, and first and second terminals for a load current. The load current is controllable during operation by a voltage applied between the gate and the first terminal. The thermosensitive element has a first contact connected to one of the gate electrode and first terminal of the power FET, and a second contact connected to the other one of the gate electrode and first terminal. The thermosensitive element is located close to the power FET and thermally coupled thereto. The thermosensitive element is configured to cause the power FET to reduce the load current in case of an exceedance of a limit temperature of the power FET, by interconnecting the gate and first terminal. | 05-12-2016 |
20160141284 | SEMICONDUCTOR DEVICE - A transistor ( | 05-19-2016 |
20160141400 | SEMICONDUCTOR DEVICE - A semiconductor device is configured such that the distance between the trench gate in the IGBT and the trench gate in the diode is reduced or a p-well layer is provided between the trench gate in the IGBT and the trench gate in the diode. | 05-19-2016 |
20160163615 | SEMICONDUCTOR DEVICE - For example, a semiconductor device has a lead connected to a second portion of a chip mounting part on which a semiconductor chip to be a heat source is mounted and a lead connected to a third portion of the chip mounting part on which the semiconductor chip to be the heat source is mounted. Further, each of the leads has a protruding portion protruding from a sealing member. In this manner, it is possible to enhance a heat dissipation characteristic of the semiconductor device. | 06-09-2016 |
20160163654 | SEMICONDUCTOR DEVICE - In a back surface hole injection type diode, by more effectively securing the effect of hole injection from the back surface of a semiconductor substrate, the performance of a semiconductor device is improved. In the semiconductor device, in a diode formed of a P-N junction including an anode P-type layer formed in the main surface of a semiconductor substrate and a back surface N | 06-09-2016 |
20160163696 | POWER SEMICONDUCTOR DEVICE - Switching loss is reduced. A first surface of a semiconductor substrate has a portion included in an IGBT region and a portion included in a diode region. Trenches formed in the first surface include a gate trench and a boundary trench disposed between the gate trench and the diode region. A fourth layer of the semiconductor substrate is provided on the first surface and has a portion included in the diode region. The fourth layer includes a trench-covering well region that covers the deepest part of the boundary trench, a plurality of isolated well regions, and a diffusion region that connects the trench-covering well region and the isolated well regions. The diffusion region has a lower impurity concentration than that of the isolated well regions. A first electrode is in contact with the isolated well regions and away from the diffusion region. | 06-09-2016 |
20160190123 | Semiconductor Device with Transistor Cells and Enhancement Cells - A semiconductor device includes transistor cells and enhancement cells. Each transistor cell includes a body zone that forms a first pn junction with a drift structure. The transistor cells may form, in the body zones, inversion channels when a first control signal exceeds a first threshold. The inversion channels form part of a connection between the drift structure and a first load electrode. A delay unit generates a second control signal which trailing edge is delayed with respect to a trailing edge of the first control signal. The enhancement cells form inversion layers in the drift structure when the second control signal falls below a second threshold lower than the first threshold. The inversion layers are effective as minority charge carrier emitters. | 06-30-2016 |
20160254373 | SURFACE DEVICES WITHIN A VERTICAL POWER DEVICE | 09-01-2016 |
20160254374 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | 09-01-2016 |
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