Class / Patent application number | Description | Number of patent applications / Date published |
257064000 | Non-single crystal, or recrystallized, material with specified crystal structure (e.g., specified crystal size or orientation) | 37 |
20080217622 | Novel, semiconductor-based, large-area, flexible, electronic devices - Novel articles and methods to fabricate the same resulting in flexible, large-area, triaxially textured, single-crystal or single-crystal-like, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices. | 09-11-2008 |
20080258147 | SEMICONDUCTOR DEVICE FORMING METHOD - In thin film transistors (TFTs) having an active layer of crystalline silicon adapted for mass production, a catalytic element is introduced into doped regions of an amorphous silicon film by ion implantation or other means. This film is crystallized at a temperature below the strain point of the glass substrate. Further, a gate insulating film and a gate electrode are formed. Impurities are introduced by a self-aligning process. Then, the laminate is annealed below the strain point of the substrate to activate the dopant impurities. On the other hand, Neckel or other element is also used as a catalytic element for promoting crystallization of an amorphous silicon film. First, this catalytic element is applied in contact with the surface of the amorphous silicon film. The film is heated at 450 to 650° C. to create crystal nuclei. The film is further heated at a higher temperature to grow the crystal grains. In this way, a crystalline silicon film having improved crystallinity is formed. | 10-23-2008 |
20080265255 | Semiconductor-based, large-area, flexible, electronic devices on <100> oriented substrates - Novel articles and methods to fabricate the same resulting in flexible, oriented, semiconductor-based, electronic devices on {110}<100> textured substrates are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices. | 10-30-2008 |
20080290344 | Image Display Device And Method For Manufacturing The Same - An image display device manufactured by using a polycrystalline semiconductor film. The polycrystalline semiconductor film is composed of crystal grains with a region free from crystal grain boundaries of at least 2 μm in width and at least 3 μm in length, small crystal grain boundary groups each composed of three or more crystal grain boundaries arranged substantially in parallel to each other and with an interval of not greater than 100 μm are included in a part of the region, and the small crystal grain boundary groups are partially eliminated. | 11-27-2008 |
20090026458 | POROUS SEMICONDUCTIVE FILM AND PROCESS FOR ITS PRODUCTION - The present invention provides a porous semiconductive structure, characterized in that the structure has an electrical conductivity of 5·10 | 01-29-2009 |
20090057677 | FERROELECTRIC DEVICE AND METHOD FOR FABRICATING THE SAME - A method for fabricating a ferroelectric device includes Step S | 03-05-2009 |
20090078940 | Location-controlled crystal seeding - A structure with location-controlled crystallization of an active semiconductor film using a crystal seed has been provided, along with an associated fabrication method. The method forms a first semiconductor film overlying a substrate having a crystallographic orientation. Typically, the structure is polycrystalline or single-crystal. The first semiconductor film is selectively etched, forming a seed region. An insulator is formed with an opening, exposing the seed region. An amorphous second semiconductor film is formed over the insulator layer. The second semiconductor film is laser annealed, partially melting the seed region. Crystal grains are laterally grown in the second semiconductor film having the same crystallographic orientation as the seed region. In TFT fabrication an etching is typically performed to remove the second semiconductor film overlying the seed region, and a transistor active region is formed in the remaining second semiconductor film. | 03-26-2009 |
20090121231 | THIN FILM TRANSISTORS, METHOD OF FABRICATING THE SAME, AND ORGANIC LIGHT-EMITTING DIODE DEVICE USING THE SAME - Aspects of the invention relate to thin film transistors, a method of fabricating the same, and an organic light-emitting diode device using the same. A thin film transistor according to an aspect of the invention includes a semiconductor layer formed from polysilicon in which a grain size deviation is within a range of substantially ±10%. Accordingly, aspects of the invention can improve non-uniformity of image characteristics due to a non-uniform grain size in polysilicon produced by a sequential lateral solidification (SLS) crystallization process. | 05-14-2009 |
20090140255 | Crystalline Semicondutor Film and Method for Manufacturing the Same - An island of a crystalline semiconductor according to the present invention has an upper surface and a sloped side surface, which are joined together with a curved surface. Crystal grains in a body portion of the island, including the upper surface, and crystal grains in an edge portion of the island, including the sloped side surface, both have average grain sizes that are greater than 0.2 μm. | 06-04-2009 |
20100102323 | Directionally Annealed Silicon Film Having a (100)-Normal Crystallographical Orientation - A method is provided for forming a directionally crystallized (100)-normal crystallographic orientation silicon (Si) film. The method provides a substrate including Si. An amorphous Si (a-Si) layer is formed overlying the substrate, and a silicon oxide cap layer is formed overlying the a-Si layer. In response to scanning a laser in a first direction along a top surface of the silicon oxide cap layer, the a-Si layer is transformed into a crystalline Si film having a (100)-normal crystallographic orientation, with crystal grains elongated in the first direction. That is, the crystalline Si film has grain boundaries between crystal grains, aligned in parallel with the first direction. | 04-29-2010 |
20100193795 | LARGE-GRAIN CRYSTALLINE THIN-FILM STRUCTURES AND DEVICES AND METHODS FOR FORMING THE SAME - Methods for forming semiconductor devices include providing a crystalline template having an initial grain size, annealing the crystalline template, the annealed template having a final grain size larger than the initial grain size, forming a buffer layer over the annealed template, and forming a semiconductor layer over the buffer layer. | 08-05-2010 |
20100213465 | SEMICONDUCTOR COMPONENT - A semiconductor component is provided having a substrate and at least one semiconductor layer realized to be polycrystalline on one side of the substrate. The polycrystalline semiconductor layer contains the crystal nuclei. | 08-26-2010 |
20100327288 | TRENCH SCHOTTKY DIODE AND METHOD FOR MANUFACTURING THE SAME - A trench Schottky diode and its manufacturing method are provided. The trench Schottky diode includes a semiconductor substrate having therein a plurality of trenches, a gate oxide layer, a polysilicon structure, a guard ring and an electrode. At first, the trenches are formed in the semiconductor substrate by an etching step. Then, the gate oxide layer and the polysilicon structure are formed in the trenches and protrude above a surface of the semiconductor substrate. The guard ring is formed to cover a portion of the resultant structure. At last, the electrode is formed above the guard ring and the other portion not covered by the guard ring. The protruding gate oxide layer and the protruding polysilicon structure can avoid cracks occurring in the trench structure. | 12-30-2010 |
20110049520 | LATTICE MATCHED CRYSTALLINE SUBSTRATES FOR CUBIC NITRIDE SEMICONDUCTOR GR - Disclosed embodiments include methods of fabricating a semiconductor layer or device and devices fabricated thereby. The methods include, but are not limited to, providing a substrate having a cubic crystalline surface with a known lattice parameter and growing a cubic crystalline group III-nitride alloy layer on the cubic crystalline substrate by coincident site lattice matched epitaxy. The cubic crystalline group III-nitride alloy may be prepared to have a lattice parameter (a′) that is related to the lattice parameter of the substrate (a). The group III-nitride alloy may be a cubic crystalline In | 03-03-2011 |
20110062446 | <100> or 45 degrees-rotated <100>, semiconductor-based, large-area, flexible, electronic devices - Novel articles and methods to fabricate the same resulting in flexible, {100}<100> or 45°-rotated {100}<100> oriented, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices. | 03-17-2011 |
20110108843 | COLLECTIONS OF LATERALLY CRYSTALLIZED SEMICONDUCTOR ISLANDS FOR USE IN THIN FILM TRANSISTORS - Collections of laterally crystallized semiconductor islands for use in thin film transistors and systems and methods for making same are described. A display device includes a plurality of thin film transistors (TFTs) on a substrate, such that the TFTs are spaced apart from each other and each include a channel region that has a crystalline microstructure and a direction along which a channel current flows. The channel region of each of the TFTs contains a crystallographic grain that spans the length of that channel region along its channel direction. Each crystallographic grain in the channel region of each of the TFTs is physically disconnected from and crystallographically uncorrelated with each crystallographic grain in the channel region of each adjacent TFT. | 05-12-2011 |
20110133197 | THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF - A bottom gate-type thin film transistor includes a gate insulating film, an interlayer insulating film formed on the gate insulating film, having an opening which is formed in a formation region of a gate electrode, and a semiconductor film formed on the interlayer insulating film so as to cover the opening. The interlayer insulating film contains nitrides in an amount larger than that in the gate insulating film, and the semiconductor film includes a microcrystalline semiconductor film or a polycrystalline semiconductor film formed on semiconductor crystalline nuclei which are formed on the gate insulating film and the interlayer insulating film and contain at least Ge. | 06-09-2011 |
20110175099 | LITHOGRAPHIC METHOD OF MAKING UNIFORM CRYSTALLINE SI FILMS - Methods and devices are described relating to an electronic device positioned at a known location in a crystalline film including a crystalline semiconductor comprising a region of location controlled crystalline grains; a device located in the crystalline semiconductor film at a location that is defined relative to the location of the location controlled crystalline grains. The method includes irradiating at least a portion of a semiconductor film using two or more overlapping irradiation steps, wherein each irradiation step at least partially melts and laterally crystallizes a lithographically defined region the film to obtain a region of laterally grown crystalline grains having at least one long grain boundary that is perpendicular to the lateral growth length; identifying the location of at least one long grain boundary; and manufacturing an electronic device in the semiconductor film at a location that is defined relative to the location of the long grain boundary. | 07-21-2011 |
20120068184 | DISLOCATION REDUCTION IN NON-POLAR III-NITRIDE THIN FILMS - Lateral epitaxial overgrowth of non-polar III-nitride seed layers reduces threading dislocations in the non-polar III-nitride thin films. First, a thin patterned dielectric mask is applied to the seed layer. Second, a selective epitaxial regrowth is performed to achieve a lateral overgrowth based on the patterned mask. Upon regrowth, the non-polar III-nitride films initially grow vertically through openings in the dielectric mask before laterally overgrowing the mask in directions perpendicular to the vertical growth direction. Threading dislocations are reduced in the overgrown regions by (1) the mask blocking the propagation of dislocations vertically into the growing film and (2) the bending of dislocations through the transition from vertical to lateral growth. | 03-22-2012 |
20120112198 | EPITAXIAL GROWTH OF SILICON CARBIDE ON SAPPHIRE - remove impurities from an exposed surface in the ultrahigh vacuum environment. A high qualify single crystalline or polycrystalline silicon carbide film can be grown directly on the sapphire substrate by chemical vapor deposition employing a silicon-containing reactant and a carbon-containing reactant. Formation of single crystalline silicon carbide has been verified by x-ray diffraction, secondary ion mass spectroscopy, and transmission electron microscopy. | 05-10-2012 |
20120175622 | METHOD FOR PRODUCING A SILICON INGOT - Method for producing a silicon ingot, comprising the following steps: providing a container to receive a silicon melt, providing a temperature control device to control the temperature of the silicon melt in the container, arranging raw material in the container comprising silicon and at least one nucleation agent to assist a heterogeneous nucleation in the silicon melt, and control of the temperature in the container for the directed solidification of the silicon melt , the nucleation agent comprising nanoscale particles. | 07-12-2012 |
20120187408 | MICROCRYSTALLINE SEMICONDUCTOR FILM, METHOD FOR MANUFACTURING THE SAME, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - An embodiment of the present invention is a microcrystalline semiconductor film having a thickness of more than or equal to 70 nm and less than or equal to 100 nm and including a crystal grain partly projecting from a surface of the microcrystalline semiconductor film. The crystal grain has an orientation plane and includes a crystallite having a size of 13 nm or more. Further, the film density of the microcrystalline semiconductor film is higher than or equal to 2.25 g/cm | 07-26-2012 |
20120187409 | Hybrid Silicon Wafer - A hybrid silicon wafer which is a silicon wafer having a structure wherein monocrystalline silicon is embedded in polycrystalline silicon that is prepared by the unidirectional solidification/melting method. The longitudinal plane of crystal grains of the polycrystalline portion prepared by the unidirectional solidification/melting method is used as the wafer plane, and the monocrystalline silicon is embedded so that the longitudinal direction of the crystal grains of the polycrystalline portion forms an angle of 120° to 150° relative to the cleaved surface of the monocrystalline silicon. Thus provided is a hybrid silicon wafer comprising the functions of both a polycrystalline silicon wafer and a monocrystalline wafer. | 07-26-2012 |
20120280242 | SEMICONDUCTOR FILM AND PHOTOELECTRIC CONVERSION DEVICE - There is provided a semiconductor film formed on a surface of a substrate and containing a crystalline substance, wherein the semiconductor film has a central region including a center of a surface of the semiconductor film and a peripheral region located around the central region, and a crystallization ratio in the peripheral region of the semiconductor film is higher than a crystallization ratio in the central region. There is also provided a photoelectric conversion device including the semiconductor film. | 11-08-2012 |
20130015455 | GERMANIUM-CONTAINING RELEASE LAYER FOR TRANSFER OF A SILICON LAYER TO A SUBSTRATE - A germanium-containing layer is deposited on a single crystalline bulk silicon substrate in an ambient including a level of oxygen partial pressure sufficient to incorporate 1%-50% of oxygen in atomic concentration. The thickness of the germanium-containing layer is preferably limited to maintain some degree of epitaxial alignment with the underlying silicon substrate. Optionally, a graded germanium-containing layer can be grown on, or replace, the germanium-containing layer. An at least partially crystalline silicon layer is subsequently deposited on the germanium-containing layer. A handle substrate is bonded to the at least partially crystalline silicon layer. The assembly of the bulk silicon substrate, the germanium-containing layer, the at least partially crystalline silicon layer, and the handle substrate is cleaved within the germanium-containing layer to provide a composite substrate including the handle substrate and the at least partially crystalline silicon layer. Any remaining germanium-containing layer on the composite substrate is removed. | 01-17-2013 |
20130105806 | STRUCTURES INCORPORATING SILICON NANOPARTICLE INKS, DENSIFIED SILICON MATERIALS FROM NANOPARTICLE SILICON DEPOSITS AND CORRESPONDING METHODS | 05-02-2013 |
20130341631 | SEMICONDUCTOR DEVICE HAVING EMBEDDED STRAIN-INDUCING PATTERN AND METHOD OF FORMING THE SAME - A semiconductor device can include an active region having a fin portion providing a channel region between opposing source and drain regions. A gate electrode can cross over the channel region between the opposing source and drain regions and first and second strain inducing structures can be on opposing sides of the gate electrode and can be configured to induce strain on the channel region, where each of the first and second strain inducing structures including a respective facing side having a pair of {111} crystallographically oriented facets. | 12-26-2013 |
20140061655 | METHOD FOR EXTREME ULTRAVIOLET ELECTROSTATIC CHUCK WITH REDUCED CLAMPING EFFECT - The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a front surface and a backside surface; integrated circuit features formed on the front surface of the semiconductor substrate; and a polycrystalline silicon layer disposed on the backside surface of the semiconductor substrate. | 03-06-2014 |
20140091307 | LASER POWER AND ENERGY SENSOR UTILIZING ANISOTROPIC THERMOELECTRIC MATERIAL - A laser-radiation sensor includes a copper substrate on which is grown an oriented polycrystalline buffer layer surmounted by an oriented polycrystalline sensor-element of an anisotropic transverse thermoelectric material. An absorber layer, thermally connected to the sensor -element, is heated by laser-radiation to be measured and communicates the heat to the sensor-element, causing a thermal gradient across the sensor-element. Spaced-apart electrodes in electrical contact with the sensor-element sense a voltage corresponding to the thermal gradient as a measure of the incident laser-radiation power. At least two protection layers are positioned between the sensor layer and the absorber layer. | 04-03-2014 |
20140117366 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - According to an embodiment, a semiconductor device includes an underlying layer and a plurality of transistors. The underlying layer includes a first region and a second region provided adjacently to the first region. The transistors are arranged in a plane parallel to an upper surface of the underlying layer. Each transistor includes a channel allowing a current to flow in a first direction intersecting the plane. The plurality of transistors includes a first transistor provided on the first region and a second transistor provided on the second region, a first channel of the first transistor having a first crystal orientation, and a second channel of the second transistor having a second crystal orientation different from the first crystal orientation. | 05-01-2014 |
20140151705 | NANOWIRES, NANOWIRE FIELDE-EFFECT TRANSISTORS AND FABRICATION METHOD - A method is provided for fabricating a nanowire-based semiconductor structure. The method includes forming a first nanowire with a first polygon-shaped cross-section having a first number of sides. The method also includes forming a semiconductor layer on surface of the first nanowire to form a second nanowire with a second polygon-shaped cross-section having a second number of sides, the second number being greater than the first number. Further, the method includes annealing the second nanowire to remove a substantial number of vertexes of the second polygon-shaped cross-section to form the nanowire with a non-polygon-shaped cross-section corresponding to the second polygon-shaped cross-section. | 06-05-2014 |
20140151706 | STRUCTURES INCORPORATING SILICON NANOPARTICLE INKS, DENSIFIED SILICON MATERIALS FROM NANOPARTICLE SILICON DEPOSITS AND CORRESPONDING METHODS - Silicon nanoparticle inks provide a basis for the formation of desirable materials. Specifically, composites have been formed in thin layers comprising silicon nanoparticles embedded in an amorphous silicon matrix, which can be formed at relatively low temperatures. The composite material can be heated to form a nanocrystalline material having crystals that are non-rod shaped. The nanocrystalline material can have desirable electrical conductive properties, and the materials can be formed with a high dopant level. Also, nanocrystalline silicon pellets can be formed from silicon nanoparticles deposited form an ink in which the pellets can be relatively dense although less dense than bulk silicon. The pellets can be formed from the application of pressure and heat to a silicon nanoparticle layer. The materials described herein can be effectively used for the formation of doped contacts for crystalline silicon solar cells, thin film silicon solar cells, electronic devices, such as printed electronics, and other useful products. | 06-05-2014 |
20140252362 | THIN FILM APPARATUS - A thin film apparatus having a plurality of thin film cells is disclosed. Each thin film cell includes a crystalline layer and a surrounding layer. The crystalline layer has a shape of polygon. The surrounding layer is partially located on the crystalline layer. The crystalline layer is surrounded by the surrounding layer. | 09-11-2014 |
20150060859 | EVALUATION SAMPLE, METHOD OF OBTAINING ETCHING YIELD FUNCTION AND SIMULATION METHOD - In accordance with an embodiment, an evaluation sample includes a substrate and a polycrystalline film on the substrate. The polycrystalline film has crystal grains. A specific orientation plane is exposed on the surface of each crystal grain. The orientation planes exhibit random angles to the surface of the substrate. | 03-05-2015 |
20160020095 | METAL-INDUCED CRYSTALLIZATION OF AMORPHOUS SILICON IN AN OXIDIZING ATMOSPHERE - Techniques are provided for forming thin film transistors having a polycrystalline silicon active layer formed by metal-induced crystallization (MIC) of amorphous silicon in an oxidizing atmosphere. In an aspect, a transistor device, is provided that includes a source region and a drain region formed on a substrate, and an active channel region formed on the substrate and electrically connecting the source region and the drain region. The active channel region is formed with a polycrystalline silicon layer having resulted from annealing an amorphous silicon layer formed on the substrate and having a metal layer formed thereon, wherein the annealing of the amorphous silicon layer was at least partially performed in an oxidizing ambience, thereby resulting in crystallization of the amorphous silicon layer to form the polycrystalline silicon layer. | 01-21-2016 |
20160049522 | Method for manufacturing semiconductor device - The invention relates to a method for forming a uniform silicide film using a crystalline semiconductor film in which orientation of crystal planes is controlled, and a method for manufacturing a thin film transistor with less variation in electric characteristics, which is formed over an insulating substrate using the silicide film. A semiconductor film over which a cap film is formed is irradiated with a laser to be crystallized under the predetermined condition, so that a crystalline semiconductor film including large grain crystals in which orientation of crystal planes is controlled in one direction is formed. The crystalline semiconductor film is used for silicide, whereby a uniform silicide film can be formed. | 02-18-2016 |
20220139907 | SEMICONDUCTOR DEVICE WITH LOW NOISE TRANSISTOR AND LOW TEMPERATURE COEFFICIENT RESISTOR - A semiconductor device includes a resistor having a resistor body including polysilicon, with fluorine in the polysilicon. The resistor body has a laterally alternating distribution of silicon grain sizes. The semiconductor device further includes an MOS transistor having a gate including polysilicon with fluorine. The fluorine in the gate has a higher average concentration than the fluorine in the resistor body. The semiconductor device may be formed by forming a gate/resistor layer including polysilicon. A fluorine implant mask is formed over the gate/resistor layer, exposing the gate/resistor layer in an area for the gate and over implant segments in an area for the resistor body. The implant segments do not cover the entire area for the resistor body. Fluorine is implanted into the gate/resistor layer where exposed by the fluorine implant mask. The gate/resistor layer is patterned to form the gate and the resistor body. | 05-05-2022 |