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Hollow (e.g., plated cylindrical hole)

Subclass of:

174 - Electricity: conductors and insulators

174680100 - CONDUITS, CABLES OR CONDUCTORS

174250000 - Preformed panel circuit arrangement (e.g., printed circuit)

174261000 - With particular conductive connection (e.g., crossover)

174262000 - Feedthrough

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Entries
DocumentTitleDate
20130025927Modified 0402 Footprint For A Printed Circuit Board ('PCB') - A modified 0402 footprint for a PCB, including: at least two padstacks each having a minimum area consistent with the 0402 standard; and each padstack modified on at least two corners such that the padstack's footprint can be placed beneath a ball grid array (‘BGA’), the BGA having approximately a 1 millimeter pitch, and such that the padstack may be placed at least at a minimum distance away from a closest via in the PCB, wherein each padstack has a trace to a via not directly under a padstack in the PCB and each padstack has no via within the padstack.01-31-2013
20080257597PRINTED CIRCUIT BOARD MANUFACTURING METHOD AND PRINTED CIRCUIT BOARD - The present invention provides a method of manufacturing printed a circuit board capable of formation of via holes having a low aspect ratio and formation of fine lines, and a printed circuit board manufactured by the method. The method of manufacturing a printed circuit board 10-23-2008
20130075148Method and Apparatus to Reduce Impedance Discontinuity in Packages - A device and/or apparatus having plated through holes (PTHs) which are coated to reduce impedance discontinuity in electronic packages. PTH vias are imbedded in the core of a printed circuit board comprising a core layer, a plurality of buildup layers, a plurality of micro-vias, and a plurality of traces. Traces electrically interconnect each of the micro-vias to PTH vias, forming an electrically conductive path. PTHs are coated with a magnetic metal material, such as nickel, to increase the internal and external conductance of the PTHs, thereby providing decreased impedance discontinuity of the signals in electronic packages.03-28-2013
20130032390PACKAGING SUBSTRATE HAVING EMBEDDED INTERPOSER AND FABRICATION METHOD THEREOF - A packaging substrate includes a carrier and an interposer. The carrier has opposite top and bottom surfaces. A recess is formed on the top surface and a plurality of first conductive terminals are formed on the recess. Further, a plurality of second conductive terminals are formed on the bottom surface of the carrier. The interposer is disposed in the recess and has opposite first and second surfaces and a plurality of conductive through vias penetrating the first and second surfaces. A first conductive pad is formed on an end of each of the conductive through vias exposed from the first surface, and a second conductive pad is formed on the other end of each of the conductive through vias exposed from the second surface and electrically connected to a corresponding one of the first conductive terminals. Compared with the prior art, the invention improves the product reliability.02-07-2013
20100044096Horizontally Split Vias - A mechanism is disclosed for providing horizontally split vias are provided in printed wiring boards (PWBs) and other substrates. In one embodiment, the substrate includes a plurality of insulator layers and internal conductive traces. First and second through-holes extend completely through the substrate and respectively pass through first/second ones and third/fourth ones of the internal conductive traces, which are at different depths within the substrate. Photolithographic techniques are used to generate plated-through-hole (PTH) plugs of controlled, variable depth in the through-holes before first/second conductive vias are plated onto the first through-hole and before third/fourth conductive vias are plated onto the second through-hole. The depth of these PTH plugs is controlled (e.g., using a photomask and/or variable laser power) to prevent the conductive vias from extending substantially beyond their respective internal conductive traces, thereby horizontally spitting the two conductive vias plated onto each of the through-holes. This advantageously increases wiring density up to 2×.02-25-2010
20100044095Via Stub Elimination - An enhanced mechanism is disclosed for via stub elimination in printed wiring boards (PWBs) and other substrates. In one embodiment, the substrate includes a plurality of insulator layers and internal conductive traces. First and second through-holes extend completely through the substrate and respectively pass through first and second ones of the internal conductive traces, which are at different depths within the substrate. Photolithographic techniques are used to generate plated-through-hole (PTH) plugs of controlled, variable depth in the through-holes before first and second conductive vias are respectively plated onto the first and second through-holes. The depth of these PTH plugs is controlled (e.g., using a photomask and/or variable laser power) to prevent the first and second conductive vias from extending substantially beyond the first and second internal conductive traces, respectively, and thereby prevent via stubs from being formed in the first place. This advantageously eliminates the costly and time consuming process of via stub backdrilling.02-25-2010
20090159327PRINTED WIRING BOARD AND MANUFACTURING METHOD OF PRINTED WIRING BOARD - A printed wiring board including a core substrate, a build-up layer formed over the core substrate and including a first insulating layer, a conductor layer formed over the first insulating layer, and a second insulating layer formed over the conductor layer, and one or more wiring patterns formed over the first insulating layer. The conductor layer includes conductor portions, and the conductor portions have notched portions, respectively, facing each other across the wiring pattern.06-25-2009
20090159326S-TURN VIA AND METHOD FOR REDUCING SIGNAL LOSS IN DOUBLE-SIDED PRINTED WIRING BOARDS - Embodiments of the invention include a Printed Wiring Board (PWB) having a first via connected to a top-side signal source, a second via connected to a bottom-side signal destination, and a third via connected to the first via on a lower signal layer of the PWB and further connected to the second via on an upper signal layer of the PWB. In embodiments of the invention, the third via is referred to as an S-Turn via. The S-Turn PWB routing configuration advantageously reduces reflections causes by via stubs at Multi-Giga Hertz (MGH) frequencies. Other embodiments are described.06-25-2009
20120181076DOUBLE-SIDED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A double-sided circuit board including a substrate having a first surface and a second surface on an opposite side of the first surface and having a penetrating hole extending between the first surface and the second surface, a first conductive circuit formed on the first surface of the substrate, a second conductive circuit formed on the second surface of the substrate, and a through-hole conductor formed in the penetrating hole of the substrate and electrically connecting the first conductive circuit and the second conductive circuit. The penetrating hole comprises a first hole having a first opening with a diameter R07-19-2012
20130056255VIA STRUCTURE FOR TRANSMITTING DIFFERENTIAL SIGNALS - A printed circuit board including first and second signal pads located on a top surface of the printed circuit board and arranged to transmit a first differential signal, first and second signal vias extending through the printed circuit board and arranged to transmit the first differential signal, and a first ground plane located on a layer below the top surface of the printed circuit board and including an antipad that encompasses the first and second signal pads and the first and second signal vias when viewed in plan.03-07-2013
20090294169PRINTED CIRCUIT BOARD FABRICATION METHOD, PRINTED CIRCUIT BOARD OBTAINED THEREBY, AND PRINTED CIRCUIT BOARD FABRICATION APPARATUS - A printed circuit board includes a through hole constituted by a hole penetrating through the front and rear surfaces of the printed circuit board. A fabrication method of the printed circuit board, includes applying conductive material plating to the inner wall surface of the hole to form a through hole electrically connecting the front and rear surfaces of the printed circuit board, and removing the conductive material plated on the hole inner wall surface at least at a portion between the front and rear surfaces of the printed circuit board is carried out to thereby fabricate a printed circuit board having a through hole electrically isolates the front surface of the printed circuit board from the rear surface thereof.12-03-2009
20130062112FABRICATION METHOD FOR CARRIER SUBSTRATE, PRINTED CIRCUIT BOARD USING THE SAME, AND FABRICATION METHOD THEREOF - A method for fabricating a carrier substrate, a method for fabricating a printed circuit board using the carrier substrate and related printed circuit board. The method for fabricating the carrier substrate includes: providing an insulating base material with a copper foil layer formed on at least one surface thereof; stacking a metal layer having a length shorter than that of the copper foil layer on the copper foil layer; and forming an insulating layer on the metal layer.03-14-2013
20090255723PRINTED CIRCUIT BOARD WITH GROUND GRID - A printed circuit board with ground grid includes a first insulating plate, a plurality of first metal lines formed on the first insulating plate, a sub-circuit board above the plurality of first metal lines, a second insulating plate above the sub-circuit board, a plurality of second metal lines formed on the second insulating plate, and, a plurality of conductive components formed in and through the second insulating plate and the sub-circuit board to electrically connect the plurality of first metal lines and the plurality of second metal lines. As additional electronic elements and circuits can be located on the first insulating plate and/or on the second insulating plate without limitation, difficulties for printed circuit board layout can be dramatically reduced.10-15-2009
20130161083PRINTED CIRCUIT BOARDS AND METHODS OF MANUFACTURING PRINTED CIRCUIT BOARDS - A printed circuit board includes a substrate having a first surface, a first conductive circuit deposited on the first surface and a dielectric cover deposited on the first surface and covering at least a portion of the first conductive circuit. The dielectric cover has an edge and the first surface is exposed beyond the edge. A second conductive circuit is deposited on the dielectric cover and the substrate. The second conductive circuit spans the edge such that at least part of the second conductive circuit is deposited on the dielectric cover and at least part of the second conductive circuit is deposited on the first surface.06-27-2013
20130068517SUBSTRATE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a substrate structure is provided. The method includes the following steps. A substrate is provided. The substrate has a patterned first metal layer, a pattern second metal layer and a through hole. After that, a first dielectric layer and a second dielectric layer are formed at a first surface and a second surface of the substrate, respectively. The second surface is opposite to the first surface. Then, the first dielectric layer and the second dielectric layer are patterned. After that, a first trace layer is formed at a surface of the patterned first dielectric layer. The first trace layer is embedded into the patterned first dielectric layer and is coplanar with the first dielectric layer. Then, a second trace layer is formed on a surface of the second dielectric layer.03-21-2013
20090000814MULTIPLE LAYER PRINTED CIRCUIT BOARD HAVING MISREGISTRATION TESTING PATTERN - A method of testing for misregistration in a multiple layer printed circuit board includes providing an electrical test pattern on one or more layers of the board, testing for an electrical signal between the test pattern and a test reference, and determining layer-to-layer misregistration based on the results of the testing. A method of manufacturing a multiple layer board that is configured to facilitate non-destructive testing of layer-to-layer misregistration includes forming an electrical test pattern on a first layer and forming a corresponding electrical test reference on a second layer. Then, a connecting pathway is formed between the test reference and the test pattern, including the first and second layers, with testing for an electrical signal between the test reference and the test pattern determining layer-to-layer misregistration of the first layer with respect to the second layer.01-01-2009
20120234592PACKAGE AND HIGH FREQUENCY TERMINAL STRUCTURE FOR THE SAME - A package includes: a metal wall disposed on a conductive base plate; a through-hole disposed in input/output portions of the metal wall; a lower layer feed through disposed on the conductive base plate; a wiring pattern disposed on the lower layer feed through; an upper layer feed through disposed on a part of the lower layer feed through and a part of the wiring pattern; and a terminal disposed on the wiring pattern, wherein a width of a part of the lower layer feed through and a width of the upper layer feed through are wider than a width of the through-hole, the lower layer feed through is adhered to a side surface of the metal wall, the upper layer feed through is adhered to the side surface of metal wall, and an air layer is formed between the wiring pattern and an internal wall of the through-hole.09-20-2012
20080296057Simultaneous and selective partitioning of via structures using plating resist - Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the PCB stackup through conductive layers, dielectric layers and through the plating resist. Thus, the PCB panel has multiple through-holes that can then be plated simultaneously by placing the PCB panel into a seed bath, followed by immersion in an electroless copper bath. Such partitioned vias increase wiring density and limit stub formation in via structures. Such partitioned vias allow a plurality of electrical signals to traverse each electrically isolated portion without interference from each other.12-04-2008
20130161084NOISE FILTER AND TRANSMISSION APPARATUS - In a printed wiring board including a first wiring layer and a second wiring layer provided via an insulator layer, at least three guard ground wirings extending along a pair of signal wirings provided in the first wiring layer and supplied with a ground potential are provided between the pair of signal wirings. Thus, crosstalk noise can be reduced without widening a wiring area between the pair of signal wirings.06-27-2013
20090178840PCB AND MANUFACTURING METHOD THEREOF - A printed circuit board and a manufacturing method thereof are disclosed. The method in accordance with an embodiment of the present invention includes: providing a substrate on which a first insulation layer, a first circuit pattern, a second insulation layer and a resin layer are successively laminated; boring a through-hole penetrating the substrate; forming roughness on the resin layer by a desmear process; forming a via making an electrical connection between layers through the through-hole; and forming a second circuit pattern on the resin layer having roughness formed thereon.07-16-2009
20090277679Method of manufacturing PCB and PCB manufactured by the same - Provided is a method of manufacturing a PCB, the method comprising: providing a substrate including an aluminum core; forming a via hole passing through the substrate; substituting the surface of the aluminum core with a zinc film by performing a zincate treatment on the inner surface of the via hole; substituting the zinc film with a metal film by performing substitution plating on the zinc film; forming a first plated film on the surface of the via hole, where the metal film is formed, through electroless plating; and forming a second plated film on the first plated film through electroplating.11-12-2009
20090095520WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - There is provided a wiring substrate. The wiring substrate includes: a core substrate formed of a conductive material and having a through hole therein; an insulating layer formed on first and second surfaces of the core substrate; wiring patterns formed on the first and second surfaces via the insulating layer; and a via formed in the through hole and electrically connected to the wiring patterns. The via includes: a conductor ball and a conductor portion. The conductor ball has a conductive surface and an insulating member covering the conductive surface. A portion of the conductive surface is exposed from the insulating member. The conductor portion is electrically connected to the exposed conductive surface and the wiring patterns. At least one of the insulating member and the insulating layer is interposed between the via and the core substrate.04-16-2009
20110284282WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A printed wiring board wiring board including a substrate having a first penetrating hole and multiple second penetrating holes formed around the first penetrating hole, a first conductive portion and a second conductive portion formed on one surface of the substrate, a third conductive portion and a fourth conductive portion formed on the opposite surface of the substrate, a first through-hole conductor formed in the first penetrating hole and connecting the first conductive portion and the third conductive portion, and multiple second through-hole conductors formed in the second penetrating holes and connecting the second conductive portion and the fourth conductive portion. The first through-hole conductor and the second through-hole conductors are made of conductive material filled in the first penetrating hole or the second penetrating holes.11-24-2011
20100139969Printed circuit board comprising metal bump and method of manufacturing the same - Disclosed herein is a printed circuit board, including: metal bumps having constant diameters and protruding over an insulation layer; a circuit layer formed beneath the insulation layer; and vias passing through the insulation layer to connect the metal bumps with the circuit layer.06-10-2010
20090294168PRINTED CIRCUIT BOARD - A printed circuit board includes a first layout layer, a second layout layer, a copper foil layer, a first via and a second via. The first layout layer has a first signal line and a second signal line, each of which has a curved first portion. The second layout layer has a third signal line and a fourth signal line, each of which also has a curved first portion. The curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line are coupled to the first via and the second via. In this case, the curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line cooperatively generate spiral inductance characteristic.12-03-2009
20090095521CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - A circuit board has plated through holes which are laid out with a fine pitch and meets requirements relating to characteristics such as the thermal expansion coefficient of the circuit board. A method of manufacturing a circuit board includes: a step of forming a core portion by thermal compression bonding prepregs which include first fibers that conduct electricity and second fibers that do not conduct electricity, which have the second fibers disposed at positions where plated through holes will pass through, and which are impregnated with resin; a step of forming through holes at positions in the core portion where the second fibers are disposed; and a step of forming a conductive layer on inner surfaces of the through holes to form plated through holes at positions that do not interfere with the first fibers and thereby produce a core substrate.04-16-2009
20100122843CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - A circuit board has plated through holes which are laid out with a fine pitch and meets requirements relating to characteristics such as strength and thermal expansion coefficient. A method of manufacturing a circuit board includes: a step of forming a core portion by thermal compression bonding prepregs formed by disposing carbon fibers so as to produce openings at positions where plated through holes will pass through and impregnating the carbon fibers with resin; a step of forming through holes that pass inside the openings at positions of the openings in the core portion; and a step of forming a conductive layer on inner surfaces of the through holes to form plated through holes at positions that do not interfere with the carbon fibers and thereby produce a core substrate.05-20-2010
20110079422MULTILAYER SUBSTRATE - A multilayer substrate is provided with a conductor plane region in which a plurality of conductor planes are disposed; a clearance region disposed adjacent to the conductor plane region so that the plurality of conductor planes are excluded from the clearance region. A plurality of signal vias are disposed through the clearance region so that the plurality of signal vias are isolated from the plurality of conductor planes. A conductor post is connected to one of the plurality of conductor planes and disposed between two of the signal vias in the clearance region.04-07-2011
20090288874Simultaneous and Selective Partitioning of Via Structures Using Plating Resist - Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the PCB stackup through conductive layers, dielelectric layers and through the plating resist. Thus, the PCB panel has multiple through-holes that can then be plated simultaneously by placing the PCB panel into a seed bath, followed by immersion in an electroless copper bath. Such partitioned vias increase wiring density and limit stub formation in via structures. Such partitioned vias allow a plurality of electrical signals to traverse each electrically isolated portion without interference from each other.11-26-2009
20100078213METHOD FOR MANUFACTURING PRINTED WIRING BOARD AND PRINTED WIRING BOARD - A method for manufacturing a printed wiring board, in which filled vias with a reduction in faulty connections are formed, and providing such a printed wiring board. After an electroless plated film is formed on an inner wall of a via opening, electrolytic plating is performed on insulative resin base material; the via opening is filled with plating metal and a filled via is formed. Therefore, during electrolytic plating, a plating metal is deposited from electroless plated film on the side wall of the via opening as well as from the bottom of the via opening. As a result, the via opening may be completely filled through electrolytic plating, forming a filled via with a reduction in faulty connections.04-01-2010
20080236881MULTILAYER PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A multilayer printed wiring board includes a first insulating layer, a pair of second insulating layers sandwiching therebetween the first insulating layer, a pair of internal-layer wiring trace formed between the first insulating layer and the second insulating layer, and an external-layer wiring trace formed on the exposed surface of the second insulating layer. A hollow cylindrical via-plug is formed on the inner wall of a first through-hole penetrating through the first insulating layer and connects together the internal-layer wiring traces with each other. A second via-plug formed inside the first via and isolated therefrom by insulating resin connects together the external-layer wiring traces.10-02-2008
20110203842Method and structure for coaxial via routing in printed circuit boards for improved signal integrity - A method and a structure for a coaxial via that extend along the entire length of a signal via in a printed circuit board. Signal integrity is improved by providing ground shield for the entire length of the coaxial via. The ground shielding can be implemented by either providing ground cage vias around a signal via and routing a trace to the signal via on a built up layer or by providing a semi circle ground trench through a build up layer to permit a trace access to the signal via.08-25-2011
20090166080MULTILAYER WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A multilayer wiring board is manufactured by preparing a first wiring board, a second wiring board, and a joint sheet. The first wiring board is provided with a via having a first through-hole in which a conductive film is formed. The second wiring board is provided with a second through-hole at a position substantially matching the position of the first through-hole. The joint sheet is provided with a third through-hole at a position substantially matching the positions of the first and the second through-holes. the first wiring board and the second wiring board are stacked and bonded together by heat and pressure with the joint sheet interposed therebetween.07-02-2009
20120193135Through-Hole-Vias In Multi-Layer Printed Circuit Boards - Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of making and using such PCBs that include layers of laminate; at least one via hole traversing the layers of laminate, and a via conductor contained within the via hole, the via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a metal having a conductivity lower than the conductivity of copper.08-02-2012
20130118794Package Substrate Structure - A package substrate structure includes a substrate, a circuit layer formed on the substrate, and an ultra-thin seed layer made of an electrically conductive material and formed between the substrate and the circuit layer. The ultra-thin seed layer is advantageous to increase the adhesion between the metal bumps or the circuit lines of the circuit layer, and the substrate. Furthermore, because the seed layer is ultra thin, the metal bumps or the circuit lines on the package substrate can be made finer in line widths and line pitches, and the good yield of the substrate with fine circuit lines can be increased.05-16-2013
20080271915METHOD FOR MAKING A CIRCUIT BOARD AND MULTI-LAYER SUBSTRATE WITH PLATED THROUGH HOLES - A method for making a circuit board includes the following steps. At least two substrates are provided, wherein each substrate includes two surfaces, two circuit layers respective formed on the two surfaces and at least a via passing through the two surfaces. A metal layer is formed on the side wall of the via, wherein the metal layer electrically connects two circuit layers on the two surfaces of each substrate to each other. An insulating film is at least formed on the surface of the metal layer by an electrophoretic deposition process. Vias of two substrates are aligned with each other and two substrates are laminated to each other, so as to form a multi-layer substrate. Another metal layer is formed on the insulating film, wherein each metal layer is an independent electrical channel.11-06-2008
20090183910WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - First, a structure is fabricated by directly bonding a first base material and a second base material. The first base material has a recessed portion formed in a desired patterning layout on one surface thereof, and the bonding is performed in such a manner that the surface having the recessed portion of the first base material faces inward. Then, through holes are formed at desired positions in the structure in such a manner that the through holes pierce the structure in a direction of thickness thereof and communicate with the corresponding recessed portions. Further, an insulating layer is formed on the surface of the structure, and thereafter, a conductive material is filled into the through holes and the recessed portions.07-23-2009
20090139761MULTILAYER PRINTED WIRING BOARD AND MANUFACTURING METHOD THEREOF - A multilayer printed wiring board is characterized in that the interlayer connection material in the via holes has a lower coefficient of thermal expansion in the thickness direction than the electrically insulating substrate made of insulating material; the interlayer connection is formed at a temperature higher than the operating temperature; and the interlayer connection material is larger in thickness than the interlayer connection material of the same wiring layer at normal temperature. This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction of the printed wiring board in the environment in which it is used resulting in high connection reliability.06-04-2009
20090014207WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A wiring board has a base substrate, a conductive pattern formed on the base substrate, an insulation layer formed on the conductive pattern and the base substrate and including a resin-impregnated inorganic cloth, a conductive pattern formed on the insulating layer, a via formed in the insulation layer and connecting the conductive pattern formed on the base substrate and the conductive pattern formed on the insulating layer, and a through-hole connected to the conductive pattern formed on the base substrate, penetrating through the base substrate and having a hole diameter in a range of 10 μm to 150 μm.01-15-2009
20120267158CONSTRUCTION OF RELIABLE STACKED VIA IN ELECTRONIC SUBSTRATES - VERTICAL STIFFNESS CONTROL METHOD - A stacked via structure for reducing vertical stiffness includes: a plurality of stacked vias, each via disposed on a disc-like structure. The disc-like structure includes a platted through hole landing supporting the plurality of stacked vias. The platted through hole landing includes an etched pattern.10-25-2012
20100147576LAMINATED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - Wiring board bases 06-17-2010
20120103680MULTILAYER PRINTED WIRING BOARD WITH FILLED VIAHOLE STRUCTURE - A multilayer printed wiring board includes a multilayered structure having conductor circuit layers and interlaminar insulative layers, the interlaminar insulative layers including an outermost interlaminar insulative layer, the conductor circuit layers including an outermost conductor circuit layer formed over the outermost interlaminar insulative, a filled-viahole formed in the outermost interlaminar insulative layer and having one or more metal plating fillings and completely closing a hole formed through the outermost interlaminar insulative layer such that the metal plating of the filled-viahole extends out of the hole and forms a substantially flat surface, and solder bumps including a first solder bump formed on the substantially flat surface of the filled-viahole and a second solder bump formed on a surface portion in the outermost conductor circuit layer. The substantially flat surface of the filled-viahole is leveled substantially at the same height as the surface portion of the outermost conductor circuit layer.05-03-2012
20100258342BONDED HERMETIC FEED THROUGH FOR AN ACTIVE IMPLANTABLE MEDICAL DEVICE - A feed through for an active implantable medical device (AIMD). The feed through comprises first and second substantially planar, electrically non-conductive and fluid impermeable substrates usable for semiconductor device fabrication, each comprising: an aperture there through, and a contiguous metalized layer on the substrate surface that is co-existent with a section of the perimeter of the aperture and extends from the aperture; and a bond layer affixing the metalized layers of the first and second substrates to one another such that the apertures are not aligned with one another, and such that the metalized regions form a conductive pathway between the apertures.10-14-2010
20100276192METHOD FOR REMOVING A STUB OF A VIA HOLE AND A PRINTED CIRCUIT BOARD DESIGNED BASED ON THE METHOD - A method for removing a stub of a via hole includes copperizing a wall of a via hole in a top layer of a printed circuit board (PCB) if signal lines are located on the top layer of the PCB, and a wall of the via hole in a bottom layer of the PCB is not copperized. The method further includes connecting the top layer and the bottom layer of the PCB using a connection layer.11-04-2010
20100243310PRINTED CIRCUIT BOARD - A printed circuit board (PCB) includes a power layer, a ground layer, a through hole, and a conductor. The through hole goes through the power layer and the ground layer. The conductor includes a hollow columnar main body and an extending portion. The main body is formed in a bounding wall of the through hole, and is conductively connected to one of the power layer and the ground layer, and insulated from the other one of the power layer and the ground layer by an insulation area. The extending portion extends out from the circumferential surface of the main body. The extending portion extends into the insulation area and is insulated from the other one of the power layer and the ground layer, to increase an area of the power layer facing the ground layer.09-30-2010
20100243311SUBSTRATE WITH METAL FILM AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a substrate with a metal film includes preparing a first insulation layer having first and second surfaces, forming a first conductive circuit on the first surface of the first insulation layer, forming on the first surface of the first insulation layer and on the first conductive circuit a second insulation layer having first and second surfaces, forming in the second insulation layer a penetrating hole tapering from the first surface toward the first conductive circuit, forming on the inner wall of the penetrating hole, a composition containing a polymerization initiator and a polymerizable compound, providing a polymer on the inner wall of the penetrating hole by irradiating the composition, applying a plating catalyst on the polymer, and forming a plated-metal film on the inner wall of the penetrating hole. The first surface of the first insulation layer faces the second surface of the second insulation layer.09-30-2010
20100000778PRINTED CIRCUIT BOARD - A printed circuit board (PCB) includes a top layer, a bottom layer, and reference layers between the top layer and the bottom layer. A via defined through the top layer, reference layers, and the bottom layer has only two pads at the reference layers.01-07-2010
20090178839RECOGNITION MARK AND METHOD FOR MANUFACTURING CIRCUIT BOARD - Through hole (07-16-2009
20090071707Multilayer substrate with interconnection vias and method of manufacturing the same - A method is provided for manufacturing a multilayer substrate. An insulating layer can have a hole overlying a patterned second metal layer. In turn, the second metal layer can overlie a first metal layer. A third metal layer can be electroplated onto the patterned second metal layer within the hole, the third metal layer extending from the second metal layer onto a wall of the hole. When plating the third metal layer, the first and second metal layers can function as a conductive commoning element.03-19-2009
20100294555Arrangement for Energy Conditioning - Circuit arrangement embodiments that use relative groupings of energy pathways that include shielding circuit arrangements that can sustain and condition electrically complementary energy confluences.11-25-2010
20080217052WIRING BOARD AND METHOD OF MANUFACTURING WIRING BOARD - A wiring board including a plated through hole formed in the wiring board; a test plated through hole or a test via hole provided in the surrounding area of the plated through hole to check a processing state related to the plated through hole; and a conductive pattern used to electrically connect the plated through hole to the test through hole or the test via hole.09-11-2008
20130140074VIA HOLE PLATING METHOD AND PRINTED CIRCUIT BOARD MANUFACTURED USING THE SAME - Disclosed herein is a via hole plating method including a first plating step of performing a pattern plating on a via hole of a printed circuit board; and a second plating step of performing a pattern fill plating on the pattern plating, whereby a deviation in plating thickness at a high current density region may be decreased simultaneously with improving a via filling efficiency, thereby making it possible to significantly improve the quality of the printed circuit board.06-06-2013
20110000708WIRING SUBSTRATE AND METHOD FOR MANUFACTURING WIRING SUBSTRATE - [Subject Matter] To provide a method for manufacturing a wiring substrate where rigidity is enhanced in an insulative portion made by oxidizing aluminum.01-06-2011
20110240357WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A wiring board including a first substrate having a penetrating hole penetrating through the first substrate, a built-up layer formed on one surface of the first substrate and including multiple interlayer resin insulation layers and wiring layers, the built-up layer having an opening portion communicated with the penetrating hole of the first substrate and opened to the outermost surface of the built-up layer, an interposer accommodated in the opening portion of the built-up layer and including a second substrate and a wiring layer formed on the second substrate, the wiring layer of the interposer including multiple conductive circuits for being connected to multiple semiconductor elements, and a filler filling the opening portion of the built-up layer such that the interposer is held in the opening portion of the built-up layer. The opening portion of the built-up layer has a tapered portion tapering toward the outermost surface of the built-up layer.10-06-2011
20090321126Concentric Vias In Electronic Substrate - A multiwall via structure in an electronic substrate having multiple conductive layers. The multiwall via structure includes an outer via coupled to a pair of the conductive layers, an inner via within the outer via and coupled to the same pair of conductive layers, and a dielectric layer between the inner and outer vias. In various embodiments, the pair of conductive layers can be inner conductive layers or outer conductive layers of the electronic substrate. In other embodiments, a method of preparing a multiwall via structure is provided.12-31-2009
20100059266CERAMIC MULTI-LAYER CIRCUIT SUBSTRATE AND MANUFACTURING METHOD THEREOF - Provided is a method of manufacturing a ceramic multi-layer circuit substrate. A plurality of ceramic blocks, in each of which one or more ceramic green sheets having via-electrodes are layered one atop the other, are formed and are then fired. The fired ceramic blocks are aligned with each other. One or more bonding green sheets each having bonding electrodes in positions corresponding to the via-electrodes of the ceramic blocks are prepared. Each of the bonding green sheets is interposed between a pair of the ceramic blocks opposing each other. The ceramic blocks and the bonding green sheets are bonded and are then fired.03-11-2010
20100065324EMBEDDED STRUCTURE AND METHOD FOR MAKING THE SAME - An embedded structure of circuit board is provided. The embedded structure of the present invention includes a dielectric layer, a pad opening disposed in the dielectric layer, and a via disposed in the pad opening and in the dielectric layer, wherein the outer surface of the dielectric layer has a substantially even surface.03-18-2010
20110174529STRUCTURE HAVING MULTI-TRACE VIA SUBSTRATE AND METHOD OF FABRICATING THE SAME - A method of fabricating a multi-trace via substrate is disclosed. A substrate at least having a first surface and a hole is provided, wherein the hole has a hole wall. A first conductive layer is formed on the entire surface of the substrate and the hole wall. A photoresist layer applied over the entire surface of the first conductive layer is selectively patterned to define a plurality of laterally separated regions on the first conductive layer. A patterned photoresist layer is used as a mask and a second conductive layer substantially thicker than the first conductive layer is electroplated on the laterally separated regions. The patterned photoresist layer is removed. The portion of the first conductive layer not covered by the second conductive layer is substantially removed to form a plurality of laterally separated traces extended on the first surface and through the hole.07-21-2011
20110100699PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a method of manufacturing a printed circuit board, including: forming a buildup layer on a base substrate including a circuit layer connected with a first via penetrating an insulation layer; forming a viahole penetrating the buildup layer and at least a part of the first via; and forming an interlayer connection member in the viahole. The method is advantageous in that a process of forming a multilayer connection structure can be simplified, and an error in the formation of a viahole can be minimized.05-05-2011
20110073359Through-Hole-Vias In Multi-Layer Printed Circuit Boards - Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of making and using such PCBs that include layers of laminate; at least one via hole traversing the layers of laminate, and a via conductor contained within the via hole, the via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a metal having a conductivity lower than the conductivity of copper.03-31-2011
20110048790CHIP CARRIERS WITH SIDE TERMINALS - An electrically insulating substrate is provided. The electrically insulating substrate includes a set of areas to be formed into a set of printed circuit boards. Each of the set of areas is separated from others of the set of areas by a dicing channel. A set of signal wiring conductors is fabricated onto the set of areas of the electrically insulating substrate so that at least one of the set of signal wiring conductors terminates proximate to the dicing channel. A set of plated through holes is fabricated through at least one of the set of areas such that at least one of the set of plated through holes connects to at least one of the set of signal wiring conductors. The electrically insulating substrate is singulated along a set of singulation lines to form the set of printed circuit boards. The singulation lines intersect with the plated through holes, so that a portion of the plated through holes is exposed along the peripheral edge of the resulting printed circuit boards.03-03-2011
20110147070Method and Apparatus for Reducing Signal Noise - A printed circuit board having at least two spaced apart conductive planes. A plurality of vias extend between the two spaced apart conductive planes with the vias being electrically connected to a selected one of the two conductive planes in an alternating pattern. A differential electrical signal is connectable to the conductive planes so that the vias are alternately energized by the differential electrical signal when the differential electrical signal is connected to the conductive planes.06-23-2011
20110147069Multi-tiered Circuit Board and Method of Manufacture - The present invention provides a printed circuit board assembly that includes a first printed circuit board portion having a first thickness and including at least one plated through hole selectively electrically interconnecting electrically conductive layers of the printed circuit board assembly. A second printed circuit board portion is also provided that has a second thickness which is less than the first thickness and further includes another a second plated through hole array exposed on a surface of the second printed circuit board portion.06-23-2011
20110147068Structure for Enhancing Reference Return Current Conduction - An apparatus is provided that comprises a plurality of signaling planes providing signal pathways and at least one internal reference plane providing either a voltage or a ground connection. The at least one internal reference plane are provided between at least two of the signaling planes. The apparatus further comprises a signal blind/buried via coupling a signal pathway of a first one of the at least two signaling planes with a signal pathway of a second one of the at least two signaling planes. The blind/buried via runs through the at least one internal reference plane. The apparatus also comprises at least one first conductive feature in the first one of the at least two signaling planes. The at least one first conductive feature is in close proximity to the signal blind/buried via and increases the capacitive coupling of currents in the reference planes of the apparatus.06-23-2011
20110042132METHOD OF PRODUCING AN ELECTRICALLY CONDUCTING VIA IN A SUBSTRATE - The present invention relates to a method of producing an electrically conducting via in a substrate and to a substrate produced thereby. In particular, in one embodiment, the present invention relates to a substrate, such as a printed circuit board having one or several metal-free electrically conducting vias.02-24-2011
20090126983Method and Apparatus to Reduce Impedance Discontinuity in Packages - A method, system and apparatus for coating plated through holes (PTHs) to reduce impedance discontinuity in electronic packages. PTH vias are imbedded in the core of a printed circuit board comprising a core layer, a plurality of buildup layers, a plurality of micro-vias, and a plurality of traces. Traces electrically interconnect each of the micro-vias to PTH vias, forming an electrically conductive path. PTHs are coated with a magnetic metal material, such as nickel, to increase the internal and external conductance of the PTHs, thereby providing decreased impedance discontinuity of the signals in electronic packages.05-21-2009
20110253440SUPPORTING SUBSTRATE AND METHOD FOR FABRICATING THE SAME - The invention provides a supporting substrate and method for fabricating the same. The supporting substrate includes: a substrate; a first surface metal layer formed on the substrate, wherein the first surface metal layer has a first opening; a second surface metal layer formed on the substrate and disposed oppositely to the first surface metal layer, wherein the substrate has a through hole, and the through hole is formed along the first opening to expose the second surface metal layer; a protective layer formed on the first surface metal layer and the second surface metal layer, wherein the protective layer has a second opening which exposes the through hole; and a conductive bump formed in the through hole, the first opening and the second opening, wherein the conductive bump is electrically connected to the second surface metal layer.10-20-2011
20110000707ELECTRONIC CIRCUIT UNIT - An electronic circuit unit includes a multi-layer substrate in which high frequency circuits are provided on two different layers and a ground layer is formed between the two layers, and grounding lands connected to peripheral conductive members through connection bars formed on a plurality of layers of the multi-layer substrate. The grounding lands are connected to each other through a via hole and conducted to the ground layer, and the connection bars protruding radially outward from at least two grounding lands provided on different layers are arranged in different directions with respect to a circumferential direction such that the connection bars do not overlap each other along a thickness direction of the multi-layer substrate.01-06-2011
20100319980PRINTED CIRCUIT BOARD - Disclosed herein is a printed circuit board. When power layers for supplying different voltages are sequentially stacked, a first EBG cell formed between a first power layer and a ground layer is arranged within a second EBG cell formed between a second power layer and the ground layer to allow the first EBG cell and the second EBG cell to have a double EBG structure. Accordingly, the present invention can prevent a DC open state while preventing noise and realizing band-stop characteristics.12-23-2010
20100282503MULTI-LAYER SUBSTRATE - A multi-layer substrate includes a planar transmission line structure and a signal via, which are connected by a multi-tier transition. The multi-tier transition includes a signal via pad configured to serve for a full-value connection of the signal via and the planar transmission line; and a dummy pad connected to the signal via, formed in an area of a clearance hole in a conductor layer disposed between a signal terminal of the signal via and the planar transmission line, and isolated from the conductor layer.11-11-2010
20110108317PACKAGED STRUCTURE HAVING MAGNETIC COMPONENT AND METHOD THEREOF - A packaged structure having a magnetic component and a method of manufacturing the same are provided. The packaged structure includes an insulating substrate having a ring-typed recess, an island portion and a surrounding portion defined by the ring-typed recess, wherein the ring-typed recess is laterally between the island portion and the surrounding portion. The packaged structure further includes a ring-typed magnetic component placed in the ring-typed recess; an upper wiring layer above the insulating substrate and a lower wiring layer under the insulating substrate; an inner plated through hole vertically passing through the island portion and connecting the upper wiring layer and the lower wiring layer; an outer plated through hole vertically passing through the surrounding portion and connecting the upper wiring layer and the lower wiring layer, wherein the inner plated through hole, the outer plated through hole, the upper wiring layer and the lower wiring layer form a coil of wire surrounding the ring-typed magnetic component.05-12-2011
20100181105PACKAGE FOR ELECTRON ELEMENT AND ELECTRONIC COMPONENT - A package for an electron element comprises: a base substrate made of ceramic; a frame body made of ceramic arranged on a top surface of the base substrate and provided therein with a cavity for accommodating the electron element; a via formed in the base substrate below the cavity, penetrating the base substrate from the top surface to a bottom surface thereof and filled with a thermally-conductive material; and a projecting part formed on an inner wall of the via and projecting toward a center of the via. The projecting part has a length along a direction perpendicular to a penetration direction of the via not less than a thickness along the penetration direction. An electronic component comprises the package and the electron element mounted thereon. The electron element is accommodated in the cavity defined inside the frame body of the package and arranged above the via.07-22-2010
20100181104METHOD FOR MANUFACTURING PRINTED CIRCUIT BOARD - The present invention is directed to a method for manufacturing a printed circuit board in which a plurality of conductive layers forming a wiring pattern are laminated in the state where they are put between insulating layers, and a printed circuit board formed thereby. The printed circuit board manufacturing method for the present invention includes a step of forming a via fill (07-22-2010
20110094789CONNECTION COMPONENT WITH HOLLOW INSERTS AND METHOD FOR MAKING SAME - The invention relates to a method for making a connection component that comprises a set of conducting inserts to be electrically connected with another component, said inserts being hollow.04-28-2011
20110094788PRINTED CIRCUIT BOARD WITH INSULATING AREAS - A printed circuit board includes a substrate including a first surface and a second surface opposite to the first surface, a pair of first pads positioned on the first surface and the second surface, and a plurality of insulating areas. The substrate defines a through hole and a plurality of vias extending from the first surface to the second surface. Each of the pair of first pads surrounds the through hole. The insulating areas are adjacent to the first pad to divide a reference metal layer of the substrate adjacent to the first pads into a plurality of metal strips to reduce heat dissipation area of the reference metal layer adjacent to the first pads. The vias are adjacent to the metal strips to supply extra heat to molten solder on the first surface in a wave-soldering process.04-28-2011
20130008706CORELESS PACKAGING SUBSTRATE AND METHOD OF FABRICATING THE SAME - A coreless packaging substrate is provided which includes: a circuit buildup structure having at least a dielectric layer, at least a wiring layer and a plurality of conductive elements, a plurality of electrical pads embedded in the lowermost one of the at least a dielectric layer, a plurality of metal bumps formed on the uppermost one of the at least a wiring layer, and a dielectric passivation layer formed on the surface of the uppermost one of the circuit buildup structure and the metal bumps, with the metal bumps exposed from the dielectric passivation layer. The metal bumps each have a metal column portion and a wing portion integrally connected to the metal column portion, such that the bonding force between the metal bumps and a semiconductor chip is enhanced by the entire top surface of the wing portions of the metal bumps being completely exposed.01-10-2013
20130008705CORELESS PACKAGE SUBSTRATE AND FABRICATION METHOD THEREOF - A coreless package substrate is provided, including: a circuit buildup structure including at least a dielectric layer, at least a circuit layer and conductive elements; first electrical contact pads embedded in the lowermost dielectric layer of the circuit buildup structure; a plurality of metal bumps formed on the uppermost circuit layer of the circuit buildup structure; a dielectric passivation layer disposed on a top surface of the circuit buildup structure and the metal bumps; and second electrical contact pads embedded in the dielectric passivation layer and electrically connected to the metal bumps. With the second electrical contact pads being engaged with the metal bumps and having top surfaces thereof completely exposed, the bonding strength between the second electrical contact pads and a chip to be mounted thereon and between the second electrical contact pads and the metal bumps can be enhanced.01-10-2013
20080217051WIRING BOARD AND METHOD OF MANUFACTURING WIRING BOARD - A wiring board including a plated through hole provided on the wiring board, and an indicator provided around the plated through hole. The indicator indicating a processing state related to the plated through hole.09-11-2008
20110259632PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - A base insulating layer is formed on a suspension body. Read wiring patterns, write wiring patterns and a ground pattern are formed in parallel on the base insulating layer. A first cover insulating layer is formed on the base insulating layer to cover the read wiring patterns, the write wiring patterns and the ground pattern. A ground layer is formed in a region on the first cover insulating layer above the write wiring patterns. A second cover insulating layer is formed on the first cover insulating layer to cover the ground layer.10-27-2011
20110186341STRUCTURE, ELECTRONIC DEVICE, AND CIRCUIT BOARD - A unit cell (08-04-2011
20120145448PRINTED CIRCUIT BOARD WITH COMPOUND VIA - A printed circuit board (PCB) with compound via includes a substrate and a pair of through holes passing through the substrate. The substrate includes a signal layer which is the top layer of the substrate, a first reference layer adjacent to the signal layer, and a second reference layer not adjacent to the signal layer. A first and a second pair of pads are mounted on the signal layer. Each of the through holes extends through the first pair of pads such that the through hole and the first pair of pads jointly form a compound via. A first reserved opening is formed on the first reference layer and corresponds to the first and the second pair of pads and the compound via. A second reserved opening is formed on the second reference layer and surrounds the through hole thereon.06-14-2012
20120247825PRINTED CIRCUIT BOARD - A printed circuit board (PCB) includes a top signal layer, a bottom signal layer, a ground layer, a plurality of vias, and at least two ground vias. Both the top signal layer and the bottom signal layer include at least one protection line. The ground layer is located between the top signal layer and the bottom signal layer. The at least two ground vias extend through the PCB and are located adjacent to the vias on the PCB. The at least two ground vias are electrically connected to the ground layer to conduct noise signals, and the at least two ground vias are electrically connected by the protection lines to insulate noise signals.10-04-2012
20110315440Electromagnetic bandgap structure and printed circuit board - An electromagnetic bandgap structure and a printed circuit board that have a mushroom type structure. The electromagnetic bandgap structure includes a first metal layer; a first dielectric layer, layer-built on the first metal layer; a mushroom type structure having a metal plate layer-built on the first dielectric layer and a via of which one end is connected to the metal plate; a second dielectric layer, layer-built on the metal plate and the first dielectric layer; and a second metal layer, layer-built on the second dielectric layer, wherein the other end of the via is placed in a hole formed on the first metal layer and is connected to the first metal layer through a metal line.12-29-2011
20120043127PRINTED CIRCUIT BOARD AND METHOD FOR FABRICATING THE SAME - The invention provides a printed circuit board and a method for fabricating the same. The printed circuit board includes a core substrate having a first surface and an opposite second surface. A first through hole and a second through hole are formed through a portion of the core substrate, respectively from the first surface and second surfaces, wherein the first and second through holes are laminated vertically and connect to each other. A first guide rail and a second guide rail are, respectively, formed through a portion of the core substrate and connected to the second through hole, so that a fluid flows sequentially from an outside of the printed circuit board through the first guide rail, the second through hole and the second guide rail, to the outside of the printed circuit board.02-23-2012
20120043128Printed circuit board and method of manufacturing the same - The present invention provides a multilayer printed circuit board and a method for manufacturing the same. The printed circuit board includes: an inner circuit layer which is disposed on a first insulating layer; a via land which is disposed on the first insulating layer to be spaced apart from the inner circuit layer and has a hole; a second insulating layer which is disposed on the first insulating layer including the inner circuit layer and the via land; first and second outer circuit layers which are disposed on outer surfaces of the first and second insulating layers, respectively; and a via which passes through the hole of the via land and the first and second insulating layers and electrically interconnects the first and second outer circuit layers.02-23-2012
20120000701ADJACENT PLATED THROUGH HOLES WITH STAGGERED COUPLINGS FOR CROSSTALK REDUCTION IN HIGH SPEED PRINTED CIRCUIT BOARDS - An electrical signal connection, an electrical signaling system, and a method of connecting printed circuit boards. The electrical signal connection having a first conductive via and a second conductive via disposed in a first printed circuit board. A first conductive trace with a first end and a second end has the first end electrically coupled to the first conductive via at a first distance from the top surface of the first printed circuit board. The second end of the first conductive via is electrically coupled to the second printed circuit board. A second conductive trace with a first end and a second end has the first end being electrically coupled to the second conductive via at a second distance from the top surface of the first printed circuit board. The second end being is electrically coupled to the second printed circuit board.01-05-2012
20120043129CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME - In a circuit board, a laminate includes a plurality of laminated insulating material layers made of a flexible material. First external electrodes are provided on an upper surface of the laminate, and an electronic component is mounted thereon. Second external electrodes are provided on a lower surface of the laminate and mounted on a wiring board. An internal conductor is provided between first and second adjacent insulating material layers, fixed to the first insulating material layer, and not fixed to the second insulating material layer. The internal conductor is arranged so as to extend across regions obtained by connecting certain ones of the second external electrodes to certain ones of the first external electrodes located closest to the certain ones of the second external electrodes.02-23-2012
20110155442MULTILAYER WIRING BOARD - A multilayer wiring board has a structure in which vias are formed on an inner wiring layer in directions toward both surfaces of the inner wiring layer, respectively, and lands are each defined in the inner wiring layer at a position to be connected to one of the vias, each of the lands having a side surface formed in a tapered shape. The lands include first lands and second lands, and the vias include a via connected to a surface on a smaller diameter side of the first land, and a via connected only to a surface on a larger diameter side of the second land. The size of the surface of the larger diameter side of the second land is equal to the size of the surface of the smaller diameter side of the first land.06-30-2011
20110155441CIRCUIT BOARD AND PROCESS FOR FABRICATING THE SAME - A process for fabricating a circuit board is provided. A circuit substrate having a first surface and a first circuit layer is provided. A first dielectric layer having a second surface is formed on the circuit substrate and covers the first surface and the first circuit layer. An antagonistic activation layer is formed on the second surface. The antagonistic activation layer is irradiated by a laser beam to form at least a blind via extended from the antagonistic activation layer to the first circuit layer and an intaglio pattern. A first conductive layer is formed inside the blind via. A second conductive layer is formed in the intaglio pattern and the blind via. The second conductive layer covers the first conductive layer and is electrically connected with the first circuit layer through the first conductive layer. The antagonistic activation layer is removed to expose the second surface.06-30-2011
20110155440CIRCUIT BOARD AND PROCESS FOR MANUFACTURING THE SAME - A circuit board including a circuit substrate, a dielectric layer, a first conductive layer and a second conductive layer is provided. The circuit substrate has a first surface and a first circuit layer. The dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The dielectric layer has a second surface, at least a blind via extended from the second surface to the first circuit layer and an intaglio pattern. The first conductive layer is disposed inside the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via and covers the first conductive layer. The second conductive layer is electrically connected with the first circuit layer through the first conductive layer.06-30-2011
20120152607PRINTED CIRCUIT BOARD - A printed circuit board (PCB) includes first and second signal layers. First and second pairs of signal transmission lines are respectively laid out on the first and second signal layers. The first pair of signal transmission lines includes first positive and negative differential signal transmission lines. The second pair of signal transmission lines includes second positive and negative differential signal transmission lines. The first positive differential signal transmission line is electrically connected to the second negative differential signal transmission line by a first vertical interconnect access (via). The first negative differential signal transmission line is electrically connected to the second positive differential signal transmission line by a second via. An angle between a centerline of each of the first via and second via and a surface of the PCB is an acute angle.06-21-2012
20090133920Printed circuit board and manufacturing method of the same - A printed circuit board and a manufacturing method of the same. The method includes forming a circuit board by selectively positioning a heat release layer among multiple insulation layers that have circuit patterns formed on their surfaces, perforating a through-hole that penetrates through one side and the other side of the circuit board, forming a metal film over the heat release layer exposed at an inner wall surface of the through-hole, and forming a plating layer by depositing a conductive metal over an inner wall of the through-hole. By having the heat release layer selectively inserted inside the circuit board, the heat releasing effect may be improved, and the bending strength may be increased. Moreover, a reliable electrical connection can be implemented between the heat release layer and the circuit pattern, making it possible to utilize the heat release layer as a power supply layer or a ground layer.05-28-2009
20120125679PRINTED CIRCUIT BOARD HAVING DIFFERENTIAL VIAS - A printed circuit board includes an insulating board, a pair of differential vias, and a number of wiring layers. A pair of via holes extends through opposite surfaces of the insulating board. The differential vias correspond to the pair of via holes. Each differential via includes a metal plated barrel and two via capture pads. The plated barrel is plated on the inner surface of the respective via hole, and terminates at each of the two opposite surfaces of the insulating board. The via capture pads are formed on the opposite surfaces of the insulating board around the openings of the via hole, and are electrically connected to the plated barrel. The wiring layers are arranged in the insulating board, and each define a clearance hole surrounding all of the via capture pads.05-24-2012
20120125680MULTILAYERED PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - An opening is formed in resin 05-24-2012
20120160556Circuit board and method of manufacturing the same - Provided is a circuit board including a base substrate on which an internal circuit structure is formed, an insulating material configured to cover the base substrate and having a via-hole configured to expose the internal circuit pattern, an external circuit structure formed on the insulating material and electrically connected to the internal circuit structure through the via-hole, and a solder resist pattern configured to cover the insulating material to expose the external circuit structure, wherein the insulating material has a structure in which an adhesion surface between the insulating material and the solder resist pattern is stepped with respect to an adhesion surface between the insulating material and the external circuit structure.06-28-2012
20120132464METHOD FOR MANUFACTURING PRINTED WIRING BOARD, PRINTED WIRING BOARD, AND ELECTRONIC DEVICE - A method for manufacturing a printed wiring board includes filling material in through holes formed in first lands on a first substrate, forming projection portions projecting from the first lands on the surface of the material of the through holes, placing a conductive material on the first lands, and electrically connecting the first lands of the first substrate and second lands of second substrate by pressing the conductive material under melting filled between the first and second lands in the lamination direction of the substrates by the projection portions when laminating the substrates in such a manner that the lands of the other substrate face the lands of the substrate for aggregation of the conductive material.05-31-2012
20120312591Printed Circuit Board and Method of Manufacturing the Same - Disclosed herein is a printed circuit board including: an insulating layer including a stopper layer for trench formation disposed in an inner portion thereof and trenches formed to expose the stopper layer for trench formation; and circuit patterns formed in the trenches.12-13-2012
20120211273VIA STUB ELIMINATION - An enhanced mechanism is disclosed for via stub elimination in printed wiring boards (PWBs) and other substrates. In one embodiment, the substrate includes a plurality of insulator layers and internal conductive traces. First and second through-holes extend completely through the substrate and respectively pass through first and second ones of the internal conductive traces, which are at different depths within the substrate. Photolithographic techniques are used to generate plated-through-hole (PTH) plugs of controlled, variable depth in the through-holes before first and second conductive vias are respectively plated onto the first and second through-holes. The depth of these PTH plugs is controlled (e.g., using a photomask and/or variable laser power) to prevent the first and second conductive vias from extending substantially beyond the first and second internal conductive traces, respectively, and thereby prevent via stubs from being formed in the first place.08-23-2012
20100175917WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A wiring board (package) has a structure in which multiple wiring layers are stacked one on top of another with insulating layers each interposed between corresponding two of the wiring layers, and the wiring layers are connected to one another through vias formed in each of the insulating layers. In a peripheral region of the package, reinforcing patterns are provided on the same surfaces where the corresponding wiring layers are provided, respectively. Each of the reinforcing patterns is formed of a conductive layer formed on the same surface where the corresponding one of the wiring layers is provided, and is provided in an intermittent ring-like shape when viewed in a planar view.07-15-2010
20100012368CERAMIC SUBSTRATE MANUFACTURING METHOD AND CERAMIC SUBSTRATE - A method for manufacturing a ceramic substrate having a via hole(s) and a surface wiring pattern electrically connected to the via hole(s). The method includes: preparing a sintered ceramic substrate having a via hole(s); forming over the sintered ceramic substrate a sintered ceramic layer having a hole(s) or opening(s) whose bottom is configured to be at least a part of an exposed end surface of the via hole(s) by post-firing method; forming inside the hole(s) or opening(s) a conductive portion which electrically connects the surface of the sintered ceramic layer and the via hole(s); and forming over the surface of the sintered ceramic layer a surface wiring pattern electrically connected to the conductive portion.01-21-2010
20100012367PRINTED CIRCUIT BOARD ARRANGEMENT - The present invention relates to a printed circuit board arrangement with a multi-layer substrate (01-21-2010
20120255771PACKAGING SUBSTRATE AND METHOD OF FABRICATING THE SAME - A packaging substrate includes a core board having a first surface and an opposite second surface; at least a conic through hole formed in the core board and penetrating the first and second surfaces; a plurality of conductive paths formed on a wall of the conic through hole, free from being electrically connected to one another in the conic through hole; and a plurality of first circuits and second circuits disposed on the first and second surfaces of the core board, respectively, and being in contact with peripheries of two ends of the conic through hole, wherein each of the first circuits is electrically connected through each of the conductive paths to each of the second circuits. Compared to the prior art, the packaging substrate has a reduced number of through holes or vias and an increased overall layout density.10-11-2012
20120255770Carrier and Method for Fabricating Thereof - A method for fabricating a carrier is disclosed, wherein the carrier is applied for a microelectromechanical sensing device. The method includes the steps of: providing a first substrate, wherein the first substrate includes a first metal layer, a first dielectric layer, and a first opening; providing a second substrate, wherein the second substrate includes a second metal layer, a second dielectric layer, and a second opening; providing a reticular element; pressing the first substrate, the reticular element, and the second substrate to form a composite substrate, wherein the first opening and the second opening form a hole, and the reticular element is positioned in the hole; and forming at least one conductive via in the composite substrate.10-11-2012
20120261180Circuit Board - A circuit board is capable of reduce the effect of bowing. The circuit board comprises a substrate, a plurality of first vias, a plurality of second vias, and a plurality of first blocks. The substrate comprises a conductive layer outside the first blocks. The first vias pass through the substrate and the conductive layer. The first blocks would comprise the second vias, which passes through the substrate. The first vias and the first blocks can be individually or jointly disposed in a central area of the substrate, around a fastening hole, or around a circuit component. The fastening hole can be connected to at least one of the second vias by a conducting wire when the first block with the second vias is disposed around the fastening hole.10-18-2012
20120325544STRUCTURE, CIRCUIT BOARD, AND CIRCUIT BOARD MANUFACTURING METHOD - The disclosed structure (12-27-2012
20110226520INTEGRATED CIRCUIT CARRIER ASSEMBLY - A carrier assembly for an integrated circuit is disclosed. The assembly has a printed circuit board, a receiving zone for operatively locating the integrated circuit, and a matrix of island contacts surrounding the receiving zone. The matrix of island contacts is separated from the receiving zone by a passage and is in electrical contact with the PCB. The receiving zone electrically connects the integrated circuit to the island contacts.09-22-2011
20120298413WIRING SUBSTRATE AND METHOD FOR MANUFACTURING WIRING SUBSTRATE - A wiring substrate includes a body including first and second surfaces, a trench having an opening on the first surface and including, a bottom surface, a side surface, and a slope surface that connects a peripheral part of the bottom surface to a one end part of the side surface and widens from the peripheral part to the one end part, the one end part being an end part opposite from the first surface, a hole including an end communicating with the bottom surface and another end being open on the second surface, a first layer filling at least a portion of the hole and including a top surface toward the trench, a second layer covering the top surface and formed on at least a portion of the trench except for a part of the side surface, and a third layer covering the second layer and filling the trench.11-29-2012
20120298412PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Disclosed herein are a printed circuit board and a method of manufacturing the same. The method of manufacturing a printed circuit board includes: preparing a base substrate having first circuit layers formed on one surface or both surfaces thereof; forming a plating resist having openings for a first via layer on the base substrate; forming first via layers in the openings for a first via layer; forming insulating layers having outer metal layers on the base substrate having the first via layers formed thereon; forming openings for a second via layer over the first via layer on the insulating layers and the outer metal layers; and completing multi-layer vias by forming second via layers in the openings.11-29-2012
20120325543PRINTED WIRING BOARD (PWB) WITH LANDS - A PWB having a plurality of through holes into which electronic parts' leads are inserted, and metal plated lands formed around the through holes. The metal plated lands are polygon in which the number of sides is an even number and each pair of facing sides are parallel, and the lands have circular concaves at all the corners and the sides of polygon are arranged to be parallel to the sides of the neighboring metal plated lands.12-27-2012
20120090884PRINTED CIRCUIT BOARD - A printed circuit board includes a plurality of power layers. Each power layer defining a number of vias arranged in a number of rows. The number of the power layers is N (N>3). The power layers are defined as a 1st, 2nd, . . . , Nth power layer. The vias of the 1st power layer are connected to other power layers by a step-shaped connection means.04-19-2012
20130020121SUBSTRATE HAVING A PLURAL DIAMETER VIA - A substrate is provided that includes a plurality of substrate layers and a plural diameter via having a first via portion and a second via portion. The first via portion is formed in a first substrate layer, has a first diameter, and extends along a first axis. The second via portion is formed in a second substrate layer, has a second diameter that is different than the first diameter of the first via portion, and extends along a second axis that is offset from the first axis of the first via portion. Optionally, the first via portion and the second via portion may have a common edge that is spaced the same distance from an edge of another via extending through the substrate.01-24-2013
20120241208Signal routing Optimized IC package ball/pad layout - This invention provides layout schemes for ball/pad regions on a printed circuit board for a small regular ball/pad region grid that provides additional space between ball/pad regions for increased wiring capability. The layout scheme is consistent with printed circuit board manufacturing requirements and minimum wiring channel requirements demanded by high density integrated circuit chips.09-27-2012
20080245558VIA STRUCTURE OF PRINTED CIRCUIT BOARD - A printed circuit board (10-09-2008
20130112471PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a printed circuit board and a method of manufacturing the same. The printed circuit board includes preparing a base substrate; forming a pattern layer for forming via holes on the base substrate by printing ink for forming via holes; forming an insulating layer on the base substrate including the pattern layer for forming via holes; and removing the pattern layer for forming via holes.05-09-2013
20130112470CIRCUIT BOARDS WITH VIAS EXHIBITING REDUCED VIA CAPACITANCE - The present invention relates to circuit boards and, more specifically, circuit boards with vias (i.e. via holes) exhibiting reduced via capacitance. In one embodiment, the present invention provides a circuit board comprising a first electrically conductive trace, a second electrically conductive trace, a via hole including electrically conductive material thereon, and a coupling element that electrically connects the first trace to the second trace. The coupling element comprises a segment of the via hole that bridges the first trace and the second trace, wherein the via hole segment is a remainder of the via hole after removal of a portion of the via hole.05-09-2013
20130098671MULTIPLE LAYER PRINTED CIRCUIT BOARD - A printed circuit board (PCB) stack-up has a signal via configured to transmit a signal through at least two different layers of the PCB stack-up, a reference structure that is at least a portion of a return path for the signal; and an unplated via disposed in an area surrounding the signal via. The unplated via is disposed in the area surrounding the signal via to improve the characteristic impedance of the signal via.04-25-2013
20130126226METHOD OF MAKING A SUPPORT STRUCTURE - The invention relates to a method of manufacturing a support structure for supporting an article in a lithographic process, comprising: providing a substrate having an electrically conductive top layer provided on an insulator; patterning the conductive top layer to provide a patterned electrode structure; and oxidizing the conductive top layer, so as to provide a buried electrode structure having an insulating top surface. In this way a simple buried structure can be provided as electrode structure to conveniently provide an electrostatic clamp. The invention additionally relates to a correspondingly manufactured support structure for supporting an article in a lithographic process.05-23-2013
20100307810ENERGY CONDITIONING CIRCUIT ARRANGEMENT FOR INTEGRATED CIRCUIT - The present invention relates to an interposer substrate for interconnecting between active electronic componentry such as but not limited to a single or multiple integrated circuit chips in either a single or a combination and elements that could comprise of a mounting substrate, substrate module, a printed circuit board, integrated circuit chips or other substrates containing conductive energy pathways that service an energy utilizing load and leading to and from an energy source. The interposer will also possess a multi-layer, universal multi-functional, common conductive shield structure with conductive pathways for energy and EMI conditioning and protection that also comprise a commonly shared and centrally positioned conductive pathway or electrode of the structure that can simultaneously shield and allow smooth energy interaction between grouped and energized conductive pathway electrodes containing a circuit architecture for energy conditioning as it relates to integrated circuit device packaging. The invention can be employed between an active electronic component and a multilayer circuit card. A method for making the interposer is not presented and can be varied to the individual or proprietary construction methodologies that exist or will be developed.12-09-2010
20100307809PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A wiring board having a penetrating hole formed by forming holes with different shapes from both surfaces of a substrate. In such a penetrating hole, the depth of a first opening portion formed in the first-surface side of the substrate is shallower than the depth of a second opening portion formed in the second-surface side, and the diameter of a first opening is greater than the diameter of a second opening. Even if the gravity line of the first opening portion and the gravity line of the second opening portion are shifted from each other, the region of the second opening portion inserted into the inner space of the first opening portion may be made larger.12-09-2010
20110232955CIRCUIT BOARD HAVING IMPROVED GROUND VIAS - A circuit board includes a substrate having an upper surface and a lower surface. The circuit board has signal vias extending at least partially through the substrate along signal via axes being configured to receive signal terminals and ground vias extending at least partially through the substrate along ground via axes being configured to receive ground terminals. The ground vias are arranged in a predetermined pattern around the signal vias to create a ground ring surrounding the corresponding signal via, wherein the ground vias are at least partially filled with a conductive material to create a ground column. Each ground column extends from a column top to a column bottom. A first subset of the ground columns extending to a first depth and a second subset of the ground columns extending to a second depth greater than the first depth.09-29-2011
20100314163METHOD FOR ASSURING COUNTERBORE DEPTH OF VIAS ON PRINTED CIRCUIT BOARDS AND PRINTED CIRCUIT BOARDS MADE ACCORDINGLY - A method is disclosed for fabricating a PCB so that is can easily be determined if a via in the PCB has not been counterbored to a desired depth. A PCB fabricated according to the method also is disclosed.12-16-2010
20120018209PRINTED CIRCUIT BOARD - A printed circuit board defines a groove used to engage with an electronic element. The groove defines a plurality of side walls. The PCB further defines a plurality of via holes at junctions between each two neighboring side walls. The via holes are communicate with the groove and have a C-shaped section. When the electronic element is received in the groove, the electronic element snugly engages with the plurality of side walls of the groove.01-26-2012
20120292093CIRCUIT BOARD AND RADIATING HEAT SYSTEM FOR CIRCUIT BOARD - In a circuit board, a plurality of conductive layer regions coated with a conductor are separately formed on both sides of an insulating substrate, the conductive layer region formed on either side of an insulating region on each of the both sides of the insulating substrate. The plurality of the conductive layer regions include a plurality of through holes which penetrate through the insulating substrate and are coated with a conductor over an inner wall, the conductor in the through hole electrically conducts the coated conductor of the plurality of the conductive layer regions, one of the lead pins is connected to one of the separated conductive layer regions on the both sides based on the insulating region, and the other lead pin is connected to the other conductive layer region.11-22-2012
20120292092METHOD OF MANUFACTURING CIRCUIT BOARD AND CIRCUIT BOARD MANUFACTURED BY THE METHOD - A method of manufacturing a circuit board includes: providing a base substrate that comprises a first electrically conductive layer that has an inner circuit pattern formed on at least one surface of the base substrate; attaching a build-up material to the base substrate to insulate the first electrically conductive layer from outside; forming one or more holes at one time in the build-up material attached to the base substrate; forming a stack by curing the build-up material in which the one or more holes are formed; and forming a second electrically conductive layer that has an outer circuit pattern formed on at least one outer surface of the stack. The method may form the holes without drilling.11-22-2012
20120043130RESILIENT CONDUCTIVE ELECTRICAL INTERCONNECT - An interconnect assembly including a resilient material with a plurality of through holes extending from a first surface to a second surface. A plurality of discrete, free-flowing conductive particles is located in the through holes. The conductive particles are preferably substantially free of non-conductive materials. A plurality of first contact tips are located in the through holes adjacent the first surface and a plurality of second contact tips are located in the through holes adjacent the second surface. The resilient material provides the required resilience, while the conductive particles provide a conductive path substantially free of non-conductive materials.02-23-2012
20130199834STRUCTURED CIRCUIT BOARD AND METHOD - A circuit board (08-08-2013

Patent applications in class Hollow (e.g., plated cylindrical hole)