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With particular conductive connection (e.g., crossover)

Subclass of:

174 - Electricity: conductors and insulators

174680100 - CONDUITS, CABLES OR CONDUCTORS

174250000 - Preformed panel circuit arrangement (e.g., printed circuit)

Patent class list (only not empty are listed)

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Class / Patent application numberDescriptionNumber of patent applications / Date published
174262000 Feedthrough 465
174267000 Termination post 36
Entries
DocumentTitleDate
20110174527ELEMENT MOUNTING BOARD, SEMICONDUCTOR MODULE, SEMICONDUCTOR DEVICE, METHOD FOR FABRICATING THE ELEMENT MOUNTING BOARD, AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A semiconductor device is of a PoP structure such that first electrode portions provided in a first semiconductor module and second electrode portions provided in a second semiconductor module are joined together by solder balls. The first electrode has a first conductor having the same thickness as that of a wiring layer provided in an insulating layer, a second conductor formed on the first conductor, a gold plating layer provided on the second conductor.07-21-2011
20100084176PRESERVING STOPBAND CHARACTERISTICS OF ELECTROMAGNETIC BANDGAP STRUCTURES IN CIRCUIT BOARDS - The stopband characteristics of an electromagnetic bandgap structure in a printed circuit board may be preserved by selectively forming slots in an additional conductive layer of the printed circuit board. For example, an electromagnetic bandgap structure may include a layer with a continuous conductive region and another layer with a periodically patterned region having a plurality of spaced-apart patches interconnected by branches. Additional conductive layers may be included within the printed circuit board without neutralizing the bandgap by forming slots in the conductive layers in general alignment with spaces between the patches.04-08-2010
20080257595Packaging substrate and method for manufacturing the same - The present invention relates to a packaging substrate and a method for manufacturing the same. The packaging substrate includes: a substrate body, having a plurality of conductive pads on the surface thereof, wherein the top surfaces of the conductive pads have a concave each; a solder mask, disposed on the surface of the substrate body and having a plurality of openings to correspondingly expose the concaves of the conductive pads each; and a plurality of metal bumps, disposed correspondingly in the openings of the solder mask and over the concaves of the conductive pads. The present invention increases the joint surface area between the metal bumps and the conductive pads so as to inhibit the joint crack and improve the reliability of the conductive structure of the packaging substrate.10-23-2008
20130075144PACKAGE SUBSTRATE WITH MESH PATTERN AND METHOD FOR MANUFACTURING THE SAME - Disclosed herein are a package substrate and a method for manufacturing the same. According to an exemplary embodiment, there is provided a package substrate with a mesh pattern, including: a plurality of bonding pads forming sections connected with the outside; an insulating layer formed below the plurality of bonding pads; and a metallic layer placed below the insulating layer and having the mesh pattern in at least a partial area thereof and capacitance is provided by a combination of the mesh pattern and the insulating layer that infiltrates into a space for the mesh pattern. Further, there is provided a method for manufacturing the package substrate with the mesh pattern.03-28-2013
20100071950Wiring Board and Manufacturing Method Thereof - A wiring board is comprised of a plurality of circular semiconductor element connection pads deposited in a lattice form onto a mounting portion of an insulation substrate, their upper surfaces being connected to electrodes of a semiconductor element, and a solder resist layer deposited onto the insulation substrate, which covers the side surfaces of these pads and exposes the upper surfaces of these pads. The solder resist layer has a concave part whose bottom surface corresponds to at least all the upper surfaces of these pads. A method of manufacturing a wiring board includes the step of forming a plurality of circular semiconductor element connection pads in a lattice form on a mounting portion of an insulation substrate; the step of depositing onto the insulation substrate a resin layer for a solder resist layer for burying these pads; and forming a solder resist layer by partially removing the resin layer, the solder resist layer covering the side surfaces of these pads and having a concave part whose bottom surface corresponds to at least all the upper surfaces of the pads.03-25-2010
20100071949ELECTRONIC COMPONENT - An electronic component has an element body, and a plurality of external electrodes formed on one principal face of the element body. Each external electrode has a first electrode layer joined to the one principal face of the element body, and a second electrode layer joined as laid on an inside region inside an edge of the first electrode layer. An apical surface of the second electrode layer is planar. A joint portion in the second electrode layer to the first electrode layer is rounded.03-25-2010
20120175162PRINTED CIRCUIT BOARD - A printed circuit board having an insulating layer; circuit patterns formed on both surfaces of the insulating layer in order to be embedded in the insulating layer; and a bump formed to pass through the insulating layer in order to electrically connect the circuit patterns formed on both surfaces of the insulating layer.07-12-2012
20100163294METHOD FOR FORMING METAL LINE OF SEMICONDUCTOR DEVICE - A method of forming a metal line of a semiconductor device, and devices thereof. A method of forming a metal line of a semiconductor device may include forming a multi-layer structure over a substrate, forming a photoresist pattern over a multi-layer structure, forming a metal line by selectively etching a multi-layer structure using a photoresist pattern as an etching mask, removing an electron over a surface of a metal line by processing a surface of a metal line, and/or cleaning a metal line.07-01-2010
20130032388METHOD OF MAKING CAVITY SUBSTRATE WITH BUILT-IN STIFFENER AND CAVITY SUBSTRATE MANUFACTURED THEREBY - The present invention relates to a method of making a cavity substrate. The method includes: preparing a supporting board including a stiffener, a bump/flange sacrificial carrier, an adhesive and an electrical pad, wherein the adhesive bonds the stiffener to the sacrificial carrier; forming a coreless build-up circuitry on the supporting board in contact with the bump and the stiffener; and removing the bump to form a cavity and expose the electrical pad from a closed end of the cavity, wherein the cavity is laterally covered and surrounded by the adhesive. A semiconductor device can be mounted on the cavity substrate and electrically connected to the electrical pad. The coreless build-up circuitry provides signal routing for the semiconductor device while the built-in stiffener can provide adequate mechanical support for the coreless build-up circuitry and the semiconductor device.02-07-2013
20100044091ELECTRODE STRUCTURE AND METHOD FOR FORMING BUMP - An electrode structure 02-25-2010
20100116539CIRCUIT BOARD INCLUDING SOLDER ABLL LAND HAVING HOLE AND SEMICONDUCTOR PACKAGE HAVING THE CIRCUIT BOARD - A circuit board and a semiconductor package having the same are provided. The circuit board comprises a base substrate having interconnections, and solder ball lands disposed on one surface of the base substrate. The solder ball lands respectively have land holes having different sizes. The land hole disposed at the center portion of the base substrate and the land hole disposed at the edge portion of the base substrate may have different sizes. For example, the sizes of the land holes may increase from the center portion of the base substrate to the edge portion thereof, and alternatively, the sizes of the land holes may decrease from the center portion of the base substrate to the edge portion thereof.05-13-2010
20100116538PRINTED WIRING BOARD AND ELECTRONIC DEVICE - A printed wiring board includes a land formed on a surface layer, at least one power supply pattern formed on a layer except the surface layer on which the land is formed, a plurality of vias which includes a first via electrically connected to the power supply pattern and a second via electrically connected to the power supply pattern and the first via and the second via are electrically connected to the land.05-13-2010
20100116537PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - An end of a first line and an end of a second line of a first write wiring pattern are arranged on both sides of a third line of a second write wiring pattern. Circular connection portions are provided at the ends of the first line and the second line. Through holes are formed in portions of a cover insulating layer above the connection portions, respectively. First connecting layers made of copper, for example, are formed to fill the through holes of the cover insulating layer. A substantially rectangular second connecting layer made of copper, for example, is formed to integrally cover upper ends of the connecting layers. This causes the first and second lines to be electrically connected to each other through the first and second connecting layers.05-13-2010
20100116536Printed circuit board having buried solder bump and manufacturing method thereof - Disclosed is a printed circuit board having a buried solder bump, in which a circuit pattern and a solder bump formed on the circuit pattern are buried in an insulating layer, thus improving the degree of matching between the solder bump and the circuit pattern and obviating a need for an additional coining process of the solder bump. A manufacturing method thereof is also provided.05-13-2010
20100126761Printed circuit board having buried pattern and method of manufacturing the same - Disclosed herein is a method of manufacturing a printed circuit board having a buried pattern, including: forming a second insulation layer on a first insulation layer, the second insulation layer having openings for forming a circuit layer; and filling the openings with a conductive metal to form a circuit layer.05-27-2010
20090159324PRINTED CIRCUIT BOARD AND METHOD OF PRODUCING THE SAME - According to one embodiment, a printed circuit board includes: a product portion having a given outer shape; and a cutout portion disposed in the given outer shape of the product portion, for being removed away in a later production step. The cutout portion comprises a test coupon including two signal terminals and two parallel wiring patterns meanderingly extended respectively from the two signal terminals.06-25-2009
20090151993SHIELDED CABLE INTERFACE MODULE AND METHOD OF FABRICATION - A shielded cable interface module having cable receiving grooves extending laterally to an edge of the board, each including a center conductor groove, an insulator groove, and a shield groove. A center conductor via and a shield via extend through the board. A conductor plane on the cable termination side surrounds the cable receiving grooves. The conductor plane includes a non-conductor region within the conductor plane adjacent to each of the conductor center conductor grooves. Ground vias associated with the cable receiving grooves are spaced apart from and partially surround the center conductor via outside and adjacent to the non-conductor region, the ground vias extend through the printed circuit board from the cable termination side to the system interface side.06-18-2009
20130081869TOUCH SENSING APPARATUS AND METHOD OF MANUFACTURING THE SAME - Disclosed is a touch sensing apparatus having a transparent substrate that includes a touch sensing region and a peripheral region outside the touch sensing region. The touch sensing region may include a pair of column electrodes extending in a vertical direction; a plurality of patch electrodes arranged in two columns in the vertical direction, the two columns of patch electrodes interposed between the pair of column electrodes without an intervening column electrode; a plurality of first wirings electrically connected to the pair of column electrodes; and a plurality of second wirings electrically connected to the two columns of patch electrodes.04-04-2013
20130081868PRINTED CIRCUIT BOARD - Disclosed herein is a printed circuit board, including: a dielectric substrate having a ground surface; a plurality of pads formed on the dielectric substrate; a transmission line transmitting a signal between the plurality of pads; and slots formed in partial regions of the ground surface correspondingly to the pads, thereby to improve signal transmitting characteristics and allow high-density wiring and thin thickness.04-04-2013
20100065321PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A printed wiring board comprises ground layers stacked via insulator(s); a first through hole; second through holes formed at predetermined positions along a circle concentric with a center axis of the first through hole; clearances provided between the first through hole and each of the ground layers; and signal wirings each extending from the first through hole through the clearance between predetermined ones of the ground layers, disposed between predetermined second through holes of the second through holes. Each of first clearances in the ground layers neighboring layer in which the signal wiring is disposed has an outline that a distance between the first through hole and outline of the first clearance is minimum of the signal wiring. Each of second clearances in the ground layers not adjacent to the signal wiring has an outline formed outside a circle connecting each center of second through holes centering the first signal through hole, such that outline of second clearance docs not contact with the second through holes. The second through holes arc not connected to the ground layers that are not adjacent to the signal wiring but are connected to the ground layer neighboring layer in which the signal wiring is disposed.03-18-2010
20100065320WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - Disclosed is a wiring board comprising a plurality of conductors (03-18-2010
20120181075FLEXIBLE FLAT CABLE ASSEMBLY AND METHOD OF MANUFACTURING THE SAME - A flexible flat cable assembly (07-19-2012
20120181074WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A wiring board having an insulation layer, and a buildup structure formed on the insulation layer and including insulation layers. The insulation layer and the buildup structure form a board structure in which a cavity portion having an opening on a surface of the buildup structure on the opposite side of the insulation layer is formed. The cavity portion is extending through one or more of the insulation layers in the buildup structure and has a groove portion formed on the bottom surface of the cavity portion along a wall surface of the cavity portion. The board structure composed of the insulation layer and the buildup structure has a pad formed on the bottom surface of the cavity portion in a position farther from the wall surface of the cavity portion than the groove portion.07-19-2012
20100006333Wiring substrate and method of manufacturing the same - Provided is a wiring substrate which enables wiring density to be increased and enables transmission speed of signals to be adjusted without making a design change of wirings. A wiring substrate 01-14-2010
20120217050CONTACT - A contact includes a solder bonding portion, an elastic contact portion, and a suction portion. An undersurface of the solder bonding portion is a solder bonding face which is to be solder bonded to the conductor pattern. The elastic contact portion is connected to one end of the solder bonding portion and bent over the solder bonding portion. When in contact with a conductive member, the elastic contact portion is pressed against the conductive member while being elastically deformed. The suction portion is connected to the solder bonding portion independently of the elastic contact portion. The suction portion is made a suction face for a suction nozzle of an automatic mounter, with its top end being arranged in parallel to the undersurface of the solder bonding portion on the conductive member side of the elastic contact portion.08-30-2012
20090056997Electronic Assemblies Without Solder and Methods for their Manufacture03-05-2009
20090266598WIRING BOARD - A wiring board includes a plate-shaped resin member; chip connection pads provided in the resin member, the chip connection pads having connection surfaces electrically connected to electrode pads provided on a semiconductor chip, the connection surfaces being situated in substantially the same plane as a first surface of the resin member, the first surface being a side where the semiconductor chip is mounted; pads provided in a portion of the resin member, the portion being situated outside an area where the chip connection pads are formed; lead wirings connected to the pads; and conductive wires sealed by the resin member, the conductive wires electrically connecting the chip connection pads and the pads to each other.10-29-2009
20090266597PRINTED CIRCUIT BOARD PREFORM WITH TEST FACILITATING MEANS - An exemplary printed circuit board preform (10-29-2009
20130213704PACKAGE STRUCTURE AND THE METHOD TO FABRICATE THEREOF - The invention discloses a package structure made of the combination of a device carrier and a modifiable substrate. In one embodiment, a recess is formed in the device carrier and a conductive element is disposed on the substrate, wherein the substrate is disposed on the device carrier and the conductive element is located in the recess of the device carrier. The conductive pattern in the substrate is electrically connected to the device carrier and I/O terminals of the first conductive element. The invention also discloses a method for manufacturing a package structure made of the combination of a device carrier and a modifiable substrate. In one embodiment, a portion of the conductive pattern in the substrate can be modified.08-22-2013
20130068516HIGH IO SUBSTRATES AND INTERPOSERS WITHOUT VIAS - An interconnection component includes a substrate having first and second opposed major surfaces defining a thickness of less than 1000 microns and a first slot extending between the first and second surfaces, the first slot being enclosed by the substrate at the first and second surfaces. The first slot defines an edge surface between the first surface and the second surface. First conductive traces extend along the first surface and are electrically connected with first contact pads that overlie the first surface. Second conductive traces extend along the second surface and electrically connected with second contact pads that overlie the second surface. Interconnect traces extend along the edge surface of the first slot. Each interconnect trace directly connects at least one first trace with at least one second trace.03-21-2013
20090008142Porous Film and Multilayer Assembly Using the Same - [Object] To provide a multilayer assembly that excels in pore properties, is flexible, and is satisfactorily handled and processed; and a method of producing the multilayer assembly. 01-08-2009
20120111624MULTILAYER WIRING SUBSTRATE - A multilayer wiring substrate has a main face and a back face, and a configuration in which a plurality of resin insulation layers and a plurality of conductor layers are laminated. A plurality of conductor layers provided on the side toward the back face in relation to a resin insulation layer serving as a center layer are formed such that the average of their area ratios becomes greater than the average of area ratios of a plurality of conductor layers provided on the side toward the main face in relation to the center layer. A plurality of resin insulation layers provided on the side toward the back face are formed such that the average of their thicknesses becomes greater than the average of thicknesses of a plurality of resin insulation layers provided on the side toward the main face.05-10-2012
20120234589WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A wiring substrate includes a structure in which a plurality of wiring layers are stacked through insulating layers intervening therebetween, and which has a first surface side and a second surface side, the first surface side where a semiconductor element is to be mounted, the second surface side being located at an opposite side to the first surface side, an interposer buried in an outermost one of the insulating layers located at the first surface side, and electrically connected to the semiconductor element to be mounted, and a sheet-shaped member buried in an outermost one of the insulating layers located at the second surface side, wherein, the interposer and the sheet-shaped member are disposed at symmetrical positions symmetrical each other.09-20-2012
20080296056Printed circuit board, production method therefor, electronic-component carrier board using printed circuit board, and production method therefor - A printed wiring board has a substrate having a first surface and a second surface on both sides of the substrate. A cavity is provided on the first surface. The cavity caves in towards the second surface. Several bumps are formed in the cavity as protruding towards the first surface. An insulation layer is filled in the cavity. The bumps are isolated from one another by the insulation layer. The top of each bump that protrudes towards the first surface and a zone in the cavity and close to the top are exposed in the cavity without being covered by the insulation layer.12-04-2008
20080296055Printed circuit board and method of fabricating the same - This invention relates to a printed circuit board and a method of fabricating the same, in which the thickness of a circuit pattern is decreased to thus realize a fine circuit, the circuit pattern is embedded in an insulating layer to thus decrease the thickness of a printed circuit board, and the time and cost required for the process of fabricating a printed circuit board are decreased.12-04-2008
20130161081CONNECTING STRUCTURE OF TOUCH PANEL - Disclosed herein is a connecting structure of a touch panel, the connecting structure including a circuit line of a base substrate, a connecting portion having a surface of the circuit line, and a touch signal line connected to the surface of the circuit line and formed on a transparent substrate, wherein the circuit line and the touch signal line are electrically connected to each other by the connecting portion.06-27-2013
20090133916Optoelectronic Device and Method for Producing an Optoelectronic Device - An optoelectronic device includes an optoelectronic component, the optoelectronic component having an active region and at least one first conductive path on a first substrate, wherein the first conductive path is electrically connected to the active region. Further, the optoelectronic device comprises a second substrate with at least one second conductive path, wherein the first conductive path and the second conductive path are electrically connected to one another.05-28-2009
20090078456Three dimensional packaging optimized for high frequency circuitry - At least an embodiment of the present technology provides a method of manufacturing a mechanically adapting interconnecting device for multi-substrate packages comprising placing a metal laminate on each side of a polymer composite, forming a channel in the metal laminate; and metallizing the laminate to create a metal connection inside the channel.03-26-2009
20110278055THREE-DIMENSIONAL CIRCUIT DEVICE AND METHOD OF MANUFACTURING SAME - In a method of manufacturing a three-dimensional (3D) circuit device, conducting circuits are formed on a non-conductive base through electroplating. The non-conductive base, and a circuit pattern section, at least one conducting junction and at least one current-guiding junction provided on the base are formed through double injection molding process. An electrically conductive interface layer is formed on the circuit pattern section and the junctions; and then, metal circuits are formed on the circuit pattern section through electroplating. By providing the conducting junction and the current-guiding junction, when forming metal circuits through electroplating, electroplating current can be evenly distributed over the circuit pattern section to form metal coating with uniform thickness, which enables upgraded production efficiency and reduced cost in manufacturing a 3D circuit device.11-17-2011
20110278056MANUFACTURING METHOD OF PRINTED CIRCUIT BOARD UNIT, MANUFACTURING APPARATUS THEREOF, MANUFACTURING METHOD OF ELECTRONIC COMPONENT, AND ELECTRONIC COMPONENT - A manufacturing method of a printed circuit board unit is provided. A portion of bumps which is arranged on an electronic component is pressed to lower heights of the portion of bumps as compared to other bumps.11-17-2011
20090151995PACKAGE FOR SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - In a package for a semiconductor device, a core substrate has two metal plates, each of which includes a first through hole, a second through hole, a projection, and an insulating layer formed on its surface. The metal plates are stacked in a manner that the projections of the mutual metal plates enter the second through hole of the metal plate on a partner side, and the first through holes of the metal plates form a through hole penetrating the core substrate. A tip end of each of the projections of the metal plates is exposed to a surface of the metal plate on the partner side to form a first terminal portion, and a second terminal portion is exposed from the insulating layer and formed on a surface of the metal plate on a side where the first terminal portion of the metal plate on the partner side is exposed.06-18-2009
20110284280OPTICALLY TRANSPARENT WIRES FOR SECURE CIRCUITS AND METHODS OF MAKING SAME - A structure and a method. The method includes: forming a dielectric layer on a substrate; forming electrically conductive first and second wires in the dielectric layer, top surfaces of the first and second wires coplanar with a top surface of the dielectric layer; and either (i) forming an electrically conductive third wire on the top surface of the dielectric layer, and over the top surfaces of the first and second wires, the third wire electrically contacting each of the first and second wires, the third wire not detectable by optical microscopy or (ii) forming an electrically conductive third wire between the top surface of the dielectric layer and the substrate, the third wire electrically contacting each of the first and second wires, the third wire not detectable by optical microscopy.11-24-2011
20110284279PRINTED CIRCUIT BOARD - A printed circuit board includes a signal layer, a dielectric layer, and a reference layer. The signal layer includes a pair of differential signal lines. The dielectric layer is sandwiched between the signal layer and the reference layer. A first void is defined in the reference layer between projections of the pair of differential signal lines. Two second voids are defined in the reference layer at opposite sides of the projections of the pair of differential signal lines.11-24-2011
20110290548METHOD FOR MANUFACTURING INSULATED CONDUCTIVE PATTERN AND LAMINATE - The present invention provides: a method for manufacturing an insulated conductive pattern, wherein a conductive film and an insulation layer pattern are formed on a substrate, and the insulation layer pattern is reformed to cover a conductive pattern after formation of the conductive pattern by etching the conductive film using the insulation layer pattern as a mask; and a laminate manufactured thereby. According to the present invention, the number of processes is sharply reduced in comparison with the existing processes, and economic efficiency can be greatly improved.12-01-2011
20110290547ELECTRODE STRUCTURE OF MULTIPLE DIELECTRIC ISLAND LAYER AND MANUFACTURING METHOD THEREOF - An electrode structure of multiple dielectric island layer and manufacturing method thereof are described. The electrode structure includes a substrate, an electrode bridge structure, a dielectric layer and a conducting pattern. The dielectric layer is formed on the substrate and the electrode bridge structure and has a plurality of dielectric island patterns. The dielectric island patterns cover a portion of the electrode bridge structure for forming a plurality of bridge patterns of the electrode bridge structure wherein the dielectric island patterns are alternately arranged with the bridge patterns. The conducting pattern has a first electrode, a second electrode, a third electrode and a fourth electrode. The first electrode is electrically connected to the second electrode. The third and fourth electrodes cover the bridge patterns of the electrode bridge structure for reducing the contact resistance between the third and fourth electrodes by the electrode bridge structure.12-01-2011
20080251286Method For Increasing a Routing Density For a Circuit Board and Such a Circuit Board - A multi layer circuit board (MPCB) is disclosed that is comprised of a first layer and a fourth layer substantially parallel to the first layer. Pluralities of electrical contacts are formed on the first layer of the multilayer circuit board and are disposed in a first grid. The plurality of electrical contacts are divided into a first subset for routing within the first layer, and a second subset for routing within the fourth layer. A plurality of vias are formed between the first and fourth layers and each disposed adjacent at least one of the second subset of the plurality of electrical contacts, the plurality of vias having a spacing between each pair thereof larger than a smallest spacing between adjacent electrical contacts of the plurality of electrical contacts.10-16-2008
20100089630Crossover - A crossover is formed by imprinting a channel, by depositing a first conductor in the channel, by anodizing a surface of the first conductor and by electroforming a second conductor across the first conductor.04-15-2010
20080308312CERAMIC ELECTRONIC COMPONENT - A ceramic electronic component comprises a ceramic element body and an outer electrode arranged on the ceramic element body. The outer electrode includes a first electrode layer and a second electrode layer formed on the first electrode layer. The first electrode layer is formed on an outer surface of the ceramic element body and contains Ag and a glass material. The second electrode layer contains Pt and has a plurality of holes reaching the first electrode layer at respective locations.12-18-2008
20090294163Display device, method of laying out wiring in display device, and electronic device - A display device includes: a pixel array section having pixels arranged in a form of a matrix on a display panel; a first terminal group disposed on the display panel so as to correspond to each control line of a first control line group arranged in each pixel row of the pixel array section; a first wiring group for electrically connecting each terminal of the first terminal group to each control line of the first control line group; a second terminal group disposed on the display panel for a second control line group arranged in each pixel row of the pixel array section with a plurality of control lines as a unit; and a second wiring group for electrically connecting each terminal of the second terminal group to each control line of the second control line group through parts between the terminals of the first terminal group.12-03-2009
20090101401WIRING BOARD - A thickness of the portion, which is placed between an electronic component mounting pad and a first wiring, of a first insulating layer (insulating layer in which electronic component mounting pads are placed) is set to be smaller than a thickness of the portion, which is placed between the first wiring and a second wiring, of a second insulating layer.04-23-2009
20100032200CONDUCTIVE CONNECTING PIN AND PACKAGE SUBSTRATE - A package substrate 02-11-2010
20100032199Electrical Connection of Components - A component is electrically connected to an electrical circuit by a method that comprises forming an intermediate product in which the component (02-11-2010
20100032198CIRCUIT MODULE - An inclined peripheral portion 02-11-2010
20100032197CIRCUIT BOARD INCLUDING ALIGNED NANOSTRUCTURES - A method for fabricating a circuit board includes providing a first substrate, forming a circuit on the first substrate, the circuit having a first electrode, a second electrode and at least one nanostructure, and transferring the circuit from the first substrate to a surface of a second substrate made of a polymer.02-11-2010
20090151992FORMATION AND INTEGRATION OF PASSIVE STRUCTURES USING SILICON AND PACKAGE SUBSTRATE - An integrated circuit radio transceiver and method therefor includes an integrated circuit package that comprises a first substrate device, first and second nodes of a circuit on an outer surface of the first substrate device, a second substrate device and a trace on the second substrate device to provide crossover coupling. First and second bumps coupling the trace on the second substrate device to the first and second nodes on the first substrate device operable to provide crossover coupling.06-18-2009
20090145650SCREEN MASK, METHOD FOR PRINTING CONDUCTIVE BONDING MATERIAL, MOUNTING METHOD OF MOUNTING DEVICES, AND MOUNTING SUBSTRATE - A screen mask according to an embodiment of the present invention includes a mask member in which a print pattern is formed to print a conductive bonding material onto a mounting substrate. The mask member includes a first print area in which a conductive bonding material is printed onto the mounting substrate so as to have a first thickness, and a second print area in which the conductive bonding material is printed onto the mounting substrate so as to have a second thickness that is thicker than the first thickness.06-11-2009
20120024584CONNECTOR AND MANUFACTURING METHOD THEREOF - A method of manufacturing a connector is provided. Firstly, a substrate having a first surface, a second surface opposite to the first surface and a through hole is provided. Next, a first conductive layer covering the inside wall of the through hole is formed on the substrate. Then, a filler is filled in the through hole to form a filler post. Next, a conductive elastic cantilever is formed over the first surface and electrically connected to the first conductive layer. Then, a gold layer is formed on the conductive elastic cantilever and over the first surface. A solder ball electrically connected to the first conductive layer is formed over the second surface.02-02-2012
20090151994Wired circuit board - A wired circuit board includes a wiring formation portion, a terminal formation portion, and a middle portion formed therebetween. The wiring formation portion includes a first conductive layer formed on a first insulating layer, and a second conductive layer formed on a second insulating layer so as to overlap the first conductive layer in a thickness direction. The terminal formation portion includes the first and second conductive layers formed in parallel in the same plane. The middle portion includes the first conductive layer formed on the first insulating layer, and the second conductive layer formed on a portion of the second insulating layer extending from the wiring formation portion to a mid-point between the wiring formation portion and the terminal formation portion, and formed on a portion of the first insulating layer extending from the mid-point to the terminal formation portion.06-18-2009
20090095518WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A wiring board has a wiring member, a first reinforcing member and a second reinforcing member. The wiring member has wiring layers and insulating layers which are stacked, and the wiring layers include a first connecting electrode formed on a surface of the wiring member and a second connecting electrode formed on a back surface of the wiring member. A pin is formed on the second connecting electrode. The second reinforcing member is formed by a resin and serves to reinforce the wiring member. The first reinforcing member is formed on the whole back surface of the wiring member except for the pin provided on the second connecting electrode.04-16-2009
20110192640INTERCONNECT PATTERN FOR HIGH PERFORMANCE INTERFACES - In one embodiment, differential signaling and ground contacts are located in a rectilinear array of rows and columns with ground contacts spaced apart by three times the pitch distance between adjacent rows or columns and signaling contacts are located immediately adjacent the ground contacts. In particular, the two contacts of each differential pair are located one pitch distance apart from each other and one contact of each differential pair of contacts is located one pitch distance from a ground contact and the other contact of the differential pair is located approximately sqrt(2)*pitch distance from the same ground contact. In a second embodiment, differential signaling and ground contacts are located in a hexagonal array with ground contacts located three times the pitch distance between adjacent contacts and signaling contacts located immediately adjacent the ground contacts. In particular, the two contacts of each differential pair are located one pitch distance apart from each other and both contacts of each differential pair of contacts are located one pitch distance from a ground contact.08-11-2011
20110114379PRINTED CIRCUIT BOARD - A printed circuit board can support different connectors by selectively setting connection components on the printed circuit board without changing wiring of transmission lines or making new vias in the printed circuit board.05-19-2011
20100084177ELECTRONIC CIRCUIT DEVICE - Provided is an electronic circuit device in which the bonding state of electrodes can be detected easily with high precision. The electronic circuit device has a stack structure in which a plurality of electronic circuit boards (04-08-2010
20100078209Method of forming wiring board and wiring board obtained - A method of forming a wiring board comprises: a step of forming conductive metallic portions in a desired conductive pattern by ejecting for drawing a colloidal metal solution on a substrate by an ink-jet system based on image date of the conductive pattern; and a step of performing wet heating on the substrate having the conductive metallic portions formed thereon.04-01-2010
20100078208Method of forming wiring board and wiring board obtained - A method of forming a wiring board comprises: a step of forming a receptive layer having a porous structure on a substrate; a step of forming wiring portions in a desired conductive pattern on a surface of the receptive layer by ejecting a colloidal metal solution for drawing by an ink-jet system based on image date of the conductive pattern; and a step of performing a migration-proof treatment on at least part of the receptive layer exposed between mutually adjacent wiring portions.04-01-2010
20100078207UNIVERSAL BUMP ARRAY STRUCTURE - A bump array structure for an integrated circuit is presented. An array of metal alloy bumps is disposed on a surface of the integrated circuit. The array of metal alloy bumps is configured to receive input from a multi-layer substrate package and transmit output to the multi-layer substrate package. The array defines a first portion of metal alloy bumps around the periphery of the surface of the integrated circuit configured to provide power and ground signals for the integrated circuit. The array further defines a second portion of metal alloy bumps providing power and ground for the integrated circuit, located between opposing sides of the periphery of the integrated circuit. Metal alloy bumps not contained in either the first or the second portion of the array are configured for input and output signals between the integrated circuit and the multi-level substrate package04-01-2010
20090288867CIRCUIT STRUCTURE AND PHOTOMASK FOR DEFINING THE SAME - A circuit structure and a photomask for defining the same are described. The circuit structure includes a plurality of pickup pads and a plurality of lines in parallel, in which a part of the lines arranged contiguously are each disposed with a pickup pad. The pickup pad of any line disposed with a pickup pad is connected, through a discontinuity of a neighboring line at one side of the line, to a next line. The photomask has thereon a plurality of line patterns for defining the above lines and a plurality of pickup pad defining patterns for defining the above pickup pads.11-26-2009
20090288870WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a wiring substrate of the present invention, includes a step of forming a first wiring layer on an underlying layer, a step of forming a stacked body in which a protection layer is provided on an insulating layer, on the first wiring layer, a step of forming a via hole reaching the first wiring layer by processing the protection layer and the insulating layer, a step of roughening a side surface of the via hole by applying a desmear process to an inside of the via hole while using the protection layer as a mask, a step of removing the protection layer, and a step of forming a second wiring layer, which is connected to the first wiring layer via the via hole, on the insulating layer. The second wiring layer may be formed after the surface of the insulating layer is roughened, or the second wiring layer may be formed without roughening of the surface of the insulating layer.11-26-2009
20090288868SIGNAL CONNECTING COMPONENT - A signal connecting component is suitable to be disposed on a circuit board. The signal connecting component includes an insulation element, at least a first bridge line, at least a second bridge line, a plurality of first pins and a plurality of second pins. The first bridge line and the second bridge line are disposed on different layers of the insulation element. The first pins and the second pins are respectively electrically connected to both ends of the first bridge line and both ends of the second bridge line.11-26-2009
20100078206Process of Positioning Groups of Contact Structures - A contact apparatus can be made by providing a first substrate with electrically conductive terminals and second substrates each of which can have contact structures. Each of the contact structures can have a contact tip. The second substrates can be aligned such that contact tips of the contact structures are aligned substantially in a plane. An optical system can be used to monitor an actual position of the second substrates, and a mechanical system can be used to move the second substrates to aligned positions. The contact structures can be attached to ones of the terminals on the first substrate while the second substrates are in the aligned positions.04-01-2010
20090283314Wired circuit board and producing method thereof - A method for producing a wired circuit board includes the steps of integrally forming a conductive pattern, a plating lead electrically connected with the conductive pattern, and a regulation portion provided in the plating lead to regulate penetration of an etchant into the conductive pattern; and etching the plating lead with the etchant while the regulation portion regulates the penetration of the etchant into the conductive pattern.11-19-2009
20090166075PRINTED CIRCUIT BOARD - An exemplary printed circuit board includes a substrate, a differential transmission line, and at least two weld pad pairs. The differential transmission line and the at least two weld pad pairs are disposed on the substrate. The differential transmission line includes two parallel signal conductors disposed on the substrate. Each of the two signal conductors is electrically connected to an edge of one of the weld pads of a respective pair of the at least two weld pad pairs. Thereby, the two signal conductors of the differential transmission line can extend in the same distance anywhere, particularly in the position where the two signal conductors pass the two weld pad pairs. As a result, the coupling performance and the capability of the differential transmission line to resist electromagnetic interference are both enhanced.07-02-2009
20090020325WELDABLE CONTACT AND METHOD FOR THE PRODUCTION THEREOF - A solderable contact for use with an electrical component includes a pad metallization on a substrate, and an under bump metallization over at least part of the pad metallization. The under bump metallization is in an area for receiving solder. The pad metallization is structured to reveal parts of the substrate surface. The under bump metallization is in direct contact with the parts of the substrate.01-22-2009
20120292090PRINTED CIRCUIT BOARD - A printed circuit board (PCB) comprising a first circuit area, a second circuit area, a plurality of connecting elements, and a plurality of connecting terminals placed on the first circuit area, wherein the first circuit area are electrically connected to the second circuit area through the plurality of connecting elements, the plurality of connecting elements are arranged in sequence to extend toward the plurality of connecting terminals, to form shortest current paths from the second circuit area via corresponding one of the connecting elements to the connecting terminals, respectively, and each shortest current path between the corresponding one of the connecting elements and the corresponding one of the connecting terminals is uncoated with conductive material.11-22-2012
20100132994APPARATUS AND METHOD FOR REDUCING PITCH IN AN INTEGRATED CIRCUIT - An apparatus and method, the apparatus includes an electronic chip package including an electronic chip having a first contact pad and a second contact pad thereon and being free of an intervening contact pad therebetween, a first dielectric layer coupled to the electronic chip over the first and second contact pads, and a second dielectric layer coupled to the first dielectric layer such that a dielectric layer boundary is formed therebetween. The first dielectric layer has a first contact pad via formed therethrough at a first location corresponding to the first contact pad and extending down thereto. The second dielectric layer has a second contact pad via formed therethrough at a second location corresponding to the second contact pad and extending down thereto such that a second contact pad multi-layer via is formed through the first and second dielectric layers at the second location corresponding to the second contact pad.06-03-2010
20100126762METHOD FOR MANUFACTURING A PRINTED CIRCUIT BOARD AND A PRINTED CIRCUIT BOARD OBTAINED BY THE MANUFACTURING METHOD - A method for manufacturing a printed circuit board enables a metal residue between wirings to be removed inexpensively without side etching of a copper layer while having sufficient insulation reliability for micro wiring working. The method includes forming a base metal layer directly at least on one face of an insulator film without an adhesive, and a copper coat layer formed on the base metal layer to form adhesiveless copper clad laminates, then forming a pattern on the adhesiveless copper clad laminates by an etching method. The etching method includes a process of etching treatment for the adhesiveless copper clad laminates with an iron (III) chloride solution or a copper (II) chloride solution containing hydrochloric acid and then, a process of treatment with an acid oxidant containing potassium permanganate.05-27-2010
20100126763WIRE BONDING METHOD, ELECTRONIC APPARATUS, AND METHOD OF MANUFACTURING SAME - A wire bonding method which includes forming a bump on a first electrode provided in a first electronic part and bonding the bump and a second electrode provided in a second electronic part by using a wire, wherein the bump and the wire are formed using materials containing Au, and an Au purity of the material forming the bump is lower than an Au purity of the material forming the wire.05-27-2010
20100101850PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - A printed circuit board includes a signal layer, an insulation layer, and a reference layer. A transmission line is located on the signal layer. A probing pad is located on the transmission line. Two aligned slots defined in opposite sides of the reference layer leaving a connecting portion. The slots and the connecting portion are in vertical alignment with the probing pad. The signal layer, the insulation layer, and the reference layer are configured in a cascading order. An arrangement of the signal layer in relation to the reference layer including the slots and the connecting portion reduces a capacitance effect caused by the probing pad.04-29-2010
20080236879CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME, AND CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided are a circuit board with enhanced moisture resist and the method of manufacturing the circuit board, and a circuit device and a method of manufacturing the circuit device. A circuit board of the present invention includes: a substrate; wirings formed on the main surface of the substrate; a cover layer covering the wirings excluding the regions to be connectors; back electrodes formed on the bottom surface of the substrate; and through-hole electrodes formed so as to penetrate the substrate, and thereby connecting the wirings and the back electrodes. On surfaces of each of the wirings in this circuit board, convex portions on the periphery of the substrate are set larger in width than convex portions in a center portion of the substrate. With this configuration, adhesion reliability between the wirings and the cover layer under a thermal cycle load can be enhanced.10-02-2008
20110266043SUBSTRATE - It is an object of the invention to provide a substrate which allows visual confirmation of the joint state and improvement of reliability of the joint between the components and the substrate to be mounted. The substrate is configured to mount a component having a planer terminal and include a land subjected to solder joint with respect to the terminal of the component.11-03-2011
20110266042Printed Circuit Board Edge Connector - A printed circuit board assembly and method of assembly is provided for a printed circuit board having a top and bottom surface with at least one edge portion having a rounded surface extending front the top surface to a point below the top surface and at least one electrical contact pad located on the top surface and extending over the edge portion rounded surface to a point below the top surface.11-03-2011
20090050357Wiring Structure and Electronic Device Designed on Basis of Electron Wave-Particle Duality - According to a simultaneous duel model that a de Broglie wave accompanies an electron drift-moving in an electron circuit, wiring is considered as a waveguide of the average de Broglie wave and design was performed by reducing the resistance value at bending portion of the wiring. Furthermore, by providing a micro-structure having a wave suppressing function of average de Broglie wave on the boundary between the metal electrode and the semiconductor electrode, so that electron transmitting probability at the boundary is increased. This improves electric feature of a macro structure portion which may cause a local heating such as a bending corner of wiring contained in the electronic circuit such as an IC and an LSI or a boundary between the metal electrode and the semiconductor electrode.02-26-2009
20080283285Circuit Arrangement - A circuit arrangement comprising a set of signal layers, a set of first power layers, a set of second power layers, a set of signal vias, a set of first power vias, a set of second power vias, wherein a signal via of the set of signal vias provides a signal path for a high-frequency (HF) signal current, wherein at least a power via of the set of first power vias and at least a power via of the set of second power vias provide return paths for return currents associated with the signal current, wherein the return path provided by the power via of the set of second power vias is connected with a power layer of the set of second power layers, wherein at least one power layer of the set of first power layers is arranged between the power layer of the set of second power layers and each signal layer of the set of signal layers.11-20-2008
20090321123METHOD FOR PRODUCING STRUCTURED ELECTRICALLY CONDUCTIVE SURFACES - The invention relates to a method for producing structured, electrically-conductive surfaces (12-31-2009
20090321122RELAY SUBSTRATE, METHOD FOR MANUFACTURING THE RELAY SUBSTRATE AND THREE-DIMENSIONAL CIRCUIT DEVICE USING THE RELAY SUBSTRATE - Relay substrate (12-31-2009
20080271914PRINTED WIRING BOARD AND INFORMATION PROCESSING APPARATUS - According to one embodiment, a printed wiring board includes, a main body including an obverse side with an obverse wiring layer, and a reverse side with a reverse wiring layer first pads provided on the obverse side in a first region defined thereon, and to be connected to terminals arranged on a surface of a first semiconductor chip, second pads provided on the reverse side in a second region defined thereon and overlapping with the first region, and to be connected to terminals arranged on a surface of a second semiconductor chip, and interlayer wiring electrically connecting those of the first pads, which are located in an overlapping region, to those of the second pads which are located in the overlapping region.11-06-2008
20110005824PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - This invention relates to a printed circuit board and a method of manufacturing the same, in which an outermost layer of the printed circuit board includes a fine circuit and the manufacturing cost of the printed circuit board is reduced.01-13-2011
20100139964Printed circuit board comprising metal bump and method of manufacturing the same - Disclosed herein is a printed circuit board, including: an upper circuit layer including connection pads made of a conductive metal and buried in an insulation layer; and metal bumps, each having a constant diameter, which are integrated with the connection pads and protrude over the insulation layer.06-10-2010
20110203840TEST POINT DESIGN FOR A HIGH SPEED BUS - A circuit board includes a pair of differential signal lines and a pair of test point pads, one test point pad coupled to one of the signal lines and another of the test point pads coupled to another of the signal lines. The two test point pads are staggered relative to each other and the two signal lines. The circuit board includes a plurality of conductive layers and a plurality of insulating layers. The conductive layers can be etched into conductive patterns, or traces, for connecting the electronic components, which are soldered to the circuit board. The conductive layers may be selectively connected together by vias. One or more of the conductive layers may be a metal plane for providing a ground plane and/or a power plane. To minimize or eliminate the capacitance generated between the test point pad and an underlying ground plane and/or power plane, portions of the ground plane and/or the portion of the power plane directly aligned with each test point pad are removed.08-25-2011
20110203841CONTACT PIN FOR AN ELECTRONIC CIRCUIT - A contact pin for an electronic circuit is described which has at least one ceramic circuit carrier, the circuit carrier having at least on feedthrough for accommodating the contact pin and the circuit carrier having electrical contact surfaces in the area of the feedthrough for accommodating the contact pin, and the contact pin being only elastically deformed when inserted into the feedthrough. The contact pin may have an electrical contact spring in the form of an insertion stop on the insertion side in addition to or instead of one of the radial bulges, the contact spring being generally designed in the shape of a circular sector and pressing onto the circuit carrier using the outer surface of the circular sector as a stop surface or having a barbed hook on the end which is inserted through the feedthrough in the circuit carrier, the barbed hook preventing the contact pin from sliding back after the contact pin has been inserted through the feedthrough.08-25-2011
20100139966INNER SUBSTRATE FOR MANUFACTURING MULTILAYER PRINTED CIRCUIT BOARDS - An exemplary inner substrate for manufacturing multilayer printed circuit boards is provided. The inner substrate has a number of substrate units and a number of transverse folding portions alternately arranged along a longitudinal direction of the inner substrate. Each of the substrate units is configured for forming a unitary printed circuit board. Each of the folding portions is interconnected between neighboring substrate units. Each of the folding portions defines at least one line of weakness perpendicular to the longitudinal direction of the inner substrate for facilitating folding and unfolding the neighboring substrate units to each other.06-10-2010
20090178837CIRCUIT BOARD CONNECTING STRUCTURE - The present invention provides a circuit board connecting structure enabled to obtain the reliable connection between circuit patterns by restricting the elongation of a flexible base material even when connecting portions are arranged in a face-to-face configuration and are press-contacted with each other.07-16-2009
20100000776CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Provided are a circuit board and a method of manufacturing the same. The method includes: forming a pad portion and a lead line portion of a metal on an insulating substrate, wherein the lead line portion is connected to the pad portion; forming a conductive layer on the pad portion and the lead line portion, wherein the conductive layer has an upper surface comprising gold; forming an etching mask on the conductive layer so as to expose a portion corresponding to the lead line portion in the conductive layer; etching a portion of the lead line portion exposed by the etching mask and a portion of the conductive layer corresponding to the lead line portion using an etching solution containing an acid; and removing the etching mask.01-07-2010
20090139758Printed circuit board assembly and manufacturing method for the same - A printed circuit board (PCB) assembly is disclosed, which includes a first PCB on which a plurality of first electrode terminals are arranged at intervals from one another; a second PCB on which a plurality of second electrode terminals respectively connected with the first electrode terminals are arranged at intervals from one another; and separation preventing member which prevents the first and the second electrode terminals from deviating from their correct positions when the first and the second electrode terminals are ultrasonically-welded to each other. Accordingly, lateral movement of the first and the second PCBs relative to each other is restricted owing to the separation preventing member, the plurality of first electrode terminals and second electrode terminals can be bonded to each other without deviating from their correct positions.06-04-2009
20090321124SEMICONDUCTOR DEVICE AND MANUFACTURING PROCESS THEREOF - A pair of discretionary points on a principal surface of a block are coupled to each other with a metal wire having a length larger than a distance between the pair of discretionary points, liquid resin is applied to the principal surface so as to cover the metal wire and then cured, so that a resin-cured material is formed, and the upper-surface portion of the resin-cured material is removed together with an intermediate portion of the metal wire, and then the block is removed from the resin-cured material.12-31-2009
20090084596MULTI-LAYER BOARD INCORPORATING ELECTRONIC COMPONENT AND METHOD FOR PRODUCING THE SAME - An electronic part-incorporated multilayer substrate is provided. The multi-layer substrate includes a core formed with a plurality of holes capable of containing an electronic part, a bottom insulating resin layer formed on a bottom surface of the core, a top insulating resin layer formed on a top surface of the core, a wiring layer selectively formed on an outer surface of the bottom insulating resin layer or top insulating resin layer, and an electronic part contained in any of the holes.04-02-2009
20090084595Printed circuit board and manufacturing method of the same - A method of manufacturing a printed circuit board includes stacking a solder resist layer on one side of a carrier; forming a first circuit pattern, which includes a first electrode pad, on the solder resist layer; forming a conductive post on the first electrode pad; stacking and pressing the carrier onto an insulation layer stacked in an inner substrate, such that the conductive post faces the insulation layer; and removing the carrier. As the conductive posts are pressed into the insulation layers to implement interlayer connections, certain drilling processes for forming via holes may be omitted, so that the degree of freedom can be increased in designing the circuits, and the circuits can be made to have greater densities. As the circuit patterns are buried in the insulation layers, the board can be made thinner, and the attachment areas can be increased, to allow greater adhesion.04-02-2009
20090090548CIRCUIT BOARD AND FABRICATION METHOD THEREOF - A circuit board is disclosed, including a core board, wherein at least one surface thereof has a core circuit layer with a plurality of conductive lands; a first dielectric layer disposed on the core board and disposed with a plurality of openings for exposing the conductive lands; a first coupling layer disposed on the first dielectric layer, the first coupling layer having a plurality of openings disposed corresponding to the openings of the first dielectric layer; and a first circuit layer disposed on the first coupling layer and a plurality of first conductive vias disposed in the openings of the first coupling layer for electrically connecting to the conductive lands of the core circuit layer. By the formation of the first coupling layer that connects the first circuit layer and the first dielectric layer, the bond strength between the first circuit layer and the first dielectric layer is enhanced, thereby preventing detachment and delamination as encountered in the prior art. The invention further provides a fabrication method of the circuit board described above.04-09-2009
20110139502WIRING BOARD MANUFACTURING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND WIRING BOARD - A semiconductor device 06-16-2011
20090205861Electrical Contact Device - An electrical contact device comprising a first contact assemblage having multiple contact pads disposed in a row which are allocated to different connection types, and having a second contact assemblage having multiple contact pads disposed in a row in accordance with a predetermined sequence, which are allocated to different connection types and having bonding wire connections that electrically connect at least some of the contact pads of the first contact assemblage to contact pads of the second contact assemblage. To reduce the outlay in terms of adaptation to different predetermined connection type allocations, it is proposed that the number and sequence of the contact pads in the first contact assemblage that are allocated to the different connection types be configured so that for at least two differently predetermined sequences of the contact pads in the second contact assemblage that are allocated to the different connection types, each of the contact pads of the second contact assemblage is to be connected in crossover-free fashion, by way of the bonding wire connections, to a contact pad of the first contact assemblage allocated to the same connection type.08-20-2009
20080283284WIRING BOARD CONNECTION METHOD AND WIRING BOARD - A wiring board connection method connects wiring boards each having a strip-shaped connection terminal for connecting with another substrate, the method including the steps of: aligning the wiring boards so that the connection terminals face each other with a fluid interposed therebetween; and bonding the connection terminals with each other by heating and then-cooling the fluid, wherein: the fluid is a material that generates air bubbles upon being heated; a plurality of the connection terminals are provided on each of the wiring boards; and a groove is formed in each of at least one of the connection terminals in at least one of the wiring boards, the groove extending across the relevant connection terminal.11-20-2008
20090229872ELECTRONIC COMPONENT BUILT-IN BOARD, MANUFACTURING METHOD OF ELECTRONIC COMPONENT BUILT-IN BOARD, AND SEMICONDUCTOR DEVICE - An electronic component built-in board including an electronic component having an electrode; a conductive material part arranged in an identical plane to the electronic component; and a resin member configured to support the electronic component and the conductive material part in a state where an upper side and a bottom side of the electronic component and an upper side and a bottom side of the conductive material part are exposed.09-17-2009
20090242260DEVICE INTERCONNECTS - A method of fabricating a device structure, comprises: forming an insulating layer (10-01-2009
20090229873MULTILAYER PRINTED WIRING BOARD AND COMPONENT MOUNTING METHOD THEREOF - A component mounting method of a multilayer printed wiring board includes a plurality of solder bumps to mount electronic components formed on both of or either of the front and back thereof, wherein when the solder bumps are formed of any of first, second, third and fourth solders, the first, second, third and fourth solders have different melting points and the melting points of the first, second, third and fourth solders are arranged as the melting point of the first solder, the melting point of the second solder, the melting point of the third solder and the melting point of the fourth solder in order of high melting point and the first, second, third and fourth solders are sequentially used to solder electronic components and the like in order of high melting point. Further, in that case, it is preferable that the solder bump having large volume should be soldered earlier than other solder bumps. This multilayer printed wiring board is easy to mount components, excellent in work efficiency or easy in reworkable process and a mounting method of such multilayer printed wiring board is also provided.09-17-2009
20090260867PRINTED CIRCUIT BOARD SUBSTRATE AND METHOD FOR MANUFACTURING PRINTED CIRCUIT BOARDS USING SAME - A printed circuit board substrate includes a metal-clad substrate and a number of N spaced circuit substrates arranged on the metal-clad substrate along an imaginary circle, N is a natural number greater than 2. The circuit substrates are equiangularly arranged about the center of the circle, and each of the circuit substrates is oriented 360/N degrees with respect to a neighboring printed circuit board.10-22-2009
20090242259PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Ground traces are formed to sandwich a write wiring trace. Ground walls are formed on the ground traces. A ground cover is formed so as to couple upper ends of the ground walls. Thus, the ground traces, the ground walls and the ground cover are positioned in a region above and on both sides of the write wiring trace to surround the write wiring trace.10-01-2009
20100147574WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A wiring board (package) has a structure in which multiple wiring layers are stacked one on top of another with insulating layers each interposed between corresponding two of the wiring layers, and the wiring layers are connected to each other through vias formed in the insulating layers. In the peripheral region around the chip mounting area of the outermost insulating layer on one of both surfaces of the board, a pad is formed in a bump shape to cover a surface of a portion of the outermost insulating layer, the portion being formed to protrude, and a pad whose surface is exposed from the insulating layer is arranged in the chip mounting area. A chip is flip-chip bonded to the pad of the package, and another package is bonded to the bump shaped pad in a peripheral region around the chip (package-on-package bonding).06-17-2010
20120103676CONNECTOR AND INTERPOSER USING CONNECTOR - A connector conducting electricity between external electrodes while the connector is being compressed, the connector including: a columnar main body made of an elastic dielectric; a first contact terminal made of an inelastic conductor including first and second electrode sections provided on a top surface and a side surface of the columnar main body and a coupling section interconnecting the first and second electrode sections; a second contact terminal made of an inelastic conductor including third and fourth electrode sections provided on a bottom surface and a side surface of the columnar main body and a coupling section interconnecting the third and fourth electrode sections, the fourth electrode section being disposed in a position in which the fourth electrode section does not contact the second electrode section; and a conductor provided outside the main body and conducting electricity between the second and fourth electrode sections.05-03-2012
20120103675LAMINATED ELECTRONIC DEVICES AND METHOD OF MANUFACTURING SAME - A laminated electronic device comprises two or more wiring layers including a first wiring layer and a second wiring layer, an insulating layer interposed between the first wiring layer and second wiring layer, and a through conductor extending through the insulating layer for electrically connecting a first conductor disposed on the first wiring layer to a second conductor disposed on the second wiring layer. The through conductor includes divergent sections at both ends, which have a diameter gradually increased toward the first conductor or second conductor.05-03-2012
20120103674DUMMY MEMORY CARD - A dummy memory card includes a circuit board and a golden finger board. The circuit board includes a first conductive element and a second conductive element connected to a first electrical load. The golden finger board extends from the circuit board and is inserted into a memory slot of a motherboard. The golden finger board includes a first power pin and a first ground pin. The first conductive element is electrically connected to the first power pin. The second conductive element is electrically connected to the second power pin.05-03-2012
20100163292PACKAGE CARRIER - A package carrier including a substrate, at least an under bump metallurgic (UBM) layer and at least a conductive bump is provided. The substrate has a conductive structure and at least a pad connected with the conductive structure. A region of the pad connected with the conductive structure is a signal source region. The UBM layer is disposed on the pad and includes a first conductive pattern and a second conductive pattern. A side wall of the second conductive pattern is directly connected to a side wall of the first conductive pattern, and the second conductive pattern is disposed close to the signal source region. The conductivity of the second conductive pattern is smaller than the conductivity of the first conductive pattern. The conductive bump is disposed on the UBM layer.07-01-2010
20100163293PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING PRINTED WIRING BOARD - A printed wiring board and a method for manufacturing the same are provided. The printed wiring board includes a resin insulation layer having a first surface and a second surface opposite the first surface, and includes an opening for a first via conductor. An electronic-component mounting pad is formed on the first surface of the resin insulation layer. The electronic-component mounting pad includes a portion embedded in the resin insulation layer and a portion protruding from the resin insulation layer. The protruding portion covers the embedded portion and a portion of the first surface of the resin insulation layer that surrounds the embedded portion. A first conductive circuit is formed on the second surface of the resin insulation layer. A first via conductor is formed in the opening of the resin insulation layer and connects the electronic-component mounting pad and the first conductive circuit.07-01-2010
20120031659Printed Wiring Board And A Method Of Manufacturing A Printed Wiring Board - A method of manufacturing a printed wiring board with solder bumps includes forming a solder-resist layer having small and large apertures exposing a respective conductive pad of the printed wiring board, loading a solder ball in each of the small and large apertures using a mask with aperture areas corresponding to the apertures of the solder-resist layer, forming a first bump having a first height, from the solder ball in the small aperture, and a second bump having a second height, from the solder ball in the large aperture, the first height being greater than the second height, and pressing a top of the first bump such that the first height becomes substantially the same as the second height. A multilayer printed wiring board includes a solder-resist layer with apertures of differing sizes and solder bumps having substantially equal volumes but a difference in height no greater than 02-09-2012
20100193232PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Disclosed herein are a printed circuit board and a process of manufacturing the printed circuit board. The printed circuit board includes an insulating layer, and circuit layers disposed at both sides of the insulating layer, each of the circuit layers including a land part and a pattern part. The land parts formed on both sides of the insulating layer are coupled to each other using electrical resistance welding. There is no need for a separate interlayer connection structure such as vias or bumps and a process of forming the interlayer connection structure, thus simplifying the printed circuit board and the process.08-05-2010
20100243308SEMICONDUCTOR MEMORY MODULE AND ELECTRONIC COMPONENT SOCKET FOR COUPLING WITH THE SAME - The present invention relates to a semiconductor memory module and an electronic component socket for coupling with the same. A printed circuit board of the semiconductor memory module includes three signal pad arrays longitudinally formed in a row on one sides of a first surface, a second surface and a third surface thereof. Each signal pad array includes a plurality of signal pads. An electronic component socket for coupling with the printed circuit board includes thee pin arrays. Thus, an increased number of the signal pads can be provided while retaining the size of the memory module and the electronic component socket.09-30-2010
20100155127PRINTED WIRING BOARD - There is provided a printed wiring board, including: plural first conductive patterns arranged adjacently in a first direction and separated by first gaps; plural conductive pattern rows comprising the plural first conductive patterns, adjacent conductive pattern rows being offset from each other in the first direction by a second gap; a conductive pattern group comprising the plural conductive pattern rows arranged adjacently in a second direction that intersects the first direction and separated by third gaps; plural second conductive patterns that are smaller than the first conductive patterns and that connect, in the first direction, each of the plural first conductive patterns to first conductive patterns adjacent thereto in the first direction; and plural third conductive patterns that are smaller than the first conductive patterns, and that connect, in the second direction, each of the plural first conductive patterns to first conductive patterns adjacent thereto in the second direction.06-24-2010
20100212948CIRCUIT BOARD AND CHIP PACKAGE STRUCTURE - A circuit board including a substrate, a conductive pattern and a solder mask layer is provided. The conductive pattern includes a pad, a tail trace and a signal trace. The tail trace connects with the edge of the pad and the signal trace connects with the edge of the pad. An angle between a portion of the signal trace neighboring the pad and the tail trace is larger than 0 degree and smaller than 180 degree. The solder mask layer is disposed on the substrate and covers a portion of conductive pattern. The solder mask layer has an opening exposing the whole pad.08-26-2010
20120031658PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME - A printed circuit board and a method for manufacturing a printed circuit board are disclosed. The printed circuit board in accordance with an embodiment of the present invention includes: a substrate; a first pad and a second pad, formed on one surface of the substrate and separated from each other; a first wiring extended from the first pad; a second wiring extended from the second pad and neighboring the first wiring; and a solder resist layer formed on one surface of the substrate so as to cover portions of the first wiring and the second wiring, and an indentation is formed in an area between the first wiring and the second wiring on one side of the solder resist layer.02-09-2012
20100139965EMBEDDED CIRCUIT SUBSTRATE AND MANUFACTURING METHOD THEREOF - An embedded circuit substrate comprising: a core structure having a first surface and a second surface opposite to each other; a first patterned conductive layer disposed on the first surface and embedded in the core structure; a second patterned conductive layer disposed on the second surface and embedded in the core structure; and a plurality of conductive blocks disposed in the core structure for conducting the first patterned conductive layer and the second patterned conductive layer is provided. Furthermore, a manufacturing method of an embedded circuit substrate is also provided.06-10-2010
20100122842PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A printed circuit board and a method of manufacturing the printed circuit board are disclosed. The method of manufacturing a printed circuit board including a via, which is configured to electrically connect both sides of an insulator, and a pad part, which is formed in one side of the insulator to be directly in contact with the via, can include forming a seed layer part on one side of the insulator, a portion of the seed layer part being bulged, forming a via hole by processing the other side of the insulator, corresponding to the bulged portion of the seed layer part, forming the via inside the via hole, and forming a plating layer, corresponding to the pad part, on the seed layer part. With the present invention, it is possible to form a pattern having a finer pitch, maintaining a VOP structure and to prevent a lower side of a substrate from being penetrated through when a via hole is processed.05-20-2010
20110056738PACKAGE SUBSTRATE AND MANUFACTURING METHOD THEREOF - A package substrate and a manufacturing method thereof are provided, including: forming a solder mask on a package substrate body having a plurality of conductive pads; forming a plurality of first-step openings in the solder mask by exposure and development; forming a plurality of second-step openings in the solder mask by a laser-based or plasma-based drilling process; and removing a solder mask foot from the bottom of each of the first-step openings so as to expose large surface areas of the conductive pads. Hence, the contact area between a conductive element and a corresponding one of the conductive pads is large enough to enhance bonding and electrical connection therebetween.03-10-2011
20120228016Pin That Inserts Into A Circuit Board Hole - A pin and a method of establishing contact between a pin and plating of a circuit board hole is provided. Embodiments include a pin comprising a pair of outwardly biased flexible beams that each extend from a body of the pin, the flexible beams connected at one end to one another at the body of the pin and separated from each other at an end opposite the end connected to the body, the separation between the pair of flexible beams forming an open slot, each flexible beam including a contact point that contacts the plating of the hole when the pin is inserted into the circuit board hole.09-13-2012
20080314630Electromagnetic bandgap structure and printed circuit board - An electromagnetic bandgap structure and a printed circuit board are disclosed. In accordance with an embodiment of the present invention, the electromagnetic bandgap structure includes a mushroom type structure comprising a first metal plate and a via of which one end is connected to the first metal plate; a second metal plate connected to the other end of the via; a first metal layer being connected to the second metal layer through a metal line; a first dielectric layer, layer-built between the first metal layer and the first metal plate; a second dielectric layer, layer-built on the first metal plate and the first dielectric layer; and a second metal layer, layer-built on the second dielectric layer. With the present invention, it is possible to solve the aforementioned mixed signal problem by preventing the EM wave of a certain frequency range from being transferred.12-25-2008
20090211797SEMICONDUCTOR PACKAGE - A semiconductor package includes an IC chip having a rectangular (or square) semiconductor substrate, and an integrated circuit formed on a main surface of the semiconductor substrate. The semiconductor package also includes a support substrate on which the IC chip is mounted. A power source line is disposed on the main surface of the semiconductor substrate along the edge of the semiconductor substrate in the shape of a rectangle to supply a power source voltage to the integrated circuit. A main relay pad is provided on the semiconductor substrate and connected to one corner of the power source line. A secondary relay pad is provided on the semiconductor substrate and connected to another corner of the power source line. The semiconductor package also includes a support part to support the IC chip, an external power source supply terminal, and a relay line to connect both the main relay pad and the secondary relay pad to the external power source supply terminal.08-27-2009
20090038836WIRING BOARD AND METHOD OF MANUFACTURING WIRING BOARD - A wiring board assembly and a method of making a wiring board assembly. The wiring board assembly includes a first wiring board having a first substrate, a non-pliable second substrate having a smaller mounting area than a mounting area of the first substrate and a base substrate laminated between the first substrate and the second substrate such that the first substrate extends beyond an edge of the second substrate. At least one via formed in at least one of the first substrate or the second substrate. A second wiring board includes a pliable member connecting the first wiring board to the second wiring board.02-12-2009
20090071703CONDUCTIVE PASTE, CIRCUIT BOARD, CIRCUIT ARTICLE AND METHOD FOR MANUFACTURING SUCH CIRCUIT ARTICLE - The present invention provides a conductive paste, which is suitable for forming and protecting a circuit, an electrode and the like and is capable of connecting electrodes of a plurality of circuit boards in a short time, a circuit board, a circuit article excellent in moisture and heat resistance and the like, and a method for producing the circuit article. The present conductive paste comprises a conductive material that is scaly, has a mean particle diameter of 1 μm or more and 10 μm or less, and is at least one material selected from the group consisting of Ag, an Ag alloy, an Ag-coated material, and an Ag alloy-coated material, and a resin having a storage modulus at 25° C. of 100 MPa or more. The present circuit board (03-19-2009
20090071704Circuit board and method for fabricating the same - A circuit board and a method for fabricating the same are disclosed. The circuit board includes: a carrier board having a circuit layer formed on at least one surface thereof; a first dielectric layer formed on the carrier board and having first openings for exposing a part of the circuit layer; conductive vias formed in the first openings; a second dielectric layer formed on the first dielectric layer and having second and third openings formed therein, wherein the second openings correspond to the first openings for exposing the conductive vias; and a multi-layered metal electroless plating circuit layer formed in the second and third openings for electrically connecting the circuit layer of the carrier board via the conductive vias, thereby allowing the multi-layered metal electroless plating circuit layer to be embedded into the first and second dielectric layers to enhance the bonding strength therebetween and increase the reliability of the circuit board and facilitate formation of fine circuits.03-19-2009
20090071702CIRCUIT BOARD - A circuit board (03-19-2009
20100294554MULTILAYER WIRING BOARD - Saddle warpage of a wiring board at the time of reflow soldering is reduced by canceling out a difference in thermal expansion amount between wiring layers with anisotropy due to variations between the wiring layers in the proportion of copper remaining in the wiring layers C and non-uniformity of wiring elements by a difference in thermal expansion amount with anisotropy between resin base material layers produced according to the material of fiber bundles forming a warp or a weft in at least one resin base layer B, different from the material of other fiber bundles.11-25-2010
20100300742SUBSTRATE HAVING LEADS - A substrate includes a substrate base, first contact parts arranged in a pattern on a surface of the substrate base, and leads respectively having a generally U-shape with a flexible part, a first end fixed to a corresponding one of the first contact parts, and a second end that is located a predetermined distance away from the first end relative to the surface of the substrate base. The first and second ends of each of the leads are substantially aligned in a direction perpendicular to the surface of the substrate base in a state where the second end of each lead is pushed by a target object and deformed thereby in order to electrically connect the substrate to the target object.12-02-2010
20100300741ALUMINUM BOND PADS WITH ENHANCED WIRE BOND STABILITY - An electronic device bond pad includes an Al layer located over an electronic device substrate. The Al layer includes an intrinsic group 10 metal located therein.12-02-2010
20100319977SOLDER CONNECTION ELEMENT - In a solder connection element (12-23-2010
20090288869CURVILINEAR WIRING STRUCTURE TO REDUCE AREAS OF HIGH FIELD DENSITY IN AN INTEGRATED CIRCUIT - A method for reducing areas of high field density in an integrated circuit is disclosed. In one embodiment, the method includes forming a first curvilinear wiring structure in a first interconnect layer of an integrated circuit. A second curvilinear wiring structure may be formed in a second interconnect layer of the integrated circuit, such that the first and second curvilinear wiring structures are substantially vertically aligned. The first curvilinear wiring structure may then be electrically connected to the second curvilinear wiring structure.11-26-2009
20100200286TRANSPARENT ELECTRODE - An electrode is produced on a rigid or flexible support substrate, including a grid network of very fine electrically-conductive lines with nodes and links, to produce a diffraction pattern, as much as possible in an arc shape, in the light transmitted and that results in an absence of high-level optical impacts. The grid network may in addition be produced without preferential direction with a number of three lines joining up at each node and/or with conductive sections extending in the shape of an arc or in wave form between the nodes.08-12-2010
20110024176PRINTED CIRCUIT BOARD AND METHOD OF FABRICATING THE SAME - Disclosed is a printed circuit board, which includes an insulating member having a circuit pattern embedded in one surface thereof, a build-up layer formed on one surface of the insulating member and including a build-up insulating layer and a circuit layer formed in the build-up insulating layer and having a via connected to the circuit pattern, and a solder resist layer formed on the build-up layer. A method of fabricating the printed circuit board is also provided. The printed circuit board is fabricated using a build-up process and the outermost circuit layer thereof is formed to have an embedded structure using an imprinting process, thus minimizing the separation of the circuit layer and reducing the lead time and the fabrication cost.02-03-2011
20110083894ELECTRIC CIRCUIT CONFIGURATION HAVING AN MID CIRCUIT CARRIER AND A CONNECTING INTERFACE CONNECTED TO IT - An electric circuit configuration having an MID circuit carrier and a connecting interface, the connecting interface being situated on a surface of the MID circuit carrier. The electric circuit configuration further includes at least one electrical contact pair having at least one connecting interface contact element and at least one MID contact element that is provided on the surface and is situated on the connecting interface contact element. The exemplary embodiments and/or exemplary methods of the present invention further relates to a contact element group having at least one electrical contact element for the electrical contacting of an MID circuit carrier, which is developed on a surface of an MID circuit carrier, is electrically connected to it, and extends away from the surface. The at least one contact element is connected to a line element of the MID circuit carrier.04-14-2011
20100252317CARBON NANOTUBE CONTACT STRUCTURES FOR USE WITH SEMICONDUCTOR DIES AND OTHER ELECTRONIC DEVICES - A method of making carbon nanotube contact structures on an electronic device includes growing a plurality of carbon nanotube columns on a mandrel. Electrically-conductive adhesive is applied to ends of the columns distal from the mandrel, and the columns are transferred to the electronic device. An electrically-conductive material is deposited onto some or all of the columns. The mandrel can be reused to grow a second plurality of carbon nanotube columns.10-07-2010
20090032299Suspension board with circuit - A suspension board with circuit includes a metal supporting board, an insulating base layer formed on the metal supporting board, a conductive pattern formed on the insulating base layer, an insulating cover layer formed on the insulating base layer so as to cover the conductive pattern, and an optical waveguide including a core layer having a curved portion and a metal thin film covering a surface of the curved portion.02-05-2009
20090218122WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - There is provided a wiring substrate. The wiring substrate includes: a plurality of conductor patterns formed on a mounting surface on which an electronic component is to be mounted, wherein each of the conductor patterns is covered with a corresponding one of solder layers; and partition walls made of insulating material and formed along the conductor patterns on the mounting surface such that each of the partition walls is provided between the adjacent conductor patterns with a clearance interposed therebetween.09-03-2009
20100038123BOARD UNIT AND MANUFACTURING METHOD FOR THE SAME - A board unit includes an electronic component having electrodes; a printed circuit board that has board electrodes each disposed at a position corresponding to a respective one of the electrodes, and that mounts thereon the electronic component; recesses each arranged from the center of a respective one of the board electrodes toward the inside thereof; and joining members that are filled in the respective recesses, and that project from the respective board electrodes upon being heated.02-18-2010
20100071948PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - A printed circuit board includes a signal layer, an insulation layer, and a reference layer. A transmission line is located on the signal layer. A test point is located on the transmission line. A hole is defined in the reference layer and under the test point. The signal layer, the insulation layer, and the reference layer are configured in a cascading order. Wherein an arrangement of the signal layer in relation to the reference layer comprising the hole reduces a capacitance effect caused by the test point. A method of manufacturing the printed circuit board is provided.03-25-2010
20110247868PRINTED CIRCUIT BOARD - A printed circuit board includes a board body having a routing-limited area. The routing-limited area is provided with at least one solder pad that is adapted for supporting a metal support thereon. Preferably, the printed circuit board further includes a protrusion block disposed on the solder pad, and having a height greater than that of a signal trace that passes the routing-limited area.10-13-2011
20110094785Low profile electrical interposer of woven structure and method of making same - An electrical interposer for connecting two electronic devices includes a plurality of first cores with undulating structure extending in a first direction and a plurality of second cores with undulating structure extending in a second direction angular with the first direction. Each first core has first peaks and first valleys alternately arranged in the first direction and each first peak is electrically connected with a corresponding neighboring first valley but insulated from others. Each second core has second peaks and second valleys alternately arranged in the second direction and each second peak is electrically connected with a corresponding neighboring second valley but insulated from others. The first cores and the second cores interlace with each other to reach a woven structure with the first peaks and the second peaks jointly constituting an upper interface, and the first valleys and the second valleys jointly constituting a lower interface.04-28-2011
20100065319WIRING BOARD AND PROCESS FOR FABRICATING THE SAME - A process for fabricating a wiring board is provided. In the process, a wiring carrying substrate including a carry substrate and a wiring layer is formed. Next, at least one blind via is formed in the wiring carrying substrate. Next, the wiring carrying substrate is laminated to another wiring carrying substrate via an insulation layer. The insulation layer is disposed between the wiring layers of the wiring carrying substrates and full fills the blind via. Next, parts of the carry substrates are removed to expose the insulation layer in the blind via. Next, a conductive pillar connected between the wiring layers is formed. Next, the rest carry substrates are removed.03-18-2010
20110100695PRINTED CIRCUIT BOARD STRUCTURE - Disclosed is a printed circuit board structure which is manufactured by providing a core board, forming an inner circuit layer on the core board surface, forming a bonding pad on the inner circuit, forming a ring-shaped anti-etching layer on the bonding pad, forming an anti-soldering insulation layer on the ring-shaped anti-etching layer and the bonding pad, and forming an opening to expose a part of the bonding pad, wherein the radius of the opening is shorter than the radius of the ring-shaped anti-etching layer, and the bonding pad surface is free of concave. The described structure may prevent the solder extending along the bottom void of the anti-soldering insulation layer to other regions.05-05-2011
20110100696DEVICE MOUNTING BOARD AND SEMICONDUCTOR MODULE - A semiconductor device is of a PoP structure such that first electrode portions provided on a first device mounting board constituting a first semiconductor module and second electrode portions provided in a second semiconductor module are joined together by solder balls. A first insulating layer having an opening is provided on one main surface of an insulating resin layer which is a substrate, and an electrode portion, whose top portion protrudes above the top surface of the first insulating layer, is formed in the opening. A second insulating layer is provided on top of the first insulating layer in the periphery of the top portion of the first electrode portion; the second insulting layer is located slightly apart from the top portion of the first electrode portion. The first electrode portion is shaped such that the top portion is formed by a curved surface or formed by a curved surface and a plane surface smoothly connected to the curved surface.05-05-2011
20120061133HIGH-FREQUENCY CIRCUIT PACKAGE AND HIGH-FREQUENCY CIRCUIT DEVICE - A high-frequency circuit package including a dielectric substrate; a signal line, a first ground conductor layer, a second ground conductor layer, and a frame-shaped dielectric layer formed on the dielectric substrate; a third ground conductor layer formed on the frame-shaped dielectric layer; a first recess formed in the frame-shaped dielectric layer and including a first surface and a second surface that are located above the first ground conductor layer and the second ground conductor layer and extend laterally at an oblique angle with respect to the length direction of the signal line; a first ground line formed on the first surface and electrically connecting the first ground conductor layer with the third ground conductor layer; and a second ground line formed on the second surface and electrically connecting the second ground conductor layer with the third ground conductor layer.03-15-2012
20110067911METHOD OF BONDING PARTS TO SUBSTRATE USING SOLDER PASTE - In this method of bonding a part to a substrate using a solder paste, the solder paste is mounted or applied between a metallization layer formed on the substrate and a metallization layer formed on the part, and the part is bonded to the substrate by performing a reflow process in a non-oxidizing atmosphere to bond the substrate and the part. The metallization layer formed on the surface of the substrate is planar and includes a metallization layer main portion that has an area smaller than that of the metallization layer of the part and a solder guide portion that protrudes from a periphery of the metallization layer main portion.03-24-2011
20110067912Electroconductive Bonding Material and Electronic Apparatus - An electroconductive bonding material contains a thermosetting resin, a low-melting-point metal powder which is melted at a temperature equal to or lower than the thermosetting temperature of the thermosetting resin, a high-melting-point metal powder which is not melted at a temperature equal to or lower than the thermosetting temperature of the thermosetting resin and which reacts with the low-melting-point metal powder to form a reaction product having a high melting point of 300° C. or higher during heat-hardening of the thermosetting resin, and a reducing substance which removes an oxide formed on the surface of the high-melting-point metal powder. The total content of the low-melting-point metal powder and the high-melting-point metal powder is 75% to 88% by weight, and the particle size ratio D03-24-2011
20110061922PACKAGE SUBSTRATE AND METHOD OF FABRICATING THE SAME - Disclosed is a package substrate, which includes an insulating layer including a circuit layer having a via for connecting layers and an insulating member formed in the insulating layer so as to separate the insulating layer, thus preventing the package substrate from warping and reducing land co-planarity of the substrate. A method of fabricating the package substrate is also provided, including (a) forming a first circuit layer on a carrier, (b) forming an insulating layer on the carrier having the first circuit layer, (c) forming an insulating member in the insulating layer so as to separate the insulating layer, (d) forming a second circuit layer including a via on the insulating layer and the insulating member, and (e) removing the carrier.03-17-2011
20120118624MANUFACTURING METHOD OF OBJECT HAVING CONDUCTIVE LINE AND STRUCTURE THEREOF - A manufacturing method of an object having a conductive line includes the following steps. A hardening layer and a conductive line layer are formed in an in-mold roller (IMR) material in sequence. The conductive line layer is formed on a non-conductive substrate by an IMR process. A carrier sheet is then separated to expose the hardening layer. A connecting piece is formed on the hardening layer. The connecting piece runs through the hardening layer by a connection process, and the connecting piece is electrically connected to the conductive line layer. Therefore, an object structure having the conductive line is formed.05-17-2012
20110048784PRINTED CIRCUIT BOARD STRIP AND PANEL - A printed circuit board strip and a printed circuit board panel are disclosed. In accordance with an embodiment of the present invention, the printed circuit board strip includes an unit area, a plating lead-in wire, which is for plating the unit area, and a mold gate, which is disposed on an outer side of the unit area. Here, the plating lead-in wire and the mold gate are electrically connected to each other through a lead line having a shape that is bent plural times. This can significantly save the production cost by preventing an excessive plated layer from being formed in an unnecessary area.03-03-2011
20110048782Solder Pad Structure With High Bondability To Solder Ball - A solder pad structure with a high bondability to a solder ball is provided. The present invention provides a larger contact area with the solder ball so as to increase the bondability according to the principle that the bondability is positive proportional with the contact area therebetween. The solder pad structure includes a circuit board having a solder pad opening defined by a solder resist layer surrounding a circuit layer. The circuit layer within the solder pad opening is defined as a solder pad. In such a way, after filling the solder ball into the solder pad opening, besides walls of the solder pad opening, there are an extra contact area provided by a geometric shape of the solder pad for further improving the bondability of the solder pad and the solder ball.03-03-2011
20110048783EMBEDDED WIRING BOARD AND A MANUFACTURING METHOD THEREOF - An embedded wiring board includes an upper wiring layer, a lower wiring layer, an insulation layer, a first conductive pillar and a second conductive pillar. The upper wiring layer contains an upper pad, the lower wiring layer contains a lower pad, and the insulation layer contains an upper surface and a lower surface opposite to the upper surface. The upper pad is embedded in the upper surface and the lower pad is embedded in the lower surface. The first conductive pillar is located in the insulation layer and includes an end surface which is exposed by the upper surface. A height of the first conductive pillar relative to the upper surface is larger than a depth of the upper pad relative to the upper surface. In addition, the second conductive pillar is located in the insulation layer and is connected between the first conductive pillar and the lower pad.03-03-2011
20110048786PRINTED CIRCUIT BOARD HAVING A BUMP AND A METHOD OF MANUFACTURING THE SAME - Disclosed herein is a printed circuit board having a bump and a method of manufacturing the same. The printed circuit board having a bump includes an insulating layer into which an inner circuit layer is impregnated; a protective layer that is formed under the insulating layer and has an opening exposing a pad unit of the inner circuit layer; and a bump that is integrally formed with the pad unit and is protruded from the inner side of the protective layer to the outside of the protective layer through the opening. The bump is integrally formed with the pad unit, thereby improving bonding strength between the bump and the printed circuit board, and the surface area of the bump is formed to be wide, thereby improving bonding strength between a solder ball and the printed circuit board.03-03-2011
20110147066SUBSTRATE METALLIZATION AND BALL ATTACH METALLURGY WITH A NOVEL DOPANT ELEMENT - Surface-active dopants are added to a portion of a circuit package before a reflow process to promote wetting and reduce the formation of solder bump bridges. The circuit package has a solder element that electrically connects the circuit package to a substrate. A reflow process is performed to attach the solder element to a pad on the circuit package. During the reflow process, the surface-active dopants diffuse to the surface of the solder element and form an oxide passivation layer on the surface of the solder element.06-23-2011
20110247870CIRCUIT CONNECTING MATERIAL, FILM-FORM CIRCUIT CONNECTING MATERIAL USING THE SAME, CIRCUIT MEMBER CONNECTING STRUCTURE AND METHOD OF MANUFACTURING THE SAME - The present invention is a circuit connecting material used for the mutual connection of a circuit member in which electrodes and insulating layers are formed adjacent to each other on the surface of a board, and a circuit member in which electrodes and insulating layers are formed adjacent to each other on the surface of a board, with the edge parts and of the insulating layers being formed with a greater thickness than the electrodes on the basis of the main surfaces, wherein this circuit connecting material contains a bonding agent composition and conductive particles that have a mean particle size of 1 μm or greater but less than 10 μm and a hardness of 1.961 to 6.865 GPa, and this circuit connecting material exhibits a storage elastic modulus of 0.5 to 3 GPa at 40° C. and a mean coefficient of thermal expansion of 30 to 200 ppm/° C. at from 25° C. to 100° C. when subjected to the curing treatment.10-13-2011
20090084597CIRCUIT BOARD AND CONNECTION SUBSTRATE - There is provided a circuit board including a first and a second circuit substrate located with a spacing, on which a first and a second conductor pad are provided respectively; and a connection substrate including a first and a second conductor post projecting from one or the other side; the connection substrate being disposed so as to cover a portion of the first and the second circuit substrate, and bridged therebetween; the first conductor post and the first conductor pad, as well as the second conductor post and the second conductor pad, being disposed so as to oppose each other; the circuit board also including a connector portion to be formed upon melting a metal coating layer, formed in advance on a surface of at least one of the first conductor post and the first conductor pad, and on a surface of at least one of the second conductor post and the second conductor pad; the first and the second circuit substrate and the connection substrate being electrically connected through the connector portion.04-02-2009
20110253438Semiconductor device capable of switching operation modes - A semiconductor device includes a substrate, a first pad, a second pad, and a third pad that are placed along one side of a perimeter of the substrate, a circuit that is formed above the substrate, and that is coupled to the first pad, a first external terminal that is coupled to the second pad, and a second external terminal that is coupled to the third pad, wherein the circuit generates a signal indicative of a connection configuration between the first pad and the first external terminal, wherein the third pad is placed adjacent to one of the first pad and the second pad, wherein, in a direction parallel to the one side of the perimeter of the substrate, the first pad, the second pad and the third pad have a first width, a second width and a third width, respectively, and wherein each of the first width of the first pad and the second width of the second pad is smaller than the third width of the third pad.10-20-2011
20100319978Internally Overlapped Conditioners - The application discloses novel internal structures of energy conditioners, assemblies of external structures of energy conditioners and mounting structure, and novel circuits including energy conditioners having A, B, and G master electrodes.12-23-2010
20100319976MOTOR CONTROL DEVICE AND VEHICLE STEERING SYSTEM - A motor control device comprising a control board for controlling driving of an electric motor, the control board including a multilayer circuit board having inner layers and outer layers, a ground pattern disposed around an output shaft of the electric motor formed on one of the inner layers, and a severed portion formed on a part of the ground pattern, so as to sever through the ground pattern in a radial direction of the output shaft. The construction reduces noise from the motor control device.12-23-2010
20110048785Wired circuit board and producing method thereof - A wired circuit board includes a metal supporting layer, an insulating layer formed on the metal supporting layer, and a conductive layer formed on the insulating layer. In the metal supporting layer, a reference hole for positioning is formed, and a stepped portion is formed so as to surround the reference hole.03-03-2011
20110108313CIRCUIT SUBSTRATE AND FABRICATING PROCESS THEREOF - A circuit substrate includes a base layer, a patterned conductive layer, a dielectric layer, an outer pad and a conductive block. The patterned conductive layer is disposed on the base layer and has an inner pad. The dielectric layer is disposed on the base layer and covers the patterned conductive layer. The outer pad is disposed on the dielectric layer. The conductive layer is passed through the dielectric layer and connected between the outer pad and the inner pad, wherein the outer pad and the conductive block are formed as an integrative unit, and an outer diameter of the outer pad is substantially equal to an outer diameter of the conductive block. In addition, a fabricating process for the circuit substrate is also provided.05-12-2011
20110108315PROCESS FOR FABRICATING CIRCUIT SUBSTRATE, AND CIRCUIT SUBSTRATE - A process for fabricating a circuit substrate is provided. A patterned conductive layer having an inner pad is provided on a base layer, a dielectric layer is disposed on the base layer and covers the patterned conductive layer, and a covering layer is disposed on the dielectric layer. A part of the covering layer is removed by dry etching to form a first opening. A part of the dielectric layer exposed by the first opening is removed to form a dielectric opening exposing a part of the inner pad. A patterned mask having a second opening to expose a part of the inner pad is formed on the covering layer. A conductive structure including a conductive block filling the dielectric opening, an outer pad filling the first opening and a surplus layer filling the second opening is formed. Finally, the patterned mask, surplus layer and covering layer are removed.05-12-2011
20110108314ACTIVE DEVICE ARRAY SUBSTRATE - An active device array substrate includes a substrate, a pixel array, a plurality of terminals, and a plurality of leads. The pixel array is disposed on the substrate and includes a plurality of intersecting signal lines arranged in a mesh shape. The terminals are disposed on the substrate. The leads are disposed on the substrate. Each lead includes a plurality of line segments connected in series, and each terminal is connected between one of the line segments and one of the signal lines. Two angles exist between the edge of one line segment and the edge of another line segment connected to the line segment, and the angles are not equal to 180°.05-12-2011
20090308650Printed circuit board and method of manufacturing the same - The printed circuit board is manufactured using a simple process of forming a bump on a first metal layer using fireable paste containing carbon nanotubes, firing the first metal layer including the bump, forming an insulating layer and a second metal layer on the first metal layer, and patterning the first and second metal layers, thus specific resistance of the resulting printed circuit board is decreased, and electrical conductivity and cooling performance are improved.12-17-2009
20090308649Printed Circuit Board With Reduced Signal Distortion - A printed circuit board with reduced signal distortion, including one or more layers of non-conductive substrate upon which are disposed conductive pathways that conduct signals, the signals characterized by distortion at least partly caused by orientation of the conductive pathways on the layers of the printed circuit board, and a periodically patterned reference plane; each conductive pathway that conducts signals oriented orthogonally or diagonally at forty-five degrees with respect to other conductive pathways that conduct signals on the printed circuit board; the periodically patterned reference plane comprising a conductor having discontinuities arranged in a periodically recurring pattern, the pattern of the discontinuities oriented on a surface of a layer of the printed circuit board at an optimum angle, with respect to the conductive pathways that conduct signals on the printed circuit board, that reduces distortion of the signals.12-17-2009
20110132650High-Speed Ceramic Modules with Hybrid Referencing Scheme for Improved Performance and Reduced Cost - A multi-layered ceramic package comprises: a signal layer with identified chip/device area(s)/site(s) that require a supply of power; and a voltage power (Vdd) layer and a ground (Gnd) layer disposed on opposite sides directly above or below (adjacent to) the signal layer and providing a first reference mesh plane and a second reference mesh plane configured utilizing a hybrid mesh scheme. The hybrid mesh scheme comprises different mesh configurations from among: a full dense mesh in a first area directly above or below the identified chip/device area(s); a half dense mesh in a second area that is above or below the edge(s) of the chip/device area; and a wider mesh pitch in all other areas, and the Vdd traces are aligned to run parallel and adjacent to signal lines in those other areas. Wider traces are provided within the mesh areas that run parallel and adjacent to signal lines.06-09-2011
20090173528CIRCUIT BOARD READY TO SLOT - A circuit substrate ready to slot is revealed, primarily comprising a board base with slot-reserved area. A plurality of bonding fingers, a plating bus loop, and a plurality of plating lines disposed on the bottom surface of the board base. The bonding fingers are located adjacent to but outside the slot-reserved area and the plating bus loop is located inside the slot-reserved area. The plating lines connect the bonding fingers to the plating bus lines. The plating bus loop includes two side bars closer to the long sides of the slot-reserved area than the bonding fingers to the long sides. Accordingly, the lengths of the plating lines within the slot-reserved area are shortened. It is possible to solve the issues of metal burs and shifting of the remaining plating lines when routing a slot along the peripheries of the slot-reserved area. Moreover, the plating current can evenly distribute to improve the plating qualities on the surfaces of the bonding fingers.07-09-2009
20090173530INTERPOSER AND METHOD FOR MANUFACTURING INTERPOSER - An interposer includes a first insulating layer made of an inorganic material and having a first land, a second land and a first wiring electrically connecting the first land and the second land, and a second insulating layer formed over a first surface of the first insulating layer and having a second wiring, a second pad for loading a second electronic component over the second insulating layer and a first via conductor electrically connecting the second land and the second wire. The first wiring and the second wiring electrically connect the first land and the second pad. The first land and second land are positioned such that a first electronic component is mounted over a second surface of the first insulating layer on the opposite side of the first surface. The second wiring has a longer wiring length and a greater thickness than the first wiring.07-09-2009
20090173529CIRCUIT STRUCTURE AND FABRICATION METHOD THEREOF - A circuit structure and a fabrication method thereof manly use a plurality of wires to connect in series a plurality of pads to form a stretchable circuit. Each of the wires has a first end, a second end and an intermediate segment located between the first end and the second end, wherein the first end and the second end are respectively connected to different pads, and the position of the intermediate segment is higher than the positions of the first end and the second end. Since the connection manner of the wires and the pads has 3-D freedoms, the circuit structure can withstand both horizontal and vertical deformations and has an outstanding reliability.07-09-2009
20090173527Method for Integrating Functional Nanostructures Into Microelectric and Nanoelectric circuits - A nanostructure is provided on a substrate by forming at least one multi-electrode arrangement on the substrate, wherein said electrodes comprise respective electrode areas projected with respect to the opposite electrode ends which extend along a line in such a way that the adjacent ends produce a respectively frequency time-variable potential difference. A suspension of nano-object such as nanotubes, nanowires and/or carbon nanotubes is produced and then transferred to the substrate between the adjacent ends. The assembly of respective individual nano-objects is dielectrophoreticly deposited on the line between said adjacent ends, and the assembly of respective nano-objects is fused in the area of the ends in such a way that the nanostructure is formed.07-09-2009
20120145446BRACE FOR LONG WIRE BOND - An electrical connection includes a first wire bonded to adjacent bond pads proximate to an edge of a die and a second wire having one end bonded to a die bond pad distal to the die edge and a second end bonded to a lead finger of a lead frame or a connection pad of a substrate. The second wire crosses and is supported by the first wire. The first wire acts as a brace that prevents the second wire from touching the edge of the die. The first wire also prevents the second wire from excessive lateral movement during encapsulation.06-14-2012
20100193233DUAL INLINE LEAD-TYPE ELECTRONIC-PART-MOUNTED PRINTED CIRCUIT BOARD, METHOD OF SOLDERING DUAL INLINE LEAD-TYPE ELECTRONIC PART, AND AIR-CONDITIONER - A printed circuit board 08-05-2010
20120067637Interposer with microspring contacts and methods of making and using same - An interposer including stress-engineered nonplanar microsprings may provide interconnection of bonding pads of electronic structures disposed above and below the interposer. The lateral offset between an anchor portion of a microspring disposed for contact at a bottom surface of the interposer and the tip of the microspring located in a free portion of the microspring for contact and deflection over a top surface of the interposer permits the interconnection of devices having different bonding pad pitches. Microspring contacts at the free portion permit temporary interconnection of devices, while solder applied over the free portion permit permanent connection of devices to the interposer.03-22-2012
20120305305ELECTRONIC COMPONENT INCLUDING MICRO BALLS - A system of micro balls is disclosed for coupling an electronic component to a printed circuit board. The micro balls have a small diameter, and each contact pad may include an array of two or more micro balls. An example of a micro ball may include a polymer core, surrounded by a copper layer, which is in turn surrounded by a layer of solder.12-06-2012
20120000700PRINTED CIRCUIT BOARD - A printed circuit board includes a first signal layer, a second signal layer, and a dielectric layer sandwiched between the first signal layer and the second signal layer. The first signal layer includes two pads. The second signal layer includes two conducting pieces connected to two signal traces. The shape and material of the pads are the same as the shape and material of the conducting pieces. The projections of the pads on the second signal layer are overlapping with the conducting pieces.01-05-2012
20110155435METHOD TO FORM LATERAL PAD ON EDGE OF WAFER - Embodiments are directed to an apparatus and fabrication method to form pad arrays on the edge of a substrate wafer substrate. Embodiments of the invention make it possible for surface mount devices to be bonded vertically (i.e. on their side) using standard semiconductor assembly processes.06-30-2011
20110155438Multilayer Wiring Substrate - A multilayer wiring substrate has a multilayer wiring laminate portion in which a plurality of resin insulation layers made primarily of the same resin insulation material, and a plurality of conductive layers are laminated alternately. A plurality of first-main-surface-side connection terminals are disposed on one side of the laminate structure where a first main surface thereof is present, and a plurality of second-main-surface-side connection terminals being disposed on an other side of the laminate structure where a second main surface thereof is present. The plurality of conductive layers are formed in the plurality of resin insulation layers and interconnected by means of via conductors whose diameters increase toward the first main surface or the second main surface. The plurality of first-main-surface-side connection terminals comprising at least two types of terminals for connection of different articles-to-be-connected. Top surfaces of the plurality of first-main-surface-side connection terminals differ in height according to types of the articles-to-be-connected.06-30-2011
20110155437PRINTED CIRCUIT BOARD - A printed circuit board includes a signal trace, capable of transmitting signal, and a pad. The pad is electronically connected to the signal trace. The pad is placed on an external surface of the printed circuit board. The pad includes a body and an extending portion extending from the body. The body is configured to weld an electronic element. The extending portion defines a first edge and a second edge parallel to the first edge. The length of the first edge is greater than that of the second edge. The extending portion is connected to the body at the first edge, and the extending portion is connected to the signal trace at the second edge.06-30-2011
20110155436CONDUCTIVE SUBSTRATE STRUCTURE WITH CONDUCTIVE CHANNELS FORMED BY USING A TWO-SIDED CUT APPROACH AND A METHOD FOR MANUFACTURING THE SAME - A conductive substrate structure includes a substrate unit, a conductive pad unit, and a conductive layer unit. The substrate unit has a top surface, a bottom surface, two opposite lateral surfaces, and a front surface. The conductive pad unit has at least two first conductive pads separated from each other and disposed on the top surface, and at least two second conductive pads separated from each other and disposed on the bottom surface. The conductive layer unit has at least two first conductive layers formed on the front surface and respectively electrically connected to two front sides of the two first conductive pads, and at least two second conductive layers respectively formed on the two opposite lateral surfaces and respectively electrically connected to two opposite lateral sides of the two second conductive pads. The two first conductive layers are respectively electrically connected with the two second conductive layers.06-30-2011
20110155434BGA FOOTPRINT PATTERN FOR INCREASING NUMBER OF ROUTING CHANNELS PER PCB LAYER - A printed circuit board (PCB) includes a ball grid array (BGA). The PCB further includes a first BGA pad having a circular shape, and a first via having a circular shape, where the circular shape of the first via overlaps a portion of the circular shape of the first BGA pad and is rotated diagonally relative to a center of the first BGA pad. The PCB also includes a second BGA pad having a circular shape, and a second via having a circular shape, where the circular shape of the second via overlaps a portion of the circular shape of the second BGA pad and is rotated diagonally relative to a center of the second pad, and where a center of the second via is located at a first distance from the center of the first via and at a first angle relative to an axis that crosses a center of the first via.06-30-2011
20120006590PRINTED CIRCUIT BOARD - An exemplary printed circuit board includes a substrate, a differential transmission line, and at least two weld pad pairs. The differential transmission line and the at least two weld pad pairs are disposed on the substrate. The differential transmission line includes two parallel signal conductors disposed on the substrate. Each of the two signal conductors is electrically connected to an edge of one of the weld pads of a respective pair of the at least two weld pad pairs. Thereby, the two signal conductors of the differential transmission line can extend in the same distance anywhere, particularly in the position where the two signal conductors pass the two weld pad pairs. As a result, the coupling performance and the capability of the differential transmission line to resist electromagnetic interference are both enhanced.01-12-2012
20120012376ASSEMBLY, AND ASSOCIATED METHOD, FOR FORMING A SOLDER CONNECTION - An assembly, and an associated method, facilitates egress of gasses generated during a solder process, thereby reducing the occurrence of voids in the resultant solder connection. A channel is formed to extend part way through a solder pad. The channel defines a path by which to facilitate the egress of the gas generated during the solder operation.01-19-2012
20120012377PRINTED CIRCUIT BOARD - An exemplary printed circuit board includes a substrate, a differential transmission line, and at least two weld pad pairs. The differential transmission line and the at least two weld pad pairs are disposed on the substrate. The differential transmission line includes two parallel signal conductors disposed on the substrate. Each of the two signal conductors is electrically connected to an edge of one of the weld pads of a respective pair of the at least two weld pad pairs. Thereby, the two signal conductors of the differential transmission line can extend in the same distance anywhere, particularly in the position where the two signal conductors pass the two weld pad pairs. As a result, the coupling performance and the capability of the differential transmission line to resist electromagnetic interference are both enhanced.01-19-2012
20090236136Printed circuit board assembly - A printed circuit board assembly includes: a substrate; an soldermask formed on the substrate and formed with a recess; a solder pad having a first end portion received in the recess and formed on the portion of the substrate, and a second end portion extending from the first end portion; and a solder paste having a first end portion formed on the first end portion of the solder pad, and a second end portion extending from the first end portion of the solder paste and formed on a portion of the soldermask, which is formed on the second end portion of the solder pad.09-24-2009
20110088937PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Disclosed are a printed circuit board including a core substrate including core circuit layers on both sides thereof, a first build-up layer formed on one side of the core substrate, a second build-up layer formed on the other side of the core substrate, and first and second protective layers formed on the first and second build-up layers, respectively, wherein the first build-up layer includes a trench circuit layer as an outermost circuit layer formed by a trench technology, the trench circuit layer is embedded in the first protective layer, and an outermost circuit layer of the second build-up layer is embedded in an outermost insulating layer of the second build-up layer, and a method of manufacturing the printed circuit board. Thanks to the formation of the outermost circuit layer by the trench technology, it is difficult to separate the outermost circuit layer from the outermost insulating layer.04-21-2011
20120211270METHOD OF MANUFACTURING PRINTED WIRING BOARD AND PRINTED WIRING BOARD - A method of manufacturing a printed wiring board includes forming a first hole penetrating a base having conductivity, closing an opening of the first hole with a film, filling an insulating material into the first hole after closing the opening, removing the film after filling the insulating material, forming a plurality of second holes penetrating the insulating material, and forming a film having conductivity on an inner surface of each of the second holes to form a plurality of wirings penetrating the insulating material.08-23-2012
20090133917Multilayered Circuit Board for Connection to Bumps - A circuit board on which an electronic device having bumps arranged in an array form is to be mounted includes a substrate having a multilayer structure that includes interconnect lines and insulating layers, and vias penetrating through one or more of the insulating layers and coupled to one or more of the interconnect lines, wherein the vias are arranged at positions that are the same as positions of the bumps to be connected on the substrate, and the vias project from a surface of the substrate so that upper-end portions of the vias are exposed from the surface of the substrate.05-28-2009
20090133915WIRING BOARD, METHOD FOR MANUFACTURING SAME AND SEMICONDUCTOR DEVICE - A wiring board which includes a product portion configured with at least one layer of electrically insulating base, a wiring pattern formed on the surface or inner portion of the electrically insulating base, and a wiring protection layer which is formed on the surface of the board and has an opening. Warping over the entire wiring board can be reduced since this wiring board has a warp-correcting portion warped in a direction different from that of the product portion.05-28-2009
20100288549Coreless packaging substrate and method for manufacturing the same - Disclosed are a coreless packaging substrate and a manufacturing method thereof. The substrate includes a built-up structure and a first wiring layer. The built-up structure has a first outside and an opposite second outside, and includes one or more second dielectric layers and second wiring layers, and a plurality of conductive vias. The second dielectric layers have first and second surfaces respectively facing the first and second outsides. The second wiring layers are disposed on the second surface. The conductive vias are disposed in the second dielectric layer. The outermost second wiring layer at the second outside has a plurality of second conductive pads. The first wiring layer is embedded into and exposed from the first surface of the outermost second dielectric layer at the first outside, and has a plurality of first conductive pads. The conductive vias electrically connect the first wiring layer and the second wiring layer.11-18-2010
20100288548CIRCUIT LAYOUT METHOD AND CIRCUIT BOARD FABRICATED BY THE SAME - In a circuit layout method, a circuit layout diagram of a circuit board is provided, the circuit board including a plurality of pad symbols. Then, after information regarding a direction of the circuit board facing towards a solder oven when the circuit board passes through the solder oven in the future is obtained, an independent trailing pad symbol is added to a position behind the last pad symbol passing through the solder oven on the layout diagram corresponding to the circuit board. Thus, when the layout diagram is performing version update, the independent trailing pad symbol does not participate in the version update.11-18-2010
20120160553CIRCUIT BOARD PRODUCTION METHOD AND CIRCUIT BOARD06-28-2012
20100206625Composite Circuit Board - A composite circuit board according to an embodiment of the invention includes a first circuit board having a first conductive line and a second conductive line which is longer in length than the first conductive line, and a second circuit board having a third conductive line which is electrically connected to the first conductive line and a fourth conductive line which is electrically connected to the second conductive line and is shorter in length than the third conductive line.08-19-2010
20100051341Circuit substrate having power/ground plane with grid holes - The present invention relates to a circuit substrate having a first conductive layer. The first conductive layer includes at least one power/ground plane. The power/ground plane includes at least one plane edge and plurality of grid lines. Each grid line has a width. The grid lines intersect each other to define a plurality of first grid holes, wherein the distance between the first grid hole that is closest to the plane edge and the plane edge is 1.5 times the width. Thus, the influence on the resistance of power signal and ground signal caused by the first grid holes is reduced, power integrity is improved, and heat generation is reduced.03-04-2010
20120211271MULTILAYER WIRING BOARD - A multilayer wiring board including a build-up layer, formed from one or more conductor and resin insulation layers that are layered one on top of the other, having conductive pads formed on a surface of at least one resin insulation layer so as to project from the surface are provided. The conductive pads may each include a columnar portion situated at a lower part thereof and a convex portion situated at a higher part thereof, wherein a surface of the convex portion may assume a continual curved shape. A solder layer may be formed over an upper surface of the conductive pads. Certain embodiments make it possible to minimize or eliminate the concentration of stress on the conductive pads, and may inhibit the occurrence of defective connections to a semiconductor element and infliction of damage to the conductive pads.08-23-2012
20100175916Method and Apparatus for Configurable Circuitry - A method and apparatus for configurable circuitry have been disclosed.07-15-2010
20080202802Printed circuit board module having two printed circuit boards for mounting inline package elements and adhibit elements respectively - An exemplary printed circuit board (PCB) module (08-28-2008
20100012366WIRING BOARD HAVING VIA AND METHOD FORMING A VIA IN A WIRING BOARD - A wiring board has a plurality of wiring layers, a first land, a second land, a first via and a second via. The first land and the second land are formed on at least one wiring layer of the wiring board and are disposed to partially overlap with each other. The first via and the second via are formed in association with the first land and the second land, respectively. The first via and the second via electrically connect a first wiring layer and a second wiring layer of the plurality of wiring layers to each other. The wiring board has a separator that is formed by a hole that separates the first land and the second land from each other.01-21-2010
20100012365PRINTED CIRCUIT BOARD - A printed circuit board includes first and second connector pads, first and second connection components, and first, second, and third transmission lines. A method for supporting two connectors on the printed circuit board is also provided. The printed circuit board is capable of supporting different types of connectors by setting the first and second connection components on the printed circuit board.01-21-2010
20120312590METHOD OF MANUFACTURING MULTILAYER WIRING SUBSTRATE, AND MULTILAYER WIRING SUBSTRATE - Disclosed is a method of manufacturing a multilayer wiring substrate having a principal plane of the substrate and a rear plane thereof, having a structure such that a plurality of resin insulating layers and a plurality of conductor layers are laminated, and a plurality of chip component connecting terminals to which chip components are connectable are disposed on the principal plane of the substrate. This method has a feature including a plating layer forming process in which product plating layers which provide the plurality of chip component connecting terminals and a dummy plating layer on the surrounding of the product plating layers are formed on the surface of an exposed outermost resin insulating layer at the principal plane of the substrate. This method permits a thickness dispersion of the chip component connecting terminals to be suppressed and permits a connection reliability thereof to the chip components to be increased.12-13-2012
20120247823PACKAGE-SUBSTRATE-MOUNTING PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A printed wiring board includes an interlayer insulation layer, first pads positioned to mount a semiconductor element and forming a first pad group on the insulation layer, second pads forming a second pad group on the insulation layer and positioned along a peripheral portion of the first group, a first solder-resist layer formed on the insulation layer and having first openings exposing the first pads, respectively, and second openings exposing the second pads, respectively, conductive posts formed on the second pads through the second openings of the first solder-resist layer, respectively, and a second solder-resist layer formed on the first solder-resist layer and having a third opening exposing the first pads and fourth openings exposing surfaces of the posts, respectively. The second openings have a diameter greater than a diameter of the posts, and the second solder-resist layer is filling gaps formed between the second openings and the posts.10-04-2012
20120255768Solder Containment Brackets - Electronic assemblies with solder containment brackets are provided. A solder containment bracket may have a planar base and a vertically extending wall. The wall may protrude upwards from the base to form an enclosed region. The base may have a hole that corresponds to the shape of the enclosed region. The wall may have an opening. A wire may be inserted into the opening. The wire may be soldered to the solder containment bracket to form a solder joint that electrically connects the wire to the bracket. The solder joint formed within the enclosed region may have a size that is defined by the bracket wall. The solder containment bracket may be soldered to a solder pad on a printed circuit board by reflowing a layer of solder paste.10-11-2012
20120261176CIRCUIT BOARD STRUCTURE AND PACKAGING STRUCTURE COMPRISING THE CIRCUIT BOARD STRUCTURE - A circuit board structure at least includes a patterned solder mask, a first conductive pattern, a second conductive pattern adjacent to the first conductive pattern and in direct contact with the patterned solder mask and a passivation respectively covering the first conductive pattern and the second conductive pattern.10-18-2012
20120261175PRINTED CIRCUIT BOARD - A printed circuit board includes a first circuit area, a second circuit area, a plurality of connectors, and a connecting terminal. The first circuit area is electrically connected to the second circuit area via the connectors. The connecting terminal is placed on one side of the first circuit area for electrically connecting with a load. An imaginary center line of the connecting terminal is perpendicular to the one side of the printed circuit board. The less a horizontal distance between the center line of connecting terminal and one of the connectors, the larger a vertical distance between the side of the printed circuit board and the one of the connector.10-18-2012
20110036625PROCESS FOR PRODUCING MULTILAYER PRINTED WIRING BOARD - Multilayer printed wiring boards superior in formation of an ultrafine wiring, which can form a conductive layer superior in peel strength on a flat insulating layer surface, can be prepared by a method including the following steps (A)-(E): 02-17-2011
20120267154Low Resistance, Multi-Contact Point Pin - A low resistance, multi-contact point pin, configured for insertion into a pin receptacle having an electrically conductive plating, where the pin includes: a surface and more than one electrically conductive extrusion from the surface of the pin, with each extrusion extruding substantially orthogonal to a direction of insertion of the pin into the pin receptacle, and where the extrusions configured to electrically couple, with parallel resistance, the pin to the electrically conductive plating of the pin receptacle.10-25-2012
20120267155CIRCUIT SUBSTRATE - A circuit substrate includes a base layer, a patterned conductive layer, a dielectric layer, an outer pad and a conductive block. The patterned conductive layer is disposed on the base layer and has an inner pad. The dielectric layer is disposed on the base layer and covers the patterned conductive layer. The outer pad is disposed on the dielectric layer. The conductive layer is passed through the dielectric layer and connected between the outer pad and the inner pad, wherein the outer pad and the conductive block are formed as an integrative unit, and an outer diameter of the outer pad is substantially equal to an outer diameter of the conductive block.10-25-2012
20110226518SUBSTRATE OF CIRCUIT MODULE AND MANUFACTURING METHOD THEREFOR - A coplanar line formed on a high-frequency substrate of a high-frequency module includes a first dielectric layer, a signal line which is formed on the surface of the first dielectric layer and connected to a core line of a coaxial connector, a ground which is formed in opposite areas beside the signal line with a clearance therebetween, and a lower ground of the first dielectric layer. A second dielectric layer is laminated with the first dielectric layer so as to interpose the lower ground therebetween. Additionally, the lower ground is exposed on the terminal face of the high-frequency substrate coupled with the coaxial connector in either the first dielectric layer or the second dielectric layer and connected to an outer conductor of the coaxial connector. Thus, it is possible to prevent an insertion loss from increasing due to electromagnetic emission occurring in the clearance of the high-frequency substrate in response to transmitting signals in a high frequency range.09-22-2011
20110226517POWER TRANSFORMING CIRCUIT BOARD - A power transforming circuit board includes a substrate and at least one power output structure. The substrate has at least one power transforming circuit and at least one pair of power input holes. The power output structure is disposed on the substrate. Each power output structure is electrically connected with one corresponding power transforming circuit. Each power output structure has at least one cable connecting hole. The normal direction of each power output structure is oriented at an angle with respect to the normal direction of the substrate.09-22-2011
20110247869MULTILAYER PRINTED CIRCUIT BOARD - Provided is a multilayer printed circuit board including: a signal ground pattern; a frame ground pattern formed through a slit portion; an external interface component connected to a semiconductor device by a signal wiring extending over the slit portion; and two connecting members having an electrical conductivity arranged symmetrically such that the connecting members sandwich the signal wiring and extend over the slit portion. With this configuration, a return current path is formed between the frame ground pattern and the signal ground pattern, to thereby improve a resistance to exogenous noise such as electrostatic discharge noise, and suppress radiation noise.10-13-2011
20120325541AXIOCENTRIC SCRUBBING LAND GRID ARRAY CONTACTS AND METHODS FOR FABRICATION - A contact structure and assembly and a method for manufacturing the same for a microelectronics device includes first and second electrically conductive contacts being helically shaped. A carrier element is attached to and positioned between the first and second contacts. The first and second contacts are in electrical communication with each other, and the first and second contacts are in a mirror image relationship with each other. A pair of insulating substrates each include electrically conductive members. A contact point on each of the first and second contacts is attached and electrically communicating to respective electrically conductive members such that the first and second electrically conductive contacts between the pair of insulating substrates form an electrically conductive package. A metal layer on the carrier element provides electrical conductivity through a first opening defined by the carrier element between the first and second portions of the helix shaped contact.12-27-2012
20120325540FOOTPRINT ON PCB FOR LEADFRAME-BASED PACKAGES - A footprint of a printed circuit board (PCB) for a leadframe-based package includes a plurality of pads arranged within a central region on a main surface of the PCB; and an array of signal pads disposed within a peripheral region surrounding the central region.12-27-2012
20120325539BONDING AREA DESIGN FOR TRANSIENT LIQUID PHASE BONDING PROCESS - Devices, methods and systems are disclosed herein to describe the wettability characteristics of the material forming a bonding area, a non-bonding area, and a melted bonding material. The melted bonding material may have a high degree of cohesion and may result in a very high contact angle (e.g., between 12-27-2012
20110278057ELECTRICAL CONNECTOR SYSTEM - A substrate is disclosed that is configured to receive an electrical component. The substrate comprises a plurality of first vias and a plurality of second vias. The plurality of first vias is arranges in the substrate in a matrix of rows and columns and is configured to provide mounting of the electric component, each first via associated with one of its closest neighbor first via to form a pair. The plurality of second vias is capable of being electrically commoned to one another and is positioned amongst the plurality of first vias such that there is at least one second via positioned directly between each first via and any of the closest non-pair first via neighbors.11-17-2011
20100025097CIRCUIT CONNECTION STRUCTURE - There is provided a circuit connection structure that can provide satisfactory electrical connection between opposing circuit electrodes and that can sufficiently increase the long-term reliability of electrical characteristics between circuit electrodes. A circuit connection structure 02-04-2010
20120138351CIRCUIT BOARD - The circuit board includes a base board and a pad array mounted on the base board. The pad array includes a plurality of spaced first pads, two second pads, and two third pads. The first pads, the second pads, and the third pads are all parallel to each other. The third pads are between the first pads and the second pads. The first pads electronically and physically connect to an electric element. The second pads and third pads physically connect to the electric element.06-07-2012
20100132995WIRING BOARD AND METHOD OF PRODUCING THE SAME - A wiring board includes: wiring layers; insulating layers disposed between the wiring layers; and external connection pads respectively including surface plated layers, for connecting to an external circuit. In each of the external connection pads in one face of the wiring board, an outer peripheral edge of the external connection pad is retracted from an outer peripheral edge of the surface plated layer toward a center of the external connection pad.06-03-2010
20080223610BGA PACKAGE SUBSTRATE AND METHOD OF FABRICATING SAME - Disclosed is a ball grid array (BGA) package substrate, in which a wire bonding pad and a solder ball pad are formed on a via hole, making high freedom in design of a circuit pattern and a high density circuit pattern possible, and a method of fabricating the same.09-18-2008
20130175076Component Carrier, Electric Conductor and Method for Producing a Component Carrier as Well as an Electric Conductor - The disclosure relates to a component carrier or printed circuit board for electronic components. According to embodiments, a component carrier may include a first contact face for a contact to a first component, a second contact face for a contact to a second component as well as a conductor track that electrically couples the first and the second contact face. The conductor track may include a conductor recess along the conductor track extending through the printed circuit board. An electric conductor may be arranged in the conductor recess extending over the entire course thereof and electrically coupled to the conductor track.07-11-2013
20130133938Dicing Sheet and a Production Method of a Semiconductor Chip - A dicing sheet includes a base, an intermediate layer on one face of the base, and an pressure sensitive adhesive layer provided on the intermediate layer and having the thickness of 8 to 30 μm. The pressure sensitive adhesive layer includes a compound having an energy ray curable double bond in a molecule, and a storage elasticity G′ at 23° C. of the pressure sensitive adhesive layer before curing is larger than 4 times of a storage elasticity at 23° C. of the intermediate layer. When the dicing sheet is laminated via the adhesive sheet on a wafer formed with a cylinder shape electrodes having a height of 15 μm and a diameter of 15 μm at a pitch of 40 μm having 3 rows 3 columns in equal spacing, at a center of the electrode of the cylinder shape electrodes formed in 3 rows 3 columns, the pressure sensitive adhesive layer does not contact at a part of a height of 7.5 μm or less of the electrode.05-30-2013
20130133937MESH PLANES WITH ALTERNATING SPACES FOR MULTI-LAYERED CERAMIC PACKAGES - An improved multi-layered ceramic package includes a plurality of signal planes, each having one or more signal lines; a plurality of vias, each providing one of a voltage (Vdd) power connection or a ground (Gnd) connection; and at least one reference mesh plane adjacent to one or more signal planes. The reference mesh plane includes spaced mesh lines that are separated by spaces that alternate in a narrow-wide or wide-narrow pattern. A multi-layered ceramic package using the mesh plane with alternating spaces generates significantly lower far-end (FE) noise in the ceramic package than a conventional mesh plane with constant spaces. The noise is further reduced by placing shield lines on opposite sides of signal lines in the signal plane.05-30-2013
20130112467SYSTEM AND METHOD FOR CONTROLLING RADIO FREQUENCY TRANSMISSIONS FROM AN ELECTRONIC DEVICE - The disclosure relates to a printed circuit board (PCB) for an electronic circuit for a power amplifier of a wireless communication device. The PCB comprises: a substrate; a ground reference in the substrate; first through fourth locations and first and second pads in the substrate; and first and second electrical tracks in the substrate. The locations are for components for the PCB, including a 0 ohm component, and pads connect tracks to the components. The first pad is for a high band power input terminal of the amplifier. The first track connects the first pad to the second location. The third location is in the first track for placement of a first capacitor in a circuit between the first pad and ground. The second pad is for an output terminal of the amplifier. The second track connects the second pad to an output stage circuit of the amplifier.05-09-2013
20100276190ELECTRONIC COMPONENT AND METHOD OF MOUNTING THE SAME - An electronic component achieves significantly improved adhesion strength between an external electrode and a substrate body and includes an insulative substrate body, at least one groove disposed in at least one main surface of the substrate body, at least one external electrode disposed on the at least one main surface of the substrate body, wherein a portion of the at least one external electrode is disposed in at least a portion of the groove.11-04-2010
20080210461CIRCUIT BOARD WITH A THREE-TERMINAL JUMBER AND METHOD FOR FABRICATING THE SAME - A method of fabricating a circuit board includes the steps of: (a) defining a first jumper symbol and a second jumper symbol of a schematic circuit symbol library; (b) drawing the first jumper symbol and the second jumper symbol of the schematic circuit symbol library in a schematic circuit diagram for forming a three-terminal jumper symbol; (c) defining a first jumper pattern and a second jumper pattern of a PCB component pattern library; (d) calling the PCB component pattern library for drawing the first jumper pattern and the second jumper pattern in a PCB layout so as to define a three-terminal jumper pattern; (e) selecting a jumper symbol between the first jumper symbol and the second jumper symbol; and (f) mounting a jumper on the first jumper pattern or the second jumper pattern on the circuit board according to the PCB layout and a select result from step (e).09-04-2008
20110209910Multilayered Wiring Board and Method of Manufacturing the Same - A multilayered wiring board having a stack structure multilayered by alternately stacking a plurality of conductor layers and a plurality of resin insulation layers, wherein a solder resist is provided on at least one of a first main surface side and a second main surface side of the stack structure, a plurality of openings are formed in an outermost resin insulation layer that contacts with the solder resist, a plurality of the first main surface side connecting terminals or a plurality of the second main surface side connecting terminals being made of a copper layer as a main component and positioned in a plurality of the openings, terminal outer surfaces being positioned inwardly from an outer surface of the outermost resin insulation layer, and the solder resist extends into the plurality of openings and makes contact with an outer circumference portion of each of the terminal outer surfaces.09-01-2011
20080196933Printed circuit board substrate and method for constructing same - A printed circuit board (PCB) substrate and method for construction of the same. In one embodiment, a first dielectric material is associated with a first current return layer and a second dielectric material is associated with a second current return layer. A first signal path layer is embedded in the first dielectric material and a second signal path layer is embedded in the second dielectric material, wherein the first and second signal path layers are substantially parallel to each other in a stack-up arrangement. An adhesive layer is interposed between the first dielectric material and the second dielectric material.08-21-2008
20110220404WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A wiring substrate includes a composite substrate including an oxidized aluminum substrate portion in which a large number of penetration conductors penetrating in a thickness direction are provided, and a frame-like aluminum substrate portion provided around the oxidized aluminum substrate portion, and a wiring layer of n layers (n is an integer of 1 or more) connected to the penetration conductors.09-15-2011
20110220403SIDE PACKAGED TYPE PRINTED CIRCUIT BOARD - The invention provides a side packaged type printed circuit board. The side packaged type printed circuit board includes a circuit substrate having a surface and an adjacent side surface. An inner circuit covers a portion of the surface. A first side electrical connecting pad electrically connects to the inner circuit, wherein the first side electrical connecting pad and the inner circuit are in the same additional layer.09-15-2011
20100307806PRINTED CIRCUIT BOARD - A printed circuit board includes a signal layer and a power layer. A differential pair with two transmission lines is set on the signal layer. A cross-trench portion is formed in the power layer. A first width of each transmission line which is not located above the cross-trench portion is less than a second width of the transmission line which is located above the cross-trench portion. A first distance between the two transmission lines which are not located above the cross-trench portion is greater than a second distance between the two transmission lines which are located above the cross-trench portion.12-09-2010
20130180771SUSPENDED LATTICE FOR ELECTRICAL INTERCONNECTS - An electrical interconnect has a circuit substrate and an electrical connection point on the circuit substrate. The electrical connection point includes a lattice of conductive material that is adjacent a gap in the circuit substrate and has anchor points that are attached to the circuit substrate. In some configurations, a conductive epoxy encapsulates at least a portion of the lattice of conductive material and may include a second electrical connection point that is bonded to the other electrical connection point through the conductive epoxy.07-18-2013
20110308850NOTCH POSITIONING TYPE SOLDERING STRUCTURE AND METHOD FOR PREVENTING PIN DEVIATION - A notch positioning type soldering structure and a method for preventing a pin deviation can prevent a plurality of pins of an electronic component from being deviated when the pins are soldered onto a printed circuit board by a solder, and each of at least two solder pads includes at least one notch, and the solder pads are installed in an alignment direction on the printed circuit board, such that the notch positioning type soldering structure and the method for preventing a pin deviation can improve the efficiency of manufacturing processes and reduce the manufacturing cost.12-22-2011
20130186678SUBSTRATE SET, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING SUBSTRATE SET - Provided is a highly accurately alignable substrate set, the cost of which is kept low. In the substrate set, a light source FPC substrate (07-25-2013
20120018207CIRCUIT SUBSTRATE AND FABRICATING PROCESS OF CIRCUIT SUBSTRATE - A circuit substrate includes a base layer, a first patterned conductive layer, a dielectric layer, a conductive block and a second patterned conductive layer. The first patterned conductive layer is disposed on the base layer and has a first pad. The dielectric layer is disposed on the base layer and covers the first patterned conductive layer, wherein the dielectric layer has an opening and the first pad is exposed by the opening. The conductive block is disposed in the opening and covers the first pad. The second patterned conductive layer is disposed on a surface of the dielectric layer and has a second pad, wherein the second pad and the conductive block are integrally formed. In addition, a fabricating process of a circuit substrate is also provided.01-26-2012

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