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Conducting (e.g., ink)

Subclass of:

174 - Electricity: conductors and insulators

174680100 - CONDUITS, CABLES OR CONDUCTORS

174250000 - Preformed panel circuit arrangement (e.g., printed circuit)

174256000 - With particular material

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Entries
DocumentTitleDate
20130025918CRYSTALLOGRAPHICALLY-ORIENTED CARBON NANOTUBES GROWN ON FEW-LAYER GRAPHENE FILMS - A thermal and electrical conducting apparatus includes a few-layer graphene film having a thickness D where D≦1.5 nm and a plurality of carbon nanotubes crystallographically aligned with the few-layer graphene film.01-31-2013
20130025919METHOD FOR BACKDRILLING VIA STUBS OF MULTILAYER PRINTED CIRCUIT BOARDS WITH REDUCED BACKDRILL DIAMETERS - Methods of backdrilling printed circuit boards (PCBs) to remove via stubs and related apparatuses. The method may include removing a via stub through a combination of backdrilling and chemical etching. The backdrilling may remove a masking layer from the via stub. Portions of an underlying layer may remain in the region of the via stub after the backdrilling is completed. The remaining portions of the underlying layer may be removed in a subsequent etching process thereby removing the via stub from the PCB. As the backdrilling step may be used for the limited purpose of removing the outer layer and portions of the underlying layer remaining in the via can be tolerated, the diameter of the backdrilling need not be as large as traditional backdrilling where all layers within the via must be ensured of being completely removed.01-31-2013
20130043066DISC COMPRISING AN ELECTRICAL CONNECTION ELEMENT - The present invention relates to a pane with an electrical connection element, comprising: 02-21-2013
20130025917COPPER COLUMN AND PROCESS FOR PRODUCING SAME - To prevent the breakage of the joint between a ceramic substrate and a glass epoxy substrate.01-31-2013
20100059260COMPOSIT METALLIC THIN FILMY PARTICLE, DISPERSION OF A COMPOSIT METALLIC THIN FILMY PARTICLE, INK FOR MAKING A CONDUCTIVE SUBSTRATE, METHOD FOR MAKING A CONDUCTIVE SUBSTRATE AND A CONDUCTIVE SUBSTRATE - Objects of the present invention include providing composite metallic thin filmy particles for conductive inks and a conductive ink, both allowing the production of highly conductive substrates with simpler equipment and at a lower cost, providing a method for making such a conductive substrate, and providing such a conductive substrate.03-11-2010
20130025916FLAME RETARDANT EPOXY LAMINATE CONTAINING METAL PHOSPHONATE - There is provided herein an epoxy laminate comprising (a) an epoxy resin composition further comprising (i) at least one curable epoxy resin, (ii) at least one curing agent, (iii) at least one curing catalyst; and, (iv) a flame retardant effective amount of at least one metal phosphonate represented by the general formula:01-31-2013
20100051333CONDUCTIVE INK, CONDUCTIVE CIRCUIT AND NON-CONTACT MEDIA - Disclosed is an active energy ray-curable conductive ink containing a conductive substance and a binder component, which is characterized in that the binder component contains a chlorinated polyester and an active energy ray-polymerizable compound. This active energy ray-curable conductive ink has good fluidity and enables to obtain a conductive circuit with low resistance after curing. Also disclosed are a method for forming a conductive circuit by printing this conductive ink on a substrate, and non-contact media comprising an IC chip mounted in a state electrically connected with the conductive circuit. The conductive substance is preferably a flake powder having a BET specific surface area of 0.1-0.4 m03-04-2010
20120168214MODULE AND PROCESS FOR PRODUCTION THEREOF - A module including a circuit board including an insulating layer and one or more layers of copper foil embedded in the insulating layer; an electronic component mounted on the circuit board; a sealing part sealing the electronic component on the circuit board; and a metal film covering side surfaces of the circuit board and surfaces of the sealing part. A part of the copper foil is exposed to the side surfaces of the circuit board, an exposed part of the copper foil has a width of less than 200 μm, and the copper foil and the metal film are electrically coupled to each other through the exposed part. Thus, occurrence of blushing, crack, or the like, can be prevented.07-05-2012
20130048351ELECTRONIC PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING SAME - An exemplary electronic package structure includes a substrate configured with a solder pad, a metal support element, an electronic component connected to the solder pad, and an encapsulation body. The metal support element is located between the solder pad and the electronic component. As a result, a gap is defined between the substrate and the electronic component. A height of the gap is equal to a height of the solder pad plus a height of the metal support element. The encapsulation body encapsulates the electronic component together with the substrate and the gap is completely filled with material of the encapsulation body.02-28-2013
20130048352PRINTED CIRCUIT BOARD - A printed circuit board includes a signal layer and a reference layer. The signal layer is covered with copper foil. A circuit topology for multiple loads is set on the signal layer. The circuit topology includes a driving terminal, a first signal receiving terminal, and a second signal receiving terminal. The driving terminal is connected to a node through a first transmission line. The node is connected to the first and second signal receiving terminals respectively through a second and a third transmission lines. A difference between lengths of the second and third transmission lines is greater than a product of a transmission speed and a rise time of signals from the driving terminal. The reference layer is covered with copper foil, and arranged under the signal layer. A region without copper foil is formed on the reference layer, under the second transmission line.02-28-2013
20100147567Thermosetting Resin Composition, Method of Manufacturing the Same and Circuit Board - The object of the invention is to provide a thermosetting resin composition which, in packaging an electronic circuit containing components incapable of withstanding elevated temperatures, employs low-melting solder particles, thereby enabling batch ref lowing and enabling packaging of components with excellent strength and toughness.06-17-2010
20090025967METHODS FOR ATTACHMENT AND DEVICES PRODUCED USING THE METHODS - Methods for attachment and devices produced using such methods are disclosed. In certain examples, the method comprises disposing a capped nanomaterial on a substrate, disposing a die on the disposed capped nanomaterial, drying the disposed capped nanomaterial and the disposed die, and sintering the dried disposed die and the dried capped nanomaterial at a temperature of 300° C. or less to attach the die to the substrate. Devices produced using the methods are also described.01-29-2009
20130075142ADHESIVE COMPOSITION, USE THEREOF, CONNECTION STRUCTURE FOR CIRCUIT MEMBERS, AND METHOD FOR PRODUCING SAME - An adhesive composition for connection between a first circuit member having a first connecting terminal on the main surface and a second circuit member having a second connecting terminal on the main surface, wherein the first circuit member and/or second circuit member are made of a base material containing a thermoplastic resin with a glass transition temperature of no higher than 200° C., the first connecting terminal and/or second connecting terminal are made of ITO and/or IZO, and the adhesive composition includes a phosphate group-containing compound, the free phosphate concentration of the cured adhesive composition being no greater than 100 ppm by mass.03-28-2013
20130075141WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A wiring substrate includes a substrate main body having a first main face and a second main face opposite the first main face; a resistor formed on the first main face; a plurality of first-main-face-side wiring layers which are each formed on the resistor and which each include a grounding metal layer formed of a metal having a resistance lower than that of the resistor and a conductor layer formed on the grounding metal layer; a second-main-face-side wiring layer formed on the second main face; and a via which is formed in the substrate main body and which establishes electrical connectivity between the first-main-face-side wiring layers and the second-main-face-side wiring layer. The wiring substrate further includes a conductive covering layer which covers an upper surface and substantially covers the side surfaces of each of the first-main-face-side wiring layers.03-28-2013
20130075139Formation of Connectors without UBM - A device includes a substrate, a metal pad over the substrate, and a passivation layer having a portion over the metal pad. A post-passivation interconnect (PPI) is electrically coupled to the metal pad, wherein the PPI includes a portion over the metal pad and the passivation layer. A polymer layer is over the PPI. A solder ball is over the PPI. A compound includes a portion adjoining the solder ball and the polymer layer, wherein the compound includes flux and a polymer.03-28-2013
20130075138HALOGEN-FREE RESIN COMPOSITION AND COPPER CLAD LAMINATE AND PRINTED CIRCUIT BOARD USING SAME - The halogen-free resin composition comprises (A)100 parts by weight of cyanate ester resin; (B) 5 to 50 parts by weight of styrene-maleic anhydride; (C) 5 to 100 parts by weight of polyphenylene oxide resin; (D) 5 to 100 parts by weight of maleimide; (E) 10 to 150 parts by weight of phosphazene; and (F) 10 to 1000 parts by weight of inorganic filler. By using specific components at specific proportions, the halogen-free resin composition of the invention offers the features of low dielectric constant, low dissipation factor, high heat resistance and high flame retardancy, and can be made into prepreg or resin film, and thereby used in copper clad laminate or printed circuit board.03-28-2013
20130075140PRINTED WIRING BOARD - A printed wiring board includes a core insulation layer having via conductors through the core layer, a first structure including an interlayer insulation layer on first surface of the core layer and having via conductors through the interlayer layer in the first structure, and a second structure including an interlayer insulation layer on second surface of the core layer and having via conductors through the interlayer layer in the second structure. The interlayer layers have dielectric constants set to be 4.0 or lower for signal transmission at frequency of 1 GHz, the core layer has thermal expansion coefficient at or below Tg set lower than thermal expansion coefficients of the interlayer layers at or below Tg, the coefficient of the core layer at or below Tg is set to be 75 ppm/° C. or lower, and the conductors in the interlayer layers are stacked on the conductors in the core layer.03-28-2013
20100147568CERAMIC MULTILAYER SUBSTRATE - A ceramic multilayer substrate in which cracks resulting from the difference in shrinkage caused by heat or thermal shrinkage caused by firing can be prevented effectively between an end surface electrode and a substrate main body. The substrate main body includes alternately stacked first and second ceramic layers, and including first recesses provided in end surfaces of at least two adjacent ceramic layers so as to communicate with each other, and an electroconductive end surface electrode is disposed in the first recesses in the substrate main body. The first and the second ceramic layer each have a sintering start temperature and a sintering end temperature, and at least one of the sintering start temperature and the sintering end temperature is different between the first and the second ceramic layer. The substrate main body has a second recess in at least one of the ceramic layers having the first recesses so as to communicate with the first recess and lie between other ceramic layers. In the second recess, an electroconductive protrusion connected to the end surface electrode is disposed.06-17-2010
20090277671GLASS PANE HAVING SOLDERED ELECTRICAL TERMINAL CONNECTIONS - A glass pane having at least one electrical functional element is provided. The functional element comprises at least one electrical conductor and at least one terminal area located at an end of the electrical conductor, wherein the electrical conductor and the terminal area are formed from an electrically conductive layer deposited on a surface of the glass pane. A terminal wire is connected to the at least one terminal area by a soldered joint by way of a metal block having a flat contact area, and the flat contact area is soldered on a corresponding terminal area. A method for forming such a connection is also disclosed.11-12-2009
20100071939Substrate of window ball grid array package - The present invention relates to a substrate of a window ball grid array package. The substrate includes at least one window, a first conductive layer, a second conductive layer, a dielectric layer, a plurality of first vias and a plurality of second vias. The window penetrates the substrate. The first conductive layer has a plurality of fingers and at least one first power/ground plane, and the fingers are disposed at the periphery of the window. The second conductive layer has at least one second power/ground plane. The dielectric layer is disposed between the first conductive layer and the second conductive layer. The first vias electrically connect the first power/ground plane to the second power/ground plane. The second vias are disposed between the fingers and the window, and electrically connect some of the fingers to the second power/ground plane. Thus, the substrate can control the characteristic impedance and increase the signal integrity.03-25-2010
20130037312HIGH DENSITY TRACE FORMATION METHOD BY LASER ABLATION - A method for making a microelectronic substrate includes forming a pattern of a selected metallic layer of an in-process unit using laser ablation such that the pattern corresponds to desired locations for conductive features. Conductive material is than added to the in-process unit by a process that uses the pattern to concentrate application of the conductive material to the in-process unit such that the conductive material forms conductive features of the substrate according to the pattern. The step forming a pattern of a selected metallic layer of an in-process unit using laser ablation can includes the use of a UV laser, a CO2 or an excimer laser.02-14-2013
20120175158CIRCUIT BOARD - A circuit board 07-12-2012
20120175157WIRING BOARD AND METHOD OF PRODUCING THE SAME - A wiring board includes: wiring layers; insulating layers disposed between the wiring layers; and external connection pads respectively including surface plated layers, for connecting to an external circuit. In each of the external connection pads in one face of the wiring board, an outer peripheral edge of the external connection pad is retracted from an outer peripheral edge of the surface plated layer toward a center of the external connection pad.07-12-2012
20120175156PRINTED CIRCUIT BOARD - A printed circuit board includes a substrate, a plurality of metal wires, and a solder mask layer. The substrate includes a first area and a second area. The second area surrounds and does not overlap the first area. The metal wires are disposed on the first area of the substrate. One end of one of two adjacent metal wires faces one end of the other one of the two adjacent metal wires. The solder mask layer is formed on the second area of the substrate. In the present invention, a short circuit or an open circuit between the two adjacent metal wires is directly formed during processes of manufacturing the printed circuit board, whereby a jumper is not required so as to reduce a layout area, and cost of a manual post-welding treatment can be reduced.07-12-2012
20100044085WIRING, DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - The present invention provides a wiring, a display device, and a method of manufacturing the same. A first metal diffusion-preventing layer is formed on a substrate or on a circuit element formed on the substrate. Then, a metal wiring layer is selectively formed on the first metal diffusion-preventing layer by an electroless metal plating method or a metal electroplating method. Further, the undesired portion of the first metal diffusion-preventing layer is removed. Finally, a second metal diffusion-preventing layer is formed selectively by an electroless metal plating method in a manner to cover the metal wiring layer or both a seed layer and the metal wiring layer.02-25-2010
20100044084Printed circuit board and method of manufacturing the same - Provided is a printed circuit board (PCB) including a substrate that has a pad formed thereon; solder resist that is disposed on the substrate so as to expose the pad; a post that is disposed on the post; a surface-treatment layer that is disposed on the post; and a bump that is disposed on the surface-treatment layer.02-25-2010
20100044086FORMATION METHOD OF METAL LAYER ON RESIN LAYER, PRINTED WIRING BOARD, AND PRODUCTION METHOD THEREOF - A printed wiring board having a conductor circuit comprising a copper layer adjacent to an insulating layer and an electroless gold plating, wherein the insulating layer has ten-point mean surface roughness (Rz) of 2.0 μm or less is provided. According to the present invention, there is no such a defect that gold plating is deposited on a resin, and fine wiring formation with accuracy is realized.02-25-2010
20100116531Component with Mechanically Loadable Connecting Surface - A component having a multilayer solderable or bondable connecting surface on a substrate is proposed, which, in addition to the electrically conductive pad metallization and the UBM metallization also has an electrically conductive stress compensation layer that is arranged between the substrate and the pad metallization or between the pad metallization and the UBM metallization. The insensitivity to stress of the connecting metallization is achieved by means of a stress compensation layer whose modulus of elasticity is less than that of the UBM metallization.05-13-2010
20100116530MULTILAYERED WIRING BOARD - A multilayered wiring board is composed of n wiring layers and (n−1) resin base material layers, which are alternately laminated. The (n−1) resin base material layers include fiber bundles impregnated with resin. The n wiring layers include wiring patterns and resin. When half of the wiring layers in the thickness direction of the multilayered wiring board differ in the copper remaining ratio from the other half, the multilayered wiring board might be warped during heating. The crossing point density of fiber bundles in each resin base material layer is adjusted so as to cancel the warpage caused by the difference in the copper remaining ratio between the wiring layers.05-13-2010
20100116529PRINTED WIRING BOARD HAVING A STIFFENER - To provide a novel multilayer printed wiring board in which a conductor on the outermost resin layer is positioned properly. Furthermore, to provide a novel multilayer printed wiring board in which productivity is enhanced when forming solder bumps on the pads for mounting a semiconductor element. In multilayer printed wiring board, multiple pads for connection with a semiconductor chip are formed on one surface, and on its opposite surface, external connection terminals for connection with another substrate are formed. The pads for connection with a semiconductor chip are formed in the central region of one surface, stiffener is formed in the peripheral region surrounding the pads for connection with a semiconductor chip, pads for connection with a semiconductor chip and stiffener are formed with the same material and are set to be the same height, and the actual area of the stiffener is determined according to the total area of the multiple pads for connection with a semiconductor chip.05-13-2010
20090188705Construction of Reliable Stacked Via in Electronic Substrates - Vertical Stiffness Control Method - A stacked via structure for reducing vertical stiffness includes: a plurality of stacked vias, each via disposed on a disc-like structure. The disc-like structure includes a platted through hole landing supporting the plurality of stacked vias. The platted through hole landing includes a compliant center zone; and spring-like stiffness-reducing connectors for connecting the compliant center zone of the platted through hole landing.07-30-2009
20100096171Printed circuit board having round solder bump and method of manufacturing the same - Disclosed herein is a printed circuit board having round solder bumps and a method of manufacturing the same. The solder bump is configured to have a round connecting surface in contact with a pad, and thus have an increased contact area with respect to the pad, thus improving connection reliability. The solder bumps have uniform heights.04-22-2010
20130133934BIOCOMPATIBLE CONDUCTIVE INKS - This invention relates to compositions and methods related to biocompatible conductive inks. In a preferred embodiment the inks are printable onto biocompatible substrates and are used in the creation of biocompatible medical devices, in general, the inks comprise a plurality of particles. In one embodiment, the particles have a particle surface and an agent on the particle surface, the agent configured to prevent the particles from agglomerating when the particles are in a solution, the agent also configured to allow adjacent particle surfaces to be in contact when the particles are not in the solution due to an opening in the agent.05-30-2013
20090159318Printed circuit board and manufacturing method thereof - A printed circuit board and a method of manufacturing the printed circuit board are disclosed. The method may include forming at least one first bump over a first metal layer by selectively printing an alloy paste, stacking an insulation layer over the first metal layer such that the first bump penetrates the insulation layer, and stacking a second metal layer over the insulation layer. Embodiments of the invention can shorten the manufacturing process and lower manufacturing costs, while effectively implementing signal transfers.06-25-2009
20090159317PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME - An exemplary method for manufacturing printed circuit boards is provided. In the method, a substrate having a first surface and a second surface on an opposite side of the substrate to the first surface is provided. A number of through holes in the substrate between the first surface and the second surface are formed. An electrically conductive paste is applied to the substrate to fill the through holes defined in the substrate to form a plurality of filling members and be printed on at least one of the first surface and the second surface of the substrate to form a number of electrical traces. The filling members located in the through hole in the substrate and the electrical traces printed on the substrate are cured.06-25-2009
20100108365CIRCUIT CONNECTION MATERIAL, CIRCUIT MEMBER CONNECTING STRUCTURE AND METHOD OF CONNECTING CIRCUIT MEMBER - The circuit-connecting material for connection between circuit members each having a board and a circuit electrode formed on the primary surface of the board, comprising an adhesive composition that cures in response to light or heat and an organic compound containing a urethane group and an ester group.05-06-2010
20100108366PREPARATION METHOD FOR AN ELECTROCONDUCTIVE PATTERNED COPPER LAYER AND A PATTERNED COPPER LAYER FORMED BY THE METHOD - A method for preparing an electroconductive patterned copper layer, comprising mixing copper-based particles with a reducing agent, and then adding a solvent thereto to prepare a reducing agent-containing copper-based particle dispersion solution; printing on or filling in the reducing agent-containing copper-based particle dispersion solution a substrate in a predetermined shape to form a reducing agent-containing copper-based particle patterned layer; and firing the reducing agent-containing copper-based particle patterned layer in the air, which allows forming a patterned copper layer with excellent electric conductivity even in the air, thereby being industrially very useful.05-06-2010
20130133935Touch Sensor Assembly and Method of Making the Same - A method of making a touch sensor assembly comprises: forming conductive trace elements on a transparent substrate; forming an insulator layer on the transparent substrate such that the insulator layer covers a portion of the conductive trace elements; and forming a plurality of conductive bridging lines such that each of the conductive bridging lines bridges two corresponding ones of the conductive trace elements. Each of the conductive bridging lines includes a plurality of conductor layers stacked one above the other and differing from one another in reflectivity. One of the conductor layers is formed by reacting a reactive gas with a metallic material, and has a reflectivity less than that of the metallic material.05-30-2013
20090107707Conductive Paste and Wiring Board Using It - A conductive paste is mainly composed of a metal powder, a glass frit, and an organic vehicle. The total content amount of the metal powder and glass frit with respect to the entire conductive paste is 85 wt % or more. The viscosity at a rotational speed of 1 rpm measured at 25° C. with an E type rotating viscometer is 100 Pa·s or more and 400 Pa·s or less.04-30-2009
20130081863SUBSTRATE WITH BUILT-IN ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING THE SAME - Provided are a substrate with built-in electronic component and a method for manufacturing the same. The method for manufacturing a substrate with built-in electronic component includes: forming conductive temporary bumps which penetrate and protrude through a prepreg sheet; mounting and attaching an electronic component on the protruding temporary bumps; forming an embedded substrate by laminating other prepreg sheet on the attached electronic component layer, laminating a metal sheet on a bottom of a laminate or on a bottom and top of the laminate, and pressing the prepreg sheets and the metal sheet; forming contact grooves by removing partial regions of the metal sheet and by removing the temporary bumps exposed by the removal of the metal sheet regions; and filling the contact grooves with a conductive metal and forming a circuit pattern.04-04-2013
20100065312Substrate for window ball grid array package - The present invention relates to a substrate for a window ball grid array package. The substrate has at least one window, a plurality of fingers and at least one power/ground section (or power/ground ring). The window penetrates the substrate. The fingers are disposed at the periphery of the window. The power/ground section (or power/ground ring) is disposed between the fingers and the window. The power/ground section (or power/ground ring) is connected to a power/ground voltage so that the power/ground section (or power/ground ring) can improve the smoothness of the current and power integrity, and reduce the heat generation.03-18-2010
20130087373ANISOTROPIC CONDUCTIVE ADHESIVE, METHOD OF PRODUCING THE SAME, CONNECTION STRUCTURE AND PRODUCING METHOD THEREOF - In an anisotropic conductive adhesive including a magnetic powder such as nickel-coated resin particles used as conductive particles, the conductive particles are present in an insulating adhesive composition without being aggregated. The magnetic powder used as the conductive particles is at least partially composed of a magnetic material. In this case, demagnetization has been performed on the conductive particles in a powder form that have not been dispersed in the insulating adhesive composition, the conductive particles in a paste obtained by dispersing the conductive particles in the insulating adhesive composition, or the conductive particles in a film formed from the paste, before establishment of an anisotropic conductive connection using the anisotropic conductive adhesive.04-11-2013
20120261173METHOD FOR SHIELDING PRINTED CIRCUIT BOARD AND PRINTED CIRCUIT BOARD - The present invention provides a method for shielding a printed circuit board and a printed circuit board. The method includes: providing a substrate; manufacturing at least one layer of copper foil on the substrate; forming a first solder mask layer on the surface layer of copper foil; and forming a carbon oil layer to cover the first solder mask layer, so as to shield wirings of all copper foil layers below the carbon oil layer on the printed circuit board. The printed circuit board includes: a substrate; at least one layer of copper foil, manufactured on the substrate; a first solder mask layer, formed on the surface layer of copper foil; and a carbon oil layer, covering the first solder mask layer.10-18-2012
20120181072PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING SAME - A printed wiring board includes multiple conductive layers having conductive circuits, multiple resin insulation layers having openings and including the uppermost resin insulation layer positioned as the outermost layer of the resin insulation layers, multiple via conductors formed in the openings, respectively, and connecting the conductive circuits in the conductive layers, and multiple component-loading pads formed of a copper foil and positioned to load an electronic component. The resin insulation layers and the conductive layers are alternately laminated, and the component-loading pads are formed on the uppermost resin insulation layer.07-19-2012
20120181071MULTILAYER PILLAR FOR REDUCED STRESS INTERCONNECT AND METHOD OF MAKING SAME - A multi-layer pillar is provided. The multi-layer pillar is used as an interconnect between a chip and substrate. The pillar has at least one low strength, high ductility deformation region configured to absorb force imposed during chip assembly and thermal excursions07-19-2012
20120181070INTERCONNECTION STRUCTURE AND METHOD OF FORMING THE SAME - After a copper interconnection is formed above a substrate, a surface of the copper interconnection is activated by performing acid cleaning. Thereafter, the substrate is immersed in a BTA (Benzo triazole) aqueous solution to form a protection film covering the surface of the copper interconnection. At this time, Cu—N—R bonds (R is an organic group) are formed in grain boundary portions in the surface of the copper interconnection. Thereafter, the protection film is removed by performing alkaline cleaning. The Cu—N—R bonds remain in the grain boundary portions in the surface of the copper interconnection even after the protection film is removed. Subsequently, the surface of the copper interconnection is subjected to an activation process, and a barrier layer is formed thereafter by electroless-plating the surface of the copper interconnection with NiP or CoWP.07-19-2012
20120181069PRINTED WIRING BOARD, METHOD OF SOLDERING QUAD FLAT PACKAGE IC, AND AIR CONDITIONER - A printed wiring board has a solder-land group for placing a quad flat package IC, and the solder-land group consists of front solder-land groups and rear solder-land groups. The printed wiring board includes rear solder-drawing lands that are positioned adjacent to rear solder-land groups, that have front edges each of which is substantially parallel to a longitudinal direction of rear solder lands constituting the rear solder-land group and has a length approximately equal to or longer than that of the solder lands in the longitudinal direction, that are separated into two parts in a horizontal direction with respect to a traveling direction of solder flow such that a gap between the respective two separate lands is made wider in its rearward portion than that in its frontward portion, and that have a slit substantially parallel to the longitudinal direction near the front edge.07-19-2012
20090044972Circuit board, method of forming wiring pattern, and method of manufacturing circuit board - When manufacturing a circuit board, a wiring pattern is printed on a substrate with a conductive paste formed of metal powder and thermoplastic resin, and then the conductive paste is subjected to a heating treatment and a pressing treatment.02-19-2009
20130048354TRANSPARENT CONDUCTIVE FILM AND TOUCH PANEL USING THE SAME - A transparent conductive film includes a number of first transparent conductive stripes extending along a first direction and a number of second transparent conductive stripes extending along a second direction and intersecting the number of first transparent conductive stripes. The first conductive stripes are spaced from each other and extend substantially along a first direction. The second transparent conductive stripes are spaced from each other and extend substantially along a second direction. The first transparent conductive stripes are electrically connected with the second transparent conductive stripes. The first transparent conductive stripes and the second conductive stripes are arranged in patterns such that the transparent conductive film has an anisotropic impedance. The first direction is a low impedance direction. A resistivity of the transparent conductive film in the low impedance direction is smaller than the resistivity of the transparent conductive film in the second direction and any other direction.02-28-2013
20130048353TRANSPARENT CONDUCTIVE FILM AND TOUCH PANEL USING THE SAME - A transparent conductive film a number of first transparent conductive stripes and a number of transparent conductive stripes electrically connected with each other. The first conductive stripes are spaced from each other and extend substantially along a first direction, and the second transparent conductive stripes are spaced from each other and extend substantially along a second direction. The plurality of second transparent conductive stripes are disposed between and electrically connected to adjacent first transparent conductive stripes. The first transparent conductive stripes and the second conductive stripes are arranged in patterns such that the transparent conductive film has an anisotropic impedance. One of the first direction and the second direction is a low impedance direction. A resistivity of the transparent conductive film in the low impedance direction is smaller than the resistivity of the transparent conductive film in any other direction.02-28-2013
20100006326ULSI WIRING AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing ULSI wiring in which wiring layers are separately formed via a diffusion prevention layer with an insulating interlayer portion made of SiO01-14-2010
20100326709PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A printed wiring board includes a first insulation layer, a first conductive circuit formed on the first insulation layer, a second insulation layer formed on the first insulation layer and the first conductive circuit and having an opening portion reaching the first conductive circuit, a second conductive circuit formed on the second insulation layer, and a via conductor formed in the opening portion and connecting the first conductive circuit and the second conductive circuit. The via conductor is formed an inner-wall surface of the opening portion and has a seed layer including a nitride compound and/or a carbide compound containing Ti, Zr, Hf, V, Nb, Ta or Si and a plated-metal film formed in the opening portion, and the plated-metal film and the first conductive circuit have at least portions making direct contact.12-30-2010
20100326707METHAL-BASED PACKAGE SUBSTRATE, THREE-DIMENSIONAL MULTI-LAYERED PACKAGE MODULE USING THE SAME, AND MANUFACTURING METHOD THEREOF - A package substrate, a manufacturing method thereof, a base package module, and a multi-layered package module having package substrates laminated on upper and lower portions of a base package module are provided. The base package module includes a base metal substrate, a first metal oxide layer that is formed on the base metal substrate to have a cavity therein, a device that is mounted in the cavity on the base metal substrate and insulated by the first metal oxide layer formed on a sidewall in the cavity, and a conductor that is connected to the device and a wiring pad formed on the first metal oxide layer on the base metal substrate. The package substrate includes a wiring pad, a conductor line, a second metal oxide layer having an opening that exposes a device, and a via that is connected to the wiring pad through a connection pad in the second metal oxide layer.12-30-2010
20130087372TRANSPARENT CONDUCTIVE FILM - There is provided a transparent conductive film which comprises: a film substrate; a plurality of transparent conductor patterns formed on the film substrate; and a pressure-sensitive adhesive layer wherein the transparent conductor patterns are embedded. The plurality of transparent conductor patterns respectively have a two-layer structure wherein a first indium tin oxide layer and a second indium tin oxide layer are laminated on the film substrate in this order, and the first indium tin oxide layer has a greater tin oxide content than the second indium tin oxide layer does. The first indium tin oxide layer has a smaller thickness than the second indium tin oxide layer does.04-11-2013
20130087371ELECTRONIC PACKAGING CONNECTOR AND METHODS FOR ITS PRODUCTION - A surface mount packaging connector includes an elastic conductor, an interconnect pad, and a conductive layer. The elastic conductor has a top surface. The interconnect pad is electrically coupled to the elastic conductor. The top surface of the elastic conductor is arranged away from the interconnect pad. The conductive layer is on the top surface of the elastic conductor. The conductive layer provides an increased electrically conductive surface area and may also be a solderable surface.04-11-2013
20090321116CIRCUIT CONNECTING MATERIAL, FILM-FORM CIRCUIT CONNECTING MATERIAL USING THE SAME, CIRCUIT MEMBER CONNECTING STRUCTURE AND METHOD OF MANUFACTURING THE SAME - The present invention is a circuit connecting material used for the mutual connection of a circuit member in which electrodes and insulating layers are formed adjacent to each other on the surface of a board, and a circuit member in which electrodes and insulating layers are formed adjacent to each other on the surface of a board, with the edge parts and of the insulating layers being formed with a greater thickness than the electrodes on the basis of the main surfaces, wherein this circuit connecting material contains a bonding agent composition and conductive particles that have a mean particle size of 1 μm or greater but less than 10 μm and a hardness of 1.961 to 6.865 GPa, and this circuit connecting material exhibits a storage elastic modulus of 0.5 to 3 GPa at 40° C. and a mean coefficient of thermal expansion of 30 to 200 ppm/° C. at from 25° C. to 100° C. when subjected to the curing treatment.12-31-2009
20090321113HIGH CONTRAST TRANSPARENT CONDUCTORS AND METHODS OF FORMING THE SAME - Methods of enhancing contrast ratio of conductive nanostructure-based transparent conductors are described. Contrast ratio is significantly improved by reduction of light scattering and reflectivity of the nanostructures through steps of plating the conductive nanostructures followed by etching or oxidizing the underlying conductive nanostructures.12-31-2009
20090314529AQUEOUS PRINTABLE ELECTRICAL CONDUCTORS (XINK) - An aqueous printable electrical conductor (APEC) is defined as a dispersion comprising metal powder (with specific surface properties) dispersed into an aqueous acrylic, styrene/acrylic, urethane/acrylic, natural polymers vehicle (gelatine, soy protein, casein, starch or similar) or in a film forming reactive fatty acids mixture without a binder resin. The aqueous printable dispersion can be applied to substrates through different printing processes such as flexography, gravure, screen, dry offset or others. Exemplary substrates include: (1) coated paper, (2) uncoated paper, and (3) a variety of plastics with treated and untreated surfaces. When printed at a thickness of 1-8 μm, heating to cure is not required as the dispersion cures at ambient temperatures. When the dispersion is used for any of the above applications it will provide sufficient electrical conductivity to produce electrical circuits for intelligent and active packaging, sensors, radio frequency identification (RFID) tag antennae, and other electronic applications.12-24-2009
20090301768PRINTED CIRCUIT BOARD - A printed circuit board of the present disclosure includes a main body, a tin layer, and a solder mask. The main body defines a through hole configured for being connected to a grounding component. The tin layer is formed on a surface of the main body around the through hole. The tin layer contacts the grounding component. The solder mask is formed between a periphery of the through hole and the tin layer. The solder mask is configured to prevent tin cream of the tin layer from flowing into the through hole.12-10-2009
20120103666ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME - An electronic device includes a first substrate on which a thin-film circuit layer is provided at a side of a first face, a second substrate on which a wiring layer is provided, and an isotropic conductive material which electrically connects a terminal portion of the thin-film circuit layer and the wiring layer. In the electronic device, the conductive material is in film-formed from on the terminal portion to on the wiring layer. When the terminal portion of the thin-film circuit layer and the wiring layer of a connection substrate are electrically connected to each other, the terminal portion is not required to be excessively pressurized and heated. Therefore, the terminal portion can be prevented from being damaged.05-03-2012
20090266590INTERCONNECT STRUCTURE AND METHOD FOR FABRICATING THE SAME - An interconnect structure includes: an interlayer insulating film formed on a lower metal layer; a contact hole formed in the interlayer insulating film to expose the lower metal layer; a plurality of carbon nanotubes formed on a bottom of the contact hole; an wiring metal filled in the contact hole to fill gap between the plurality of carbon nanotubes; and an upper wiring formed above the contact hole. A Ti layer is formed between the plurality of carbon nanotubes and the upper wiring.10-29-2009
20130062107MULTILAYER WIRING BOARD AND PRODUCTION METHOD OF THE SAME - Disclosed is a multilayer wiring board having via-hole conductors for connecting a first copper wiring and a second copper wiring, the via-hole conductor including a metal portion and a resin portion. The metal portion includes a first metal region including a link of copper particles as a path for electrically connecting the first and second copper wirings; a second metal region mainly composed of at least one selected from tin, a tin-copper alloy, and a tin-copper intermetallic compound; and a third region mainly composed of bismuth. The copper particles forming the link are in plane-to-plane contact with one another. At least one of the first copper wiring and the second copper wiring is in plane-to-plane contact with the copper particles, and the portion where there is such a plane-to-plane contact is covered with at least a part of the second metal region.03-14-2013
20130062106Printed Circuit Board and Method of Manufacturing the Same - A structure of a printed circuit board and a method of manufacturing the same are provided. The manufacturing method includes a first step of forming at least one connecting bump on first circuit patterns and forming a first insulating layer to form an inner circuit board, a second step of processing a second insulating layer with a metal seed layer formed thereon using a mold to form second circuit patterns so as to construct an outer circuit board, and a third step of aligning the inner circuit board and the outer circuit board with each other and laminating the inner circuit board and the outer circuit board. Accordingly, a structure of a high-density high-reliability printed circuit board having a circuit embedded in an insulating layer can be provided. A seed layer forming process for forming an outmost circuit can be removed by using an insulating layer combined with a seed layer. In addition, a conductive structure in the form of a connecting bump is formed, and thus a complicated process of forming a via-hole and filling the via-hole with a conductive material is not required. Furthermore, a process of grinding the surface of the filled conductive material is removed so as to remarkably decrease a circuit error rate.03-14-2013
20130062105APPARATUS FOR BROADBAND MATCHING - An apparatus is provided. The apparatus comprises a substrate and a circuit trace. The substrate includes a region that is adapted to receive a discrete component, a metal layer, a dielectric layer formed over the metal layer, a window formed in the metal layer that underlies the region, and a conductive strap that extends across the window. The circuit trace is formed on the dielectric layer and is discontinuous across the region.03-14-2013
20120222892WIRE BOND PAD SYSTEM AND METHOD - To reduce the RF losses associated with high RF loss plating, such as, for example, Ni/Pd/Au plating, the solder mask is reconfigured to prevent the edges and sidewalls of the wire-bond areas from being plated in some embodiments. Leaving the edges and sidewalls of the wire-bond areas free from high RF loss plating, such as Ni/Pd/Au plating, provides a path for the RF current to flow around the high resistivity material, which reduces the RF signal loss associated with the high resistivity plating material.09-06-2012
20110011632ELECTRIC CONDUCTOR AND PROCESS FOR ITS PRODUCTION - An electric conductor having good electric conductivity and excellent heat resistance, and a process for its production are provided.01-20-2011
20110011631Ceramic substrate and method of manufacturing the same - The present invention relates to a ceramic substrate and a method of manufacturing the same. The ceramic substrate includes: a ceramic base; an electrode pattern formed on at least one surface of the ceramic base at predetermined internal and external depths; and electrode material filled in the inside of the electrode pattern. The method of manufacturing the ceramic substrate includes: coating first electrode material on at least one surface of a ceramic base; forming a surface layer built-in electrode pattern by pressurizing the coated first electrode material; primarily firing the ceramic base on which the surface layer built-in electrode pattern is formed; coating second electrode material on the surface layer built-in electrode pattern; and secondarily firing the ceramic base on which the second electrode material is coated.01-20-2011
20090236131Multilayered printed circuit board and method of manufacturing the same - Disclosed herein is a multilayered circuit board, including: a multilayered printed circuit board manufactured using the method includes an insulating resin layer having via holes, on one side of which a first circuit layer including circuit patterns is formed, and on the other side of which a second circuit layer, including connecting pads, is formed, the pads protruding over the via holes; a build-up layer formed on the first circuit layer, the build-up layer including a plurality of insulating layers and a plurality of circuit layers; and a solder resist layer formed on an outermost layer of the build-up layer.09-24-2009
20090236130Multilayered printed circuit board and method of manufacturing the same - Disclosed herein is a multilayered circuit board, including: a metal base layer including a metal layer formed through-holes, an insulating film formed on a surface of the metal layer, a first circuit layer having circuit patterns formed on one side of the metal layer and a second circuit layer having protruding connecting pads, formed on the other side of the metal layer; a build-up layer formed on the first circuit layer; and a solder resist layer. The multilayered printed circuit board is advantageous in that the thickness thereof is decreased and the bending strength and radiation characteristics thereof are improved.09-24-2009
20090236129METHODS FOR REDUCING CORROSION ON PRINTED CIRCUIT BOARDS - A method for processing a printed circuit board (PCB) wherein the method includes providing a substrate in contact with a metal surface, contacting the metal surface with an immersion silver solution thereby producing an immersion silver layer upon the metal surface, and thereafter, providing a solder mask in contact with the metal surface and the immersion silver layer.09-24-2009
20090236132ORGANIC/INORGANIC HYBRID COMPOSITION WITH ELECTROSTATIC DISCHARGE PROTECTION PROPERTY - An organic/inorganic hybrid composition with electrostatic discharge protection properties, high thermal stability, good adhesion, low costs, and good processability is disclosed. The composition includes a thermosetting resin system, an inherently dissipative polymer, and non-insulating particles. The inherently dissipative polymer and the non-insulating particles are dispersed within the thermosetting resin system.09-24-2009
20130068513WIRING BOARD, PRODUCTION METHOD OF THE SAME, AND VIA PASTE - Disclosed is a multilayer wiring board having via-hole conductors, the via-hole conductor including a metal portion and a resin portion. The metal portion includes a first metal region which includes a link of copper particles forming a path electrically connecting a first wiring and a second wiring; a second metal region mainly composed of a metal selected from the group consisting of tin, a tin-copper alloy, and a tin-copper intermetallic compound; a third metal region mainly composed of bismuth; and a fourth metal region composed of tin-bismuth solder particles. The link has plane-to-plane contact portions where the copper particles are in plane-to-plane contact with one another. At least a part of the second metal region is in contact with the first metal region. The tin-bismuth solder particles, each surrounded by the resin portion, are interspersed in the via-hole conductor.03-21-2013
20130068512THERMOFORMABLE POLYMER THICK FILM SILVER CONDUCTOR AND ITS USE IN CAPACITIVE SWITCH CIRCUITS - This invention is directed to a polymer thick film conductive composition. More specifically, the polymer thick film conductive composition may be used in applications where thermoforming of the base substrate occurs as in capacitive switches. Polycarbonate substrates are often used as the substrate and the polymer thick film conductive composition may be used without any barrier layer. Thermoformable electric circuits benefit from the presence of an encapsulant layer over the dried polymer thick film conductive composition.03-21-2013
20130068511SYSTEM AND METHOD FOR FORMATION OF ELECTRICAL CONDUCTORS ON A SUBSTRATE - A method for printing an electrical conductor on a substrate has been developed. In the method, a reverse image of the electrical conductor pattern is printed on a substrate with an electrically non-conductive material to form a second pattern that exposes a portion of the surface area of the substrate. The entire surface area of the substrate is then covered with an electrically conductive material. The non-conductive material of the reverse image electrically isolates the electrically conductive material covering the reverse image from the electrically conductive material covering the second pattern.03-21-2013
20090301770EMBEDDED THIN FILMS - A method for forming a film on a conductive substrate, comprising immersing a substrate having a conductive portion in a solution comprising a metal ion ceramic precursor for the film and a peroxide; applying a voltage potential to the conductive portion with respect to a counter electrode in the solution, sufficient to protect the conductive portion from corrosion by the solution, and drive formation of a film on the substrate, controlling a pH of the solution while limiting a production of hydrogen by electrolysis of the solution proximate to the conductive portion; and maintaining the voltage potential for a sufficient duration to produce a film on the conductive portion. An electrode may be formed over the film to produce an electrical device. The film may be, for example, insulating, dielectric, resistive, semiconductive, magnetic, or ferromagnetic.12-10-2009
20120111617ELECTRONIC ELEMENT UNIT AND REINFORCING ADHESIVE AGENT - It is an object of the present invention to provide an electronic element unit and a reinforcing adhesive agent in which a bonding strength can be improved between an electronic element and a circuit board and a repairing work can be carried out without giving a thermal damage to the electronic element or the circuit board. In an electronic element unit (05-10-2012
20120111616ELECTRONIC-COMPONENT-MOUNTED WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - An electronic-component-mounted wiring substrate provides enhanced joining reliability when an electronic component is joined to terminal pads of the wiring substrate, has sufficient strength, and can prevent generation of warpage and formation of a short circuit, which would otherwise occur as a result of re-melting of solder. Solder completely covers an entire surface of each of the terminal pads provided on a laminated substrate such that they project therefrom, and also joins to terminals of the electronic component. Therefore, each of the terminal pads and the solder are joined together reliably, and sufficient electrical continuity is secured therebetween. That is, the reliability of a joint between the solder and each terminal pad is extremely high, and the reliability of joint between the terminal pads and the electronic component is extremely high.05-10-2012
20120234586PROCESS FOR FORMING FLEXIBLE SUBSTRATES USING PUNCH PRESS TYPE TECHNIQUES - Embodiments of the invention generally relate to methods of forming flexible substrates for use in photovoltaic modules. The methods include shaping a metal foil and adhering the metal foil to a flexible backsheet. An optional interlayer dielectric and anti-tarnish material may then be applied to the upper surface of the shaped metal foil disposed on the flexible backsheet. The metal foil may be shaped using die cutting, roller cutting, or laser cutting techniques. The die cutting, roller cutting, and laser cutting techniques simplify the flexible substrate formation processes by eliminating resist-printing and etching steps previously used to pattern metal foils. Additionally, the die cutting, roller cutting, and laser cutting techniques reduce the consumption of consumable materials previously used in the patterning of metal foils.09-20-2012
20120234585Support for Electronic Circuits - Support materials for printing electrically conductive structures by means of inkjet printing with inks which contain conductive particles lead to low resistances for the printed structures without thermal post-treatment when they contain a microporous layer with a mean pore size of less than 100 nm as an outer layer.09-20-2012
20120234584SUBSTRATE FOR MOUNTING SEMICONDUCTOR CHIP AND METHOD FOR PRODUCING SAME - It is an object of the invention to provide a method for producing a substrate for mounting a semiconductor chip, that can reduce bridging and allows excellent wire bondability and solder connection reliability to be obtained, even when forming fine-pitch wirings. The method for producing a substrate for mounting a semiconductor chip according to the invention comprises a resist-forming step in which a resist is formed on the first copper layer of a stack comprising an inner board with an inner layer circuit on the surface and a first copper layer formed on the inner board separated by an insulating layer at the sections other than those that are to constitute a conductor circuit, a conductor circuit-forming step in which a second copper layer is formed by electrolytic copper plating on the first copper layer to obtain a conductor circuit, a nickel layer-forming step in which a nickel layer is formed by electrolytic nickel plating on at least part of the conductor circuit, a resist removal step in which the resist is removed, an etching step in which the first copper layer is removed by etching, and a gold layer-forming step in which a gold layer is formed by electroless gold plating on at least part of the conductor circuit.09-20-2012
20130161080HALOGEN-FREE RESIN COMPOSITION AND ITS APPLICATION FOR COPPER CLAD LAMINATE AND PRINTED CIRCUIT BOARD - A halogen-free resin composition includes (A) 100 parts per hundred resin of epoxy resin; (B) 1 to 100 parts per hundred resin of benzoxazine resin; (C) 1 to 100 parts per hundred resin of styrene-maleic anhydride; (D) 0.5 to 30 parts per hundred resin of amine curing agent; and (E) 5 to 150 parts per hundred resin of halogen-free flame retardant. The composition obtains properties of low dielectric constant, low dissipation factor, high heat resistance and flame retardancy by specific composition and ratio. Thus, a prepreg or a resin film, which can be applied to a copper clad laminate and a printed circuit board, is formed.06-27-2013
20100089623CONDUCTIVE LAMINATED BODY AND METHOD FOR PREPARING THE SAME - Disclosed is a conductive laminated body, and a method for preparing the same, wherein the conductive laminated body including: a substrate; a zinc oxide-based thin film doped with an element M; and an interlayer including an oxide M′04-15-2010
20100089625COMPONENT HAVING A CERAMIC BASE WITH A METALIZED SURFACE - A component which dissipates heat produced during operation thereof has a ceramic base the surface of which is covered in at least one area by a metalized coating, the ceramic base being spatially structured.04-15-2010
20110067909Embedded Circuit Board Structure and Fabrication Process Thereof - An embedded circuit board structure and a fabricating process thereof are disclosed. The embedded circuit board structure comprises a dielectric layer and a metal layer. The dielectric layer comprises an indentation; the indentation is formed by a plurality of pits, and the pits are substantially perpendicular to the surface of the dielectric layer. The metal layer is formed within the indentation.03-24-2011
20090020322PACKAGING SUBSTRATE WITH CONDUCTIVE STRUCTURE - A packaging substrate with conductive structure is provided, including a substrate body having at least one conductive pad on a surface thereof, a stress buffer metal layer disposed on the conductive pad, a solder resist layer disposed on the substrate body and having at least one opening therein for correspondingly exposing a portion of top surface of the stress buffer metal layer, a metal post disposed on a central portion of the surface of the stress buffer metal layer, and a solder bump covering the surfaces of the metal post. Therefore, a highly reliable conductive structure is provided, by using the stress buffer metal layer to release thermal stresses, and using the metal post and the solder bump to increase the height of the conductive structure.01-22-2009
20120318569SUBSTRATES HAVING VOLTAGE SWITCHABLE DIELECTRIC MATERIALS - A method for designing a printed circuit board to meet a specification is described. A first voltage switchable dielectric material is placed in apposition with a first copper foil. A second voltage switchable dielectric material is placed in apposition with a second copper foil. An arcuate portion of the first copper foil is placed in apposition with a first side of an aluminum member, an adhesive substance being situated between the first copper foil and the first side of the aluminum member. An arcuate portion of the second copper foil in is placed apposition with a second side of the aluminum member, an adhesive substance being situated between the second copper foil and the second side of the aluminum member.12-20-2012
20090145640CONDUCTIVE PATTERN FORMATION INK, METHOD OF FORMING CONDUCTIVE PATTERN, CONDUCTIVE PATTERN AND WIRING SUBSTRATE - A conductive pattern formation ink capable of forming a conductive pattern having high reliability, a conductive pattern having high reliability, a method of forming a conductive pattern having high reliability, and a wiring substrate provided with the conductive pattern and having high reliability are provided. The conductive pattern formation ink is used for forming a conductive pattern by ejecting the ink from a liquid droplet ejection head on a surface of a ceramic molded body made of a material containing ceramic particles and a binder, the liquid droplet ejection head having ejection portions for ejecting the ink in the form of liquid droplets and an ejection surface on which the ejection portions open. The ink contains a water-based dispersion medium, metal particles dispersed in the water-based dispersion medium, and a surface tension adjuster that is contained in the water-based dispersion medium and adjusts surface tension of the ink, wherein in the ink whose surface tension is adjusted by the surface tension adjuster, a contact angle of the ink with respect to the ejection surface of the liquid droplet ejection head at 25° C. is in the range of 50 to 90°, and a contact angle of the ink with respect to the surface of the ceramic molded body at 25° C. is in the range of 45 to 85°.06-11-2009
20100025091Printed Circuit Boards - A printed circuit board to which a localised solder connection is to be made, the surface of said printed circuit board having a continuous or non-continuous coating of a composition comprising a halo-hydrocarbon polymer at a thickness of from 1 nm to 10 μm.02-04-2010
20110278051MULTILAYER WIRING SUBSTRATE AND MANUFACTURING METHOD OF MULTILAYER WIRING SUBSTRATE - A multilayer wiring board includes an insulating resin layer, wirings laid on their respective opposite surfaces of the insulating resin layer, and a via-hole conductor for electrically connecting the wirings. The via-hole conductor includes metal and resin portions. The metal portion includes first metal regions including a joined unit made of copper particles for connecting the wirings, second metal regions mainly composed of, for example, tin, a tin-copper alloy, or a tin-copper intermetallic compound, and third metal regions mainly composed of bismuth and in contact with the second metal regions. The copper particles forming the joined unit are in plane contact with one another to form plane contact portions, and the second metal regions at least partially are in contact with the first metal regions.11-17-2011
20100132988HIGHLY ELECTRICALLY CONDUCTIVE TRANSPARENT LAYER WITH A METAL GRID HAVING OPTIMIZED ELECTROCHEMICAL RESISTANCE - An electroconductive layer (06-03-2010
20090078454Electronic circuit connecting structure of flat display panel substrate - An electronic circuit connecting structure of a flat display panel substrate is described. The electronic circuit connecting structure includes a plurality of conductive terminals on the flat display panel substrate and a plurality of conductive protrusions formed on the conductive terminals. In addition, an electronic circuit connecting method for the flat display panel substrate is also disclosed therein.03-26-2009
20120186862CARRIER TAPE FOR TAB-PACKAGE AND MANUFACTURING METHOD THEREOF - The present invention relates to a method for manufacturing a TAB tap. The method includes forming a circuit pattern region having input/output terminal pattern on a base film, and forming an exposing region at a convey region having a sprocket hole for exposing the base film. Accordingly, the present invention provides a TAB tape that improves reliability of a product by fundamentally preventing the generation of metal particles by forming exposing regions that expose a base film through selectively etching and removing a metal layer of a convey region formed at both side of a TAB tape and having a sprocket hole, and that prevents short-circuit by partially removing a base film at a predetermined region not having a circuit pattern formed thereon through etching.07-26-2012
20110127074METHOD FOR ROUGHENING TREATMENT OF COPPER FOIL AND COPPER FOIL FOR PRINTED WIRING BOARDS OBTAINED USING THE METHOD FOR ROUGHENING TREATMENT - An object of the present invention is to provide a technology for forming a roughened surface of a copper foil which is laminated with an insulating resin substrate having a low dielectric constant, on which a fine-pitch wiring can be formed. To achieve the object, a method for roughening a surface of copper foil to be laminated with an insulating resin substrate characterized by depositing and forming of fine copper particles on the surface of copper foil, under conditions for burnt copper plating, using a sulfuric acid-based copper plating solution containing a quaternary ammonium salt polymer, is employed as a method for roughening treatment of a copper foil. Preferably, a solution temperature of the sulfuric acid-based copper plating solution of 20° C. to 40° C. and electrolysis is carried out with an average anode current density of 5 A/dm06-02-2011
20110297430WIRING SUBSTRATE AND MANUFACTURING METHOD THEREOF - A wiring substrate includes a wiring layer made of copper, an electrode layer made of copper, and an insulating layer arranged adjacent to the electrode layer. The wiring layer is stacked on the electrode layer and the insulating layer. The insulating layer and the wiring layer are stacked with an adhesive layer interposed between the wiring insulating layer and the wiring layer. The electrode layer and the wiring layer are stacked without the adhesive layer interposed between the electrode layer and the wiring layer.12-08-2011
20110284274Wired circuit board and producing method thereof - A wired circuit board includes an insulating layer, and a first conductive pattern and a second conductive pattern formed on the insulating layer. The first conductive pattern includes a first outer terminal on which a metal plating layer is provided, a first inner terminal to be solder connected, and a first wire which connects the first outer terminal and the first inner terminal. The second conductive pattern includes a second outer terminal to be solder connected, a second inner terminal to be solder connected, and a second wire which connects the second outer terminal and the second inner terminal. The first inner terminal and the second inner terminal are arranged in opposed relation with each other so as to be solder connected to the common electric component and preflux processing is performed thereon, and a metal plating layer is provided on the second wire.11-24-2011
20110290542CERAMIC ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING THE SAME - A ceramic electronic component includes a ceramic element assembly and external electrodes. The external electrodes are disposed on the ceramic element assembly. The external electrodes include an underlying electrode layer and a first Cu plating film. The underlying electrode layer is disposed on the ceramic element assembly. The first Cu plating film is disposed on the underlying electrode layer. The underlying electrode layer includes a metal that is diffusible in Cu and a ceramic bonding material. The metal that is diffusible in Cu is diffused in at least a surface layer in the underlying electrode layer side of the first Cu plating film.12-01-2011
20110290541FLEXIBLE FLAT CABLE - A flexible flat cable includes a first insulating layer, a conductive wire layer, a second insulating layer, a metal layer and at least one grounding element. The conductive wire layer includes a plurality metal wires arranged with interspace and disposed on the first insulating layer, wherein the plurality of metal wires of the conductive wire layer include at least one ground wire. The second insulating layer is disposed on the conductive wire layer and exposes the two ends of the conductive wire layer. The metal layer is disposed on the second insulating layer. The grounding element electrically connects the exposed ground wire and the metal layer.12-01-2011
20100186999METHOD FOR PRODUCING CONDUCTIVE MATERIAL, CONDUCTIVE MATERIAL OBTAINED BY THE METHOD, ELECTRONIC DEVICE CONTAINING THE CONDUCTIVE MATERIAL, LIGHT-EMITTING DEVICE, AND METHOD FOR PRODUCING LIGHT-EMITTING DEVICE - An object of the present invention is to provide a method for producing a conductive material that allows a low electric resistance to be generated, and that is obtained by using an inexpensive and stable conductive material composition containing no adhesive. The conductive material can be provided by a producing method that includes the step of sintering a first conductive material composition that contains silver particles having an average particle diameter (median diameter) of 0.1 μm to 15 μm, and a metal oxide, so as to obtain a conductive material. The conductive material can be provided also by a method that includes the step of sintering a second conductive material composition that contains silver particles having an average particle diameter (median diameter) of 0.1 μm to 15 μm in an atmosphere of oxygen or ozone, or ambient atmosphere, at a temperature in a range of 150° C. to 320° C., so as to obtain a conductive material.07-29-2010
20090308646CONDUCTOR PATTERN FORMING INK, CONDUCTOR PATTERN, AND WIRING SUBSTRATE - A conductor pattern forming ink for forming a conductor pattern on a substrate by a droplet discharge method includes: metal particles; an aqueous dispersion medium in which the metal particles are dispersed; and at least one of a compound expressed by Formula (I) below and alkanolamine.12-17-2009
20110005815CONDUCTIVE PLATE AND TOUCH PANEL INCLUDING THE SAME - The disclosure discloses a conductive plate includes a substrate and a patterned conductive film bonded to the substrate through an adhesive layer. The patterned conductive film includes a pattern of conductive traces. A touch panel is also disclosed and includes first and second conductive plates, each of which includes a substrate and a patterned conductive film bonded to the substrate through an adhesive layer. The patterned conductive film includes a pattern of conductive traces.01-13-2011
20110214908CERAMIC COMPOSITION, CERAMIC GREEN SHEET, AND CERAMIC ELECTRONIC COMPONENT - A ceramic composition is prepared to contain a B09-08-2011
20110214907MULTI LAYER CIRCUIT BOARD AND MANUFACTURING METHOD OF THE SAME - Disclosed is a PCB having multiple layers of heavy copper. A prepreg having a nonwoven glass web substrate is used alone or together with another prepreg having a glass fabric substrate so that the space between heavy copper, which is comparable to a thick film, can be filled efficiently without creating voids. The PCB includes a copper clad laminate having first copper patterned on one surface or both surfaces of a core substrate; at least one first prepreg laminated on one surface or both surfaces of the copper clad laminate, nonwoven glass web being used as the substrate of the first prepreg; at least one second prepreg laminated on one surface or both surfaces of the first prepreg, glass fabric being used as a substrate of the second prepreg; and second copper laminated on one surface or both surfaces of the second prepreg.09-08-2011
20110214906DIELECTRIC BOND PLIES FOR CIRCUITS AND MULTILAYER CIRCUITS, AND METHODS OF MANUFACTURE THEREOF - A bond ply, comprising a first outer layer comprising a thermosetting composition and a filler composition; a second outer layer comprising a thermosetting composition and a filler composition that is of the same type as that of the first outer layer; and an intermediate layer disposed between the first and the second outer layers, and comprising a thermosetting composition and a filler composition that is of the same type as the first and second outer layers, wherein the thermosetting composition of the intermediate layer has a degree of cure that is greater than a degree of cure for each of the thermosetting compositions of the first and the second outer layers.09-08-2011
20100012358CIRCUIT CONNECTING MATERIAL, CONNECTION STRUCTURE FOR CIRCUIT MEMBER USING THE SAME AND PRODUCTION METHOD THEREOF - The circuit-connecting material of the present invention is a circuit-connecting material for connecting a first circuit component having a plurality of first circuit electrodes on a main surface of a first circuit board and a second circuit component having a plurality of second circuit electrodes on a main surface of a second circuit board, in such a manner that the first circuit electrodes and the second circuit electrodes are electrically connected while being opposed to one another; wherein the circuit-connecting material contains an adhesive composition, conductive particles, and a plurality of insulating particles containing one or both of polyamic acid particles and polyimide particles.01-21-2010
20090188707Method and Apparatus for Manufacture of Via Disk - Aluminum filled via disks are manufactured utilizing a plurality of drilled substrates placed into a metal can in a stacked, interdisposed assembly with a corresponding number of graphite molds. Aluminum infiltration ingots are added and the can is heated to a temperature to melt the ingots. The molten aluminum is pressurized so that it flows into the vias. The substrates are then cooled, removed from the can, separated from between the graphite molds, and the flat surface faces are ground and polished to expose the filled vias.07-30-2009
20120024579BENDABLE CIRCUIT STRUCTURE FOR LED MOUNTING AND INTERCONNECTION - This invention is directed to bendable circuit substrate structures useful for LED mounting and interconnection.02-02-2012
20100012359Article with a Coating of Electrically Conductive Polymer and Precious/Semiprecious Metal and Process for Production Thereof - The invention relates to a coated article which has (i) at least one electrically non-conducting base layer, (ii) at least one layer of copper and/or a copper alloy, and (iii) a layer which contains at least one electrically conductive polymer, wherein the copper or copper alloy layer (ii) is positioned between the base layer (i) and the layer containing the conductive polymer (iii), and which is characterized in that the layer (iii) contains at least one precious metal or at least one semiprecious metal or a mixture thereof. The invention also relates to a process for its production and also its use for the prevention of corrosion and to preserve the solderability of printed circuit boards.01-21-2010
20110198113Electroconductive inks made with metallic nanoparticles - An electroconductive ink made with metallic nanoparticles is disclosed. The ink contains an organophosphorus acid that increases adhesion between the deposited metallic layer and the substrate to which the metallic layer is applied.08-18-2011
20110198114Multilayer Wiring Substrate, and Method of Manufacturing the Same - A plurality of openings are formed in a resin insulation layer on a top surface side of a wiring laminate portion, and a plurality of openings are formed in a resin insulation layer on a bottom surface side thereof. A plurality of connection terminals are disposed to correspond to the openings. Peripheral portions of terminal outer surfaces of the connection terminals are covered by the resin insulation layer on the top surface side, and peripheral portions of terminal outer surfaces of the connection terminals are covered by the resin insulation layer on the bottom surface side. Each of the second-main-surface-side connection terminals has a concave portion at the center of the terminal outer surface, and the deepest portion of the concave portion is located on the interior side in relation to the peripheral portion of the terminal outer surface.08-18-2011
20110198112PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME - Disclosed herein is a method for manufacturing a printed circuit board, including: (A) preparing an aluminum substrate; (B) patterning and etching an etching resist on the aluminum substrate; (C) forming an insulating layer by performing an anodizing treatment on the patterned aluminum substrate; and (D) forming a metal wiring layer by removing the etching resist. The aluminum wiring and the insulating layer are simultaneously formed on the surface of the aluminum patterned by etching through an anodizing method, thereby simplifying the manufacturing process of the substrate and improving adhesion between the metal wiring layer and the insulating layer. In addition, the thickness of the insulating layer and the thickness of the metal wiring layer can be controlled by controlling the anodizing treatment time, thereby providing a method for manufacturing a printed circuit board that can be manufactured to fit for use purpose.08-18-2011
20090145639CONDUCTIVE PATTERN FORMING INK, CONDUCTIVE PATTERN, AND WIRING SUBSTRATE - A conductive pattern forming ink for forming a conductive pattern on a substrate by a droplet discharge method includes: metal particles; an aqueous dispersion medium in which the metal particles are dispersed; galactitol; and a polyglycerol compound having a polyglycerol skeleton. In the ink, H shown in the following formula (I) is 0.10 to 0.60;06-11-2009
20090095513SOLDER LAYER, SUBSTRATE FOR DEVICE JOINING UTILIZING THE SAME AND METHOD OF MANUFACTURING THE SUBSTRATE - A solder layer, a substrate for device joining utilizing the same and a method of manufacturing the substrate are provided whereby the device joined remains thermally unaffected, an initial bonding strength in solder joint is enhanced and the device can be soldered reliably. The solder layer formed on a base substrate (04-16-2009
20110192638SILVER IMMERSION PLATED PRINTED CIRCUIT BOARD - A process used during manufacture of printed circuit boards comprises protecting metal pads and/or through-holes to provide a tarnish-resistant and solderable coating. In the method, the pads and/or through-holes are bright-etched, metal plated, preferably by an immersion process, and treated with a tarnish inhibitor. The tarnish inhibitor may be incorporated into the immersion plating bath. The metal plating is usually with silver or bismuth and the pads and/or through-holes comprise copper.08-11-2011
20110079419WIRING BOARD - The wiring board includes: a base material; a copper pattern which is formed in one surface of the base material, and made of a first metal; and a first nickel land and a second nickel land which are formed over the copper pattern in contact with the copper pattern, and made of a second metal having a higher ionization tendency than that of the first metal, wherein a groove reaching the base material is formed in the copper pattern around a region overlapping the first nickel land at least when seen in a plan view.04-07-2011
20110079418CERAMIC WIRING BOARD AND METHOD OF MANUFACTURING THEREOF - A ceramic wiring board comprises a ceramic substrate and a copper layer formed on the ceramic substrate. The average copper grain radius in the copper layer is approximately equal to or larger than 10 μm.04-07-2011
20120186863MULTILAYER WIRING BOARD - A multilayer wiring board including a build-up layer comprising a conductor layer and a resin insulation layer that are alternately layered, conductive pads formed on a surface of a resin insulation layer so as to project from the surface, and a solder layer formed over an upper surface of each of the conductive pads is provided. The upper surface of the conductive pads may have a recess, and the entire surface of the solder layer may be situated at an elevated position with respect to an outer periphery portion of the upper surface. Embodiments make it possible to feed and hold a sufficient amount of solder paste on the upper surface of conductive pads, thereby minimizing or eliminating the occurrence of defective connections to a semiconductor element and damage to the solder layer caused by an insufficient thickness of the solder layer.07-26-2012
20120228012CIRCUIT BOARD AND METHOD FOR MANUFACTURING CIRCUIT BOARD - A circuit board includes an insulation layer having a first surface and a second surface on the opposite side of the first surface, an electronic component positioned in the insulation layer and having a terminal, a conductive pattern formed on the second surface of the insulation layer and electrically connected to the terminal, and an insulative film formed on the second surface of the insulation layer and on the conductive pattern. The terminal of the electronic component has a protruding portion which protrudes from the second surface of the insulation layer.09-13-2012
20090260861POLYCRYSTALLINE, MAGNETIC CERAMIC MATERIAL, MICROWAVE MAGNETIC DEVICE, AND NON-RECIPROCAL CIRCUIT DEVICE COMPRISING SUCH MICROWAVE MAGNETIC DEVICE - A polycrystalline, magnetic ceramic material having a basic composition represented by the general formula of (Y10-22-2009
20100078202Printed Circuit Board for Harsh Environments - A printed circuit board (PCB 04-01-2010
20090205854Printed circuit board for a package and manufacturing method thereof - A printed circuit board for use in a package and to a method of manufacturing the printed circuit board. The method of manufacturing the printed circuit board can include: providing a substrate, on one side of which at least one solder pad and at least one guide pad are formed; forming a solder resist layer over the one side of the substrate; uncovering at least one portion of the solder resist layer such that the guide pad is exposed; applying a surface treatment on the exposed guide pad; uncovering at least one portion of the solder resist layer such that the solder pad is exposed; and forming a solder bump on the exposed solder pad. With this method, the amount of surface treatment applied can be minimized, for reduced costs, and the occurrence of undiffused layers can be avoided, for improved reliability in the final product.08-20-2009
20130098668CONDUCTIVE SUBTRATE AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a method of manufacturing a conductive substrate, the method including: a first electrode applying operation of applying first electrodes on a substrate; a first electrode forming operation of forming the first electrodes of fine lines by partly removing the first electrodes; and a second electrode forming operation of forming second electrodes on the substrate from which the first electrodes are removed, thereby enhancing reliability in a whole product including the conductive substrate.04-25-2013
20110168434BONDED STRUCTURE EMPLOYING METAL SEMICONDUCTOR ALLOY BONDING - Vertical stacks of a metal portion and a semiconductor portion formed on a first substrate are brought into physical contact with vertical stacks of a metal portion and a semiconductor portion formed on a second substrate. Alternately, vertical stacks of a metal portion and a semiconductor portion formed on a first substrate are brought into physical contact with metal portions formed on a second substrate. The assembly of the first and second substrates is subjected to an anneal at a temperature that induces formation of a metal semiconductor alloy derived from the semiconductor portions and the metal portions. The first substrate and the second substrate are bonded through metal semiconductor alloy portions that adhere to the first and second substrates.07-14-2011
20090107708ELECTRONIC PARTS SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME - An electronic parts substrate includes a base substrate, a plurality of insulating resin layers provided on the base substrate, at least one conductive circuit, and at least one filled via provided in the plurality of insulating resin layers. The at least one conductive circuit is sandwiched between the plurality of insulating resin layers and/or between the base substrate and the plurality of insulating resin layers. At least one opening is formed in at least one of the plurality of insulating resin layers.04-30-2009
20090272566ELECTRICALLY CONDUCTIVE PASTE AND MULTILAYER CERAMIC SUBSTRATE - An electrically conductive paste used for forming wiring conductors, such as via holes disposed on a multilayer ceramic substrate, is provided, wherein the temperature range, in which sintering is effected in a firing step can be controlled relatively optimally. The electrically conductive paste contains a metal powder, a glass frit, and an organic vehicle. An inorganic component, which is not sintered at a sintering temperature capable of sintering the ceramic layers (included in the multilayer ceramic substrate in the firing step, is disposed on particle surfaces of the metal powder. The glass frit has a softening point 150° C. to 300° C. lower than the above-described sintering temperature.11-05-2009
20090272565CONTROL OF CARBON NANOSTRUCTURE GROWTH IN AN INTERCONNECT STRUCTURE - An interconnect structure on a substrate is provided. The interconnect structure comprises electrically conductive interconnect elements on at least two interconnect levels on or above a substrate level. In the interconnect structure of the invention, at least one electrically conductive via connects a first interconnect element on one interconnect level or on the substrate level to a second interconnect element on a different interconnect level. The via extends in a via opening of a first dielectric layer and comprises an electrically conductive via material that contains electrically conductive cylindrical carbon nanostructures. At least one cover-layer segment reaches into a lateral extension of the via opening and defines a via aperture that is small enough to prevent a penetration of the carbon nanostructures through the via aperture. This structure enhances control of carbon nanostructure growth in a height direction during fabrication of the interconnect structure.11-05-2009
20090277672METHOD FOR FORMING METAL PATTERN, METAL PATTERN AND PRINTED WIRING BOARD - The present invention provides a method for forming a metal pattern comprising a step of forming a polymer layer on a substrate; (a2) a step of applying a metal ion or the like to the polymer layer; (a3) a step of forming a conductive layer by reducing the metal ion or the like; (a4) a step of forming a patterned resist layer on the conductive layer; (a5) a step of forming a metal pattern by electroplating in the regions where the resist layer is not formed; (a6) a step of separating the resist layer; (a7) a step of removing the conductive layer from regions protected by the resist layer; and (a8) a step of performing a hydrophobilizing treatment.11-12-2009
20090283306PHOTOSENSITIVE GLASS PASTE AND MULTILAYER WIRING CHIP COMPONENT - A photosensitive glass paste that can be fired at a low temperature for a short period of time and that can suppress generation of voids and diffusion of Ag in glass layers formed by firing, and a high-performance multilayer wiring chip component manufactured by using the above photosensitive glass paste are provided. As a sintering aid glass which is combined with a ceramic aggregate and a primary glass, a glass having a contact angle to the ceramic aggregate smaller than that of the primary glass to the ceramic aggregate is used, and the content of the sintering aid glass is set to 5 to 10 percent by volume of the inorganic component. As the sintering aid glass, a glass containing SiO11-19-2009
20090283305TIN-SILVER COMPOUND COATING ON PRINTED CIRCUIT BOARDS - A tin-silver coating for use with circuit boards, which can include a conductive circuit with an exposed surface disposed on a substrate. The tin-silver coating covers the exposed surface of the conductive circuit. The conductive circuit can include electrical traces, contact pads and vias, each of which may include or be formed of copper. In one embodiment, the tin-silver coating can include a tin weight percentage between 85 and 99.5%, while the silver weight percentage can be between 0.5 and 15%. In one embodiment the tin-silver coating can be between 35 and 60 millionths of an inch. A barrier plate may also be included between the conductive circuit and the tin-silver coating.11-19-2009
20090283304Methods and compositions for ink jet deposition of conductive features - Disclosed is an electrically conductive feature on a substrate, and methods and compositions for forming the same, wherein the electrically conductive feature includes metallic anisotropic nanostructures and is formed by injetting onto the substrate a coating solution containing the conductive anisotropic nanostructures.11-19-2009
20110139497Via Structure Integrated in Electronic Substrate - A system of via structures disposed in a substrate. The system includes a first via structure that comprises an outer conductive layer, an inner insulating layer, and an inner conductive layer disposed in the substrate. The outer conductive layer separates the inner insulating layer and the substrate and the inner insulating layer separates the inner conductive layer and the outer conductive layer. A first signal of a first complementary pair passes through the inner conductive layer and a second signal of the first complementary pair passes through the outer conductive layer. In different embodiments, a method of forming a via structure in an electronic substrate is provided.06-16-2011
20090294158ELECTRONIC CIRCUIT AND METHOD FOR MANUFACTURING SAME - To provide an electronic circuit board in which a conductive wire is excellently connected to a bonding pad formed directly on a polyimide film. The electronic circuit includes: a first layer metal pattern 12-03-2009
20090294160METHOD OF MAKING PRINTED WIRING BOARD AND ELECTRICALLY-CONDUCTIVE BINDER - A thermosetting resin sheet is sandwiched between first and second support bodies so that a first electrically-conductive land on the first support body is opposed to a second electrically-conductive land on the second support body in an opening formed in the sheet. The opening is filled with an electrically-conductive binder. The electrically-conductive binder includes matrix material containing a thermosetting resin and fillers including copper particles dispersed in the matrix material. The copper particles have the surface coated with a tin-bismuth alloy. When heat is applied to the electrically-conductive binder, the tin-bismuth alloy melts. The tin forms an intermetallic compound on the surface of the individual copper particle. The copper-tin alloy layers serve to unit the copper particles together. Electrical connection is established. The bismuth embeds the copper particles. The bismuth is hardened or cured. The matrix material is then hardened or cured.12-03-2009
20110168436Thin Film Electronic Devices with Conductive and Transparent Gas and Moisture Permeation Barriers - A thin film stack (07-14-2011
20090151989INSULATING LAYER FOR RIGID PRINTED CIRCUIT BOARDS - One or more embodiments contained herein disclose rigid printed circuit boards (PCBs) and methods for manufacturing the same comprising strain resistant layers configured to, among others, minimize defects from occurring in cap layers of the PCBs.06-18-2009
20090038832Device and method of forming electrical path with carbon nanotubes - Carbon nanotubes are dispersed in a curable polymer matrix to form a dispersion. When electrical energy is applied to the dispersion, the carbon nanotubes become oriented to form an electrical path. The polymer matrix is cured to fix the electrical path.02-12-2009
20080245553INTERCONNECTION, ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING AN ELECTRONIC DEVICE - An interconnection includes a bundle of conductive members, each of the conductive members being made of carbon nanotube having an end connected to a first conductive film, and another end connected to a second conductive film separated from the first conductive film; and carbon particles each having a diamond crystal structure, dispersed between the conductive members.10-09-2008
20100212941Copper Foil for Printed Circuit and Copper-Clad Laminate - Provided is a copper foil for printed circuit comprising a roughened layer on a surface of a copper foil by way of copper-cobalt-nickel alloy plating, a cobalt-nickel alloy plated layer formed on the roughened layer, and a zinc-nickel alloy plated layer formed on the cobalt-nickel alloy plated layer, wherein the total amount of the zinc-nickel alloy plated layer is 150 to 500 μg/dm08-26-2010
20100212943CIRCUIT CONNECTION MATERIAL, CIRCUIT MEMBER CONNECTING STRUCTURE AND METHOD OF CONNECTING CIRCUIT MEMBER - The circuit-connecting material for connection between circuit members each having a board and a circuit electrode formed on the primary surface of the board, comprising an adhesive composition that cures in response to light or heat and an organic compound containing a urethane group and an ester group.08-26-2010
20100101842LOW-TEMPERATURE CURABLE CONDUCTIVE PASTE FOR PLATING AND ELECTRIC WIRING USING THE SAME - A conductive paste containing a conductive powder (A), a vinyl chloride-vinyl acetate resin (B), a polyester resin and/or polyurethane resin (C), a blocked isocyanate (D) blocked with an active methylene compound, and an organic solvent (E), wherein the resin (C) has a glass transition temperature of −50° C. to 20° C., a sum of amounts of the resin (C) is 50 to 400 parts by weight relative to 100 parts by weight of the resin (B), and a sum of amounts of the resin (B), the resin (C) component, and the blocked isocyanate (D) is 10 to 60 parts by weight relative to 100 parts by weight of the conductive powder (A). An electric wiring in which this conductive paste is formed on an insulating substrate.04-29-2010
20100101840APPLICATION OF A SELF-ASSEMBLED MONOLAYER AS AN OXIDE INHIBITOR - An embodiment is directed to a method of forming a self assembled monolayer to reduce formation of an oxide. The method includes applying an inhibitor to a substrate including conductive contacts and processing the substrate and inhibitor to form the self assembled monolayer.04-29-2010
20100101841PRINTED CIRCUIT BOARD - A printed circuit board (PCB) is disclosed. The PCB includes a dielectric layer, a power layer, a ground layer, and an electromagnetic interference reducing layer. The dielectric layer includes a central portion and a periphery portion surrounding the central portion. The dielectric layer defines a number of via holes through the periphery portion. The ground layer is adhered to a surface of the dielectric layer, covering both the central portion and the periphery portion. The power layer and the EMI reducing layer are separately adhered to another surface of the dielectric layer facing away from the conductive ground layer. The conductive power layer covers the central portion. The EMI reducing layer substantially covers the periphery portion and is electrically connected to the ground layer via the via holes.04-29-2010
20080236875WIRING STRUCTURE AND METHOD OF FORMING THE SAME - A CNT bundle is formed by growing a plurality of CNTs from opposing surfaces of contact blocks toward mutual opposing surfaces, and by contacting the CNTs so that they intersect to electrically connect with each other. Subsequently, a gap of the electrically connected CNT bundle is filled with a metal material, to thereby form a wiring being a composite state of the CNT bundle and the metal material.10-02-2008
20110266038PRINTED CIRCUIT BOARD ADN METHOD OF MANUFACTURING THE SAME - Disclosed herein is a printed circuit board, including: a substrate including a first circuit layer formed on one side thereof and a second circuit layer formed on the other side thereof; and a strike-type through body externally inserted in the substrate and electrically connecting the first circuit layer and the second circuit layer. The printed circuit board is advantageous in that, since a strike-type through body is externally inserted in a substrate, conventional complicated processes, such as hole forming, deburring, desmearing, electroless copper plating and electrolytic copper plating, can be omitted, thus simplifying a process of manufacturing a printed circuit board and reducing the manufacturing cost thereof.11-03-2011
20110180310PRINTED CIRCUIT BOARD - A printed circuit board includes a substrate including through holes, pad portions arranged on surfaces of the substrate, and insulating areas. Each of the pad portions includes a first pad surrounding a corresponding through hole and a second pad. Each of the insulating areas is between each of the first pads and each of the second pads to electrically insulate each of the first pads and each of the second pads from each other. Attachment or removal of conductive layers to or from the insulating areas allows electrical connection or disconnection between the first pads and the second pads.07-28-2011
20110180309INTERCONNECT STRUCTURE EMPLOYING A Mn-GROUP VIIIB ALLOY LINER - A metallic liner stack including at least a Group VIIIB element layer and a CuMn alloy layer is deposited within a trench in a dielectric layer. Copper is deposited on the metallic liner stack and planarized to form a conductive interconnect structure, which can be a metal line, a metal via, or a combination thereof. The deposited copper and the metallic liner stack are annealed before or after planarization. The Mn atoms are gettered by the Group VIIIB element layer to form a metallic alloy liner including Mn and at least one of Group VIIIB elements. Mn within the metallic alloy liner combines with oxygen during the anneal to form MnO, which acts as a strong barrier to oxygen diffusion, thereby enhancing the reliability of the conductive interconnect structure.07-28-2011
20090166067CLAD MEMBER AND PRINTED-CIRCUIT BOARD - A clad member low in thermal expansion coefficient and excellent in workability is provided. The clad member 07-02-2009
20080289864PRINTED WIRING BOARD AND METHOD FOR PRODUCING THE SAME - The present invention has for its object to provide a multilayer printed circuit board which is very satisfactory in facture toughness, dielectric constant, adhesion and processability, among other characteristics. The present invention is directed to a multilayer printed circuit board comprising a substrate board, a resin insulating layer formed on said board and a conductor circuit constructed on said resin insulating layer, wherein said resin insulating layer comprises a polyolefin resin.11-27-2008
20110203838ELECTRICAL CONNECTOR WITH SOLDER COLUMNS - An electrical connector is provided for mating with an electrical component. The connector includes a substrate having a mating side, and a solder column extending from the mating side of the substrate. The solder column includes a base that is engaged with the substrate. The solder column extends a length away from the mating side of the substrate to a tip. The tip includes a contact surface that is configured to engage and electrically connect to an electrical contact of the electrical component. The solder column is linearly tapered along at least a portion of the length from the base to the tip.08-25-2011
20080302561CONDUCTIVE INK CONTAINING THERMALLY EXFOLIATED GRAPHITE OXIDE AND METHOD OF MAKING A CONDUCTIVE CIRCUIT USING THE SAME - A conductive ink containing a conductive polymer, wherein the conductive polymer contains at least one polymer and a modified graphite oxide material, which is a thermally exfoliated graphite oxide with a surface area of from about 300 m12-11-2008
20080308308METHOD OF MANUFACTURING WIRING BOARD, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND WIRING BOARD - A semiconductor device 12-18-2008
20080308307TRACE STRUCTURE AND METHOD FOR FABRICATING THE SAME - A trace structure with a particular profile to eliminate stress concentration and the fabricating method thereof are provided. The trace structure includes a conductive line, a seed layer, and a protection layer, wherein an upper part of the trace line is covered by the protection layer to prevent sharp edges caused by over etching in the fabrication of the conductive line. Hence, the stress concentration due to the sharp edges in the trace structure is diminished and the reliability of packaging structures or other devices applying the trace structure is assured.12-18-2008
20080296051PRINTED CIRCUIT BOARD - A printed circuit board includes a base insulating layer and a wiring. The wiring is composed of a terminal portion on an upper surface side of the base insulating layer, a copper plating layer inside a through hole of the base insulating layer and a wiring pattern on a lower surface side of the base insulating layer. A protective plating layer is provided on the upper surface side of the base insulating layer so as to cover the terminal portion and the copper plating layer inside the through hole. A cover insulating layer is provided on the lower surface side of the base insulating layer so as to cover the wiring pattern.12-04-2008
20080230260Flip-chip substrate - A flip-chip substrate is disclosed, which comprises a core substrate including an aluminum oxide substrate and a first circuit layer, wherein the aluminum oxide substrate has a top surface, a bottom surface, and a plurality of conductive through holes, the conductive through holes connect the top surface and the bottom surface the first circuit layer disposed on the top surface and the bottom surface and electrically connects to the conductive through holes; and a built-up structure disposed on the top surface and the bottom surface and electrically connecting to the first circuit layer. Moreover, the conductive through holes are formed by forming plural through holes through electrolyzing, and then forming a first seed layer and a first metal layer inside the through holes. Therefore, the problem of substrate warpage can be prevented, and the wiring density of the flip-chip substrate can be improved.09-25-2008
20100263920Electrical device and method of manufacturing thereof - A three-dimensional circuit substrate comprises one or more electrically conductive tracks. The substrate is formed from a unitary moulding over the one or more electrically conductive tracks and thereby provides structural support therefor.10-21-2010
20120090880MITIGATION AND ELIMINATION OF TIN WHISKERS - A method of mitigating tin whisker formation on electronic assemblies includes exposing tin metal in the electronic assembly to a mitigating agent that interacts with the tin metal to produce a product that is resistant to forming tin whiskers.04-19-2012
20130118786Method for Manufacturing Transparent Conductive Film and Transparent Conductive Film Manufactured Thereby - Provided are a method for manufacturing a transparent conductive film and a transparent conductive film manfuactured thereby, the method including: a) forming a coating film by coating a transparent conductive film coating solution on a substrate, the transparent conductive film coating solution including a non-polar solvent; a polar solvent; a conductive metal ink; and a surfactant; and b) forming a conductive pattern having a hole type transmissive part and a pattern part formed of the conductive metal ink, on the substrate, by drying and burning the coating film.05-16-2013
20120043122BOARD WITH FINE PITCH BUMP AND METHOD OF MANUFACTURING THE SAME - Disclosed herein are a board with a fine pitch bump and a method of manufacturing the same. The method of manufacturing a board with a fine pitch bump includes: forming a solder resist layer by stacking a solder resist on a core layer having a circuit pattern formed thereon; forming a seed layer on an upper surface of the solder resist layer; forming a dry film layer by stacking a dry film on an upper surface of the seed layer; forming holes by simultaneously drilling the solder resist layer, the seed layer, and the dry film layer; and forming a copper post bump by performing copper filling plating in the holes and removing the seed layer and the dry film layer. The holes having the same size are simultaneously drilled into the solder resist layer and the dry film layer to improve a matching degree of the copper post bump, thereby making it possible to form the fine pitch bump.02-23-2012
20100139956DEVICE APPLICATIONS FOR VOLTAGE SWITCHABLE DIELECTRIC MATERIAL HAVING HIGH ASPECT RATIO PARTICLES - One or more embodiments provide for a device that utilizes voltage switchable dielectric material having semi-conductive or conductive materials that have a relatively high aspect ratio for purpose of enhancing mechanical and electrical characteristics of the VSD material on the device.06-10-2010
20100139959METHOD FOR MANUFACTURING A PRINTED CIRCUIT BOARD AND A PRINTED CIRCUIT BOARD OBTAINED BY THE MANUFACTURING METHOD - A method for manufacturing a printed circuit board enables a metal residue between wirings to be removed inexpensively without side etching of a copper layer while having sufficient insulation reliability for micro wiring working. The method includes forming a base metal layer directly at least on one face of an insulator film without an adhesive, and a copper coat layer formed on the base metal layer to form adhesiveless copper clad laminates, then forming a pattern on the adhesiveless copper clad laminates by an etching method. The etching method includes a process of etching treatment for the adhesiveless copper clad laminates with an iron (III) chloride solution or a copper (II) chloride solution containing hydrochloric acid and then, a process of treatment with an acid oxidant containing permanganate and acetic acid.06-10-2010
20100139958STRUCTURE AND METHOD TO GAIN SUBSTANTIAL RELIABILITY IMPROVEMENTS IN LEAD-FREE BGAs ASSEMBLED WITH LEAD-BEARING SOLDERS - Methods of forming and assemblies having hybrid interconnection grid arrays composed of a homogenous mixture of Pb-free solder joints and Pb-containing solder paste on corresponding sites of a printed board. The aligned Pb-free solder joints and Pb-containing solders are heated to a temperature above a melting point of the Pb-free solder joint for a sufficient time to allow complete melting of both the Pb-free solder joints and Pb-containing solder paste and the homogenous mixing thereof during assembly. These molten materials mix together such that the Pb from the Pb-containing solder disperses throughout substantially the entire Pb-free solder joint for complete homogenization of the molten materials to form the homogenous hybrid interconnect structures of the invention.06-10-2010
20110005816METHOD FOR MAKING A CONDUCTIVE FILM EXHIBITING ELECTRIC ANISOTROPY, CONDUCTIVE PLATE AND METHOD FOR MAKING THE SAME - A method for making a conductive film exhibiting electric anisotropy comprises forming a nanomaterial on a substrate, the nanomaterial having a cluster of interconnected nanounits, each of which being substantially transverse to the substrate and having one end bonded to the substrate. The method further includes stretching the nanounits along a first direction to remove the nanomaterial from the substrate so as to form a conductive film having strings of interconnected nanounits, where the nanounits of the strings substantially extend in the first direction. A conductive plate and a method for making the same is also disclosed, where the method further comprises attaching the conductive film to a second substrate.01-13-2011
20110005814CIRCUIT BOARD VIA STRUCTURE AND METHOD FORMING THE SAME - A printed circuit board (“PCB”) (01-13-2011
20120055703Joined Structure and Method for Producing the Same - A method for producing a joined structure, containing: after placing an anisotropic conductive film in the predetermined manner, placing a wiring member containing a wiring plate formed thereon, where the wiring plate has a resist region in which the wiring plate is covered with a resist layer, and a second electrode region in which the wiring plate is not covered with the resist layer, so that the edge of the resist region at a boundary with the second electrode region comes above the chamfer part of the substrate; and heating and compressing the anisotropic conductive film from the side of the wiring member to melt and make the anisotropic conductive film flow into the side of the resist region to thereby cover the second electrode region with the anisotropic conductive film, so as to electrically connect the first electrode region and the second electrode region.03-08-2012
20120061132Printed circuit board having metal bumps - A printed circuit board having a metal bump, including: an upper circuit layer including a circuit pattern embedded in an upper part of an insulating layer, the circuit pattern being made of electroconductive metal; wherein the metal bump is integrally formed with the circuit pattern and protruding from the circuit pattern and above the insulating layer.03-15-2012
20130213703TRANSPARENT CONDUCTIVE FILM - A transparent conductive film 08-22-2013
20090090543CIRCUIT BOARD, SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - There is provided a circuit board to which a solder ball composed of a lead (Pb)-free solder is to be connected, a semiconductor device including an electrode and a solder ball composed of a lead (Pb)-free solder disposed on the electrode, and a method of manufacturing the semiconductor device, in which mounting reliability can be improved by enhancing the bonding strength (adhesion strength) between the solder ball composed of a lead (Pb)-free solder and the electrode.04-09-2009
20090025968Wired circuit board and producing method thereof - A wired circuit board includes an insulating layer, a conductive pattern made of copper formed on the insulating layer and a covering layer made of an alloy of copper and tin to cover the conductive pattern. An existing ratio of tin in the covering layer increases in accordance with a distance from an inner surface adjacent to the conductive pattern toward an outer surface being not adjacent to the conductive pattern. An atomic ratio of copper to tin in the outer surface of the covering layer is more than 3.01-29-2009
20090183903Printed circuit board - A printed circuit board print (PCB) having an insulation layer; an intaglio pattern formed by depressing a part of the insulation layer corresponding to a location where a circuit pattern is to be formed; and conductive ink forming the circuit pattern by filling the intaglio pattern. A method of manufacturing the PCB includes providing an imprinting stamper with a relievo pattern formed in correspondence with a circuit pattern data using the circuit pattern data, forming an intaglio pattern corresponding to the relievo pattern by pressing the imprinting stamper on an insulation layer, and forming a circuit pattern by printing conductive ink in the intaglio pattern by an ink-jet method using the circuit pattern data, allows the forming of a circuit pattern to a required thickness by injecting conductive ink in a groove processed by the imprint method, and prevents the spreading of ink and the distortion of the pattern shape in the curing process for conductive ink containing metal. Also, the circuit pattern CAD data used in the manufacturing of an imprinting stamper can be utilized again in the ink-jet printing process.07-23-2009
20090183902MULTILAYER FILM FOR WIRING AND WIRING CIRCUIT - The provided is a technology for forming a circuit for wiring, which can show a lower resistance, and particularly proposes a laminated film for wiring, which can surely decrease wiring resistance even in a large-sized liquid crystal display.07-23-2009
20120067630CIRCUIT STRUCTURE OF CIRCUIT BOARD - A circuit structure of a circuit board includes a dielectric layer, a number of first circuits, and a number of second circuits. The dielectric layer has a surface and an intaglio pattern. The first circuits are disposed on the surface of the dielectric layer. The second circuits are disposed in the intaglio pattern of the dielectric layer. Line widths of the second circuits are smaller than line widths of the first circuits, and a distance between every two of the adjacent second circuits is shorter than a distance between every two of the adjacent first circuits.03-22-2012
20120067629SOLDER ADHESIVE AND A PRODUCTION METHOD FOR THE SAME, AND AN ELECTRONIC DEVICE COMPRISING THE SAME - The present invention relates to a solder adhesive and a production method for the same, and to an electronic device comprising the same, and more specifically it relates to a solder adhesive comprising an alloy including tin and having a melting point of from 130 to 300° C., a first binder including a rosin compound, and a second binder having a thermosetting resin, as well as to a production method for the same and an electronic device comprising the same.03-22-2012
20090050355Thermoplastic Films For Insulated Metal Substrates And Methods Of Manufacture Thereof - An insulated metal substrate laminate includes a metal substrate, a dielectric layer disposed upon the metal substrate, wherein the dielectric layer comprises a thermoplastic film having a thickness of less than or equal to 10 micrometers, a thermal resistance of less than or equal to 0.050 Kelvin-square inches per watt, and a breakdown voltage greater than or equal to 1000 volts (alternating current), and an electrically conductive layer disposed upon the dielectric layer.02-26-2009
20090200070Cu-BASED WIRING MATERIAL AND ELECTRONIC COMPONENT USING THE SAME - An object of the present invention is to provide an electronic component, including a wiring that contacts a glass or a glass ceramics member, for which a Cu-based wiring material capable of suppressing generation of bubbles in the glass or the glass ceramics member and having excellent migration resistance is used. The present invention provides an electronic component including a wiring that contacts a glass or a glass ceramics member. In the electronic component, the wiring material is formed of a binary alloy made of two elements of Cu and Al, and contains not more than 50.0% by weight of Al and a balance of unavoidable impurities.08-13-2009
20090321114ELECTRICAL INSPECTION SUBSTRATE UNIT AND MANUFACTURING METHOD THEREFORE - An electrical testing substrate unit includes a multi-layer ceramic substrate formed of mullite and a borosilicate glass as predominant ceramic components. In the multi-layer ceramic substrate, the borosilicate glass contains an alkali metal oxide in an amount of 0.5 to 1.5 mass %. The multi-layer ceramic substrate has a mean coefficient of linear thermal expansion having a value of 3.0 to 4.0 ppm/° C. between −50° C. and 150° C. A thermal expansion coefficient, α1, of the multi-layer ceramic substrate as determined at a particular temperature and a thermal expansion coefficient, α2, of a to-be-tested silicon wafer as determined at the same temperature silicon satisfy a relation: 0 ppm/° C.<α1−α2≦2.5 ppm/° C. through the temperature range of −50° C. to 150° C. Electrodes are formed on a surface of the multi-layer ceramic substrate.12-31-2009
20090056992WIRING SUBSTRATE WITH LEAD PIN AND LEAD PIN - A wiring substrate with a lead pin is formed by bonding lead pins to electrode pads formed on a wiring substrate through conductive materials. In the lead pin, a conic protrusion part whose side surface is formed in a concave surface is formed in the end face side opposed to the electrode pad of a head part formed in one end of a shaft part. The lead pin is bonded to the electrode pad in a state in which the conductive material extends to the back surface side of a head part beyond a flange part of the head part and reaches the shaft part of the lead pin.03-05-2009
20090084589LEAD TERMINAL BONDING METHOD AND PRINTED CIRCUIT BOARD - A lead terminal bonding method includes the steps of forming a land part on a front surface of a base substrate, the land part including a metal foil; forming a metal plating layer on a surface of the land part, the metal plating layer having a Young's modulus greater than that of the metal foil; and directly bonding a metal plate to the metal plating layer by spot-welding.04-02-2009
20090084588CIRCUIT BOARD, ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME - A circuit board includes a substrate, a circuit pattern and a through electrode. The circuit pattern is disposed on one side of the substrate in a thickness direction thereof. The through electrode is filled in a through-hole formed in the substrate with one end connected to the circuit pattern. The circuit pattern and the through electrode each have an area containing a noble metal component (e.g., Au component) and are connected to each other therethrough.04-02-2009
20110139498PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A printed wiring board including an insulation layer made of a resin material and having first and second surfaces, the insulation layer having an opening portion opened on the second surface, a conductive circuit having first and second surfaces, the conductive circuit being embedded in the insulation layer such that the first surface of the conductive circuit is formed flush with the first surface of the insulation layer and that the second surface of the conductive circuit is exposed through the opening portion of the insulation layer, a first surface-treatment film formed on the conductive circuit and facing the first surface of the conductive circuit, and a second surface-treatment film formed on the conductive circuit and facing the second surface of the conductive circuit and in the opening portion of the insulation layer.06-16-2011
20100155117CONDUCTOR PASTE FOR CERAMIC SUBSTRATE AND ELECTRIC CIRCUIT - A conductor paste for a ceramic substrate contains a) a conductive metal powder comprising a silver powder and a palladium powder; b) a glass powder; and c) an organic solvent, wherein the conductive metal powder has an average particle diameter of not more than 1.2 μm, and the glass powder is a Bi06-24-2010
20100170707Optical article - An optical article and method of making the same are provided. The optical article has optical multi-aperture operation. The optical article has one or more electrically conductive and selectively passivated patterns.07-08-2010
20110127073PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A printed circuit board and a manufacturing method thereof are disclosed. In accordance with an embodiment of the present invention, the printed circuit board includes a metal core having Invar layers formed on either surface of a copper layer, an insulation layer, which is formed on one surface of the metal core, and a circuit pattern, which is coupled to one surface of the insulation layer. Thus, the printed circuit board can improve thermal conductivity and deformation resistance against warpage.06-02-2011
20100263919Substrates for Electronic Circuitry Type Applications - An electronic type substrate having 40 to 97 weight-percent polymer and 3 to 60 weight-percent auto-catalytic crystalline filler. An interconnect or a conductor trace is created in the substrate by: i. drilling or ablating with a high energy electromagnetic source, such as a laser, thereby selectively activating the multi cation crystal filler along the surface created by the drilling or ablating step; and ii. metalizing by electroless and/or electrolytic plating into the drilled or ablated portion of the substrate, where the metal layer is formed in a contacting relationship with the activated multi cation crystal filler at the interconnect boundary without a need for a separate metallization seed layer or pre-dip.10-21-2010
20100012360CIRCUIT ELEMENT MOUNTING BOARD, AND CIRCUIT DEVICE AND AIR CONDITIONER USING THE SAME - A circuit device of the present invention includes a wiring board 01-21-2010
20100163286Circuit Board Structure and Manufacturing Method Thereof and Liquid Crystal Display Containing the Same - A circuit board structure and a manufacturing method thereof and a liquid crystal display (LCD) containing the same are disclosed. The circuit board structure comprises a flexible printed circuit board (FPC) and a printed circuit board. On a first surface of the printed circuit board opposite to a connection area (such as a gold fingers area) thereof for connecting to the FPC, dummy circuits are formed for maintaining uniform stress when the printed circuit board and the FPC are press-bonded. In the manufacturing method, an electrically-conductive layer is first formed on the first surface of the printed circuit board, and then first grooves and second grooves are formed on the electrically-conductive layer simultaneously, thereby forming real circuits and dummy circuits, wherein the depths of the first grooves and the second grooves are about the same, and the thicknesses of the dummy circuits and the real circuits are about the same.07-01-2010
20120103669METAL TRANSPARENT CONDUCTORS WITH LOW SHEET RESISTANCE - The present invention relates to a transparent electrode comprising an ultra thin metal conductor (05-03-2012
20120103668Chip Package - A chip package includes a conductive connection block connected to the conductive layer coated on the base and the two ends of the gold wire are respectively connected to the chip and the connection block. The connection block prevents lamination during packaging and ensures that the gold wire is firmly connected to the chip and the connection block.05-03-2012
20120103667WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a wiring substrate, includes forming a laminated body in which a nickel copper alloy layer is formed via an insulating resin layer, on a first wiring layer, forming a via hole reaching the first wiring layer in the nickel copper alloy layer and the insulating resin layer, applying a desmear process to an inside of the via hole, forming a seed layer on the nickel copper alloy layer and an inner surface of the via hole, forming a plating resist in which an opening portion is provided on a part containing the via hole, forming a metal plating layer in the opening portion in the plating resist by an electroplating, removing the plating resist, and forming a second wiring layer by etching the seed layer and the nickel copper alloy layer while using the metal plating layer as a mask.05-03-2012
20120103665METHOD OF PROTECTING A PRINTED CIRCUIT BOARD AND RELATED APPARATUS - According to one example there is a printed circuit board having a first surface and a solder mask over said first surface. There is a layer of sealing material having a shape and location covering a zone of the solder mask which is vulnerable to degradation.05-03-2012
20100163285GRAPHENE ELECTRONICS FABRICATION - An electrical circuit structure employing graphene as a charge carrier transport layer. The structure includes a plurality of graphene layers. Electrical contact is made with one of the layer of the plurality of graphene layers, so that charge carriers travel only through that one layer. By constructing the active graphene layer within or on a plurality of graphene layers, the active graphene layer maintains the necessary planarity and crystalline integrity to ensure that the high charge carrier mobility properties of the active graphene layer remain intact.07-01-2010
20090288862Wired circuit board and producing method thereof - A wired circuit board includes an insulating base layer, a conductive pattern formed on the insulating base layer, a tin-based thin layer formed on a surface of the conductive pattern, and containing at least tin oxide, and an insulating cover layer formed on the insulating base layer so as to cover the tin-based thin layer.11-26-2009
20100163287SUBSTRATE STRUCTURE AND MANUFACTURING METHOD THEREOF - A substrate structure is provided. The substrate structure includes a substrate, a first insulation layer, a conductive part, a second insulation layer, a seed layer and a conductive layer. The substrate has a first circuit pattern layer and a second circuit pattern layer, which are located on two opposite surfaces of the substrate respectively. The first insulation layer formed on the first circuit pattern layer has a first insulation hole, which exposes a first opening in the outer surface of the first insulation layer. The conductive part formed on the first insulation hole for electrically connecting with a chip is enclosed by the edge of the first opening. The second insulation layer formed on the second circuit pattern layer has a second insulation hole in which the seed layer is formed. The conductive layer is formed on the seed layer for electrically connecting with a circuit board.07-01-2010
20090314531METHOD OF MAKING MULTILAYERED CONSTRUCTION FOR USE IN RESISTORS AND CAPACITORS - The invention concerns a method of making multilayered constructions useful in forming capacitors and resistors, which may be used in the manufacture of printed circuit boards and microelectronic devices. According to the inventive method, a thermosetting polymer layer or layers are attached directly onto a heat resistant film layer, specifically on the side(s) of the heat resistant film to be attached to an electrically conductive layer having an electrical resistance material layer thereon. Attaching the adhesive to the heat resistant film rather than the electrically conductive layer streamlines the manufacturing process, particularly in the formation of the electrical resistance material layer onto the electrically conductive layer. This also results in better precision and uniformity of the multilayered construction.12-24-2009
20130213701MANUFACTURING METHOD OF PRINTED WIRING BOARD AND PRINTED WIRING BOARD - Object of the present invention is to provide a method for manufacturing a printed wiring board which enables fine wiring formation at low costs and with high yields without introducing any special equipment, and a printed wiring board manufactured by the method. To achieve the object, a method for forming the wiring pattern adopted includes steps; for forming a laminate having a structure in which a copper foil layer formed using copper foil without roughening treatment having surface roughness (Rzjis) at a bonding surface of 2 μm or less and thickness of 5 μm or less is laminated to a conductive layer via an insulating layer; for providing a blind-hole composed of a hole perforating the copper foil layer and the insulating layer; and a bottom composed of the conductive layer in the laminate; for filling-up the blind-hole by a electro-plated copper in the time for depositing an electro-plated copper layer on a surface of the electroless-plated copper layer to make the total thickness of a copper layer provided on the insulating layer 15 μm or less, for providing of an etching resist layer having thickness of 15 μm or less and for etching of the copper layer.08-22-2013
20130213702BUMPING PROCESS AND STRUCTURE THEREOF - A bumping process comprises steps of forming a metal layer with copper on a substrate, and the metal layer with copper comprises a plurality of first zones and second zones; forming a photoresist layer on the metal layer with copper; patterning the photoresist layer to form a plurality of openings; forming a plurality of copper bumps within the openings, each of the copper bumps covers the first zones and comprises a first top surface; forming a connection layer on the first top surface; removing the photoresist layer; removing the second zones and enabling each of the first zones to form an under bump metallurgy layer, wherein the under bump metallurgy layer, the copper bump, and the connection layer possess their corresponded peripheral walls, and covering sections of a first protective layer formed on the connection layer may cover those peripheral walls to prevent ionization phenomenon.08-22-2013
20100258340Composite material and high-frequency circuit substrate made therefrom - The invention relates to a composite material and a high-frequency circuit substrate made from the composite material. The composite material includes: a thermosetting composition in an amount of 20 to 70 by weight with respect to the composite material, a fiberglass cloth processed by coupling agent; a powder filler; a fire retardant and a cure initiator. The thermosetting composition includes a resin with molecular weight thereof being less than 11,000, and a low-molecular-weight solid allyl resin. The resin is composed of carbon and hydrogen element. More than 60 percent of the resin is vinyl. The high-frequency circuit substrate made from the composite material comprises: a plurality of prepregs mutually overlapped and copper foils respectively covered on both sides of overlapped prepregs, wherein each prepreg is made from the composite material. The composite material of the present invention realizes easy manufacture of the prepreg and high bonding of the copper foil. The high-frequency circuit substrate made from the composite material has low dielectric constant, low dielectric loss tangent, and excellent heat resistance, and is convenient for process operation. Therefore, the composite material is suitable for making the circuit substrate.10-14-2010
20100258341MOUNTING BOARD AND METHOD OF PRODUCING THE SAME - A mounting board of the invention includes: an insulative base; a plurality of first conductive elements provided on the insulative base and having lands; a plurality of second conductive elements disposed on the lands; a plurality of solder pieces each disposed on each of the second conductive elements; and an electronic component which includes electrode sections each contacting each of the solder pieces, wherein the first conductive elements are made from a first element that contains at least silver; the second conductive elements are made from a second element that contains at least copper; and the solder pieces are made from a third element that contains at least tin.10-14-2010
20090314530METHOD OF ALIGNING NANOTUBES AND WIRES WITH AN ETCHED FEATURE - A method of forming an aligned connection between a nanotube layer and an etched feature is disclosed. An etched feature is formed having a top and a side and optionally a notched feature at the top. A patterned nanotube layer is formed such that the nanotube layer contacts portions of the side and overlaps a portion of the top of the etched feature. The nanotube layer is then covered with an insulating layer. Then a top portion of the insulating layer is removed to expose a top portion of the etched feature.12-24-2009
20120031656SUBSTRATE FOR PRINTED WIRING BOARD, PRINTED WIRING BOARD, AND METHODS FOR PRODUCING SAME - Provided are a substrate for a printed wiring board, and a printed wiring board, which are not limited in size because vacuum equipment is not necessary for the production, in which an organic adhesive is not used, and which can include a conductive layer (copper foil layer) having a sufficiently small thickness. Also provided are a method for producing the substrate for a printed wiring board, and a method for producing the printed wiring board. A substrate 02-09-2012
20100193226SOLDER BUMP CONFINEMENT SYSTEM FOR AN INTEGRATED CIRCUIT PACKAGE - A solder bump confinement system is provided includes a substrate; a contact material patterned on the substrate; an inner passivation layer deposited over the contact material and the substrate; an under bump material pad over the contact material; an under bump material defining layer, having a bump opening contained therein, directly on the under bump material pad in which the under bump material defining layer has a thickness in the range of 200 Angstrom to 1500 Angstrom; and a system interconnect formed over the contact material and coupled to the under bump material defining layer and the under bump material pad through the bump opening.08-05-2010
20100193225CIRCUIT BOARD, METHOD OF MANUFACTURING THE SAME, AND RESISTANCE ELEMENT - Provided is a circuit board including a resin base, and a resistance element formed above the resin base. The resistance element includes a resistance pattern including an electrode portion and an extending portion, and an electrode formed on the electrode portion of the resistance pattern and including a foot portion reduced in thickness toward the extending portion.08-05-2010
20100218981Solar cell lead, method of manufacturing the same, and solar cell using the same - A solar cell lead includes a strip plate conductive material that a surface thereof is coated with solder plating. The coated solder plating includes a concavo-convex portion on a surface thereof and a 0.2% proof stress of not more than 90 MPa by a tensile test. The coated solder plating includes a hot-dip solder plating layer formed by supplying a molten solder on the surface of the strip plate conductive material. A plating temperature is set to be not higher than a liquidus-line temperature of the used solder plus 120° C., and an oxide film on a surface of the hot-dip solder plating layer is set to be not more than 7 nm in thickness.09-02-2010
20100155116PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A printed wiring board includes a resin insulation layer having a first surface and a second surface on an opposite side of the first surface, the resin insulation layer having an opening for a first via conductor, a pad formed on the first surface of the resin insulation layer and provided to mount an electronic component, a first conductive circuit formed on the second surface of the resin insulation layer, and a first via conductor formed in the opening and connecting the pad and the first conductive circuit. The pad has an embedded portion embedded in the resin insulation layer and a protruding portion protruding from the resin insulation layer, and the embedded portion has an external shape which is greater than an external shape the protruding portion.06-24-2010
20090294159ADVANCED PRINT CIRCUIT BOARD AND THE METHOD OF THE SAME - The present invention provides a multilayer print circuit board having at least an inner print circuit pattern and an outer print circuit pattern which are laminated on a substrate through an insulation layer and being electrically connected to each other through a blind hole provided in the insulation layer. The insulation layer is composed of a resin insoluble in an oxidization agent and inorganic powder dispersed in the resin. The inorganic powder is soluble in the oxidization agent. Wherein at least one circuit pattern is formed of non-metal material for electrically connection.12-03-2009
20100236817PACKAGE SUBSTRATE WITH A CAVITY, SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF - A method of making a package substrate includes providing a cladding sheet comprising a first metal layer, a second metal layer and an intermediate layer between the first and second metal layers; etching away a portion of the first metal layer to expose a portion of the intermediate layer thereby forming a metal island body; laminating a first copper clad on the cladding sheet comprising a first copper foil and a first insulating layer; patterning the first copper foil to form a first circuit trace; patterning the second metal layer to form a second circuit trace; removing the metal island body to form a cavity in the first insulating layer; and removing the intermediate layer from bottom of the cavity.09-23-2010
20100276185BARRIER LAYER FOR FINE-PITCH MASK-BASED SUBSTRATE BUMPING - A structure that may be used in substrate solder bumping comprises a substrate (11-04-2010
20100212942FULLY REFLECTIVE AND HIGHLY THERMOCONDUCTIVE ELECTRONIC MODULE AND METHOD OF MANUFACTURING THE SAME - A fully reflective and highly thermoconductive electronic module includes a metal bottom layer, a transparent ceramic layer and a patterned metal wiring layer. The metal bottom layer has a lower reflective surface. The transparent ceramic layer has an upper surface and a lower surface. The lower surface of the transparent ceramic layer is bonded to the lower reflective surface of the metal bottom layer. The metal wiring layer is bonded to the upper surface of the transparent ceramic layer. The lower reflective surface reflects a first light ray, transmitting through the transparent ceramic layer, to the upper surface of the transparent ceramic layer. A method of manufacturing the fully reflective and highly thermoconductive electronic module is also disclosed.08-26-2010
20100236819PRINTED CIRCUIT BOARD AND METHOD FOR MAKING THE SAME - A method for making a printed circuit board includes: (a) preparing a laminate having a ceramic substrate, first and second metal foils disposed on two opposite surfaces of the ceramic substrate, and a through hole extending through the ceramic substrate and the first and second metal foils; (b) filling the through hole with a metal paste such that the metal paste is in contact with the first and second metal foils; and (c) sintering the metal paste and the laminate such that the metal paste is connected electrically to the first and second metal foils. A printed circuit board made according to the method is also disclosed.09-23-2010
20100252309POLYIMIDE FILM AND WIRING BOARD - The polyimide film of the present invention is to be used for the production of a wiring board having a metal wiring, which is formed by forming a metal layer on one side (Side B) of the polyimide film, and etching the metal layer; the polyimide film is curled toward the side (Side A) opposite Side B; and the curling of the polyimide film is controlled so as to reduce the drooping of the wiring board having a metal wiring formed thereon. The handling characteristics and productivity in IC chip mounting may be improved by the use of the polyimide film.10-07-2010
20100155118CERAMIC MULTILAYER SUBSTRATE AND METHOD FOR PRODUCING THE SAME - A ceramic multilayer substrate incorporating a chip-type ceramic component, in which, even if the chip-type ceramic component is mounted on the surface of the ceramic multilayer substrate, bonding strength between the chip-type ceramic component and an internal conductor or a surface electrode of the ceramic multilayer substrate is greatly improved and increased. The ceramic multilayer substrate includes a ceramic laminate in which a plurality of ceramic layers are stacked, an internal conductor disposed in the ceramic laminate, a surface electrode disposed on the upper surface of the ceramic laminate, and a chip-type ceramic component bonded to the internal conductor or the surface electrode through an external electrode. The internal conductor or the surface electrode is bonded to the external electrode through a connecting electrode, and the connecting electrode forms a solid solution with any of the internal conductor, the surface electrode, and the external electrode.06-24-2010
20100236818CIRCUIT BOARD WITH ESD PROTECTION AND ELECTRONIC DEVICE USING SAME - A circuit board includes a signal layer and a power supply layer. The signal layer includes a first surface and a second surface opposite to the first surface. A number of pads are formed on the first surface for connecting to an electronic component. The power supply layer is formed on the second surface of the signal layer. The power supply layer includes an insulating substrate and at least one conductor formed on/in the insulating substrate. The conductor which is located under the pads defines a number of holes corresponding to the pads, each hole is substantially aligned with the corresponding pad, and the size of each hole is larger than the size of the corresponding pad.09-23-2010
20100218980PRINTED WIRING BOARD - A printed wiring board has an insulative board having a first surface and a second surface on the opposite side of the first surface, a wiring formed on the first surface of the insulative board and having a pad and a conductive circuit contiguous to the pad, and a metal film formed on the pad. The pad is provided to mount an electronic component having a gold bump. The pad has a thickness which is greater than a thickness of the conductive circuit.09-02-2010
20120090881METAL CORE SUBSTRATE - A metal core substrate is provided. A first routing member is comprised of a first area of one sheet of metal core material; a first insulation layer formed on the first area; and a first circuit pattern made of a copper foil and formed on the first insulation layer. A second routing member comprised of: a second area of the one sheet of the metal core material, which is separated from the first area; a second insulation layer formed on the second area; and a second circuit pattern made of a copper foil and formed on the second insulation layer. A connecting member electrically connects the first routing member and the second routing member. The connecting member is comprised of a third area of the one sheet of the metal core material, which is interposed between the first area and the second area.04-19-2012
20100139957Ceramic composition, method for producing the same, ceramic substrate and method for producing ceramic green layer - To provide a ceramic composition not only having little compositional variation after burning, but a high flexural strength of the sintered body, and a high Q value in a microwave band, a ceramic composition used for forming a ceramic layer of a multi-layer ceramic substrate contains 47.0 to 67.0 wt. % of SiO06-10-2010
20090301769METHOD FOR MANUFACTURING CONDUCTORS AND SEMICONDUCTORS - The invention relates to a sintering method for manufacturing structures by sintering. In addition, the invention relates to a sintered product, an electronic module, and new uses. In the method, a particle material containing conductive or semiconductive encapsulated nanoparticles is sintered, in order to increase its electrical conductivity, by applying a voltage over the particle material. In the method, a substrate is typically used, one surface of which is at least partly equipped with a layer containing nanoparticles. The method is based on thermal feedback between the voltage feed and the nanoparticles. The invention permits the manufacture of conductive and semiconductive structures and pieces by sintering at room temperature and at normal pressure.12-10-2009
20100126758MULTILAYER PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING MULTILAYER PRINTED WIRING BOARD - A multilayer printed wiring board including a first interlayer resin insulation layer, a first conductive circuit formed on the first interlayer resin insulation layer, a second interlayer resin insulation layer formed on the first interlayer resin insulation layer and the first conductive circuit and having an opening portion exposing a portion of the first conductive circuit, a second conductive circuit formed on the second interlayer resin insulation layer, a via conductor formed in the opening portion of the second interlayer resin insulation layer and connecting the first conductive circuit and the second conductive circuit, and a coating layer having a metal layer and a coating film and formed between the first conductive circuit and the second interlayer resin insulation layer. The metal layer is formed on the surface of the first conductive circuit and the coating film is formed on the metal layer.05-27-2010
20100122839MULTILAYER PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING MULTILAYER PRINTED WIRING BOARD - A multilayer printed wiring board including a first interlayer resin insulation layer, a pad formed on the first interlayer resin insulation layer, a solder resist layer formed on the first interlayer resin insulation layer and the pad, a protective film formed on a portion of the pad exposed by an opening of the solder resist layer, and a coating layer formed between the pad and the solder resist layer. The pad mounts an electronic component. The coating layer has a metal layer and a coating film. The metal layer is formed on the surface of the pad and the coating film is formed on the metal layer.05-20-2010
20100243302COMPONENTS HAVING VOLTAGE SWITCHABLE DIELECTRIC MATERIALS - Various aspects provide for structures and devices to protect against spurious electrical events (e.g., electrostatic discharge). Some embodiments incorporate a voltage switchable dielectric material (VSDM) bridging a gap between two conductive pads. Normally insulating, the VSDM may conduct current from one pad to the other during a spurious electrical event (e.g., shunting current to ground). Some aspects include gaps having a gap width that is greater than 50% of a spacing between electrical leads connected to the pads. Some devices include single layers of VSDM. Some devices include multiple layers of VSDM. Various devices may be designed to increase a ratio of active volume (of VSDM) to inactive volume.09-30-2010
20100243301Organic polymer coating for protection against creep corrosion - A process is described for treating metal surfaces printed wiring boards and similar substrates to provide improved creep corrosion resistance on such surfaces. A modified organic solderability preservative composition is used in combination with an emulsion polymer to provide a modified polymer coating on the metal surface finish via a chemical reaction to provide enhanced corrosion protection of the surface.09-30-2010
20100065311CONDUCTIVE PARTICLE, ADHESIVE COMPOSITION, CIRCUIT-CONNECTING MATERIAL, CIRCUIT-CONNECTING STRUCTURE, AND METHOD FOR CONNECTION OF CIRCUIT MEMBER - The conductive particle of the invention each comprises a conductive nucleus particle and an insulating coating containing an organic high molecular compound on the surface of the nucleus particle, and the coverage factor as defined by the following formula (1) is in the range of 20-40%.03-18-2010
20100200282METHOD OF BONDING CORE WIRES TO ELECTRODES AND ELECTRONIC UNIT FORMED BY BONDING ELECTRODES AND CORE WIRES - A method of bonding electrodes and core wires capable of shortening the operation time and improving the bonding strength and an electronic unit formed by bonding the electrodes and the core wires are intended to be provided.08-12-2010
20100000771COPPER-CLAD LAMINATE, PRINTED-WIRING BOARDS, MULTILAYER PRINTED-WIRING BOARDS, AND METHOD FOR MANUFACTURING THE SAME - The present invention is to significantly improve copper-foil adhesion strength (copper-foil peel strength) without roughening or blackening a copper-foil surface, and thereby to provide a copper-clad laminate used favorably in a high frequency range. The copper-clad laminate (01-07-2010
20110056733SURFACE MOUNT COMPONENT HAVING MAGNETIC LAYER THEREON AND METHOD OF FORMING SAME - A microelectronic assembly, a surface mount component and a method of providing the surface mount component. The assembly comprises: a substrate having bonding pads disposed on a mounting surface thereof, the bonding pads including a ferromagnetic material therein; solidified solder disposed on the bonding pads; and a surface mount component bonded to the substrate by way of the solidified solder and including a magnetic layer disposed on a substrate side thereof, the magnetic layer being adapted to cooperate with the ferromagnetic material in the bonding pads to establish a magnetic force of a sufficient magnitude to hold the surface mount component on the substrate before and during soldering.03-10-2011
20100059257METHOD OF NICKEL-GOLD PLATING AND PRINTED CIRCUIT BOARD - Disclosed are a method of electroless nickel-gold plating an object and a printed circuit board. The method in accordance with an embodiment of the present invention includes: forming a first nickel plated layer on a surface of the object; forming a second nickel plated layer on the first nickel plated layer; and forming a gold plated layer on the second nickel plated layer.03-11-2010
20100200281CIRCUIT BOARD STRUCTURE - A circuit board structure includes a dielectric layer, a first metal layer, a second metal layer and a first ferrite element. The first metal layer is disposed on an upper surface of the dielectric layer and has a first circuit area, a second circuit area and a first metallic neck connecting the first circuit and the second circuit areas. The second metal layer is disposed on a lower surface of the dielectric layer and has a third circuit area, a fourth circuit area and at least a second metallic neck connecting the third circuit and the fourth circuit areas. The orthogonal projections of the first and the second metallic necks on the upper surface are not overlapped. The first ferrite element is disposed on the upper surface and overlays at least one of the orthogonal projections of the first and the second metallic necks on the upper surface.08-12-2010
20090283303PACKAGE SUBSTRATE HAVING LANDLESS CONDUCTIVE TRACES - A package substrate having landless conductive traces is proposed, which includes a core layer with a plurality of plated through holes formed therein, and a plurality of conductive traces formed on at least a surface of the core layer. Each of the conductive traces has a connection end, a bond pad end, and a base body connecting the connection end and the bond pad end, the conductive trace is electrically connected to a corresponding one of the plated through holes through the connection end, and the connection end has a width greater than that of the base body but not greater than the diameter of the plated through hole, thereby increasing the contact area between the conductive trace and the plated through hole and preventing the contact surface of the conductive trace with the plated through hole from cracking.11-19-2009
20090321115MANUFACTURING METHOD OF METAL STRUCTURE IN MULTI-LAYER SUBSTRATE AND STRUCTURE THEREOF - Disclosed is a manufacturing method of metal structure in multi-layer substrate and structure thereof. The manufacturing method of the present invention comprises following steps: coating at least one photoresist layer on a surface of a dielectric layer, and then exposing the photoresist dielectric layer to define a predetermined position of the metal structure; therefore, removing the photoresist layer at the predetermined position and forming the metal structure at the predetermined position before forming at least one top-cover metal layer on a surface of the metal structure. The present invention can form a cover metal layer covering over the top surface and the two side surfaces, even the under surface of the metal structure, by one single photomask. Moreover, a finer metal structure with higher reliability can be manufactured. Furthermore, a metal structure can be used as a coaxial structure is also realized.12-31-2009
20090183901Wiring Boards and Processes for Manufacturing the Same - A wiring board includes an insulating substrate and a wiring pattern. The wiring pattern includes a main body and an upper end portion and is embedded in the insulating substrate while exposing at least the upper end portion on a surface of the insulating substrate. The upper end portion has a cross-sectional width smaller than that of a lower end portion of the wiring pattern embedded in the insulating substrate. The upper end portion is formed of a metal that is more noble than a metal of the main body of the wiring pattern.07-23-2009
20090114431CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A circuit board and method of manufacturing a circuit board. The circuit board includes a substrate, a conductor layer formed on the substrate, and an insulation layer formed on the substrate and the conductor layer, the insulating layer having an opening with an undercut therein, the opening reaching the conductor layer. A metal layer is formed in the opening of the insulation layer and connected to the conductor layer, a solder layer formed in the opening of the insulation layer and outside of the opening; and an alloy layer formed in a boundary region between the metal layer and the solder layer in the opening. The alloy layer includes a metal of the metal layer and a composition of the solder layer, the alloy layer being more fragile than the metal layer and being formed in a position misaligned from an edge of the undercut of the opening formed on the insulation layer.05-07-2009
20090114430METHOD FOR PATTERNING OF CONDUCTIVE POLYMER - Disclosed herein is a method of patterning a circuit using a self-assembly lithography. More specifically, the present invention is directed to a method of a circuit by a self-assembly lithography, which comprises the steps of: coating a substrate; forming the primary circuit; completing the patterning; and washing the substrate, a self-assembled lithographic circuit prepared by said method, and a method of forming an electrode circuit using said circuit. The inventive method of patterning a circuit using a self-assembly lithography is a new patterning process which does not use any typical photoresists and developers, thereby greatly reducing the manufacturing cost. Further, the inventive method converts the conventional top-down process into a bottom-up process, which enables to form more fine circuits with freedom. The circuit prepared according to the present invention can be effectively used for the photo process in a semiconductor and a display.05-07-2009
20100218983METHOD FOR MANUFACTURING PRINTED WIRING BOARD AND PRINTED WIRING BOARD - A method for manufacturing a printed wiring board includes forming a metal film on a surface of an insulative board, a plating resist on the metal film, and a plated-metal film on the metal film exposed from the plating resist, covering a portion of the plated-metal film with an etching resist, etching to reduce thickness of the plated-metal film exposed from the etching resist, removing the etching and plating resists, and forming a wiring having a pad for wire-bonding an electrode of an electronic component and a conductive circuit thinner than the pad by removing the metal film exposed after the plating resist is removed, a solder-resist layer on the surface of the board and wiring, an opening in the layer exposing the pad and a portion of the circuit contiguous to the pad, and a metal coating on the pad and portion of the circuit exposed through the opening.09-02-2010
20090071698CIRCUIT BOARD - A circuit board includes a capacitor having two pins disposed thereon. A line determined by the two pins of the capacitor is not perpendicular to any of main sides of the circuit board.03-19-2009
20090071699PACKAGING SUBSTRATE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - The present invention relates to a packaging substrate and a method for manufacturing the same. The packaging substrate comprises: a substrate body, wherein a surface thereof has a circuit layer comprising a plurality of circuits and a plurality of conductive pads, and the conductive pads are higher than the circuits; and an insulating protection layer disposed on the surface of the substrate body, wherein the insulating protection layer has a plurality of openings exposing the conductive pads, and the size of the openings is larger than or equal to that of the conductive pads. Accordingly, the packaging substrate structure of the present invention can be employed in a flip-chip packaging structure of fine-pitch.03-19-2009
20090107709Printed circuit board and manufacturing method thereof - A printed circuit board and a method of manufacturing the printed circuit board are disclosed. The printed circuit board may include: an insulation layer, a circuit pattern formed on an upper surface and a lower surface of the insulation layer, and a bump penetrating the insulation layer such that the circuit pattern is electrically connected, where an alloy layer, which is configured to increase contact between the circuit pattern and the bump, may be interposed between the bump and the circuit pattern.04-30-2009
20090188706Interconnection element for electric circuits - An interconnection element and method for making same is disclosed. The interconnection element may include a plurality of metal conductors, a plurality of solid metal bumps and a low melting point (LMP) metal layer. The solid metal bumps overly and project in a first direction away from respective ones of the conductors. Each bump has at least one edge bounding the bump in at least a second direction transverse to the first direction. The low melting point (LMP) metal layer has a first face joined to the respective ones of the conductors and bounded in the second direction by at least one edge and a second face joined to the bumps. The edges of the bumps and the LMP layer are aligned in the first direction, and the LMP metal layer has a melting temperature substantially lower than the conductors.07-30-2009
20100300735PRINTED CIRCUIT BOARD - A printed circuit board (PCB) includes a substrate, a plurality of copper foils formed on at least one surface of the substrate, a plurality of through holes extending through the substrate arranged in a rectangular array, and a plurality of blocking wall. Inner walls of the plurality of through holes are coated with the plurality of copper foils. The plurality of blocking walls project from the plurality of copper foils and surround the plurality of through holes to prevent solder from overflowing into the plurality of through holes when the PCB goes through a wave soldering procedure.12-02-2010
20100307802Wiring Member, Method of Manufacturing the Wiring Member and Electronic Element - A wiring member comprising a substrate, a copper wiring layer having an electrical resistivity of not larger than 4×1012-09-2010
20100300734Method and Apparatus for Building Multilayer Circuits - An method for building multi-layer circuits without post process via fills is disclosed. The method includes aligning a first contact on a first substrate layer with a second contact on a second substrate layer; and fusion bonding the first contact to the second contact. A multilayer circuit is also disclosed. The multilayer circuit includes a first substrate layer including a first contact. The multilayer circuit also includes a second substrate layer including a second contact that is fusion bonded to the first contact such that the first and second contacts are aligned.12-02-2010
20100300733Multilayer ceramic board and manufacturing method thereof - The present invention relates to a multilayer ceramic board and manufacturing method thereof. The multilayer ceramic board includes: a ceramic stacked structure in which multiple ceramic layers are stacked and interconnected to one another through vias; diffused reflection preventing patterns which expose the vias provided on each of the uppermost ceramic layer and the lowermost ceramic layer, and are disposed on each of a top surface and a bottom surface of the ceramic stacked structure; and contact pads which are electrically connected to the vias exposed by the diffused reflection preventing patterns.12-02-2010
20120241203CONDUCTOR PATTERN FORMING METHOD AND CONDUCTOR PATTERN - Provided is a base material having a conductor pattern formed thereon, which is obtained by forming, at a high productivity on a base material, a conductor pattern having a lower surface resistivity and a higher conductivity than in the related art. A receiving layer 09-27-2012
20100319968ALUMINUM CIRCUIT BOARD AND METHOD AND ELECTROPLATING SOLUTION FOR MAKING THE SAME - An aluminum circuit board includes a body unit and a conductive wiring unit. The body unit includes an aluminum substrate, an alumina layer formed on the aluminum substrate, and a medium deposit formed on the alumina layer and made of nickel, copper, cobalt, iron, silver, zinc, tin, molybdenum, or combinations thereof. The conductive wiring unit is formed on the body unit and is bonded to the medium deposit.12-23-2010
20110000703CARBON NANOTUBE SUPPORTING BODY AND PROCESS FOR PRODUCING THE CARBON NANOTUBE SUPPORTING BODY - Disclosed is a CNT nanodevice using small-diameter CNT having a monolayer, two-layer or other structure produced by virtue of strong CNT fastening treatment under high vacuum of an environment having a very low residual hydrocarbon content. Also disclosed are a CNT supporting body such as a CNT holding body necessary for the production process of the CNT nanodevice, and a process for producing the CNT supporting body. A supporting portion (01-06-2011
20110024166CONDUCTIVE PLATE - A conductive plate includes a substrate, an adhesive, and a conductive layer attached to the substrate through the adhesive. The conductive layer includes a plurality of conductive films, each of which includes a plurality of nanounits.02-03-2011
20110031002PRINTED WIRING BOARD HAVING METAL LAYERS PRODUCING EUTECTIC REACTION - A printed wiring board includes a Cu wiring pattern formed on a substrate. A first metal layer is formed on the Cu wiring pattern. A second metal layer is formed on the first metal layer. The first metal layer has a less reactivity with Cu than the second metal layer. The first metal layer and the second metal layer together cause an eutectic reaction.02-10-2011
20110031001COMPOSITE METAL FINE PARTICLE MATERIAL, METAL FILM AND MANUFACTURING METHOD OF THE METAL FILM, AND PRINTED WIRING BOARD AND CABLE - A composite metal fine particle material is provided, in which spherical silver nanoparticles synthesized from a silver compound, a solvent, a reducing agent, and a dispersant, and conductive fillers compose of non-spherical metal fine particles, are mixed. For example, the conductive fillers composed of the non-spherical metal fine particles are formed into slender columnar shapes, plate shapes, or ellipsoidal shapes.02-10-2011
20090065243PRINTED WIRING BOARD - A printed wiring board including solder pads excellent in frequency characteristic is provided. To do so, each solder pad 03-12-2009
20100132987METHOD FOR PRODUCING AN ELECTRICALLY CONDUCTIVE PATH ON A PLASTIC COMPONENT - In a method for producing an electrically conductive path on a plastic component, the plastic material of the plastic component is converted into a conductive substance using an energy application that is guided along the path.06-03-2010
20100132985Printed circuit board having metal bump and method of manufacring the same - The invention relates to a printed circuit board having metal bumps which are of even heights and are directly connected to a circuit pattern without using additional bump pads thus allowing an arrangement thereof at fine pitches.06-03-2010
20110017499FORMATION OF ALLOY LINER BY REACTION OF DIFFUSION BARRIER AND SEED LAYER FOR INTERCONNECT APPLICATION - An interconnect structure including an alloy liner positioned directly between a diffusion barrier and a Cu alloy seed layer as well as methods for forming such an interconnect structure are provided. The alloy liner of the present invention is formed by thermally reacting a previously deposited diffusion barrier metal alloy layer with an overlying Cu alloy seed layer. During the thermal reaction, the metal alloys from both the diffusion barrier and the Cu alloys seed layer react forming a metal alloy reaction product between the diffusion barrier and the Cu seed layer.01-27-2011
20110083885METAL WIRING STRUCTURE COMPRISING ELECTROLESS NICKEL PLATING LAYER AND METHOD OF FABRICATING THE SAME - Disclosed herein is a metal wiring structure, including: an electroless nickel plating layer formed on an insulation layer; and a surface treatment layer formed on the electroless nickel plating layer, and a method of fabricating the same. The metal wiring structure has excellent adhesivity without regard to the kind of substrate and can be easily fabricated.04-14-2011
20110061908PATTERN ELECTRODE MANUFACTURING METHOD AND PATTERN ELECTRODE - Disclosed is a method of manufacturing a pattern electrode which excels in electroconductivity, transparency and etching property and a pattern electrode, the method comprising a step of applying a metal particle containing solution onto a substrate to form a conductive layer, a step of pattern printing a metal particle removing solution on a portion of the conductive layer, which is to be removed, and a step of washing the resulting printed material, whereby the portion of the conductive layer on which the metal particle removing solution has been printed is removed to form a non-conductive portion.03-17-2011
20090032293Electroconductive Bonding Material and Electric/Electronic Device Using the Same - A conductive bonding material having an improved preservation stability, and hardens when desired, preferably immediately hardens at a low temperature is provided. In one invention, the conductive bonding material comprises a conductive particle ingredient, an epoxy resin ingredient, and a hardening agent ingredient for said epoxy resin and the hardening agent ingredient for said epoxy resin further comprise a reforming agent having a thiol group. In another invention, a conductive bonding material comprising an epoxy resin hardening ingredient, wherein said epoxy resin hardening ingredient contains a sulfur-containing compound having an end group which can coordinate with a surface of the metallic particles, and the sulfur-containing compound comes to perform as a hardening agent for the epoxy resin by dissociating from the surface of the metallic particles. The conductive bonding material may contain fragrance.02-05-2009
20100212940Soldermask-less printed wiring board - A printed wiring board has a non-conducting substrate with first and second major outboard surfaces; printed electrical conductors over at least the first major outboard surface; and an electrically insulating coating selectively disposed an over the printed electrical conductors such that the coating forms an outermost layer over the first major outboard surface. In various embodiments, the coating is screen printed dielectric carbon ink which is also disposed over keypads on the second major outboard surface. There is no need for a soldermask layer as the keypads and electrical conductors are protected by the carbon ink from oxidation due to humidity and from shorting against other components. A method for making the PWB is also detailed.08-26-2010
20110240348BACKDRILLING OF MULTILAYER PRINTED CIRCUIT BOARDS - Methods of backdrilling printed circuit boards (PCBs) to remove via stubs and related apparatuses. The method may include removing a via stub through a combination of backdrilling and chemical etching. The backdrilling may remove a masking layer from the via stub. Portions of an underlying layer may remain in the region of the via stub after the backdrilling is completed. The remaining portions of the underlying layer may be removed in a subsequent etching process thereby removing the via stub from the PCB. As the backdrilling step may be used for the limited purpose of removing the outer layer and portions of the underlying layer remaining in the via can be tolerated, the diameter of the backdrilling need not be as large as traditional backdrilling where all layers within the via must be ensured of being completely removed.10-06-2011
20110240349MULTIPLE DIE STRUCTURE AND METHOD OF FORMING A CONNECTION BETWEEN FIRST AND SECOND DIES IN SAME - A multiple die structure includes a first die (10-06-2011
20110240347CONTROLLED-IMPEDANCE ELECTRONIC BOARD VIAS, METHOD OF FORMING THE SAME, AND UNITIZED PCB INCORPORATING THE SAME - A shielded signal pass-through or via structure integral with an electronic circuit board is described. The structure includes a rigid inner generally cylindrical conductor; at least a semi-rigid intermediate annular dielectric surrounding the conductor; and a rigid outer annular conductor surrounding the dielectric material. Also described is an interconnect device that presents a contact array in a boss region of a unitary embossed printed circuit board (PCB) optionally equipped with one or more such shielded vias.10-06-2011
20110240346HEAT-RADIATING SUBSTRATE AND MANUFACTURING METHOD THEREOF - Disclosed herein is a heat-radiating substrate. The heat-radiating substrate includes: a metal core layer; a first insulating layer that is formed on one side or both sides of the metal core layer, includes a bather layer contacting with the metal core layer, first and second pores having different diameters, and a porous layer connected with the bather layer; a first circuit layer that is embedded in the first insulating layer, filled in the second pores of the porous layer, and connected to the sides of the second pores; and a second insulating layer that is formed on the porous layer of the first insulating layer.10-06-2011
20110240345PRINTED CIRCUIT BOARD AND METHOD FOR MAKING SAME - A printed circuit board (PCB) includes a base, copper foils, an insulating layer, and metallic foils. The copper foils are disposed on the base. The insulating layer is coated on the copper foils. The metallic foils are layered on the insulating layer. The copper foils and the metallic foils connect a first electrical element to a second electrical element.10-06-2011
20110083886METHOD OF MANUFACTURING ELECTRODE SUBSTRATE - Disclosed herein is a method of manufacturing an electrode substrate, by which a film-shape electrode substrate including a carbon nanotube layer, which does not include a dispersant, is not related to the kind of binder and is strongly attached to the electrode substrate, can be easily manufactured.04-14-2011
20110147057PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING PRINTED WIRING BOARD - A method for manufacturing a printed wiring board includes forming a pad for mounting an electronic component on a resin layer, forming a solder-resist layer on the resin layer and the pad, exposing an upper surface of the pad and a portion of a side wall of the pad from the solder-resist layer, and forming a metal layer on the upper surface of the pad and the portion of the side wall of the pad.06-23-2011
20110209904WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A wiring board includes a substrate having first and second surfaces and a first penetrating hole through the substrate, a first conductive circuit on the first surface of the substrate, a second conductive circuit on the second surface of the substrate, an interlayer insulation layer on the substrate and the first or second circuit, and a third conductive circuit on the interlayer layer. The interlayer layer has a via conductor in the interlayer layer and connecting the third circuit and the second conductor. The substrate has a first through-hole conductor connecting the first and second circuits and on the inner wall of the first hole, a filler filled inside the first conductor and forming a second penetrating hole, and a second through-hole conductor in the second hole. The via conductor is shifted from the center of the second conductor in the direction parallel to the first surface of the substrate.09-01-2011
20090218119METHOD OF MANUFACTURING MULTILAYER PRINTED WIRING BOARD - A method of manufacturing a multilayer printed wiring board includes forming a first interlaminar resin insulating layer, a first conductor circuit on the first interlaminar resin insulating layer, a second interlaminar resin insulating layer, opening portions in the second interlaminar resin insulating layer to expose a face of the first conductor circuit, an electroless plating film on the second interlaminar resin insulating layer and the exposed face, and a plating resist on the electroless plating film. The method further includes substituting the electroless plating film with a thin film conductor layer, having a lower ion tendency than the electroless plating film, and a metal of the exposed face, forming an electroplating film including the metal on a portion of the electroless plating film and the thin film conductor layer, stripping the plating resist, and removing the electroless plating film exposed by the stripping.09-03-2009
20100038121Metal Deposition - Systems and methods include depositing one or more materials on a voltage switchable dielectric material. In certain aspects, a voltage switchable dielectric material is disposed on a conductive backplane. In some embodiments, a voltage switchable dielectric material includes regions having different characteristic voltages associated with deposition thereon. Some embodiments include masking, and may include the use of a removable contact mask. Certain embodiments include electrografting. Some embodiments include an intermediate layer disposed between two layers.02-18-2010
20090032294CIRCUIT BOARD - Provided is a circuit board including: a circuit board body with at least one surface having a plurality of electrically connecting pads; an insulating protection layer formed on the circuit board body and formed with an opening corresponding in position to one of the electrically connecting pads, being larger than the electrically connecting pad, and not being in contact with the periphery of the electrically connecting pad; and a soldering material formed on, and confined to, the electrically connecting pad; thus allowing an electrically conductive element limited in the opening formed in the insulating protection layer to be fabricated from the soldering material by a reflow process with a view to forming a fine-pitch electrically connecting structure.02-05-2009
20100071940CONNECTING TERMINAL, SEMICONDUCTOR PACKAGE USING CONNECTING TERMINAL AND METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE - The connection reliability of connecting terminals with displacement gold plating films is improved by connecting terminals comprising a conductive layer, an electroless nickel plating film, a first palladium plating film which is a displacement or electroless palladium plating film with a purity of 99% by mass or greater, a second palladium plating film which is an electroless palladium plating film with a purity of at least 90% by mass and less than 99% by mass, and a displacement gold plating film, wherein the electroless nickel plating film, the first palladium plating film, the second palladium plating film and the displacement gold plating film are laminated in that order on one side of the conductive layer, and the displacement gold plating film is situated on the uppermost surface layer on the opposite side from the conductive layer.03-25-2010
20100059256CIRCUIT STRUCTURE OF CIRCUIT BOARD AND PROCESS FOR MANUFACTURING THE SAME - A circuit structure of a circuit board includes a dielectric layer, a number of first circuits, and a number of second circuits. The dielectric layer has a surface and an intaglio pattern. The first circuits are disposed on the surface of the dielectric layer. The second circuits are disposed in the intaglio pattern of the dielectric layer. Line widths of the second circuits are smaller than line widths of the first circuits, and a distance between every two of the adjacent second circuits is shorter than a distance between every two of the adjacent first circuits.03-11-2010
20120241202BUILD-UP PRINTED WIRING BOARD SUBSTRATE HAVING A CORE LAYER THAT IS PART OF A CIRCUIT - Integrated circuits and processes for manufacturing integrated circuits are described that use printed wiring board substrates having a core layer that is part of the circuit of the printed wiring board. In a number of embodiments, the core layer is constructed from a carbon composite. In several embodiments, techniques are described for increasing the integrity of core layers in designs calling for high density clearance hole drilling. One embodiment of the invention includes a core layer that includes electrically conductive material and at least one build-up wiring portion formed on an outer surface of the core layer. In addition, the build-up portion comprises at least one micro wiring layer including a circuit that is electrically connected to the electrically conductive material in the core layer via a plated through hole.09-27-2012
20110094777Multilayer Electrical Component, Coating Composition, and Method of Making Electrical Component - An electrical component including a substrate comprising an electroconductive filler in a first polymeric binder, and a coating layer adhered to at least a portion of the substrate surface, the coating layer comprising a nanostructured electroconductive particulate dispersed in a polymeric binder, such as an epoxy resin. A method of making the component also is described.04-28-2011
20110174525Method and Electronic Assembly to Attach a Component to a Substrate - A method and an electronic assembly for attaching a component to a substrate, or printed circuit board, is recited. The printed circuit board comprises a solder-nonwettable surface and a bond pad being formed of a solder-wettable surface. The printed circuit board defines a through hole extending through the printed circuit board and the bond pad. A plate lining a first portion of the through hole in the printed circuit board is formed of a solder-wettable material. Solder paste is applied to the bond pad and into the through hole. A component including a terminal overlies the bond pad in an arrangement. Reflowing the solder paste forms a solder fillet that bonds the terminal to the bond pad. The solder fillet extends within the through hole attaching the component to the printed circuit board.07-21-2011
20100230144DISK DRIVE SUSPENSION VIA FORMATION USING A TIE LAYER AND PRODUCT - A disk drive suspension interconnect, and method therefor. The interconnect has a metal grounding layer, a metal conductive layer and an insulative layer between the metal grounding layer and the conductive metal layer. A circuit component such as a slider is electrically connected to the conductive layer along a grounding path from the circuit component and the conductive layer to the metal grounding layer through an aperture in the insulative layer. For improved electrical connection a tie layer is provided through the insulative layer onto the grounding layer in bonding relation with the ground layer. A conductor is deposited onto both the conductive metal layer and the tie layer in conductive metal layer and tie layer bonding relation, and the circuit component is thus bonded to the grounding layer by the conductor.09-16-2010
20110100688Electro-Optical Device and Method of Manufacturing the Same - In a liquid crystal display device, gate lines and common lines are first concurrently formed, and after an interlayer film is formed, a pixel electrode, common electrodes, and source lines are formed at the same time. By this, a electrode pattern can be made simple and manufacturing steps are simplified. Further, wiring lines and electrode disposed in the layer closest to a liquid crystal layer are made the pixel electrode, common electrodes and source lines, and the shapes thereof are made simple.05-05-2011
20110073356DIGITAL MANUFACTURE OF AN ELECTRICAL CIRCUIT - The electrographic printing of one or more multi-channeled layers having a particular pattern by electrographic techniques that produces a specialty item electrographically. Such electrographic printing comprises the steps of forming a desired print image, electrographically, on a receiver member utilizing predetermined sized marking particles; and, where desired, forming one or more final multi-channeled layers utilizing marking particles of a predetermined size or size distribution.03-31-2011
20110247866CONDUCTIVE PASTE CONTAINING SILVER-DECORATED CARBON NANOTUBES - A conductive paste composition is provided. The conductive paste composition includes 20 to 70 weight % of silver nanoparticles having an average particle size of 1 nm to 250 nm based on a total weight of the conductive paste composition, and 0.01 to 2 weight % of silver-decorated carbon nanotubes based on the total weight of the conductive paste composition.10-13-2011
20110061906Printed circuit board and fabrication method thereof - A printed circuit board (PCB) and a fabrication method thereof are disclosed. The PCB includes: a dual-layered circuit pattern formed with a desired pattern on at least one of upper and lower surfaces of an insulation base member (i.e., an insulation substrate) and having metal layers each having a different thermal expansion coefficient; and an insulating layer formed on the insulation base member to cover the circuit pattern. Because the PCB includes an anti-warping unit, a processing rate and productivity can be improved.03-17-2011
20110061907Printed circuit board and method of manufacturing the same - A printed circuit board according to an aspect of the invention may include: a board portion having an electrode portion provided on a surface thereof; a solder resist layer provided on the surface of the board portion and having an opening therein to expose the electrode portion to the outside; and a bump layer having the same diameter as the opening and providing an electrical connection with an external chip component.03-17-2011
20110061909CIRCUIT MODULE AND METHOD OF MANUFACTURING THE SAME - Manufacturing method and circuit module, which comprises an insulator layer (03-17-2011
20120118618Printed circuit board and method for manufacturing the same - Disclosed herein are a printed circuit board and a method for manufacturing the same. The method for manufacturing a printed circuit board includes: (a) forming at least one plate through hole penetrating through an insulating layer; (b) forming pattern grooves for implementing inner layer circuits on both surfaces of the insulating layer; and (c) filling the plate through hole and the pattern grooves with a conductive material. The method for manufacturing a printed circuit board may provide the printed circuit board having excellent heat radiating characteristics and reduce process cost.05-17-2012
20120118620LEAD PIN FOR PRINTED CIRCUIT BOARD AND PRINTED CIRCUIT BOARD USING THE SAME - Disclosed herein are a lead pin for a printed circuit board and a printed circuit board using the same. The lead pin for a printed circuit board includes: a connection pin; and a pin head part formed at one end portion of the connection pin and including a protrusion, the diameter thereof being formed to be increasingly small based on a surface contacting the connection pin and the outer peripheral surface thereof being provided with a protrusion-shaped or depression-shaped band, whereby it forms a protrusion-shaped band or a depression-shaped band on the pin head part of the lead pin to increase a contacting area with the solder, thereby improving an adhesion between the lead pin and the printed circuit board.05-17-2012
20110048772CONDUCTING POLYMER INK - Disclosed are conductive polymer inks and methods for forming the inks. The disclosed inks include a dispersion of conductive core/shell nanoparticles. The core/shell nanoparticles include a polymeric core and a shell formed of a conducting polymer. The inks can include a dispersion of the core/shell nanoparticles in a liquid carrier, such as an alcohol. The disclosed inks can be formulated to high viscosities and can be utilized in high-speed printing processes including rotogravure and flexographic printing processes. Products encompassed by the disclosure include polymer devices such as sensors, OFETs, RFID tags, printed circuit board, electrochromic devices, non-volatile memory devices, photovoltaics, and the like.03-03-2011
20110048773PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A printed wiring board includes an interlayer resin insulation layer having a penetrating hole for a via conductor, a conductive circuit formed on one surface of the interlayer resin insulation layer, a via conductor formed in the penetrating hole and having a protruding portion protruding from the other surface of the interlayer resin insulation layer, and a surface-treatment coating formed on the surface of the protruding portion of the via conductor. The via conductor is connected to the conductive circuit and has a first conductive layer formed on the side wall of the penetrating hole and a plated layer filling the penetrating hole.03-03-2011
20110048774PLATING FILM, PRINTED WIRING BOARD, AND MODULE SUBSTRATE - The present invention provides a plating film 03-03-2011
20110024165SYSTEMS AND METHODS FOR COMPOSITE STRUCTURES WITH EMBEDDED INTERCONNECTS - A composite interconnect assembly includes a body structure formed from a composite material (e.g., a carbon graphite material) with one or more conductive traces embedded therein (e.g., a copper or copper alloy). One or more contact regions are provided such that the conductive traces are exposed and are configured to mechanically and electrically connect to one or more electronic components. The body structure may have a variety of shapes, including planar, cylindrical, conical, and the like.02-03-2011
20110147058ELECTRONIC DEVICE AND METHOD OF MANUFACTURING ELECTRONIC DEVICE - A multilayer wiring substrate has a configuration in which a first wiring layer including a plurality of first conductive members formed in a first insulating film, and formed to be exposed at a second surface side, and a second wiring layer including a plurality of second conductive members formed in a second insulating film which is formed on a first surface side on the side opposite to the second surface are laminated. The plurality of second conductive members is respectively connected directly to any of the plurality of first conductive members or connected through a different conductive material. The plurality of first conductive members is connected directly to any of the plurality of second conductive members or connected through a different conductive material, but includes dummy conductive members which do not form current pathways connecting with connected second conductive member.06-23-2011
20100263921CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - A circuit board includes: an insulating substrate; and a circuit formed on the insulating substrate. The circuit includes: a undercoat layer with a circuit pattern formed by irradiating a metal thin film covering a surface of the insulating substrate with a laser along an outer shape of the circuit so as to partly remove the metal thin film along the outer shape of the circuit; a Cu plating layer, a Ni plating layer and a Au plating layer formed by metal plating and sequentially provided on a surface of the undercoat layer. A first middle plating layer and a second middle plating layer are provided between the Ni plating layer and the Au plating layer. The first middle plating layer includes metal with a less noble standard electrode potential with respect to Au and is in contact with the Au plating layer. The second middle plating layer includes metal with a noble standard electrode potential with respect to the metal in the first middle plating layer and is in contact with the first middle plating layer.10-21-2010
20100059258Ferrite Mosaic and Magnetic Core Structure for Passive Substrate for Switched-Mode Power Supply Module - The present invention relates to switched-mode power supply module and discloses a ferrite mosaic and a magnetic core structure for passive substrate for switched-mode power supply module. The ferrite mosaic includes a supporting plate and numbers of ferrite units stuck on the supporting plate, with each ferrite unit being rectangular. Wherein the ferrite mosaic comprises air-gaps defined between the ferrite units and ferrite glue polymer composites cured in air-gaps, and the magnetic core structure is finished after cutting, laminating and assembling said ferrite mosaics.03-11-2010
20090242247Package substrate and die spacer layers having a ceramic backbone - A layer or layers for use in package substrates and die spacers are described. The layer or layers include a plurality of ceramic wells lying within a plane and separated by metallic vias. Recesses within the ceramic wells are occupied by a dielectric filler material.10-01-2009
20110042128CORELESS PACKAGING SUBSTRATE AND METHOD FOR FABRICATING THE SAME - A coreless packaging substrate includes: a substrate body including an auxiliary dielectric layer having opposing first and second surfaces, an inner wiring formed on the second surface, and a built-up structure formed on both the second surface of the auxiliary dielectric layer and the inner wiring; and a plurality of conductive bumps including metal pillars having opposing first and second ends and a solder layer formed on the first end, wherein the second ends of the metal pillars are disposed in the auxiliary dielectric layer and electrically connecting with the inner wiring, and the first ends of the metal pillars with the solder layer protrude from the first surface of the auxiliary dielectric layer, thereby achieving ultra-fine pitch and even-height conductive bumps. A method for fabricating the coreless packaging substrate as described above is further provided.02-24-2011
20090126979SEMICONDUCTOR PACKAGE CIRCUIT BOARD AND METHOD OF FORMING THE SAME - A semiconductor package circuit board has an indicator for specifying a location of a defective circuit board unit. The semiconductor package circuit board includes circuit board units arranged in an m-by-n matrix pattern. The indicator has marking areas arranged in an m-by-n matrix pattern so that the marking areas are marked in correspondence to locations of identified defective circuit board units of the circuit board units. An operator can readily put a defective mark on the indicator without any confusion. The operator or a sensor can readily recognize the defective mark. Since the indicator can be formed on the circuit board unit, the integration of the semiconductor package circuit board can be increased, and the productivity can be substantially improved. Furthermore, a pathway of the sensor can be reduced, and interferences that might occur if the sensor moves can be hindered.05-21-2009
20080314628METHOD OF FORMING METAL PATTERN, PATTERNED METAL STRUCTURE, AND THIN FILM TRANSISTOR-LIQUID CRYSTAL DISPLAYS USING THE SAME - Disclosed is a method of forming a metal pattern, the method comprising depositing a dielectric substrate on a supporting substrate; forming a latent mask pattern of a metal pattern on the dielectric substrate; etching the dielectric substrate exposed by the latent mask pattern; forming a seed layer on the supporting substrate by activating the supporting substrate; removing the latent mask pattern and the portion of the seed layer disposed on the latent mask pattern through a lift-off process; and plating a metal layer on the patterned seed layer.12-25-2008
20120199385PHENYLNAPHTHYLIMIDAZOLE COMPOUND AND USAGE OF THE SAME - A surface treating agent containing a novel phenylnaphthylimidazole compound represented by the following formula is brought into contact with the surface of copper or a copper alloy.08-09-2012
20080289863SURFACE FINISH STRUCTURE OF MULTI-LAYER SUBSTRATE AND MANUFACTURING METHOD THEREOF - A surface finish structure of multi-layer substrate and manufacturing method thereof. The surface finish structure of the present invention includes a bond pad layer, at least one cover metal layer and a solder mask. The cover metal layer covers the bond pad layer. The solder mask has a hole to expose the cover metal layer. The present invention can form the cover metal layer to cover the bond pad layer and then forms the solder mask. Thereafter, the hole is made to the solder mask at the position of the cover metal layer to expose thereof. Because the bond pad layer is embedded in a dielectric layer of the multi-layer substrate, adhesion intensity between the bond pad layer and the dielectric layer can be enhanced. Meanwhile, contact of the bond pad layer with the solder can be prevented with the cover metal layer.11-27-2008
20080264681Printed Wiring Board and Method for Manufacturing Printed Wiring Board - A composite layer composed of an Ni layer and a Pd layer is formed on a solder pad, and a solder on the composite layer is composed of a solder containing no lead. Because a Pd layer (palladium layer) reduces phenomenons such as repellency of the solder, adhesiveness with the solder can be enhanced. Because a Pd layer has a higher degree of rigidity than a gold layer, thermal stress is absorbed into the Pd layer and buffered so as to reduce the degree of transmission of stress to the solder bump, or to the solder layer, by thermal stress.10-30-2008
20080264682Substrate and negative imaging method for providing transparent conducting patterns - Provided are processes for making a transparent conducting pattern. The invention is also directed to electronic devices containing such transparent conducting patterns. Further provided is a substrate comprising a base film and a transparent conducting layer disposed on the base film; wherein the substrate has an OD of about 0.1 to 0.6 at 830 nm, and the transparent conducting layer comprises polyethylene dioxythiophene and has an OD of less than 0.1 in the range of 400 to 700 nm.10-30-2008
20090044971Printed Wiring Board, Process for Producing the Same and Usage of the Same - The printed wiring board includes an insulating base and a plurality of wirings formed on the surface of the insulating base, wherein the wiring circuit has a conductive undercoat layer formed on the surface of the insulating base, a Cu nodule layer formed on the upper surface of the undercoat layer, a cover plating layer formed on the upper surface of the Cu nodule layer and a first metal plating layer formed on the upper surface of the cover plating layer, and on the upper surface of the wiring circuit, a protruded and depressed surface attributable to protrusions and depressions of the upper surface of the Cu nodule layer is formed. The printed wiring board can be produced by depositing the above metal layers such as the Cu nodule layer with regulating a sidewall surface of a pattern formed from the photosensitive resin. Ruther conductive bonding is possible by the use of an adhesive only.02-19-2009
20110162876CURRENT SPREADING IN ORGANIC SUBSTRATES - Solutions for improving current spreading in organic substrates are disclosed. In one aspect, a packaging substrate is disclosed, the packaging substrate comprising: a substrate base having a first surface and a second surface; and a controlled collapse chip connect (C4) pad over a portion of the first surface, the C4 pad including: an electrolessly plated copper (Cu) layer over the first surface; an electrolytic nickel (Ni) portion over the first electrolytic Cu portion; and a first electrolytic Cu portion over the electrolytic Ni portion; wherein the electrolessly plated Cu layer has a portion extending in one direction away from the C4 pad.07-07-2011
20110253432Method and Apparatus for Providing Hermetic Electrical Feedthrough - A method and apparatus suitable for forming hermetic electrical feedthroughs in a ceramic sheet having a thickness of .ltoreq.40 mils. More particularly, the method yields an apparatus including a hermetic electrical feedthrough which is both biocompatible and electrochemically stable and suitable for implantation in a patient's body. The method involves: (a) providing an unfired, ceramic sheet having a thickness of .ltoreq.40 mils and preferably comprising .ltoreq.99% aluminum oxide; (b) forming multiple blind holes in said sheet; (c) inserting solid wires, preferably of platinum, in said holes; (d) firing the assembly of sheet and wires to a temperature sufficient to sinter the sheet material but insufficient to melt the wires; and (e) removing sufficient material from the sheet lower surface so that the lower ends of said wires are flush with the finished sheet lower surface.10-20-2011
20120199384CONDUCTION ELEMENT, MANUFACTURING METHOD THEREOF, WIRING ELEMENT, INFORMATION INPUT DEVICE, DISPLAY DEVICE, AND ELECTRONIC APPARATUS - A conduction element includes a substrate which has a first wave surface and a second wave surface, and a laminate film which is formed on the first wave surface and where two or more layers are laminated, where the laminate film forms a conduction pattern, and the first wave surface and the second wave surface satisfy a relationship below.08-09-2012
20110005817CAPACITOR-FORMING MATERIAL AND PRINTED WIRING BOARD PROVIDED WITH CAPACITOR - An object of the present invention is to provide a capacitor-forming material having a stable adhesion between a dielectric layer and an electrode-forming layer. To achieve the object, the capacitor-forming material in which an oxides dielectric layer is provided between a top-electrode-forming layer and a bottom-electrode-forming layer, wherein at least one of the top-electrode-forming layer and the bottom-electrode-forming layer has a two-layer construction constituted with a bulk-metal layer and a composite layer composed of metal and metal oxide which is made to contact with the oxides dielectric layer. In particular, it is preferable to employ a capacitor-forming material having the top-electrode-forming layer which has two-layer construction constituted with the bulk-metal layer and the composite layer composed of metal and metal oxide, and has a layer construction in which the bulk-metal layer and the composite layer composed of metal and metal oxide are stacked to make the composite layer composed of metal and metal oxide contact with the oxides dielectric layer.01-13-2011
20110162874SELF-ALIGNED COMPOSITE M-MOx/DIELECTRIC CAP FOR Cu INTERCONNECT STRUCTURES - An interconnect structure is provided that has improved electromigration resistance as well as methods of forming such an interconnect structure. The interconnect structure includes an interconnect dielectric material having a dielectric constant of about 4.0 or less. The interconnect dielectric material has at least one opening therein that is filled with a Cu-containing material. The Cu-containing material within the at least one opening has an exposed upper surface that is co-planar with an upper surface of the interconnect dielectric material. The interconnect structure further includes a composite M-MOx cap located at least on the upper surface of the Cu-containing material within the at least one opening. The composite M-MOx cap includes an upper region that is composed of the metal having a higher affinity for oxygen than copper and copper oxide and a lower region that is composed of a non-stoichiometric oxide of said metal. The interconnect structure further includes a dielectric cap located on at least an upper surface of the composite M-MOx cap.07-07-2011
20110162875SELECTIVE COPPER ENCAPSULATION LAYER DEPOSITION - A metal interconnect structure provides high adhesive strength between copper atoms in a copper-containing structure and a self-aligned copper encapsulation layer, which is selectively deposited only on exposed copper surfaces. A lower level metal interconnect structure comprises a first dielectric material layer and a copper-containing structure embedded in a lower metallic liner. After a planarization process that forms the copper-containing structure, a material that forms Cu—S bonds with exposed surfaces of the copper-containing structure is applied to the surface of the copper-containing structure. The material is selectively deposited only on exposed Cu surfaces, thereby forming a self-aligned copper encapsulation layer, and provides a high adhesion strength to the copper surface underneath. A dielectric cap layer and an upper level metal interconnect structure can be subsequently formed on the copper encapsulation layer.07-07-2011
20100319970PACKAGE SUBSTRATE HAVING EMBEDDED CAPACITOR - A package substrate having embedded capacitor is provided. The package substrate includes a core circuit board, at least one dielectric layer, at least one embedded capacitor, and at least one metal layer. The core circuit board has at least one wiring layer, and the core circuit board has at least one conductive through hole connected to the wiring layer. At least one dielectric layer covers the wiring layer, and the dielectric layer has at least one conductive through hole. At least one embedded capacitor is embedded in the dielectric layer. At least one metal layer covers the dielectric layer and connected to the embedded capacitor, wherein the metal layer is connected to the wiring layer through the conductive through hole.12-23-2010
20100319969LIGHTWEIGHT CIRCUIT BOARD WITH CONDUCTIVE CONSTRAINING CORES - Prepregs, laminates, printed wiring board structures and processes for constructing materials and printed wiring boards that enable the construction of printed wiring boards with improved thermal properties. In one embodiment, the prepregs include substrates impregnated with electrically and thermally conductive resins. In other embodiments, the prepregs have substrate materials that include carbon. In other embodiments, the prepregs include substrates impregnated with thermally conductive resins. In other embodiments, the printed wiring board structures include electrically and thermally conductive laminates that can act as ground and/or power planes.12-23-2010
20100319967INHIBITION OF COPPER DISSOLUTION FOR LEAD-FREE SOLDERING - A device fabrication method, according to which a tin-copper-alloy layer is formed adjacent to a copper-plated pad or pin that is used to electrically connect the device to external wiring. Advantageously, the tin-copper-alloy layer inhibits copper dissolution during a solder reflow process because that layer is substantially insoluble in liquid Sn—Ag—Cu (tin-silver-copper) solder alloys under typical solder reflow conditions and therefore shields the copper plating from direct physical contact with the liquefied solder.12-23-2010
20120145440Offset Electrode - An electrode including a non-conductive substrate having a top surface and at least one channel extending therethrough, an electrically conductive trace material positioned adjacent a portion of the top surface of the non-conductive substrate and extending through the channel, and adapted for electrically coupling to a power source, and a second electrically conductive material that is inert or more corrosion resistant than the trace material. The second material is positioned adjacent to and entirely covering a top surface of the trace material. The electrode further includes a conductive hydrogel laterally offset from the trace material, the hydrogel may be positioned adjacent to a portion of a top surface of the second electrically conductive material.06-14-2012
20110253430MICRO PIN HYBRID INTERCONNECT ARRAY AND METHOD OF MANUFACTURING SAME - A micro pin hybrid interconnect array includes a crystal anode array and a ceramic substrate. The array and substrate are joined together using an interconnect geometry having a large aspect ratio of height to width. The joint affixing the interconnect to the crystal anode array is devoid of solder.10-20-2011
20100282501PRINTED WIRING BOARD, METHOD FOR FORMING THE PRINTED WIRING BOARD, AND BOARD INTERCONNECTION STRUCTURE - A board interconnection structure having a first printed wiring board in which a first conductive circuit is arranged on a first insulating layer, the first conductive circuit having, on an end portion thereof, a first connection terminal in which an upper surface width is narrower than a bottom surface width; a second printed wiring board in which a second conductive layer having a second connection terminal is arranged on a second insulating layer; and a connection layer that forms fillets along longitudinal side surfaces of the first connection terminal, and interconnects the first connection terminal and the second connection terminal. The first connection terminal may have a projection portion.11-11-2010
20110108311MULTILAYER PRINTED WIRING BOARD - A multilayered printed circuit board including a substrate, a multilayered structure built thereon and having conductor circuits and interlaminar resin insulating layers in an alternate fashion, and one or more stack-via structures including via-holes stacked one another and electrically connected to the conductor circuits through the insulating layers. Each of the via-holes includes a land portion formed on a respective one of the insulating layers and a filled via structure portion filling an opening of the respective one of the insulating layers with a metal layer such that the via-holes are stacked one another immediately above the filled via structure portion of each via-hole, the via-holes include the outermost layer via-hole in the outermost layer of the insulating layers, and one or more via-holes have the land portion having the land diameter which is larger than the land diameter of the land portion of the outermost layer via-hole.05-12-2011
20110108309DIELECTRIC MATERIAL WITH NON-HALOGENATED CURING AGENT - Provided is a dielectric material having a non-halogenated diaminodiphenylsulfone curing agent.05-12-2011
20110114375WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - Adhesiveness between a wiring layer and a resin layer is improved by forming a nitrided resin layer by nitriding a surface of a substrate by plasma, and furthermore, thinly forming a copper nitride film prior to forming a copper film.05-19-2011
20110114373CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A circuit board includes a circuit substrate, a dielectric layer disposed on the circuit substrate and a patterned circuit structure. The dielectric layer covers a first surface and at least a first circuit of the circuit substrate. The dielectric layer has a second surface, at least a blind via, a second intaglio pattern and a third intaglio pattern connected to the blind via. The patterned circuit structure includes at least a second circuit disposed in the second intaglio pattern and third circuits disposed in the third intaglio pattern and the blind via. Each third circuit has a first conductive layer and a second conductive layer. The materials of the first conductive layer and the second circuit are the same. The line width of the second circuit is shorter than that of each third circuit. At least a third circuit is electrically connected to the first circuit of the circuit substrate.05-19-2011
20110132645GRANULAR VARISTOR AND APPLICATIONS FOR USE THEREOF - Embodiments described include a non-polymeric voltage switchable dielectric (VSD) material comprising substantially of a grain structure formed from only a single compound, processes for making same, and applications for using such non-polymeric VSD materials.06-09-2011
20110253431Printed circuit substrate and method of manufacturing the same - Disclosed herein are a printed circuit substrate and a method of manufacturing the same. The printed circuit substrate includes an insulating layer, and a circuit layer that includes a circuit pattern disposed on the insulating layer and a barrier layer that is disposed to cover at least one surface of the circuit pattern and suppresses electrochemical migration from the circuit pattern, thereby making it possible to achieve high-density and secure reliability, and the method of manufacturing the same.10-20-2011
20110168435PRINTED CIRCUIT BOARD - A printed circuit board includes, but is not limited to, a plurality of electrically conductive layers and a plurality of dielectric layers. Each dielectric layer is interposed between adjacent conductive layers to form a body of alternate conductive layers and dielectric layers. At least one of the electrically conductive layers protrudes beyond an end of the body.07-14-2011
20110067908METHOD FOR PRODUCING A PRINTED CIRCUIT BOARD AND USE AND PRINTED CIRCUIT BOARD - The invention relates to a method for fixing a component (03-24-2011
20120145439PRINTED CIRCUIT BOARD GROUNDING STRUCTURE FOR USE WITH COMMUNICATION APPARATUS - A printed circuit board grounding structure for use with a communication apparatus is configured for use with a printed circuit board to contact a grounded casing and thereby form a grounded circuit capable of electromagnetic wave shielding. The printed circuit board ground structure includes a copper conductive layer and a plurality of solder contacts. The copper conductive layer is circumferentially disposed along the periphery of the printed circuit board. The solder contacts are disposed on the copper conductive layer and used for electrically contacting with the casing. The printed circuit board grounding structure prevents deterioration of electromagnetic wave shielding despite oxidation of the copper conductive layer. The circumferentially-disposed copper conductive layer blocks electromagnetic wave generated from inside the printed circuit board, prevents leakage of the electromagnetic wave, and ultimately prevents the electromagnetic wave from interfering with other electronic apparatuses.06-14-2012
20090308645Printed circuit board and manufacturing method thereof - Disclosed are a printed circuit board and a manufacturing method thereof. The printed circuit board having a circuit pattern formed therein includes a substrate having a groove formed therein, the groove corresponding to the circuit pattern; a first circuit pattern formed inside the groove; and a second circuit pattern formed on the first circuit pattern, the second circuit pattern filling up the groove.12-17-2009
20090308647CIRCUIT BOARD WITH BURIED CONDUCTIVE TRACE FORMED THEREON AND METHOD FOR MANUFACTURING THE SAME - A circuit board with a buried conductive trace formed thereon according to the present invention is provided. A buried conductive trace layer is formed on the surface of a substrate and the pads and fingers of the conductive trace layer are heightened to facilitate the subsequent process of molding.12-17-2009
20080217046CIRCUIT BOARD SURFACE STRUCTURE AND FABRICATION METHOD THEREOF - A circuit board surface structure and a fabrication method thereof are proposed. The circuit board surface structure includes: a circuit board having a plurality of electrically connecting pads formed on at least one surface thereof; a first and a second insulating protective layers formed on the surface of the circuit board in sequence; first and a second openings respectively formed in the first and second insulating protective layers to expose the electrically connecting pads on the surface of the circuit board, wherein the first and second openings have narrow top and wide bottom and the diameter of the first openings is bigger than that of the second openings; and conductive elements formed in the first and second openings on surfaces of the electrically connecting pads. The present structure facilitates to strengthen the bonding between the conductive elements and the corresponding electrically connecting pads.09-11-2008
20110259629HIGH-DIELECTRIC SHEET, A PRINTED CIRCUIT BOARD HAVING THE HIGH-DIELECTRIC SHEET AND PRODUCTION METHODS THEREOF - A method of producing a capacitor for a printed circuit board includes producing high-dielectric sheets and selecting ones of the high-dielectric sheets, which are substantially free from a defect after the heat process. Each of the high-dielectric sheets is produced by providing a first electrode, forming a first sputter film on the first electrode, forming an intermediate layer on the first sputter film by calcining a sol-gel film, forming a second sputter film on the intermediate layer, and providing a second electrode on the second sputter film. The high-dielectric sheets are subjected to a heat process in which the high-dielectric sheets are subjected to a first temperature at least once and a second temperature higher than the first temperature at least once.10-27-2011
20110259627Circuit board with buried circuit pattern - A circuit board includes: an insulator having a groove; a circuit layer filling a portion of the groove; a solder pad on the circuit layer filling the remainder of the groove; and a circuit pattern electrically connected with the circuit layer, the circuit pattern buried in the insulator such that a portion of the circuit pattern is exposed at a surface of the insulator.10-27-2011
20110259628CURABLE RESIN COMPOSITION, CURED PRODUCT THEREOF, PRINTED WIRING BOARD, EPOXY RESIN, AND PROCESS FOR PRODUCING THE SAME - Provided is a curable resin composition that exhibits good heat resistance and low thermal expansion, and that realizes good solubility in solvents, a cured product thereof, a printed wiring board including the composition, a novel epoxy resin that imparts these properties, and a process for producing the same. A curable resin composition contains, as essential components, an epoxy resin (A) having, in its molecular structure, a glycidyloxy group and a skeleton in which a naphthalene structure and a cyclohexadienone structure are bonded to each other via methylene group(s); and a curing agent (B).10-27-2011
20110186338POLYMERIC POSITIVE TEMPERATURE COEFFICIENT LIQUID COMPOSITION - Liquid compositions contain electrically conductive particles and are printable. Following printing onto substrates, liquid compositions can be solidified to produce polymeric positive temperature coefficient materials. Polymeric thermoplastic positive temperature coefficient materials produced from such compositions. Processes include printing liquid compositions containing electrically conductive particles; and solidifying the liquid compositions to form polymeric positive temperature coefficient materials.08-04-2011
20110186337PRINTED CIRCUIT BOARD TO PREVENT ELECTROSTATIC DISCHARGE - A printed circuit board (PCB) can prevent electrostatic discharge. A number of vias are embedded in the PCB. A circular insulated member is disposed between each via and the number of vias. Each via includes a layer of metal coated on an inner wall of a corresponding insulated member and a through hole bounded by the corresponding insulated member. An acute angle between two tangents which pass through a point of intersection of two overlapped insulated members is greater than twenty degrees.08-04-2011
20100038120Layered ceramic electronic component and manufacturing method therefor - Provided is a manufacturing method of a layered ceramic electronic component capable of preventing appearance of a gap between a dielectric layer and a via electrode to achieve reliable conduction between the via electrode and an internal electrode and at the same time, capable of effectively preventing occurrence of structural defects in the dielectric layer and the like.02-18-2010
20100025092Core substrate and multilayer printed circuit board using paste bumps - A core substrate using paste bumps, the core substrate including a first paste bump board having a plurality of first paste bumps joined to a surface thereof; a second paste bump board having a plurality of second paste bumps facing the first paste bumps joined thereto; and an insulation element placed between the first paste bump board and the second paste bump board. In the core substrate, the first paste bumps and the second paste bumps are electrically interconnected.02-04-2010
20100025090PRINTED SUBSTRATE THROUGH WHICH VERY STRONG CURRENTS CAN PASS AND CORRESPONDING PRODUCTION METHOD - On a printed circuit or substrate board (02-04-2010
20100025089Circuit connection material, film-shaped circuit connection material using the same, circuit member connection structure, and manufacturing method thereof - A circuit member connection structure 02-04-2010
20110297428FLEXIBLE FLAT CABLE - The present invention provides a flexible flat cable which utilizes a first metal plate disposed on the lower surface of at least one end of a first metal shielding layer to achieve the functions of grounding and a reinforcement plate. Besides, since a metal connecting part can be plugged directly into an external socket without additional plastic connector, the manufacturing cost can be reduced.12-08-2011
20100139955CAPACITIVE TOUCH PANEL HAVING DUAL RESISTIVE LAYER - A patterned substrate for a touch screen sensor assembly that includes a plurality of electrodes that are formed from a first transparent conductive layer that has a first surface resistivity. The substrate also has a plurality of traces that may be used to couple the electrodes controller associated with the touch screen sensor assembly. The traces are formed from a second conductive layer that has a second surface resistivity that is less than the surface resistivity of the first conductive layer. The first and second conductive layers may be formed from indium tin oxide (ITO) having different surface resistivities. A second, similarly configured substrate can be provided and may be spaced apart from the first substrate by a dielectric spacer.06-10-2010
20110088933LOW DIELECTRIC LOSS WIRING BOARD, MULTILAYER WIRING BOARD, COPPER FOIL AND LAMINATE - A wiring board comprising a copper wiring, and an insulating layer which is a cured product of a resin composition containing a compound having a carbon-carbon unsaturated double bond as a cross-linking component, 04-21-2011
20110100686Printed circuit board including via pad with concavo-convex patterns and method of manufacturing the same - The present invention provides a printed circuit board including: a circuit pattern formed on a first insulating layer; a via pad disposed on the first insulating layer by being spaced apart from the circuit pattern, formed on a lower surface, where a via hole is formed, to have a cross section larger than that of the via hole, and having concavo-convex patterns; a second insulating layer formed on the via pad where the via hole is not formed and on the circuit pattern; and a copper foil layer formed on the second insulating layer and the via hole, and a method of manufacturing the same.05-05-2011
20120097436PRINTED CIRCUIT BOARD - A printed circuit board includes a layer. A layer of copper is covered on a surface of the layer. A through hole extends through the printed circuit board. A thermal engraving is defined in the surface of the layer, surrounding the through hole and without being covered by the layer of copper. The thermal engraving includes a first opening and a second opening. The first opening of the thermal engraving faces an output terminal of the power supply, and is non-contiguous with the second opening.04-26-2012
20090173524DUAL DENSITY PRINTED CIRCUIT BOARD ISOLATION PLANES AND METHOD OF MANUFACTURE THEREOF - A conductive power isolation plane for reducing interlayer cross-talk in a printed circuit board between conductive through vias on one side of the printed circuit board and conductive through vias on the other side of the printed circuit board and a method of manufacturing the same. In one embodiment, a printed circuit board includes a (1) conductive power isolation plane interlaminated within a plurality of insulating dielectric layers, (2) a first dielectric layer having a conductive through via laminated to a surface of the plurality of insulating dielectric layers, (3) a second dielectric layer having a conductive through via laminated to a surface of the plurality of insulating dielectric layers opposite the first dielectric layer and (4) a conductive ground via extending through the first dielectric layer, the plurality of insulating layers, including the conductive power isolation plane, and the second dielectric layer.07-09-2009
20100243300Soldering Method and Related Device for Improved Resistance to Brittle Fracture - A lead-free solder joint is formed between a tin-silver-copper solder alloy (SAC), SACX, or other commonly used Pb-free solder alloys, and a metallization layer of a substrate. Interaction of the SAC with the metallization layer forms an intermetallic compound (IMC) that binds the solder mass to the metallization layer. The IMC region is substantially free of any phosphorous-containing layers or regions.09-30-2010
20090308644Method for Manufacturing PCB and PCB Manufactured using the Same - The present invention relates to a Printed Circuit Board (PCB), and, more particularly, to a printed circuit board in which a special-purpose dot circuit and an external circuit are simultaneously formed in order to improve electrical efficiency, for example by decreasing impedance and electromagnetic waves, and a method of manufacturing the same. The method of manufacturing a printed circuit board, including a copper clad laminate that includes an insulated substrate and a piece of copper foil applied on one side of the insulated substrate, includes the steps of (a) adhering a dry film including a photosensitizing agent on the copper foil, and then exposing and developing the dry film, thereby forming a dry film opening for forming a dot circuit, (b) forming a copper plating layer by performing electroless or electrolytic plating, and then stripping the dry film other than the copper plating layer, thereby forming a dot circuit, which is a first metal layer, (c) further adhering a dry film including a photosensitizing agent on the dot circuit, and exposing and developing the dry film, thereby forming an external circuit, and (d) forming a second metal layer by performing electroless or electrolytic plating in order to improve the conductivity of the dot circuit and external circuit.12-17-2009
20110114374ELECTRODE PLATE WITH CONDUCTIVE COAT AND PANEL-TYPE INPUT DEVICE - An electrode plate with a conductive coat, which includes a substrate and a conductive coat provided on a surface of the substrate. The conductive coat includes a first conductive member laminated on the surface of the substrate, the first conductive member being formed from a conducting polymer; and a second conductive member placed on a surface of the first conductive member in a distributed manner, the second conductive member being formed from an inorganic conductive material. An electric conductivity of the inorganic conductive material forming the second conductive member is higher than an electric conductivity of the conducting polymer forming the first conductive member.05-19-2011
20120305300METHODS FOR MANUFACTURING AN ELECTRIC CONTACT PAD AND ELECTRIC CONTACT - A method for manufacturing an electrical contact pad, including a pad mounting and at least one contact layer, and a method for manufacturing an electrical contact, including a contact mounting and at least one contact layer are described. The methods include a step of depositing, via cold gas dynamic spraying, a first powder onto the pad or contact mounting so as to form the contact layer, the first powder containing at least particles including grains made of at least one refractive material, the grains being built into a matrix made of conductive metal selected from among silver or copper. The pads and the electrical contacts obtained in the respective manufacturing methods are also described.12-06-2012
20120305299PRINTED CIRCUIT BOARD WITH REFERENCE LAYER HOLE - An exemplary PCB defines a circular first via and includes a first signal layer, a second signal layer, a first reference layer between the first and second signal layer, and a signal transmission line having a first portion on the first signal layer and a second portion on the second signal layer. The first signal layer has a circular first weld pad coaxial with the first via and electrically connected to the first portion, the second layer has a circular second weld pad coaxial with the first via and electrically connected to the second portion. The first weld pad is electrically connected to the second weld pad through the first via, the reference layer defines a first through hole coaxial with the first via, the radius of the first via is R1, the radius of the first through hole is R2, R2=R1+d1, 1.5 mil≦d1≦4 mil.12-06-2012
20120305298BUMP WITH NANOLAMINATED STRUCTURE, PACKAGE STRUCTURE OF THE SAME, AND METHOD OF PREPARING THE SAME - A bump with nanolaminated structure is provided. The bump with nanolaminated structure includes a bump, a nanolaminated structure and an organic layer. The nanolaminated structure is located on the bump. The organic layer is located between the bump and the nanolaminated structure. The organic molecular of the organic layer includes two terminal function groups, wherein a first terminal function group is bonded with a first metal atom of the bump and a second terminal function group is bonded with a second metal atom of the nanolaminated structure.12-06-2012
20120037408METHOD OF REPAIRING PROBE BOARD AND PROBE BOARD USING THE SAME - There is provided a method of repairing a probe board, the method including: preparing a plurality of first via electrodes filled with a first filling material in a board body formed as a ceramic sintered body; forming a via hole for an open via electrode among the plurality of first via electrodes; filling the via hole with a second filling material having a lower sintering temperature than that of the first filling material; and forming a second via electrode by sintering the second filling material. The open via repair according to the present invention improves the manufacturing yield of the board and reduces the manufacturing costs thereof.02-16-2012
20120037409METHOD OF MANUFACTURING MULTILAYER PRINTED WIRING BOARD AND MULTILAYER WIRING BOARD OBTAINED THEREBY - In a method of manufacturing a multilayer board, including: a drilling step for forming a via hole through a pre-preg by laser beam machining, a step of filling the via hole with conductive paste containing a resin component and metal powder, and a step of arranging copper layers or copper layer portions of patterned boards on and under the filled conductive paste and pressing the same, a multilayer printed wiring board superior in conductivity and long-term stability is obtained by using alloying paste as the conductive paste in which at least part of the metal powder is melted and the metal powders adjacent to each other are alloyed, using a pre-preg having a ratio A/B of at least 10 before subjected to preheating, where A is a storage modulus at an inflection point where the storage modulus changes from increasing to decreasing and B is a storage modulus at an inflection point where the storage modulus changes from decreasing to increasing in a temperature profile rising from 60° C. to 200° C., and preheating the pre-preg before the drilling step to reduce the ratio A/B to below 10.02-16-2012
20100132986Method for preparing a conductive feature on a substrate - The invention provides method for preparing a conductive device comprising the steps of: (a) providing a non-conductive substrate layer; (b) modifying the surface of the non-conductive substrate layer by means of a laser beam treatment; (c) applying a pattern of an ink on a surface of the substrate layer, which ink comprises a first metal; (d) depositing a second metal on the ink pattern obtained in step (c); and (e) applying a third metal on the second metal by means of electrodeposition. The invention further provides a conductive device obtainable by said method.06-03-2010
20110108310TWO-LAYERED LAMINATE HAVING METAL FOIL CLADDED ON ITS ONE SURFACE, METHOD FOR PRODUCTION OF THE LAMINATE, SINGLE-SIDED PRINTED WIRING BOARD, AND METHOD FOR PRODUCTION OF THE WIRING BOARD - Provided are a metal foil single-clad two-ply laminate which comprises two pairs of structures each comprising one prepreg or a laminate of two or more prepregs cladded with a metal foil on one surface thereof, wherein the two pairs of structures are laminated on each other through thermal compression via a release material put therebetween so that each prepreg faces inward, and wherein the release material is a film of a resin material or the like and its thickness is from 10 to 200 μm, and the thermal shrinkage of the release material at the temperature of the thermal compression treatment is at most 1.5%; and a method for producing the laminate. Also disclosed are a single-sided printed wiring board and its production method using the metal foil single-clad two-ply laminate.05-12-2011
20090229867METHOD FOR MANUFACTURING A PRINTED CIRCUIT BOARD ELEMENT AS WELL AS A PRINTED CIRCUIT BOARD ELEMENT - A circuit board element and production thereof are disclosed, whereby a noble metal is applied to a structured conductor layer on a circuit board substrate, comprising said conductor layer. The conductor layer is roughened on the surface, preferably after the structuring thereof and the noble metal applied as a layer, essentially on all of the structured roughened conductor layer, whereupon the noble metal layer surface is given a corresponding roughness.09-17-2009
20110315435ACID ANHYDRIDE CURABLE THERMOSETTING RESIN COMPOSITION - The present invention provides a resin composition suitable for printed circuit boards, the composition includes one epoxy resin or the mixture thereof, curing agent, promoting agents and additives, wherein the ratio of curing agent to epoxy resin is 1.55˜2.5, in which epoxy resin consists of at least one of phenol-formaldehyde multi-functional epoxy resin; curing agent comprises at least one of styrene-maleic anhydride copolymer. After hardening, this resin composition has excellent electrical properties, high glass transition temperature and excellent heat-resistant properties, applicable to the lead-free printed circuit board manufacturing process, and in the field of the high-frequency and packaging-board containing printed circuit boards.12-29-2011
20110315436Metal ink composition and method for forming the metal line using the same, and conductive pattern formed by using the metal ink composition - The present invention provides a metal ink composition, which includes 20 to 80 parts by weight of cupper nano-particle; 10 to 70 parts by weight of non-aqueous organic solvent; and 2 to 20 parts by weight of additive used for adjustment of the dry speed of coated metal ink when metal lines are formed.12-29-2011
20120043121PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board includes: an insulating layer; a first circuit layer including a first metal layer and a first plating layer provided on an outer side of the first metal layer and embedded in one surface of the insulating layer; a second circuit layer including a second metal layer and a second plating layer provided on an outer side of the second metal layer and embedded in the other surface of the insulating layer; and a bump interconnecting the first circuit layer and the second circuit layer while penetrating through the insulating layer. The bump is used, such that there is no need to perform hole plating. Therefore, an increase in the surface plating thickness due to the hole plating is previously prevented.02-23-2012
20120043120Dual-Layer Method of Fabricating Ultracapacitor Current Collectors - A method of making a multi-layer current collector comprises forming a first layer from a first formulation over each major surface of a current collector substrate, and forming a second layer from a second formulation over each of the first layers, wherein one of the first formulation and second formulation is a graphite formulation and the other of the first formulation and second formulation is a carbon black formulation.02-23-2012
20120000699CIRCUIT MODULE - A circuit module includes: a circuit board having a first surface and a second surface opposite to the first surface; two or more electronic components mounted on the first surface; a molding resin layer which seals the first surface and the electronic components; and a conductive resin layer formed by a conductive resin on the molding resin layer. A slit penetrating the molding resin layer and reaching the first surface is formed between the two electronic components, and the conductive resin is filled inside the slit.01-05-2012
20110155432METALLIC COPPER DISPERSION, PROCESS FOR PRODUCING THE METALLIC COPPER DISPERSION, ELECTRODE, WIRING PATTERN, AND COATING FILM FORMED USING THE METALLIC COPPER DISPERSION, DECORATIVE ARTICLE AND ANTIMICROBIAL ARTICLE WITH THE COATING FILM FORMED THEREON, AND PROCESSES FOR PRODUCING THE DECORATIVE ARTICLE AND THE ANTIMICROBIAL ARTICLE - Disclosed is a dispersion comprising at least metallic copper particles with gelatin provided on the surface thereof, a polymeric dispersant, and an organic solvent. The dispersion is produced by reducing copper oxide in an aqueous solvent in the presence of gelatin having an amine number and an acid number such that the difference therebetween (amine number−acid number) is 0 or less, then subjecting the reaction solution to solid-liquid separation, and then mixing the resultant metallic copper particles with gelatin provided on the surface thereof and a polymeric dispersant having an amine number and an acid number such that the difference therebetween (amine number−acid number) is 0 to 50, into an organic solvent. The dispersion can maintain dispersion stability of the metallic copper particles for a long period of time, is suitable for inkjet printing and spray coating and can be used in the formation of microelectrodes and circuit wiring patterns, for example, in printed wiring boards, and design and decoration applications utilizing a metallic tone of the coating film.06-30-2011
20110155431MIXED-METAL SYSTEM CONDUCTORS FOR LTCC (LOW-TEMPERATURE CO-FIRED CERAMIC) - A composition for forming transition vias and transition line conductors is disclosed for minimizing interface effects at electrical connections between dissimilar metal compositions. The composition has (a) inorganic components selected from the group consisting of (i) 20-45 wt % gold and 80-55 wt % silver and (ii) 100 wt % silver-gold solid solution alloys, and (b) an organic medium. The composition may also contain (c) 1-5 wt %, based upon the weight of the composition, of oxides or mixed oxides of metals selected from the group consisting of Cu, Co, Mg and Al and/or high viscosity glasses mainly containing refractory oxides. The composition may be used as a multi-layer composition in a via fill. Multi-layer circuits such as LTCC circuits and devices may also be formed using the composition for forming transition vias and transition line conductors.06-30-2011
20110155430ANISOTROPIC CONDUCTIVE ADHESIVE COMPOSITE AND FILM, AND CIRCUIT CONNECTING STRUCTURE INCLUDING THE SAME - An anisotropic conductive adhesive composite and film includes a binder and conductive particles dispersed in the binder. The conductive particles include a copper core particle and a metal coating layer coated on a surface of the corresponding copper core particle.06-30-2011
20110155429Carrier substrate, fabrication method thereof, printed circuit board using the same, and fabrication method thereof - Disclosed are a carrier substrate including an insulating base material with a copper foil layer formed on at least one surface thereof, a metal layer formed on the cooper layer and having a length shorter than that of the copper foil layer, and an insulating layer formed on the metal layer, a fabrication method thereof, a printed circuit board (PCB) using the same, and a fabrication method thereof. Because there is no land at the via and core in the substrate, because a circuit pattern connected with the via can be formed to be finer, so the circuit pattern can be highly integrated and the substrate can become thinner. Thus, a printed circuit board (PCB) having a smaller size and reduced number of layers can be fabricated.06-30-2011
20110155428CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - A circuit board includes a circuit substrate, a dielectric layer, and a patterned circuit structure. The dielectric layer covers a first surface and at least a first circuit of the circuit substrate. The dielectric layer has a second surface, at least a blind via extending from the second surface to the first circuit, a first intaglio pattern, and a second intaglio pattern. The patterned circuit structure includes at least a second circuit and a plurality of third circuits. The second circuit is disposed in the first intaglio pattern. The third circuits are disposed in the second intaglio pattern and the blind via. Each third circuit has a first conductive layer, a second conductive layer, and a barrier layer. The first conductive layer is located between the barrier layer and the second intaglio pattern and between the barrier layer and the blind via. The second conductive layer covers the barrier layer.06-30-2011
20110155427CIRCUIT SUBSTRATE AND MANUFACTURING METHOD THEREOF - A manufacturing method of a circuit substrate includes the following steps. A dielectric layer is formed on at least one surface of a substrate. An insulating layer is formed on the dielectric layer. A portion of the insulating layer and a portion of the dielectric layer are removed, so as to form at least one blind via in the dielectric layer and the insulating layer. An electroless plating layer is formed on the sidewall of the blind via and a remaining portion of the insulating layer, wherein the binding strength between the insulating layer and the electroless plating layer is greater than that between the dielectric layer and the electroless plating layer. A patterned conductive layer is plated to cover the electroless plating layer.06-30-2011
20120061130CONDUCTIVE SUBSTRATE - Provided is a conductive substrate which is prepared by forming a pattern-shaped metal fine particle sintered film such as a copper wiring and the like on a base material of polyimide and the like and which has a high adhesive property with the base material and is provided with an excellent conductivity.03-15-2012
20120006585TOUCH PANEL - A touch panel includes first and second substrates, and first insulating layer disposed therebetween. The first substrate has, on its bottom surface, a first conductive layer having opposing first and second sides; a first electrode along the first side; and a second electrode along the second side. The second substrate has, on its top surface, a second conductive layer facing the first conductive layer with a predetermined space and having third and fourth sides orthogonal to the first and second sides: a third electrode along the third side; and a fourth electrode along the fourth side. The first insulating layer is frame-like and coats at least part of the first and second electrodes. The first and second electrodes and the first insulating layer together form a decoration part having a color tone to prevent the third and fourth electrodes from being visible when viewed from the first substrate side.01-12-2012
20120006586SUSPENSION SUBSTRATE, SUSPENSION, HEAD SUSPENSION, AND HARD DISK DRIVE - A suspension substrate according to the present invention includes an insulating layer and a metallic support layer provided on the actuator element's side of the insulating layer. On the other side of the insulating layer, a wiring layer is provided. This wiring layer includes a plurality of wirings and a wiring connection section that can be electrically connected with the actuator element via a conductive adhesive. The outer periphery of the metallic support layer in a connection structure region is positioned outside relative to the outer periphery of the insulating layer and the outer periphery of the wiring connection section of the wiring layer.01-12-2012
20120006587MULTILAYERED PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a multilayered printed circuit board including forming a first insulating resin substrate having a metal layer substantially corresponding to dimensions of a semiconductor device, forming a second insulating resin substrate, forming a recess extending to the metal layer of the first insulating resin substrate such that a surface of the metal layer is exposed, accommodating the semiconductor device in the recess such that the semiconductor device is mounted on the surface of the metal layer, and forming a resin insulating layer on the first insulating resin substrate such that the semiconductor device accommodated in the recess is covered.01-12-2012
20120006584WIRING BOARD AND LIQUID CRYSTAL DISPLAY DEVICE - A wiring board of the present invention (01-12-2012
20120111614Integrated composite structure and electrical circuit utilizing carbon fiber as structural materials and as electric conductor - A multifunctional paradigm is disclosed of “Strength Power to Weight”. Carbon tow is measured in individual fiber count per cross section. In terms of electrical conductivity, the individual fiber count total is analogous to a cross sectional wire gauge for corresponding metal (i.e. gold, copper, aluminum, silver, etc.). Tow segments are constructed/assembled/situated as being part of an electric circuit as well as being part of a laminated composite structure. For the electrical circuit, necessary electrical components are fixed to the carbon tow conductor using any of “soldering” (adhesive), “welding” (cohesion), or held in contact with mechanical force. The circuit is wetted out, allowed to cure (either before or along with the rest of the background laminate), and ultimately becomes a heterogeneous extremely light solid that conducts electrical power and provides additional structure to the composite as well.05-10-2012
20120111615FUNCTIONAL DEVICE, METHOD OF MANUFACTURING THE FUNCTIONAL DEVICE, PHYSICAL QUANTITY SENSOR, AND ELECTRONIC APPARATUS - A functional device according to an embodiment of the invention includes: an insulating substrate; a movable section; movable electrode fingers provided in the movable section; and fixed electrode fingers provided on the insulating substrate and arranged to be opposed to the movable electrode fingers. The fixed electrode fingers include: first fixed electrode fingers arranged on one side of the movable electrode fingers; and second fixed electrode fingers arranged on the other side of the movable electrode fingers. The first fixed electrode fingers and the second fixed electrode fingers are arranged to be spaced apart from each other.05-10-2012
20120205146HEAT-RESISTANT COPPER FOIL AND METHOD OF PRODUCING THE SAME, CIRCUIT BOARD, AND COPPER-CLAD LAMINATE AND METHOD OF PRODUCING THE SAME - Disclosed is a copper foil which has excellent high frequency characteristics and heat resistance, while achieving high heat-resistant adhesion to a resin substrate at the same time. Specifically disclosed is a heat-resistant copper foil which has a configuration wherein a first roughened surface layer which has been treated by a first roughening treatment by copper metal, a second roughened surface layer which has been treated by a second roughening treatment by copper metal, and a third treated surface layer which has been treated by a third treatment process by zinc metal are sequentially provided on one surface of an untreated copper foil. Also specifically disclosed are: a circuit board which is obtained by laminating the heat-resistant copper foil on a flexible resin substrate or a rigid resin substrate; and a method for producing a copper-clad laminate wherein the heat-resistant copper foil and a heat-resistant resin substrate are thermally pressure-bonded and the roughened copper metal and the third treated surface layer of the zinc metal are alloyed.08-16-2012
20120012373Submount and Method of Manufacturing the Same - A submount with an electrode layer having excellent wettability in soldering and method of manufacturing the same are disclosed. A submount (01-19-2012
20120012372Method and Structure to Improve the Conductivity of Narrow Copper Filled Vias - Techniques for improving the conductivity of copper (Cu)-filled vias are provided. In one aspect, a method of fabricating a Cu-filled via is provided. The method includes the following steps. A via is etched in a dielectric. The via is lined with a diffusion barrier. A thin ruthenium (Ru) layer is conformally deposited onto the diffusion barrier. A thin seed Cu layer is deposited on the Ru layer. A first anneal is performed to increase a grain size of the seed Cu layer. The via is filled with additional Cu. A second anneal is performed to increase the grain size of the additional Cu.01-19-2012
20100089626COMPOSITE, PREPREG, LAMINATED PLATE CLAD WITH METAL FOIL, MATERIAL FOR CONNECTING CIRCUIT BOARD, AND MULTILAYER PRINTED WIRING BOARD AND METHOD FOR MANUFACTURE THEREOF - It is an object of the invention to provide a composite with sufficiently reliable bonding and adequately minimized generation of fluff from flaking resin dust and fibers. This object is achieved by the composite (04-15-2010
20120247818PRINTED WIRING BOARD - A printed wiring board includes a core substrate, a first conductive layer on a first surface of the substrate, a second conductive layer on a second surface of the substrate, and a through-hole conductor connecting the first and second conductive layers. The substrate has an insulation structure and a metal layer, the metal layer has opening through which the conductor passes and has side wall recessed into the metal layer and forming the opening, the structure has first resin layer on one side of the metal layer, second resin layer on the opposite side and filler filling the opening, the conductor has first portion in the first layer and second portion in the second layer, the first and second portions are connected in the filler, the first portion is tapered from the first toward second conductive layers, and the second portion is tapered from the second toward first conductive layers.10-04-2012
20120061131Encapsulation Substrate for Organic Light Emitting Diode Display and Method of Manufacturing the Encapsulation Substrate - A method of manufacturing an encapsulation substrate for an organic light emitting diode display, includes fabricating a composite panel by forming an uncured carbon fiber resin portion having a plate shape and including an upper surface and a lower surface and forming an uncured insulating resin portion arranged to surround edges of the carbon fiber resin portion, the uncured insulating resin portion being perforated by a plurality of penetration holes, inserting a plurality of conductive components into corresponding ones of the plurality of penetration holes, covering upper and lower surfaces of the composite panel with metal films and bonding the metal films to the composite panel while simultaneously curing the carbon fiber resin and the insulating resin portion by applying heat and pressure to the composite panel. Therefore, fabrication processes of the encapsulation substrate are simple, and fabrication costs are reduced.03-15-2012
20120061129CIRCUIT BOARD STRUCTURE WITH LOW CAPACITANCE - A circuit board structure, comprising: a first metal layer, including at least one cavity; and a plurality of first pads, for connecting at least one differential signal transmission line; wherein at least part of a vertical projection of the first pad, which is projected on the first metal layer, is overlapped with the cavity.03-15-2012
20120152599PRINTED WIRING BOARD, BUILD-UP MULTI-LAYER BOARD, AND PRODUCTION METHOD THEREFOR - A multi-layer printed-wiring-board is used in densely packaging electronic components such as semiconductors having improved function, and a production method therefor, and more specifically it achieves a multi-layer printed-wiring-board having excellent copper-foil-peel-strength and high connection-reliability in which occurrence of structural defects such as delamination (interlayer peeling) is prevented, and a production method therefor. Because of thinning of the printed-wiring-board or diversification of insulating layers constituting the printed-wiring-board, peeling such as delamination may occur between the insulating layers or in an interface between the insulating layer and the plated conductor. By providing pores in substantially the same plane as wiring patterns in the printed-wiring-board including insulating layers, wiring pattern layers made of copper foil alternately laminated on the insulating layers, and pores provided between the wiring patterns, a printed-wiring-board having high connection reliability free from delamination or cracks during heating or in heat cycle conditions.06-21-2012
20120152598WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - Disclosed is a method for manufacturing a wiring board including a conductor layer, a solder resist layer laminated on the conductor layer, and a conductor post to be electrically connected to a conductor layer which is disposed in a lower portion of a through-hole provided in the solder resist layer, the method including a through-hole boring process of boring the through-hole in the solder resist layer containing a thermosetting resin to expose the conductor layer within the through-hole; a first conductor part forming process of forming a first conductor part composed mainly of copper within the through-hole; and a second conductor part forming process of forming a second conductor part composed mainly of tin, copper, or a solder on the first conductor part, in this order.06-21-2012
20120152597WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A wiring board including a conductor post corresponding to high-density packaging is provided. The wiring board may comprise a conductor layer, a solder resist layer laminated on the conductor layer, and a conductor post that is electrically connected to a conductor layer which is disposed in a lower portion of a through-hole provided in the solder resist layer, wherein the solder resist layer comprises a thermosetting resin; the conductor post comprises tin, copper, or a solder; the conductor post includes a lower conductor post, which is located within the through-hole and includes an external side surface and a lower end surface, and an upper conductor post, which is located above the lower conductor post and is projected outside the solder resist layer; and at least a part of a lower end surface of the upper conductor post is brought into intimate contact with an outer surface of the solder resist layer.06-21-2012
20110073357ELECTRONIC DEVICE AND METHOD OF MANUFACTURING AN ELECTRONIC DEVICE - Electronic device comprising an integrated circuit (03-31-2011
20120152596WIRING BOARD - A wiring board including a conductor post corresponding to high-density packaging is provided. The wiring board may include a conductor layer, a solder resist layer laminated thereon, and a conductor post provided at least within the through-hole and that is electrically connected to a conductor layer which is disposed in a lower portion of a through-hole provided in the layer, wherein the solder resist layer comprises a thermosetting resin; the conductor post comprises tin, copper, or a solder and includes a lower conductor post located within the through-hole and an upper conductor post located above the lower conductor post and projected outside the layer; the lower conductor post includes an external alloy layer disposed on an external side surface thereof; and the conductor post is brought into intimate contact with an internal side surface of the through-hole via the external alloy layer.06-21-2012
20100096172Wiring structure and method for fabricating the same - A wiring structure has a silicon layer, a backing layer provided on the silicon layer, the backing layer comprising a copper alloy containing a nickel, and a copper layer provided on the backing layer, and a diffusion barrier layer having an electrical conductivity, the diffusion barrier layer being provided at a region including an interface between the silicon layer and the backing layer, in which a nickel in the diffusion barrier layer is enriched compared with the backing layer.04-22-2010
20110088935CONDUCTIVE PARTICLE, ANISOTROPIC CONDUCTIVE FILM, JOINED STRUCTURE, AND JOINING METHOD - The present invention aims to provide conductive particles which can reduce the stress while maintaining high hardness (hardly causing cracks even in a state of being crushed in connection process) by improving rolling properties and can ensure adequate conductive reliability not only with respect to ITO substrates, but also with respect to IZO substrates, an anisotropic conductive film provided with the conductive particles, a joined structure provided with the anisotropic conductive film, and a joining method using the anisotropic conductive film. The conductive particles of the present invention include polymer fine particles, and a conductive layer formed on surfaces of the polymer fine particles, wherein an outermost surface shell of the conductive layer is a nickel-palladium alloy layer.04-21-2011
20110088934METAL PATTERN FORMING METHOD, METAL PATTERN OBTAINED BY THE SAME, PRINTED WIRING BOARD, CONDUCTIVE FILM FORMING METHOD, AND CONDUCTIVE FILM OBTAINED BY THE SAME - The present invention provides a metal pattern formed on a substrate. The metal pattern is constructed in (I) forming on a substrate a polymer layer in which a polymer having a functional group that interacts with an electroless plating catalyst or a precursor thereof is chemically bonded directly to the substrate in a pattern form, (II) adding the electroless plating catalyst or precursor thereof to the polymer layer, and (III) forming a metal layer in the pattern form by electroless plating.04-21-2011
20110088932WIRING CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - A wiring circuit board that suppresses the softening phenomenon of circuit interconnect lines with time and that maintains a high tensile strength over an extended period of time, and a method of manufacturing the same are provided. The circuit interconnect lines formed on an insulation layer for the wiring circuit board are made of a metal coating material having a metal composed principally of copper and containing 800 to 3000 ppm of bismuth.04-21-2011
20110088931Multilayer Coatings and Coated Articles - Multilayer coatings comprising at least two layers wherein at least one layer comprises a composition comprising graphene sheets and at least one binder and wherein at least two layers have different compositions.04-21-2011
20100139954Self-Assembled Electrical Contacts - Self-assembling microscale electrical and mechanical connections includes a part binding site and a part electrical binding site; and a template binding site comprising a template electrical conductor layer; a metallization layer on the template electrical conductor layer; a bump structure comprising a solder alloy positioned on the metallization layer, wherein the solder alloy is liquefied to allow the bump structure to self-assemble and align with the part electrical binding site using capillary forces, and wherein the solder alloy only liquefies at a temperature above that at which the self-assembly and alignment is performed; and a fluid on the template electrical conductor layer, wherein the fluid comprises a melting point lower than that of the solder alloy, wherein the fluid binds with the part binding site.06-10-2010
20120118619BACK-END-OF-LINE PLANAR RESISTOR - A stack of an interconnect-level dielectric material layer and a disposable dielectric material layer is patterned so that at least one recessed region is formed through the disposable dielectric material layer and in an upper portion of the interconnect-level dielectric material layer. A dielectric liner layer and a metallic liner layer is formed in the at least one recessed region. At least one photoresist is applied to fill the at least one recessed region and lithographically patterned to form via cavities and/or line cavities in the interconnect-level dielectric material layer. After removing the at least one photoresist, the at least one recessed region, the via cavities, and/or the line cavities are filled with at least one metallic material, which is subsequently planarized to form at least one planar resistor having a top surface that is coplanar with top surfaces of metal lines or metal vias.05-17-2012
20100089624MULTILAYER CERAMIC SUBSTRATE AND PROCESS FOR PRODUCING THE SAME - Disclosed is a multi-layer ceramic substrate including a glass ceramic and an external terminal formed on a surface of the glass ceramic. The external terminal includes conductive materials mainly composed of at least one among Ag, Au, Pt and Pd, and added with at least one element among Bi, Cu, Ge, Mn, Ti and Zn. Inorganic oxide particles are provided on a surface of the external terminal. The multi-layer ceramic substrate can keep adhesive strength being unchanged after humidity test or after plating and can prevent plating sag and solder leach from occurring.04-15-2010
20120125669PACKAGE CARRIER - A package carrier including a substrate, at least an under bump metallurgic (UBM) layer and at least a conductive bump is provided. The substrate has a conductive structure and at least a pad connected with the conductive structure. A region of the pad connected with the conductive structure is a signal source region. The UBM layer is disposed on the pad and includes a first conductive pattern and a second conductive pattern. A side wall of the second conductive pattern is directly connected to a side wall of the first conductive pattern, and the second conductive pattern is disposed close to the signal source region. The conductivity of the second conductive pattern is smaller than the conductivity of the first conductive pattern. The conductive bump is disposed on the UBM layer.05-24-2012
20120125670Cu-Al ALLOY POWDER, ALLOY PASTE UTILIZING SAME, AND ELECTRONIC COMPONENT - In an electronic component having a wiring and/or an electrode prepared through firing of a paste or in an electronic component having a wiring in contact with a glass or glass ceramic member, provided is an electronic component using a Cu-based wiring material which less suffers from increase in electric resistance due to oxidation, which less causes bubbles in the glass or glass ceramic, and has satisfactory migration resistance. The Cu—Al alloy powder includes a Cu—Al alloy powder including Cu and, preferably, 50 percent by weight or less of Al; and an aluminum oxide film having a thickness of 80 nm or less and being present on the surface of the Cu—Al alloy powder. The powder, when compounded with a glass or glass ceramic material to give a paste, can be used to form wiring (interconnections), electrodes, and/or contact members.05-24-2012
20120125668WIRING STRUCTURE FOR IMPROVING CROWN-LIKE DEFECT AND FABRICATION METHOD THEREOF - A wiring structure for improving a crown-like defect and a fabrication method thereof are provided. The method includes the following steps. A substrate, on which a seed layer and a patterned photoresist layer with an opening are formed, is provided. A copper layer, having a bottom covering the seed layer, is formed in the opening. A barrier layer covering at least one top portion of the copper layer is formed on the copper layer. An oxidation potential of the barrier layer is greater than that of the copper layer. The patterned photoresist layer is removed to perform an etching process, wherein the copper layer and a portion of the seed layer exposed are etched to form a wiring layer. An immersion process is performed to form an anti-oxidation layer comprehensively on exposed surfaces of the barrier layer and the wiring layer.05-24-2012
20120160551EMBEDDED STRUCTURE OF CIRCUIT BOARD - An embedded structure of circuit board is provided. The embedded structure of the present invention includes a dielectric layer, a pad opening disposed in the dielectric layer, and a via disposed in the pad opening and in the dielectric layer, wherein the outer surface of the dielectric layer has a substantially even surface.06-28-2012
20100288543CONDUCTING LINES, NANOPARTICLES, INKS, AND PATTERNING - Patterning and direct writing of nanoparticle inks formulated to provide conductive lines upon annealing. Patterning methods include stamp and tip based methods including microcontact printing and DPN printing. Ink viscosity, metal content, and density can be controlled to provide good results. Low temperature of annealing can be used to generate volume resistivities comparable to bulk resistivity. Long lines can be drawn. Addressable patterning can be achieved.11-18-2010
20100288542Embedded Substrate Having Circuit Layer Element With Oblique Side Surface and Method for Making the Same - The present invention relates to an embedded substrate having a circuit layer element with an oblique side surface and a method for making the same. The embedded substrate includes a dielectric layer and a circuit layer element. The dielectric layer has an upper surface and an accommodating groove. The circuit layer element is disposed in the accommodating groove. The circuit layer element has an upper surface, a chemical copper layer, a plating copper layer and an oblique side surface. The elevation of the upper surface is equal to or lower than that of the upper surface of the dielectric layer. The chemical copper layer includes palladium (Pd). The plating copper layer is disposed on the chemical copper layer. The oblique side surface is disposed on the upper surface of the circuit layer element, where is close to the wall of the accommodating groove, and extends downward from the upper surface of the circuit layer element to the wall of the accommodating groove. Therefore, the oblique side surface of the circuit layer element can avoid electrons gathering at a sharp edge of a conventional circuit layer element.11-18-2010
20100288541SUBSTRATE HAVING SINGLE PATTERNED METAL LAYER, AND PACKAGE APPLIED WITH THE SUBSTRATE , AND METHODS OF MANUFACTURING OF THE SUBSTRATE AND PACKAGE - A substrate having single patterned metal layer includes a patterned base having at least a plurality of apertures, the patterned metal layer disposed on the patterned base, and a first surface finish layer. Parts of the lower surface of the patterned metal layer are exposed by the apertures of the patterned base to form a plurality of first contact pads for downward electrical connection externally, and parts of the upper surface of the patterned metal layer function as a plurality of second contact pads for upward electrical connection externally. The first surface finish layer is disposed at least on one or more surfaces of the second contact pads, and the first surface finish layer is wider than the second contact pad beneath. A package applied with the substrate disclosed herein further comprises at least a die conductively connected to the second contact pads of the substrate.11-18-2010
20120160549PRINTED CIRCUIT BOARD HAVING EMBEDDED ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING THE SAME - Disclosed is a printed circuit board having an embedded electronic component, including a metal substrate having a first cavity formed in a thickness direction and a support plate integrated with one side of the metal substrate and formed in the first cavity. Thereby, a method of manufacturing such a printed circuit board is also provided. When manufacturing the printed circuit board having an embedded electronic component, there is no need for an additional member including support tape to seat the electronic component, thus simplifying the manufacturing process and reducing lead time, thereby improving productivity.06-28-2012
20120160550PRINTED CIRCUIT BOARD HAVING EMBEDDED ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING THE SAME - Disclosed is a printed circuit board having an embedded electronic component, which includes a first insulating layer, an electronic component disposed in an opening formed in a thickness direction of the first insulating layer and having a metal bump, a polymer layer formed on one side of the first insulating layer and on which the electronic component is seated so that the metal bump of the electronic component perforates the polymer layer, a second insulating layer formed on the other side of the first insulating layer so as to embed the electronic component, a first circuit layer formed on the second insulating layer, and a second circuit layer formed on the polymer layer so as to be directly electrically connected to the metal bump that perforates the polymer layer, and in which roughness is formed on the polymer layer so that the force of adhesion of the polymer layer to a plating layer is enhanced, thus ensuring reliability of the electrical connection of a circuit layer which is subsequently formed.06-28-2012
20120160548INTERLEAVED CONDUCTOR STRUCTURE WITH TRACES OF VARYING WIDTH - An interleaved conductor structure for electrically connecting the read/write electronics to a read/write head in a hard disk drive is provided. The interleaved conductor structure may allow for an increased characteristic-impedance range, greater interference shielding and a reduction of signal loss that is contributed by a lossy conductive substrate. The electrical traces may have different widths, be offset, or even wrap around each other at the via connections.06-28-2012
20100206622SUBSTRATE STRUCTURE AND PACKAGE STRUCTURE USING THE SAME - A substrate structure and a package structure using the same are provided. The substrate structure includes a number of traces, a substrate core and a number of first metal tiles. The substrate core has a first surface and a second surface opposite to the first surface. The first metal tiles are disposed on one of the first surface and the second surface, the minimum pitch between adjacent two of the first metal tiles is the minimum process pitch.08-19-2010
20100051336PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREFOR - A printed circuit board of a card edge connector type includes interconnections formed on a surface of a substrate to be electrically coupled to respective connecting terminals formed by electrolytic plating on an edge of the substrate, and connecting terminal-forming wirings being respectively in connection with the interconnections, when the connecting terminals are formed by the electrolytic plating. The interconnections are electrically isolated from the connecting terminal-forming wirings by process openings formed in the substrate.03-04-2010
20100051335Conducting Layer Jump Connection Structure - A conducting layer jump connection structure used in a circuit device includes a substrate, a first conducting layer, a first insulating layer, a second conducting layer, a second insulating layer, a jump connection layer, a first via, and plural second vias. The first conducting layer covers the substrate. The first insulating layer covers the first conducting layer. The second conducting layer partially covers the first insulating layer. The second insulating layer covers the second conducting layer and the first insulating layer exposed by the second conducting layer. The jump connection layer covers the second insulating layer. The first via is formed on the first conducting layer and between two opposite second conducting portions of the second conducting layer. The first via penetrates through both the second insulating layer and the first insulating layer. The second vias are formed on the second conducting layer and penetrate through the second insulating layer. The first conducting layer and the second conducting layer are connected to the jump connection layer through the first via and the second vias, respectively.03-04-2010
20100051334Printed Circuit Board and Method of Manufacturing the Same - A first insulating layer is formed on a suspension body. A write wiring trace is formed on the first insulating layer. A second insulating layer is formed on the first insulating layer to cover the write wiring trace. A write wiring trace and read wiring traces are formed on the second insulating layer. The write wiring trace is arranged above the write wiring trace. The write wiring trace includes a conductor layer and reinforcing alloy layers. The reinforcing alloy layers are sequentially formed to cover an upper surface and side surfaces of the conductor layer.03-04-2010
20120168211SUBSTRATE ASSEMBLY CONTAINING CONDUCTIVE FILM AND FABRICATION METHOD THEREOF - A substrate assembly containing a conductive film and a fabrication method thereof are provided. The substrate assembly includes a polymer substrate, a surface treatment layer formed on the polymer substrate and a conductive film formed on the surface treatment layer, wherein the conductive film is formed by sintering a metal conductive ink and the surface treatment layer is formed from a composite material of an auxiliary filler and a polymer. The auxiliary filler in the surface treatment layer can deliver energy into the metal conductive ink for sintering the conductive metal ink.07-05-2012
20120168210Methods and Structures Involving Terminal Connections - A method for forming a conductive contact includes forming a copper contact region in an intermediary layer, depositing an insulator layer over the copper contact region and the intermediary layer, patterning a photoresist layer on the insulator layer, etching to remove a portion of the insulator layer and expose a portion of the copper contact region, depositing a conductive material layer over the exposed portion of the copper contact region and the photoresist layer, and removing the photoresist layer and the conductive material layer disposed on the photoresist layer.07-05-2012
20120168212PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME - Disclosed herein are a printed circuit board and a method for manufacturing the same. The printed circuit board includes: a base substrate having a metal pattern for a circuit; and a surface roughness provided on the metal pattern, wherein the surface roughness has a first surface roughness in an anchor structure and a second surface roughness having a black oxide layer in a needle structure formed on the first surface roughness.07-05-2012
20120168213ANISOTROPIC CONDUCTIVE FILM AND APPARATUS INCLUDING THE SAME - An apparatus includes a first member including a plurality of first electrodes on a first substrate, a second member including a plurality of second electrodes on a second substrate, the second electrodes facing the first electrodes of the first member, and an anisotropic conductive film (ACF) between the first member and the second member, the ACF having a double-layered structure and electrically connecting the first member and the second member, the ACF including an epoxy resin with a polycyclic aromatic ring and exhibiting a minimum melt viscosity of about 3,000 Pa·s to about 10,000 Pa·s at about 30° C. to about 200° C.07-05-2012
20100307803DIELECTRIC MATERIALS, METHODS OF FORMING SUBASSEMBLIES THEREFROM, AND THE SUBASSEMBLIES FORMED THEREWITH - A circuit subassembly, comprising a dielectric layer formed from a dielectric composition comprising, based on the total volume of the composition: about 15 to about 65 volume percent of a dielectric filler; and about 35 to about 85 volume percent of a thermosetting composition comprising: a poly(arylene ether), and a carboxy-functionalized polybutadiene or polyisoprene polymer.12-09-2010
20120312588CIRCUIT BOARD - A circuit board includes a circuit substrate, a dielectric layer disposed on the circuit substrate and a patterned circuit structure. The dielectric layer covers a first surface and at least a first circuit of the circuit substrate. The dielectric layer has a second surface, at least a blind via, a second intaglio pattern and a third intaglio pattern connected to the blind via. The patterned circuit structure includes at least a second circuit disposed in the second intaglio pattern and third circuits disposed in the third intaglio pattern and the blind via. Each third circuit has a first conductive layer and a second conductive layer. The materials of the first conductive layer and the second circuit are the same. The line width of the second circuit is shorter than that of each third circuit. At least a third circuit is electrically connected to the first circuit of the circuit substrate.12-13-2012
20100270063ULTRATHIN COPPER FOIL WITH CARRIER AND PRINTED CIRCUIT BOARD USING SAME - An ultrathin copper foil with a carrier not causing blistering at a release layer interface, having a low carrier peeling force, friendly to the environment, and enabling easy peeling of a carrier foil and an ultrathin copper foil even under a high temperature environment and a printed circuit board enabling a stable production quality of a base of a printed circuit board for fine pattern applications using the ultrathin copper foil with the carrier, that is, a ultrathin copper foil with a carrier comprising a carrier foil, a diffusion prevention layer, a release layer, and an ultrathin copper foil, wherein the release layer is formed by a metal A for retaining a release property and a metal B for facilitating plating of the ultrathin copper foil, a content “a” of the metal A and a content “b” of the metal B forming the release layer satisfying an equation:10-28-2010
20100270062Method and Apparatus for an Improved Filled Via - The system contains a substrate having at least one electrical trace formed thereon. An opening is formed in the substrate. The opening comprising at least one wall. An electrically conductive fill is formed in the opening. The electrically conductive fill is chemically bonded to the wall and electrically contacted with the electrical trace.10-28-2010
20120247817CONDUCTIVE PARTICLES, CONDUCTIVE PASTE, AND CIRCUIT BOARD - Conductive particles include silver particles and at least one coating material which is selected from silver alloys and silver composites and which covers the silver particles.10-04-2012
20120247819ELECTRONIC COMPONENT-EMBEDED BOARD AND METHOD FOR MANUFACTURING THE SAME - An electronic component or the like is mounted on a substrate, and on the electronic component, an insulating layer is provided. Afterward, via-holes V are made in the insulating layer on terminals of the electronic component. Each of the terminals of the electronic component has, for example, a laminate structure of a first metal layer, a second metal layer and a third metal layer. When the via-holes V are formed, part of the third metal layer having a comparatively high electric resistance is removed, and the corresponding portion is connected to a wiring layer including via-conductors. Moreover, the third metal layer excellent in close contact properties with the insulating layer is preferably used.10-04-2012
20120073868MULTILAYER PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING MULTILAYER PRINTED WIRING BOARD - A method for manufacturing a multilayer printed wiring board includes preparing a first resin insulative material having a first conductive circuit on or in the first resin insulative material, forming a second resin insulative material on the first resin insulative material and the first conductive circuit, forming on a surface of the second resin insulative material a first concave portion to be filled with a conductive material for formation of a second conductive circuit, forming on the surface of the second resin insulative material a pattern having a second concave portion and post portions to be filled with the conductive material for formation of a plane conductor, and filling the conductive material in the first concave portion and the second concave portion such that the second conductive circuit and the plane conductor are formed.03-29-2012
20120073867CIRCUIT STRUCTURE - A circuit structure suitable for being disposed on a carrier board. The circuit structure comprises a first patterned conductive layer, a second patterned conductive layer, and a solder mask. The first patterned conductive layer is disposed on the carrier board. The second patterned conductive layer is disposed on a part of the first patterned conductive layer. A part of the edge of the second patterned conductive layer and a part of the edge of the first patterned conductive layer are substantially coplanar. The patterned solder mask covers a part of the first patterned conductive layer and has at least one opening for exposing the second patterned conductive layer and a part of the first patterned conductive layer adjacent to the second patterned conductive layer.03-29-2012
20120073866Touch screen panel and fabricating method therof - A touch screen panel includes a film substrate defined by a touch active area and a non-touch active area and the touch area is arranged outside the touch active area. The touch screen panel includes a plurality of sensing electrodes arranged in the touch active area on an upper surface and a lower surface of the film substrate, and outer lines arranged in the non-touch active area on the upper and the lower surfaces of the film substrate. The outer lines are connected to the sensing electrodes along one of a first direction and a second direction, and the outer lines include a transparent electrode layer and a plating layer on the transparent electrode layer.03-29-2012
20120222893LEAD-FREE SOLDER COMPOSITION - A solder composition includes about 4% to about 25% by weight tin, about 0.1% to about 8% by weight antimony, about 0.03% to about 4% by weight copper, about 0.03% to about 4% by weight nickel, about 66% to about 90% by weight indium, and about 0.5% to about 9% by weight silver. The composition can further include about 0.2% to about 6% by weight zinc, and, independently, about 0.01% to about 0.3% by weight germanium. The composition can be used to solder an electrical connector to an electrical contact surface on a glass component.09-06-2012
20110100687CARRIER TAPE FOR TAB-PACKAGE AND MANUFACTURING METHOD THEREOF - The present invention relates to a carrier tape for TAB-package and a manufacturing method thereof, wherein a TAB tape including a wiring pattern and a metal plating layer formed on a base film comprises a transfer area including a row of sprocket holes arranged along the edges of the base film at predetermined intervals, and wherein the transfer area includes an exposure area from which the base film is exposed, such that the present invention has an advantageous effect in that no Cu layer or a metal layer exists at a portion of the sprocket holes from which friction is generated by a driving roller during assembly work between a drive IC and chips/drive IC and panel to dispense with generation of foreign objects such as Cu particles, thereby enhancing reliability of the product.05-05-2011
20120222894WIRING SUBSTRATE AND METHOD FOR MANUFACTURING WIRING SUBSTRATES - A wiring substrate includes a wiring layer, an outermost insulating layer laminated to the wiring layer, and a pad electrically connected to the wiring layer and exposed from a surface of the outermost insulating layer. The pad consists essentially of a first metal layer and a second metal layer. The first metal layer includes a first surface, which is exposed from the surface of the outermost insulating layer, and a second surface, which is located opposite to the first surface. The second metal layer includes is formed between the second surface of the first metal layer and the wiring layer. The first metal layer is formed from a metal selected from gold or silver or from an alloy including at least one of gold and silver. The second metal layer is formed from palladium or a palladium alloy.09-06-2012
20120255766PRODUCTION METHOD OF CONNECTION STRUCTURE - In order to lower the substantial heating temperature of a thermosetting adhesive and to realize favorable connection reliability during connecting an electrical element to a circuit board by anisotropic conductive connection with using solder particles, a product in which solder particles having a melting temperature Ts are dispersed in an insulating acrylic-based thermosetting resin having a minimum melt viscosity temperature Tv is used as an anisotropic conductive adhesive in producing a connection structure by connecting the circuit board and the electrical element to each other by anisotropic conductive connection.10-11-2012
20090020324Wired circuit board - A wired circuit board comprises a metal supporting board, a metal foil formed on the metal supporting board, a first protecting layer formed on the surface of the metal foil, the first protecting layer is made of tin or a tin alloy, a first insulating layer formed on the metal supporting board to cover the first protecting layer, a conductive pattern formed on the insulating layer, and a second protecting layer formed on the surface of the conductive pattern, the second protecting layer is made of tin or a tin alloy.01-22-2009
20090020323Circuit board structure and method for fabricating the same - A circuit board structure and a method for fabricating the same are disclosed, including providing a core board having conductive traces and solder pads respectively formed thereon, wherein width of the solder pads corresponds to that of the conductive traces, and pitch between adjacent solder pads is made wide enough to allow multiple conductive traces to pass through; forming on the core board an insulating layer with openings for exposing the solder pads therefrom; forming on the insulating layer a plurality of extending pads electrically connected to the solder pads respectively, wherein the projection area of the extending pads is larger than that of the corresponding solder pads and covers conductive traces adjacent to the corresponding solder pads. Thus, more conductive traces are allowed to pass between adjacent solder pads and meanwhile, the extending pads provide an effective solder ball wetting area for achieving good solder joints and sufficient height after collapse.01-22-2009
20120261172STRUCTURE AND PATTERN FORMING METHOD OF TRANSPARENT CONDUCTIVE CIRCUIT - A structure and manufacturing method of transparent conductive circuits, comprises a base material, ink layer provided with absorbing polymer liquid characteristics and a conductive layer composed of a conductive polymer coating. The ink layer is attached to the areas on the surface of the base material not requiring electrical conductivity, and heat energy or radiation is used to accelerate drying and hardening of the ink layer. The conductive layer with an area larger than that of the ink layer is attached to and contacts the ink layer, thereby enabling the ink layer attached to the surface of the base material to increase electrical resistivity of conductive layer in contact therewith. The areas relative to the conductive layer on the surface of the base material not in contact with the ink layer are provided with electrical conductivity. Accordingly, the required conductive circuits or patterns are formed on the base material.10-18-2012
20120228011Semiconductor Load Board - Disclosed is a semiconductor load board, including a substrate, a plurality of connection pads, a patterned circuit layer, a dielectric layer, a plurality of solder pads, and a plurality of solders. The connection pads and the patterned circuit layer are located on the substrate. The dielectric layer is formed on the substrate, the connection pads and the patterned circuit layer, and has a plurality of openings corresponding to the plurality of connection pads. The solder pads are formed in the openings, and the width of the solder pads is smaller than or equals to the maximum width of the openings of the dielectric layer, and a protruding portion which has a width smaller than the minimum width of the openings of the dielectric layer can also be formed, such that the problems of short-circuit failure and electrical interference can be reduced.09-13-2012
20100326710Mono-Domain Hexagonal Arrays of Nanopillars and Processes For Preparing the Same - The present invention relates to nanopillar arrays that may have relatively large dimensions and relatively large interpillar distances. The present invention also relates to methods of forming the same. In some embodiments of the invention, methods of forming hexagonal nanopillar arrays include forming a base comprising aluminum; forming a hexagonal pattern of pits in the aluminum; anodizing the aluminum to form aluminum oxide comprising a primary hexagonal nanopore array at the positions of the pits in the aluminum; depositing a conductive material into the nanopores of the primary hexagonal nanopore array; and removing the mask and the aluminum oxide to provide the hexagonal nanopillar array.12-30-2010
20100326713NI-P LAYER SYSTEM AND PROCESS FOR ITS PREPARATION - The invention relates to a layer system comprising on a substrate, the surface of which has been electropolished, (i) a Ni layer having a thickness ≦3.0 μm, (ii) a Ni—P layer having a thickness ≦1.0 μm, (iii) a Au layer having a thickness ≦1.0 μm.12-30-2010
20100326712CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME - There are provided a circuit board, which has little outflow of an interlayer adhesive to be used for a multilayer lamination while keeping a connection reliability, and a method for manufacturing the circuit board. The circuit board (12-30-2010
20100326711PRINTED CIRCUITS AND METHOD FOR MAKING SAME - A method for making printed circuits and printed circuit boards which includes coating a non-metallized substrate and plating an image of a desired circuit design directly onto the coated substrate without the need to image the circuit design on an intermediate silver halide polyester film or diazo and utilizing existing imaging, developing and etching subtractive techniques in conventional printed circuit board processing. One exemplary embodiment of the method for making printed circuit boards includes coating a non-metallized substrate with a palladium based material including a ferric based solution combined with palladium.12-30-2010
20100326708IMAGE DISPLAY ELEMENT AND MANUFACTURING METHOD THEREOF - An image display element includes: a front panel; a back panel opposite thereto; a plurality of pixels arranged in a matrix between both the panels; and plural electrodes for controlling the pixels. Both the panels are bonded together with the pixels and the electrodes interposed therebetween, and the electrodes are connected to a driving circuit via metal film wires. Division is performed so as to expose electrode terminals, and a groove part V-shaped in cross section is formed at the divided portion. The metal film wires are formed on the surface of the top of the back panel, and the electrode terminals and the metal film wires are connected by a conductive paste coated along the tilt surfaces forming the groove part.12-30-2010
20110120760ELECTROLESS COPPER PLATING METHOD, PRINTED WIRING BOARD, METHOD FOR PRODUCING THE SAME, AND SEMICONDUCTOR DEVICE - The present invention is to provide a printed wiring board having a fine wiring formed on a resin base material by the semi-additive method, and is also to provide an electroless copper plating method capable of producing the printed wiring board, a method for producing a printed wiring board using the electroless copper plating method, a printed wiring board produced by the production method, and a semiconductor device provided with the printed wiring board. An electroless copper plating method comprising the step of performing acid treatment before an electroless copper plating step including cleaner, providing palladium catalyst, palladium reduction, and electroless copper plating process, a method for producing a printed wiring board using the electroless copper plating method, a printed wiring board produced by the method for producing the printed wiring board, and a semiconductor device provided with the printed wiring board.05-26-2011
20110120759CIRCUIT BOARD, ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME - A circuit board includes a substrate, a circuit pattern and a through electrode. The circuit pattern is disposed on one side of the substrate in a thickness direction thereof. The through electrode is filled in a through-hole formed in the substrate with one end connected to the circuit pattern. The circuit pattern and the through electrode each have an area containing a noble metal component (e.g., Au component) and are connected to each other therethrough.05-26-2011
20110120758DIE MOUNTING SUBSTRATE AND METHOD OF FABRICATING THE SAME - Disclosed is a die mounting substrate, which includes a mounting substrate having a pad, a die having a terminal and surface-mounted on the mounting substrate, and a conductive paste bump formed on the pad or the terminal so as to connect the pad and the terminal to each other. When the die is connected and mounted on the mounting substrate using the conductive paste bump, shear stress is relieved thus preventing reliability from decreasing due to a difference in the coefficient of thermal expansion between the die and the mounting substrate, and also preventing the force of adhesion of the bump from decreasing due to the reduction in size of the pad of the mounting substrate.05-26-2011
20110036622LAMINATED CERAMIC ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING THE SAME - In a method for manufacturing a laminated ceramic electronic component, in order to form a green ceramic laminate to be fired, first ceramic green layers which include first conductor patterns including Ag as a main component and which include a first ceramic material including a first glass component are disposed in surface layer portions. Second ceramic green layers which include second conductor patterns including Ag as a main component, which include a second ceramic material containing a second glass component, and which include a composition in which Ag diffuses than more easily in the first ceramic green layer during firing are disposed in inner layer portions. The green ceramic laminate is fired to produce a multilayer ceramic substrate.02-17-2011
20110036621METAL MATERIAL, METHOD FOR PRODUCING THE SAME, AND ELECTRICAL/ELECTRONIC COMPONENT USING THE SAME - A metal material (02-17-2011
20110005813RIBBON CONNECTING ELECTRICAL COMPONENTS - Articles and methods of manufacture are provided for using laser energy in an automated bonding machine to effect laser welding of ribbons to electronic components, particularly conductive ribbons comprising titanium for microelectronic circuits. Bonding and connection of microelectronic circuits with discrete heating avoids heat damage to peripheral microelectronic components. Bonding of flexible materials and low-resistance materials are possible, and are less dependant on substrate and terminal stability in comparison to other bonding methods. The ribbon-connections can forgo the use of blocks, bond pads, and bond pad arrays for attaching ribbon to a printed wiring board. Profile height of the ribbon-connection is decreased and the density of ribbons and bonding sites can be increased compared to ribbon-connections employing bonding pads.01-13-2011
20120325532INTERCONNECT STRUCTURE INCLUDING A MODIFIED PHOTORESIST AS A PERMANENT INTERCONNECT DIELECTRIC AND METHOD OF FABRICATING SAME - An interconnect structure is provided that may include at least one cured permanent patterned dielectric material located on a surface of a substrate. The at least one cured permanent patterned dielectric material is a cured product of a patterned photoresist that includes a dielectric enabling element therein. The structure further includes at least one conductively filled region embedded within the at least one cured permanent patterned dielectric material.12-27-2012
20120325531PRINTED WIRING BOARD WITH IMPROVED CORROSION RESISTANCE AND YIELD - A printed wiring board is configured such that copper-laminated plates and prepregs are alternately laminated and surface conductive layers are arranged on the outermost positions outside the prepregs, wherein all leading wires from pads for surface-mount parts to be mounted on the surface of the printed wiring board are connected to inner conductive layers of the copper laminated plates through blind via holes connecting the surface conductive layer and the copper-laminated plate therebelow, and inner via holes connecting conductive layers on the top and rear surfaces of at least one of the copper-laminated plates that is nearest to the surface conductive layer are provided and a conductive film is formed in the inner via holes.12-27-2012
20120318568ELECTRONIC CIRCUIT, METHOD FOR FORMING SAME, AND COPPER CLAD LAMINATE FOR FORMING ELECTRONIC CIRCUIT - Provided is an electronic circuit as a laminated body configured from a layer (A) which is made of a copper or copper alloy foil formed on one surface or both surfaces of a resin substrate, a copper or copper alloy plated layer (B) formed on a part or whole surface of the (A) layer, a plated layer (C) formed on a part or whole surface of the (B) layer and having a slower etching rate than that of copper relative to a copper etching solution, and a copper or copper alloy plated layer (D) formed on the layer (C) and which has a thickness of 0.05 μm or more and less than 1 μm, and which is made of a copper circuit formed by etching and removing a part of the laminated portion of the (A) layer, the (B) layer, the (C) layer and the (D) layer up to the resin substrate surface. It is thereby possible to form a circuit having a uniform circuit width, improve the etching properties in pattern etching, and prevent the occurrence of short-circuits and defects in the circuit width.12-20-2012
20120267150FUNCTIONAL ELEMENT, SENSOR ELEMENT, ELECTRONIC APPARATUS, AND METHOD FOR PRODUCING A FUNCTIONAL ELEMENT - A functional element including a substrate having a principal surface, a groove portion (a first groove portion, a second groove portion) disposed on the principal surface, and a fixed electrode section (a first fixed electrode finger, a second fixed electrode finger) laid across the groove portion on the substrate, wherein, in the groove portion, a raised portion formed by using at least one of the substrate and the fixed electrode section is provided in a position overlapping with the fixed electrode section in a plan view, the raised portion has a bonded surface (an end face), a wiring line (a first wiring line, a second wiring line) is disposed on the bonded surface, and the substrate and the fixed electrode section are connected with the wiring line sandwiched between the substrate and the fixed electrode section.10-25-2012
20120318567WIRING STRUCTURES - A wiring structure includes a first plug extending through a first insulating interlayer on a substrate, a first wiring extending through a second insulating interlayer on the first insulating interlayer and the first wiring is electrically connected to the first plug, a diffusion barrier layer pattern on the first wiring and on the second insulating interlayer, a portion of the second insulating interlayer being free of being covered by the diffusion barrier layer pattern, a second plug extending through the diffusion barrier layer pattern, the second plug is in contact with the first wiring, and a second wiring electrically connected to the second plug.12-20-2012
20120267151METAL MICROPARTICLE DISPERSION, PROCESS FOR PRODUCTION OF ELECTRICALLY CONDUCTIVE SUBSTRATE, AND ELECTRICALLY CONDUCTIVE SUBSTRATE - Provided are a metal microparticle dispersion which is excellent in a dispersibility, an electrically conductive substrate which is obtained by using the above metal microparticle dispersion and which is excellent in an electrical conductivity and a production process for the same.10-25-2012
20120298406REDUCED STRESS GULL WING SOLDER JOINTS FOR PRINTED WIRING BOARD CONNECTIONS - Micro-vias that are conventionally used for vertical connections in wire or circuit boards may be used for an entirely different purpose; the micro-vias may be used in the creation of solder joints to initiate the controlled formation of voids that increase the reliability of the solder joints.11-29-2012
20100218982EPOXY RESIN COMPOSITION, PREPREG USING THE EPOXY RESIN COMPOSITION, METAL-CLAD LAMINATE, AND PRINTED WIRING BOARD - It is an object of the present invention to provide an epoxy resin composition containing an epoxy compound, a low-molecular-weight phenol-modified polyphenylene ether and a cyanate compound as essential components, the epoxy resin composition having excellent dielectric characteristics and exhibiting high heat resistance while maintaining flame retardancy. To achieve this object, the epoxy resin composition of the present invention is a thermosetting resin composition composed of a resin varnish containing (A) an epoxy compound having a number-average molecular weight of 1000 or less and containing at least two epoxy groups in the molecule without containing any halogen atoms, (B) a polyphenylene ether having a number-average molecular weight of 5000 or less, (C) a cyanate ester compound, (D) a curing catalyst and (E) a halogen flame retardant, wherein all of the components (A) to (C) are dissolved in the resin varnish, while the component (E) is dispersed without being dissolved in the resin varnish.09-02-2010
20120080218TRANSPARENT CONDUCTIVE FILM HAVING HIGH OPTICAL TRANSMITTANCE AND METHOD FOR MANUFACTURING THE SAME - The present invention pertains to a transparent conductive film including a conductive layer having different thicknesses so as to increase the optical transmittance while maintaining the conductivity of the transparent conductive film. The present invention also pertains to a process for the preparation of the above-mentioned transparent conductive film.04-05-2012
20100230146CIRCUIT LAYER COMPRISING CNTS AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a circuit layer including CNTs including an electroless copper plating layer formed on an insulating layer, and a CNT layer deposited on the electroless copper plating layer, thus the circuit layer has excellent electrical properties.09-16-2010
20100230145METHODS TO PRODUCE HIGH DENSITY, MULTILAYER PRINTED WIRING BOARDS FROM PARALLEL-FABRICATED CIRCUITS AND FILLED VIAS - The invention provides methods to mass laminate and interconnect high density interconnect circuit layers fabricated through parallel processing. Invention methods employ an inside-out interconnection strategy that eliminates plating of vias and provides defect-free outer circuit layers. Conductive paste and via layers are also key features of the invention.09-16-2010
20120325530CIRCUIT BOARD WITH EVEN CURRENT DISTRIBUTION - A circuit board includes an outer conductive layer, a number of inner conductive layers, at least one group of vias defined through the outer conductive layer and the inner conductive layers and electrically connected each conductive layers, at least one power supply element, and at least one electronic element. The at least one group of vias surrounds the at least one power supply element. When the least one power supply element outputs current to the at least one electronic element, a first portion of the output current flows to the inner conductive layers through the group of vias surrounding the at least one power supply element to be input to the at least one electronic element, and a second portion of the output current flows into the at least one electronic element through the outer conductive layer.12-27-2012
20120279767Techniques for Improving Bond Pad Performance - Techniques for bond pad fabrication are provided. In one aspect, a method of forming a bond pad comprises the following steps. At least one alloying element is selectively introduced to at least a portion of at least one surface of the bond pad. The at least one alloying element is diffused into at least a portion of the bond pad through one or more thermal cycles. The at least one alloying element may be selectively introduced to the bond pad by depositing an alloying element layer comprising the at least one alloying element onto the bond pad and patterning and etching at least a portion of the layer.11-08-2012
20120279766METHOD OF FABRICATING HIGH-RESOLUTION FEATURES - A method of forming a high resolution feature on a substrate, the method includes, depositing a liquid composition comprising a substance and a solvent onto the substrate to form deposited features, heating the deposited features to a heating temperature during or after the depositing to form an intermediate feature having a central region and an edge region, applying an adhesive substance to at least a portion of a surface of the intermediate feature, and removing the adhesive substance together with at least a portion of the central region of the intermediate feature to form the high resolution feature on the substrate.11-08-2012
20120090882CONDUCTIVE PARTICLE, AND ANISOTROPIC CONDUCTIVE FILM, BONDED STRUCTURE, AND BONDING METHOD - To provide a conductive particle, containing: a core particle; and a conductive layer formed on a surface of the core particle, wherein the core particle is a nickel particle, and wherein the conductive layer is a nickel plating layer a surface of which has a phosphorous concentration of 10% by mass or lower, and the conductive layer has an average thickness of 1 nm to 10 nm.04-19-2012
20120285733ELECTRONIC COMPONENT PROVIDED WITH CU-AL-CO-BASED ALLOY ELECTRODE OR WIRING - An object of the present invention is to provide an electronic component using a Cu-based conductive material that can suppress oxidization even in a heat treatment in an oxidizing atmosphere and that can suppress an increase in an electrical resistance. In an electronic component having an electrode or a wiring, a ternary alloy made from three elements consisting of Cu, Al, and Co is used as a Cu-based wiring material that can prevent oxidization of the electrode or the wiring. Specifically, part or the whole of the electrode or the wiring has a chemical composition in which an Al content is 10 at % to 25 at %, a Co content is 5 at % to 20 at %, and the balance is composed of Cu and unavoidable impurities, and the chemical composition represents a ternary alloy in which two phases of a Cu solid solution formed by Al and Co being dissolved into Cu and a CoAl intermetallic compound coexist together.11-15-2012
20120285734ROUGHENED COPPER FOIL, METHOD FOR PRODUCING SAME, COPPER CLAD LAMINATED BOARD, AND PRINTED CIRCUIT BOARD - Provided is a roughened copper foil which has excellent properties in forming a fine patterned-circuit and good transmission properties in a high-frequency range and show high adhesiveness to a resin base and good chemical resistance. A surface-roughened copper foil, which is obtained by roughening at least one face of a base copper foil (untreated copper foil) so as to increase the surface roughness (Rz) thereof, relative to the surface roughness (Rz) of said base copper foil, by 0.05-0.3 μm and has a roughened surface with a surface roughness (Rz) after roughening of 1.1 μm or less, wherein said roughened surface comprises roughed grains in a sharp-pointed convex shape which have a width of 0.3-0.8 μm, a height of 0.4-1.8 μm and an aspect ratio [height/width] of 1.2-3.5.11-15-2012
20090139753Copper Clad Laminate for Chip on Film - The present invention relates to a copper clad laminate for chip on film, specifically to a copper clad laminate for a chip on film comprising a copper clad and at least one polyimide layer laminated on the copper clad, wherein the polyimide layer in contact with the copper clad comprises at least one additive selected from the group consisting of an azole-based compound, a polysiloxane-based compound, and a polyphosphate-based compound. The copper clad laminate for a chip on a film according to the present invention, upon tin plating the copper clad at high temperature, prevents delamination between the copper clad and the polyimide layer, and has excellent adhesiveness under the temperature and pressure on IC chip bonding.06-04-2009
20120138348PHOTOSENSITIVE CONDUCTIVE FILM, METHOD FOR FORMING CONDUCTIVE FILM, METHOD FOR FORMING CONDUCTIVE PATTERN, AND CONDUCTIVE FILM SUBSTRATE - A photosensitive conductive film 06-07-2012
20120138347PRINTABLE COMPOSITIONS CONTAINING SILVER NANOPARTICLES, PROCESSES FOR PRODUCING ELECTRICALLY CONDUCTIVE COATINGS USING THE SAME, AND COATINGS PREPARED THEREBY - Printable compositions comprising: (a) 5 to 40 parts by weight of silver nanoparticles having a maximum effective diameter of 150 nm, as determined by laser correlation spectroscopy; (b) 50 to 99.5 parts by weight of water; (c) 0.01 to 15 parts by weight of a dispersing agent; (d) 0.5 to 5 parts by weight of a film former; and (g) 30 to 70 parts by weight of metal particles having a maximum effective diameter of 10 μm, as determined by laser correlation spectroscopy; wherein the printable composition has a viscosity of at least 1 Pa·s; processes for producing electrically conductive coatings using such compositions and electrically conductive coatings prepared thereby.06-07-2012
20100155115Doping of lead-free solder alloys and structures formed thereby - Methods of forming a microelectronic structure are described. Those methods include doping a lead free solder material with nickel, wherein the nickel comprises up to about 0.2 percent by weight of the solder material, and then applying the solder material to a substrate comprising a copper pad.06-24-2010
20130014978Electrical Barrier LayersAANM Uzoh; CyprianAACI San JoseAAST CAAACO USAAGP Uzoh; Cyprian San Jose CA USAANM Oganesian; VageAACI Palo AltoAAST CAAACO USAAGP Oganesian; Vage Palo Alto CA USAANM Mohammed; IlyasAACI Santa ClaraAAST CAAACO USAAGP Mohammed; Ilyas Santa Clara CA USAANM Haba; BelgacemAACI SaratogaAAST CAAACO USAAGP Haba; Belgacem Saratoga CA USAANM Savalia; PiyushAACI Santa ClaraAAST CAAACO USAAGP Savalia; Piyush Santa Clara CA USAANM Mitchell; CraigAACI San JoseAAST CAAACO USAAGP Mitchell; Craig San Jose CA US - Barrier layers for use in electrical applications. In some embodiments the barrier layer is a laminated barrier layer. In some embodiments the barrier layer includes a graded barrier layer.01-17-2013
20130014979Connector Structures and MethodsAANM Uzoh; CyprianAACI San JoseAAST CAAACO USAAGP Uzoh; Cyprian San Jose CA USAANM Mitchell; CraigAACI San JoseAAST CAAACO USAAGP Mitchell; Craig San Jose CA US - Electrical contacts comprising a surface with a plurality of cavities therein and their methods of manufacture and use.01-17-2013
20130014977Plated Through Hole Void Detection in Printed Circuit Boards by Detecting Material Coupling to Exposed LaminateAANM Chamberlin; Bruce JohnAACI VestalAAST NYAACO USAAGP Chamberlin; Bruce John Vestal NY USAANM Chu; Chang-MinAACI TaipeiAACO TWAAGP Chu; Chang-Min Taipei TWAANM Hu; Gao-BinAACI ShenZhenAACO CNAAGP Hu; Gao-Bin ShenZhen CNAANM Kuczynski; JosephAACI RochesterAAST MNAACO USAAGP Kuczynski; Joseph Rochester MN USAANM Tsang; Kaspar Ka ChungAACI Tung ChungAACO HKAAGP Tsang; Kaspar Ka Chung Tung Chung HK - An approach is provided in detecting plated-through hole defects in printed circuit boards (PCBs). The printed circuit board is exposed to a modified-silane solution. The modified-silane solution has a luminescent moiety and the modified-silane solution binds to exposed glass within a glass fiber layer of the printed circuit board. Plated-through hole defects are identified in the printed circuit board by detecting a luminescence at a surface location of the printed circuit board. Each surface location where the luminescence is detected corresponds to one of the plated-through hole defects.01-17-2013
20130014980TRANSPARENT ELECTRODE AND ORGANIC ELECTRONIC ELEMENT USING SAMEAANM Takeda; AkihikoAACI Sagamihara-shiAACO JPAAGP Takeda; Akihiko Sagamihara-shi JPAANM Koyama; HirokazuAACI Hino-shiAACO JPAAGP Koyama; Hirokazu Hino-shi JP - Disclosed is a transparent electrode which is configured of a first conductive layer that is composed of a metal or metal oxide fine wire that is formed in a pattern on a substrate; and a second conductive layer that covers the first conductive layer and contains a conductive polymer. The transparent electrode is characterized in that the fine wire of the first conductive layer satisfies the conditions mentioned below. Also disclosed is an organic electronic element Line width (W): 20-200 μm Height (H): 0.2-2.0 μm Aspect ratio: 0.00101-17-2013
20130020114MEMBRANE WIRING BOARD - The present invention is a membrane wiring board provided with an insulating substrate, and at least one circuit portion provided on the insulating substrate and obtained by coating a circuit layer, formed by an electrically conductive paste containing electrically conductive particles, with an insulating coating layer, wherein the circuit layer contains a resin component having a gel fraction of 90% or more.01-24-2013
20130020113Nanoparticle Electrodes and Methods of Preparation - The present invention provides an electrode which comprises (a) a supporting substrate, and (b) nanoparticle composition comprising optically transparent conductive nanoparticles. In one embodiment, the nanoparticles are selected from tin-doped indium oxide (ITO), fluorine doped tin oxide (FTO), antimony tin oxide (ATO), gallium zinc oxide (GZO), indium zinc oxide (IZO), copper aluminum oxide, fluorine-doped zinc oxide and aluminum zinc oxide (AZO) nanoparticles and combinations thereof. In one embodiment, the electrode further comprises a transition metal catalyst, and the catalyst is absorbed to the surface of the nanoparticles. Another aspect of the invention relates to methods for preparing the electrode described herein which comprises the step of (1) preparing a suspension of nanoparticles; (2) applying the suspension of the nanoparticles to a support substrate; and (3) annealing the supporting substrate with the nanoparticle for a period of time and at a temperature sufficient to produce nanoparticle film on the electrode.01-24-2013
20130020115METHOD FOR ETCHING CONDUCTIVE METAL OXIDE LAYER USING MICROELECTRODE - A method for etching a selected area of a conductive metal oxide layer deposited on a support is provided. The method comprises removing the area via electrochemical route in the presence of a polarized microelectrode and an electrochemical solution. In addition, an etched layer obtained with the foregoing method is provided.01-24-2013
20120241201CIRCUIT BOARD - A circuit board includes a substrate and a copper layer positioned on the substrate. The copper layer includes a BGA area and a non-BGA area, and includes traces. The widths of the traces in the BGA area are smaller than the widths of the traces in the non-BGA area, the dielectric coefficient of the substrate in the BGA area is greater than the dielectric coefficient of the substrate in the non-BGA area for keeping the impedance of the traces consistent in the BGA area and in the non-BGA area.09-27-2012
20090139754Thermosetting Conductive Paste and Multilayer Ceramic Part Having an External Electrode Formed Using the Same - Disclosed is a thermosetting conductive paste which is advantageous in that an external electrode for multilayer ceramic electronic part formed using the paste exhibits excellent bonding properties with an internal electrode and is suitable for mounting on a substrate or plating, achieving excellent electric properties (electrostatic capacity, tan δ. A thermosetting conductive paste comprising: (A) metal powder having a melting point of 700° C. or higher; (B) metal powder having a melting point of higher than 300 to lower than 700° C.; and (C) a thermosetting resin.06-04-2009
20080236874DEVICES AND METHODS FOR PRODUCING ELECTRICAL CONDUCTORS - A device including a heat sensitive substrate and an electrical conductor disposed thereon is provided. In certain examples, the heat sensitive substrate may be configured to degrade at or above a sintering temperature. In other examples, the electrical conductor may be processed, prior to disposal on the heat sensitive substrate, at the sintering temperature on a second substrate that can withstand the sintering temperature. Methods and kits are also disclosed.10-02-2008
20080236873ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING THE SAME - An electronic component is: formed by laminating multiple conductive films and multiple insulating films; and provided with an extraction electrode which is extracted to be exposed from the insulating films for establishing connection to another electrode. The electronic component includes a shield film configured to cover an interface between the extraction electrode and the insulating film that covers the internal conductor. The shield film is either an inorganic film or a conductive film having resistance to a degreasing agent, a plating solution, a solvent, an etching solution, a surface activating solution, and the like, as well as moisture resistance, etching resistance, gas permeation resistance, and corrosion resistance.10-02-2008
20080223604PROCESS FOR PREPARING AN ELECTRICALLY STABLE COPPER FILLED ELECTRICALLY CONDUCTIVE ADHESIVE - A process for preparing an electrically conductive adhesive (ECA) with low and stable contact resistance by mixing at least one melt-processable reactive resin, at least one reactive diluent, at least one rheological additive, at least one curing agent, at least one organic acid catalyst, and copper particles. The ECA is useful for filling vias, and bonding together components of electronic circuit structures.09-18-2008
20090025969DUAL CAVITY, HIGH-HEAT DISSIPATING PRINTED WIRING BOARD ASSEMBLY - Two panel-sized fully populated printed wiring board assemblies formed together, with an anisotropic epoxy that provides electrical connection for RF signals and DC supplies without the need for wirebonds, mechanical interconnects or solder balls.01-29-2009
20130168143CIRCUIT BOARD - Disclosed herein is a circuit board including: an insulating material; a build-up layer formed on one surface of the insulating material, and including at least one circuit layer and at least one insulating layer; and a metal layer formed on the other surface of the insulating material and electrically disconnected from the circuit layer.07-04-2013
20130168142Wiring member and method for producing the same - A wiring member including: a copper foil; a noise suppressing layer containing a metallic material or a conductive ceramic and having a thickness within the range of 5 to 200 nm; an organic polymer film; and an insulating adhesive layer, wherein the insulating adhesive layer is provided between the organic polymer film formed on the noise suppressing layer and the copper foil, or between the noise suppressing layer formed on the organic polymer film and the copper foil. Further, there is provided a method for producing the wiring member.07-04-2013
20130168144PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME - The present invention relates to a method for manufacturing a printed circuit board, which includes: preparing a base substrate with an electrode pad; providing a conductive material having a predetermined height; disposing the conductive material on the electrode pad; and forming a conductive post on the electrode pad by bonding the electrode pad and the conductive material, and can achieve a fine pitch and easily implement a conductive post with a high aspect ratio.07-04-2013
20080217047CIRCUIT BOARD SURFACE STRUCTURE - A circuit board surface structure includes a circuit board having at least one surface provided with a plurality of electrically connecting pads, an insulating protective layer characterized by photosensitivity and solder resisting and formed on the circuit board, and a plurality of openings formed in the insulating protective layer to expose the electrical connecting pads on the circuit board and tapered upward; and a conductive element formed in the opening, so as to increase the contact area and reinforce bonding between the electrically connecting pads and the conductive element.09-11-2008
20130175073Thick On-Chip High-Performance Wiring Structures - Methods for fabricating a back-end-of-line (BEOL) wiring structure, BEOL wiring structures, and design structures for a BEOL wiring structure. The BEOL wiring may be fabricated by forming a first wire in a dielectric layer and annealing the first wire in an oxygen-free atmosphere. After the first wire is annealed, a second wire is formed in vertical alignment with the first wire. A final passivation layer, which is comprised of an organic material such as polyimide, is formed that covers an entirety of a sidewall of the second wire.07-11-2013
20130133936Bonded Board and Manufacturing Method Thereof - Provided is an integral thermal compression bonded board technology which is high in reliability and low in cost. In a process of bonding printed boards to each other, electrodes are connected with each other by solder connection using a Cu core solder plated ball and the boards are bonded by a three-layer bonding material constituted by a bonding material layer, a ball maintaining core layer, and the bonding layer, and solder of the Cu core solder plated ball inserted into holes of three layers is formed by integral thermal compression. They are connected with each other by flux or welcoming solder.05-30-2013
20130112462Metal Alloy Cap Integration - A metal interconnect structure, which includes metal alloy capping layers, and a method of manufacturing the same. The originally deposited alloy capping layer element within the interconnect features will diffuse into and segregate onto top surface of the metal interconnect. The metal alloy capping material is deposited on a reflowed copper surface and is not physically in contact with sidewalls of the interconnect features. Thus, there is a reduction in electrical resistivity impact from residual alloy elements in the interconnect structure. That is, there is a reduction, of alloy elements inside the features of the metal interconnect structure. The metal interconnect structure includes a dielectric layer with a recessed line, a liner material on sidewalls, a copper material, an alloy cap, and a capping layer.05-09-2013
20130092424STRESS BUFFER LAYER AND METHOD FOR PRODUCING SAME - [Problem to be Solved]04-18-2013
20130092423METHOD FOR FORMING CONDUCTIVE CIRCUIT - A conductive circuit is formed by printing a pattern using a conductive ink composition and heat curing the pattern. A thixotropic agent, typically carbon black is added to the solvent-free ink composition comprising an addition type silicone resin precursor, a curing catalyst, and conductive particles. The ink composition has such thixotropy that the printed pattern may retain its shape after curing.04-18-2013
20130092426ANISOTROPIC CONDUCTIVE FILM AND FABRICATION METHOD THEREOF - An embodiment of the disclosure provides an anisotropic conductive film including an insulating substrate and a plurality of conductive polymer pillars. The insulating substrate has a first surface and a second surface. Each of the conductive polymer pillars passes through the insulating substrate and is exposed at the first surface and the second surface, and the conductive polymer pillars include an intrinsically conducting polymer.04-18-2013
20130092425TRANSPARENT CONDUCTIVE FILM - A transparent conductive film which comprises: a transparent adhesive layer; a first polycycloolefin film laminated on one surface of the transparent adhesive layer; a second polycycloolefin film laminated on the other surface of the transparent adhesive layer; a plurality of first transparent electrode patterns formed on the first polycycloolefin film; and a plurality of second transparent electrode patterns formed on the second polycycloolefin film. The transparent conductive film shows little color phase irregularity when observed from any direction.04-18-2013
20130092422CIRCUIT BOARD STRUCTURE AND MANUFACTURING METHOD THEREOF - A circuit board structure includes a core circuit structure, a first and a second dielectric layers, a first and a second conductive blind via structures, a third and a fourth patterned circuit layers, and a first and a second surface passivation layers. The first and the second dielectric layers have at least one first and second blind vias exposing parts of a first and a second patterned circuit layers of the core circuit structure, respectively. The first and the second conductive blind via structures are disposed into the first and the second blind vias respectively. The third and the fourth patterned circuit layers are electrically connected to the first and the second patterned circuit layers through the first and the second conductive blind via structures respectively. The first and the second surface passivation layers respectively expose parts of the third and the fourth patterned circuit layers.04-18-2013
20130098667EMBEDDED PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF - Disclosed herein is an embedded printed circuit board (PCB) including: a copper foil laminate; an internal electronic component inserted into the copper foil laminate; a first circuit pattern formed on a surface of the internal electronic component; and a second circuit pattern formed on the copper foil laminate. Since the surface space of the electronic component embedded in the substrate is utilized as a wiring space, a wiring design can be optimized, layers can be simplified, and an increase in the thickness of the substrate can be prevented.04-25-2013
20130112463Printed Circuit Board and Manufacturing Method Thereof - The present invention provides a structure of a printed circuit board and a manufacturing method thereof. The method includes: (a) forming a circuit pattern on an insulating layer in which a seed layer is formed; (b) embedding the circuit pattern into the insulating layer by a press method; and (c) removing the seed layer. According to the present invention, a fine pattern may be formed without occurring alignment problem by forming a circuit pattern directly on an insulating layer and reliability of the formed fine pattern may be increased by performing a process of embedding protruded circuits into the insulating layer. In addition, possibility of inferior circuit occurring due to ion migration between adjacent circuits may be reduced by performing over-etching a circuit layer to be lower than a surface of the insulating layer during the etching process of removing a seed layer.05-09-2013
20130112464CONFORMAL REFERENCE PLANES IN SUBSTRATES - Methods, systems, and apparatuses for circuit boards are provided herein. An electrically insulating material is formed over one or more traces on a circuit board. One or more further electrically conductive features are present on the circuit board. A layer of an electrically conductive material is formed over the one or more traces that is electrically isolated from the one or more traces by the electrically insulating material, and is in electrical contact with the one or more further electrically conductive features. The electrically conductive material confines magnetic and electric fields produced when the one or more traces conduct an alternating current. By confining the magnetic and electric field distributions in this manner, problems of interference and/or crosstalk with adjacent signal traces are reduced or eliminated.05-09-2013
20130126220POROUS STRUCTURE PROVIDED WITH A PATTERN THAT IS COMPOSED OF CONDUCTIVE POLYMER AND METHOD OF MANUFACTURING THE SAME - A porous structure (05-23-2013
20130140069CONDUCTIVE BONDING MATERIAL, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE - A conductive bonding material includes: copper particles coated with either gallium or gallium alloy; and either tin particles or tin alloy particles. An electronic component includes: a wiring board having electrode pads; a component mounted on the wiring board and having a plurality of electrodes; a sealing resin covering the component; and a plurality of terminals coupled to a wiring line in the wiring board to an external substrate, wherein the plurality of electrodes being coupled to the electrode pads through a conductive bonding material containing copper particles coated with either gallium or gallium alloy particles and either tin particles or tin alloy particles.06-06-2013
20130140066CU ALLOY INTERCONNECTION FILM FOR TOUCH-PANEL SENSOR AND METHOD OF MANUFACTURING THE INTERCONNECTION FILM, TOUCH-PANEL SENSOR, AND SPUTTERING TARGET - Provided is a Cu alloy interconnection film for touch-panel sensors, which excels in oxidation resistance and adhesion properties, and is low in electrical resistance. The interconnection film contains at least one alloy element selected from a group consisting of Ni, Zn, and Mn by 0.1 to 40 atom % in total, and the remainder contains Cu and inevitable impurities. Alternatively, the interconnection film is made of a Cu alloy containing at least one element selected from the group consisting of Ni, Zn, and Mn. In this case, if the Cu alloy contains one element, Ni is contained by 0.1 to 6 atom %, or Zn is contained by 0.1 to 6 atom %, or Mn is contained by 0.1 to 1.9 atom %. On the other hand, if two or more alloy elements are contained, the alloy elements are contained by 0.1 to 6 atom % in total (wherein, Mn is contained by [((6−x)×2)/6] atom % or less if Mn is contained; here, x is a total adding amount of Ni and Zn).06-06-2013
20130140067WAFER OR CIRCUIT BOARD AND JOINING STRUCTURE OF WAFER OR CIRCUIT BOARD - A wafer (or a circuit board), which is used to perform three-dimensional mounting, has protrusion 06-06-2013
20130140068Secondary Alloyed 1N Copper Wires for Bonding in Microelectronics Devices - A secondary alloyed 1N copper wire for bonding in microelectronics contains one or more corrosion resistance alloying materials selected from Ag, Ni, Pd, Au, Pt, and Cr. A total concentration of the corrosion resistance alloying materials is between about 0.09 wt % and about 9.9 wt %.06-06-2013
20080202800Re-routing method and the circuit thereof - A re-routing method and the circuit thereof, used to rearrange the external circuit coupled with the integrated circuit (IC), comprises the steps of providing a plurality of first conductive plate on the substrate of the IC to form an isolation layer; providing a plurality of second conductive plates on the isolation layer, wherein each of the second conductive plates is moved in isovector with each of the corresponding first conductive plates as the center, each of the second conductive plates electrically connected with each of the first conductive plates. Therefore, according to move the second conductive plates in isovector, the probe card may be reused for circuit testing to save the cost and reduce the material management.08-28-2008
20110209906PROCESS FOR PRODUCING SUBSTRATE HAVING PATTERNED CONDUCTIVE POLYMER FILM AND SUBSTRATE HAVING PATTERNED CONDUCTIVE POLYMER FILM - A process for producing a substrate having a patterned conductive polymer film is provided in which stripping properties are excellent, and discoloration of an end part of the conductive polymer film when a resist film is stripped from the conductive polymer film is suppressed. The process for producing a substrate having a patterned conductive polymer film includes in sequence a step of forming a substrate having in order above the substrate a conductive polymer film and a patterned resist film, a step of etching the conductive polymer film in accordance with the resist film pattern, and a step of stripping the resist film above the conductive polymer film by means of a stripping liquid, the stripping liquid containing an organic solvent (A) at 5 to 40 wt % selected from the group consisting of an N-alkylpyrrolidone, a carboxylic acid amide compound, a dialkyl sulfoxide, and an ether compound and an organic solvent (B) at 60 to 95 wt % selected from the group consisting of an alkyrolactone, an alkylene carbonate, and a polyhydric alcohol.09-01-2011
20110209905WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME - A wiring board includes a substrate having a first penetrating hole penetrating through the substrate, a first through-hole conductor formed on the inner wall of the first penetrating hole, a filler filled inside the first conductor and forming a second penetrating hole, and a second through-hole conductor formed in the second penetrating hole, a first conductive circuit formed on a first surface of the substrate; a second conductive circuit formed on a second surface of the substrate; a first conductive portion formed on one end of the second penetrating hole, and a second conductive portion formed on the opposite end of the second penetrating hole. The first conductor is connecting the first and second circuits. The second conductor is connecting the first and second conductive portions. The first circuit has the thickness which is set greater than the thickness of the first conductive portion.09-01-2011
20130146341PACKAGE STRUCTURE AND THE METHOD TO MANUFACTURE THEREOF - The invention discloses a package structure with an overlaying metallic material overlaying a solder material. A substrate comprises a first solder pad and a second solder pad thereon. A conductive element on the substrate comprises a first electrode and a second electrode thereon. A solder material electrically connects the first solder pad and the second solder pad to the first electrode and the second electrode respectively. An overlaying metallic material overlays the exposed areas of the solder metallic material, the first solder pad, the second solder pad, the first electrode and the second electrode, wherein the exposed areas comprise metallic material having a lower melting point than the second metallic material.06-13-2013
20130146342PATTERN-FORMING COMPOSITION AND PATTERN-FORMING METHOD USING THE SAME - The present invention relates to a pattern-forming composition used to form a conductive circuit pattern. The pattern-forming composition comprises Cu powders, a solder for electrically coupling the Cu powders, a polymer resin, a curing agent and a reductant. According to the present invention, a circuit pattern having superior conductivity can be formed at low cost.06-13-2013
20130146343PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board includes: an insulating layer; a first metal layer formed on the insulating layer; a second metal layer formed on a portion of the first metal layer; and an oxidation layer formed on a portion of the first metal layer on which the second metal layer is not formed, wherein materials of the first and second metal layers are different from each other, and the second metal layer is made of a material of which ionization tendency is smaller than that of the first metal layer.06-13-2013
20110220398METHOD OF MANUFACTURING ELECTRONIC APPARATUS, ELECTRONIC COMPONENT-MOUNTING BOARD, AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing an electronic apparatus including a first and a second components, includes: forming a first solder bump on one of the first component and the second component; forming a second solder bump on the other one of the first component and the second component; bringing the first solder bump into contact with the second solder bump at a temperature higher than the liquidus temperature of any of the first and the second solder bumps such that the first and the second solder bumps are fused together to form a solder joint of an alloy having a lower liquidus temperature than any of the first and the second solder bumps; and solidifying the solder joint between the first and the second component.09-15-2011
20100282500COPPER FOIL ATTACHED TO THE CARRIER FOIL, A METHOD FOR PREPARING THE SAME AND PRINTED CIRCUIT BOARD USING THE SAME - Provided is an ultra-thin copper foil to which a carrier foil is attached, including: a carrier foil, a peeling layer, and an ultra-thin copper foil, wherein the peeling layer includes a first metal A having peelability, a second metal B and a third metal C facilitating coating of the first metal, wherein the amount (a) of the first metal A is in a range of about 30 to about 89% by total weight of the peeling layer, the amount (b) of the second metal B is in a range of about 10 to about 60% by total weight of the peeling layer, and the amount (c) of the third metal C is in a range of about 1 to about 20% by total weight of the peeling layer.11-11-2010
20100059259RESIN BOARD TO BE SUBJECTED TO OZONE TREATMENT, WIRING BOARD, AND METHOD OF MANUFACTURING THE WIRING BOARD - A resin board that consists of at least one of a mixture of a plurality of types of resins having different degrees of susceptibility to erosion by an ozone solution, and a resin having, in a molecule, a plurality of types of components having different degrees of susceptibility to erosion by the ozone solution is treated with ozone water to form a reformed layer, and a catalyst metal is adsorbed by the reformed layer so as to form a resin-metal composite layer, on which a plating process is performed. In the resin board, a component or components that is/are likely to be eroded on by the ozone solution dissolves into the ozone solution, and pores or clearances on the order of nanometers are formed between the component(s) and a component or components that is/are less likely to be eroded by the ozone solution. With the plating deposited in the pores or clearances, the adhesion strength is improved due to an anchoring effect. Thus, the adhesion strength of the plating film is improved even where the resin-metal composite layer has a thickness of 10 to 200 nm.03-11-2010
20100294547ANISOTROPIC CONDUCTIVE JOINT PACKAGE - An anisotropic conductive joint package in which an anisotropic conductive film is joined to at least one conductive material selected from among the group consisting of gold (Au), silver (Ag), copper (Cu), aluminum (Al), magnesium (Mg), nickel (Ni), a tin oxide doped with indium (ITO), molybdenum (Mo), iron (Fe), palladium (Pd), beryllium (Be), and rhenium (Re). The package is characterized in that: the anisotropic conductive film has an insulating base and conductive paths composed of conductive members, insulated from one another, and extending through the insulating base in the direction of the thickness of the insulating base, one ends of the conductive paths are exposed from one side of the insulating base, the other ends are exposed from the other side, the density of the conductive paths is 3,000,000 pieces/mm11-25-2010
20100307801Multilayer ceramic substrate and manufacturing method thereof - The present invention relates to a multilayer ceramic substrate including: a ceramic stacked structure in which multiple ceramic layers are stacked and interconnected to one another through vias provided in respective ceramic layers, the ceramic stacked structure having surface reforming layers 12-09-2010
20100307800Anodised Aluminum, Dielectric, and Method - The invention provides an anodised aluminium product for use in a metal core printed circuit board which in which the anodised layer forms a dielectric, and the resultant metal core printed circuit board has a sandwich structure having a thermal conductivity higher than and a thermal resistance lower than conventional metal core printed circuit boards using alternative dielectric layers, and with improved electrical insulation properties. The invention has application in manufacture of rigid and flexible printed circuit boards which have a metal substrate, manufacture of a heat conductive substrate for semiconductor devices, and electronic devices. While the use of the invention is described in relation to metal core printed circuit boards, the anodising process and anodised aluminium of the invention may have other applications beyond this technology. The invention also provides a method of manufacturing such an anodised aluminium product.12-09-2010
20120273264ELECTRONIC COMPONENT PACKAGE - An electronic component package includes a circuit board which has a mounting surface that does not show wettability for fluxless solder and on which a semiconductor element is mounted, a soldering pattern that shows wettability for the fluxless solder and is formed to surround an area on which the semiconductor element is mounted, a lid that has a shape such that a cavity is formed between the lid and the circuit board, a bonding surface to the soldering pattern is formed in a ring shape, and does not show wettability for the fluxless solder, a solder bonded part that is formed by heating a solder precoat formed of the fluxless solder on a bonding surface of the lid, and a ventilation hole that is formed by providing a bonding surface of the lid exposed in a discontinuous part of the solder precoat after the solder bonded part is formed.11-01-2012
20120273263Conductive Formulations For Use In Electrical, Electronic And RF Applications - Metal flakes, an organic metal precursor, an organic solvent and either no binder, or a volatile or a thermally decomposable binder are combined to form a paste. The paste is deposited in a circuit pattern on a substrate and the circuit pattern is cured. While curing, the organic metal precursor decomposes to leave an electrically conductive path, and the printed circuit is thus formed. A precursor to an electrically conductive circuit material includes an organic metal precursor, metal microparticles, and an organic solvent. The method can be employed to form printed circuits, for a variety of electrical, electronic and sensing application, such as crack detection in ceramic, plastics, concrete, wood, fabric, leather, rubber or paper and composite materials.11-01-2012
20130153273STIFFENER AND METHOD FOR MANUFACTURING THE SAME - Disclosed herein are a stiffener and a method for manufacturing the same. The method includes: forming a metal film on an upper surface or a lower surface of a base layer; forming a plurality of via holes penetrating the base layer and the metal film; and forming a first plating film covering an external surface including an inner surface of each of the via holes.06-20-2013
20130153274CIRCUIT BOARD CAPABLE OF PREVENTING CONTACT OF A GOLD FINGER AND SOLDER - A circuit board includes a substrate whereon a sunken portion is formed. The circuit board further includes a gold finger structure disposed inside the sunken portion. A height difference is formed between a top surface of the gold finger structure and a surface of the substrate substantially.06-20-2013
20100314161SUBSTRATE FOR FLIP CHIP BONDING AND METHOD OF FABRICATING THE SAME - Disclosed is a substrate for flip chip bonding, in which a base solder layer is formed between a pad and a metal post, thereby increasing impact resistance and mounting reliability. A method of fabricating the substrate for flip chip bonding is also provided.12-16-2010
20110232952METHOD OF ATTACHING DIE TO CIRCUIT BOARD WITH AN INTERMEDIATE INTERPOSER - A die having a base formed of a first material is connected to a board having a base formed of a second material. An interposer having a coefficient of thermal expansion intermediate coefficients of thermal expansion of the first and second materials is positioned between the die and the board.09-29-2011
20110232951MULTILAYER WIRING SUBSTRATE - In a wiring laminate portion of a multilayer wiring substrate, a solder resist layer having a plurality of openings is disposed on a main surface side of the laminate structure, and connection terminals are embedded in an outermost resin insulation layer in contact with the solder resist layer. Each of the connection terminals comprises a copper layer and a metallic layer formed of at least one type of metal other than copper. A main-surface-side circumferential portion of the copper layer is covered by the solder resist layer. At least a portion of the metallic layer is located in a recess in a main-surface-side central portion of the copper layer. At least a portion of the metallic layer is exposed via a corresponding opening.09-29-2011
20110232950SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME - The present invention relates to a method for manufacturing a substrate, including: providing a metal base; forming an oxide layer on one surface of the metal base; forming a chemical barrier layer on the oxide layer; forming an intermediate layer on the chemical barrier layer; forming a first metal layer on the intermediate layer; and removing parts of the intermediate layer and the first metal layer by etching to form a first metal wiring layer. Moreover, the present invention may include the following steps alternatively: laminating an insulating adhesive layer and a second metal layer on an exposed area of the chemical barrier layer; forming a second metal wiring layer by etching a part of the second metal layer; forming a surface metal layer; and forming a chip layer on the surface metal layer. The present invention also provides a structure of a substrate obtained according to the aforementioned method.09-29-2011
20130180768SILVER PLATING IN ELECTRONICS MANUFACTURE - Compositions and methods for silver plating onto metal surfaces such as PWBs in electronics manufacture to produce a silver plating which is greater than 80 atomic % silver, tarnish resistant, and has good solderability.07-18-2013
20130153272PRINTED CIRCUIT BOARD - A printed circuit board includes a top layer, a bottom layer, and a mounting hole vertically extending through the top layer and the bottom layer. A first copper ring is located on a top surface of the top layer and around the mounting hole. A second copper ring is located a bottom surface of the bottom layer and around the mounting hole. A number of first pads are positioned on the first copper ring. A number of second pads are positioned on the second copper ring. The first and second copper rings are covered with solder mask, but the first and second pads are not covered with the solder mask.06-20-2013
20110284275CIRCUIT BOARD HAVING GROWN METAL LAYER IN A FLEXIBLE ZONE - A circuit board has a grown metal layer in a flexible zone. A circuit board has a first part, a second part and a recess in the circuit board that is arranged between the first part and the second part. A thickness of the circuit board reduced in the region of the recess. The first part can be pivoted relative to the second part as a result of the recess. The flexibility of the circuit board is improved in the range of the recess by a metal layer applied on a surface section of the circuit board in the recess by deposition. Furthermore, EMC problems can be reduced by the metal layer on a side wall of the recess and electrical contacts to conductor path metallization layers can be created.11-24-2011
20110284273POWER CORE FOR USE IN CIRCUITIZED SUBSTRATE AND METHOD OF MAKING SAME - A power core adapted for use as part of a circuitized substrate, e.g., a PCB or LCC. The core includes a first layer of low expansion dielectric and two added layers of a different low expansion dielectric bonded thereto, with two conductive layers positioned on the two added low expansion dielectric layers. At least one of the conductive layers serves as a power plane for the power core, which in turn is usable within a circuitized substrate, also provided. Methods of making the power core and circuitized substrate are also provided. The use of different low expansion dielectric materials for the power core enables the use of support enhancing fiberglass in one layer while such use is precluded in the other two dielectric layers, thus preventing CAF shorting problems in highly precisely defined thru holes formed within the power core.11-24-2011
20110297429SLIDING CONTACT ASSEMBLY - A sliding contact assembly includes a printed circuit board having a substrate on which is arranged at least one contact pad. The at least one contact pad is made of several layers including a thin external layer essentially made of gold. The gold layer is deposited on the at least one contact pad through a gold flash type process. The assembly also includes a movable contact element including a support member. The support member has a contact surface provided with a protective coating and the contact surface is biased against the said contact pad when the movable contact element is moved in relation to the contact pad. The protective coating includes a palladium alloy layer. Methods to manufacture a sliding contact assembly are also presented.12-08-2011
20130118785PRINTED CIRCUIT BOARD WITH CONNECTING WIRES - A printed circuit board (PCB) includes a substrate, a pad, a plurality of connecting wires and a plurality of separating portions. The pad arranged on at least one surface of the substrate. The plurality of connecting wires increase contact area of the pad and a copper foil around the pad to keep the current of the PCB steady when a lot of current flow through the PCB. The plurality of separating portions located on between the pad and the copper foil around the pad to divide the pad and the copper foil to avoid short-circuit when the copper foil is etched.05-16-2013
20130118784HIGH STRENGTH THROUGH-SUBSTRATE VIAS - A component includes a support structure having first and second spaced-apart and parallel surfaces and a plurality of conductive elements extending in a direction between the first and second surfaces. Each conductive element contains an alloy of a wiring metal selected from the group consisting of copper, aluminum, nickel and chromium, and an additive selected from the group consisting of Gallium, Germanium, Indium, Selenium, Tin, Sulfur, Silver, Phosphorus, and Bismuth. The alloy has a composition that varies with distance in at least one direction across the conductive element. A concentration of the additive is less than or equal to 5% of the total atomic mass of the conductive element, and a resistivity of the conductive element is between 2.5 and 30 micro-ohm-centimeter.05-16-2013
20110303444LAMINATED CIRCUIT BOARD, BONDING SHEET, LAMINATED-CIRCUIT-BOARD PRODUCING METHOD, AND BONDING -SHEET PRODUCING METHOD - A laminated circuit board includes a first wiring board including a first land formed thereon; a second wiring board including a second land formed thereon; and a bonding layer interposed between the first wiring board and the second wiring board, wherein the bonding layer electrically connects the first land to the second land with a conductive material, wherein the bonding layer has a front-side layer, a rear-side layer, and a middle layer, and the middle layer has a higher viscosity than the front-side layer and the rear-side layer.12-15-2011
20110303443MOUNT STRUCTURE, ELECTRONIC APPARATUS, STRESS RELIEVING UNIT, AND METHOD OF MANUFACTURING STRESS RELIEVING UNIT - A mount structure for mounting an electronic component on a circuit board includes a stress relieving unit including a center portion having a smaller cross section than a cross section of ends of the stress relieving unit; a first joint portion configured to join one end of the stress relieving unit onto an electrode pad of the electronic component; a second joint portion configured to join the other end of the stress relieving unit onto a connecting pad of the circuit board. Hollow spaces are provided between plural joint structures each of which includes the first joint portion, the stress relieving unit, and the second joint portion.12-15-2011
20110308846CONDUCTIVE FILM AND METHOD FOR PRODUCING THE SAME - A conductive film has a transparent support, a first conductive silver image disposed on one main surface of the transparent support, and a second conductive silver image disposed on the other main surface of the transparent support. The first and second conductive silver images are obtained by forming at least one silver halide emulsion layer on each of the surfaces of the transparent support and then exposing and developing the silver halide emulsion layer. The first silver image and the second silver image each contain a net-like structure in a region required to be transparent. The net-like structure comprises thin metal wires having a line width of 10 μm or less, and forms a conductive layer having a sheet resistance of 50 ohm/sq or less.12-22-2011
20110308845PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - The present invention provides a printed circuit board including: an insulating member having a through via hole; a circuit pattern disposed on the insulating member; a solder resist disposed on the insulating member while exposing a portion of the circuit pattern; a via plating pad connected to the circuit pattern, disposed inside the via hole, and covering a lower opening of the via hole along an inner wall of the via hole; and an external connection means having a center portion coinciding with a center portion of the via hole and disposed on the via plating pad, and a method of manufacturing the same.12-22-2011
20110308844Conductive electrode pattern and solar cell with the same - Disclosed herein is a conductive electrode pattern used as an electrode of a solar cell. The conductive electrode pattern includes a lower metal layer and an upper metal layer vertically disposed on a substrate, wherein any one of the lower metal layer and the upper metal layer includes silver (Ag) and the other one of the lower metal layer and the upper metal layer includes a metal of transition metals, different from that of the lower metal layer.12-22-2011
20130186676Methods and Apparatus for a Substrate Core Layer - A structure for a core layer of a substrate and a method for fabricating a core layer of a substrate are disclosed. The core layer comprises a molding compound encapsulating a die or a plurality of dies, a dielectric layer on the surfaces of the molding compound, and a conductive layer on top of the dielectric layer. A through hole is formed through the dielectric layer and the molding compound, which may be filled with a metal plate. A laser via is formed similarly. Build-up layers may be assembled next to the core layer to form the substrate, which can be used to package dies.07-25-2013
20130186677PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - A printed circuit board and a method of manufacturing the printed circuit board are disclosed. In an embodiment of the present invention, the method of manufacturing a printed circuit board can include: providing a pair of conductive layers, in which roughness of one surface of one of the pair of conductive layers is different from roughness of one surface of the other of the pair of conductive layers; and stacking the pair of the conductive layers on a dielectric layer such that one surface of one of the pair of conductive layers faces one surface of the dielectric layer and one surface of the other of the pair of conductive layers faces another surface of the dielectric layer.07-25-2013
20120018200TRANSPARENT CONDUCTIVE FILM FOR TOUCH PANEL AND METHOD FOR MANUFACTURING THE SAME - Disclosed herein are a transparent conductive film for a touch panel and a method for manufacturing the same. A transparent conductive film 01-26-2012
20120018199PRINTED CIRCUIT BOARD - A printed circuit board includes a layer. A layer of copper is covered on a surface of the layer. A through hole passes through the printed circuit board. An approximately C-shaped thermal engraving is defined in the surface of the layers, surrounding the through hole and without being covered by the layer of copper. An opening of the thermal engraving faces an output terminal of the power supply.01-26-2012
20130199828HIGH-FREQUENCY CIRCUIT SUBSTRATE - The invention offers a high-frequency circuit substrate that sufficiently decreases the transmission delay and transmission loss in comparison with the conventional high-frequency circuit substrate. In the offered high-frequency circuit substrate, a dielectric layer made of fluororesin is brought into intimate contact directly with a metal conductor that is used for wiring and that has a surface not subjected to coarsening treatment or primer treatment. The offered high-frequency circuit substrate causes a transmission loss of −3 dB/m or less at a frequency of 1 GHz and has a combined specific inductive capacity of 2.6 or less and a combined dielectric loss tangent of 0.0007 or less.08-08-2013
20120067628PRINTED WIRING BOARD - A printed wiring board including solder pads excellent in frequency characteristic is provided. To do so, each solder pad 03-22-2012
20130206461Electrical Conductors and Methods of Manufacturing Electrical Conductors - A method of manufacturing an electrical conductor includes providing a substrate layer, depositing a surface layer on the substrate layer that has pores at least partially exposing the substrate layer, and forming graphene deposits in the pores. Optionally, the graphene deposits may be formed only in the pores. The graphene deposits may be formed along the exposed portions of the substrate layer. The graphene layers may be selectively deposited or may be deposited to cover an entire layer. Optionally, the forming of the graphene deposits may include processing the electrical conductor using a chemical vapor deposition process using an organic compound precursor and heat of sufficient temperature to facilitate graphene growth on the metal compound comprising the substrate layer.08-15-2013
20130206462ANISOTROPIC CONDUCTIVE FILM DISPERSED WITH CONDUCTIVE PARTICLES, AND APPARATUS AND METHOD FOR PRODUCING SAME - An anisotropic conductive film includes a substrate layer, an insulated layer and a number of conductive particles dispersed in the insulated layer. The insulated layer includes a lower layer attached on a side surface of the substrate layer and a nano-structured layer having a number of nano-scaled micro-structures on the lower layer. The conductive particles are dispersed in the nano-structured layer and insulated and spaced from each other by the micro-structures.08-15-2013

Patent applications in class Conducting (e.g., ink)