HOPEWELL JUNCTION, NY, US - Patent application

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HOPEWELL JUNCTION, NY US

1. 20110038162 Foil mirror with back light - generally to a foil mirror 02-17-2011
2. 20110037143 Semiconductor Device Using An Aluminum Interconnect To Form Through-Silicon Vias 02-17-2011
3. 20110034021 PROGRAMMABLE THROUGH SILICON VIA - Through silicon vias in silicon chips are both programmable and non-programmable 02-10-2011
4. 20110027948 METHOD FOR MANUFACTURING A FINFET DEVICE 02-03-2011
5. 20110018575 METHOD AND SYSTEM FOR ASSESSING RELIABILITY OF INTEGRATED CIRCUIT 01-27-2011
6. 20110016442 Method of Performing Static Timing Analysis Considering Abstracted Cell's Interconnect Parasitics 01-20-2011
7. 20110014757 PROCESS INTEGRATION FOR FLASH STORAGE ELEMENT AND DUAL CONDUCTOR COMPLEMENTARY MOSFETS 01-20-2011
8. 20110001169 FORMING UNIFORM SILICIDE ON 3D STRUCTURES 01-06-2011
9. 20100332193 Method of Multi-segments Modeling Bond Wire Interconnects with 2D Simulations in High Speed, High Density Wire Bond Packages 12-30-2010
10. 20100330763 METHOD OF CREATING ASYMMETRIC FIELD-EFFECT-TRANSISTORS 12-30-2010
11. 20100327445 STRUCTURE OF POWER GRID FOR SEMICONDUCTOR DEVICES AND METHOD OF MAKING THE SAME 12-30-2010
12. 20100327430 SEMICONDUCTOR DEVICE ASSEMBLY HAVING A STRESS-RELIEVING BUFFER LAYER 12-30-2010
13. 20100314689 LOCAL METALLIZATION AND USE THEREOF IN SEMICONDUCTOR DEVICES 12-16-2010
14. 20100306723 Order Independent Method of Performing Statistical N-Way Maximum/Minimum Operation for Non-Gaussian and Non-linear Distributions 12-02-2010
15. 20100306603 Segmented and Overlapped skew tracking method for serdes frame interface Level 5 12-02-2010
16. 20100301331 BODY CONTACT STRUCTURE FOR IN-LINE VOLTAGE CONTRAST DETECTION OF PFET SILICIDE ENCROACHMENT 12-02-2010
17. 20100289645 SYSTEM AND METHOD FOR SAFEGUARDING WAFERS AND PHOTOMASKS 11-18-2010
18. 20100289144 3D INTEGRATION STRUCTURE AND METHOD USING BONDED METAL PLANES 11-18-2010
19. 20100283089 METHOD OF REDUCING STACKING FAULTS THROUGH ANNEALING 11-11-2010
20. 20100281447 METHOD FOR DETECTING CONTRADICTORY TIMING CONSTRAINT CONFLICTS 11-04-2010
21. 20100277210 THREE-DIMENSIONAL CHIP-STACK SYNCHRONIZATION 11-04-2010
22. 20100269083 Method of Employing Slew Dependent Pin Capacitances to Capture Interconnect Parasitics During Timing Abstraction of VLSI Circuits 10-21-2010
23. 20100265778 SEMICONDUCTOR MEMORY DEVICE - Static Random Access Memory includes word lines WL bit lines BL address decoders that select one of the word lines WL in 10-21-2010
24. 20100261318 3D CHIP-STACK WITH FUSE-TYPE THROUGH SILICON VIA 10-14-2010
25. 20100258904 BOTTLE-SHAPED TRENCH CAPACITOR WITH ENHANCED CAPACITANCE 10-14-2010
26. 20100255428 METHOD TO MITIGATE RESIST PATTERN CRITICAL DIMENSION VARIATION IN A DOUBLE-EXPOSURE PROCESS 10-07-2010
27. 20100244206 METHOD AND STRUCTURE FOR THRESHOLD VOLTAGE CONTROL AND DRIVE CURRENT IMPROVEMENT FOR HIGH-K METAL GATE TRANSISTORS 09-30-2010
28. 20100244198 CMOS SIGE CHANNEL PFET AND SI CHANNEL NFET DEVICES WITH MINIMAL STI RECESS 09-30-2010
29. 20100213523 eDRAM MEMORY CELL STRUCTURE AND METHOD OF FABRICATING 08-26-2010
30. 20100213522 METHOD FOR FORMING A SEMICONDUCTOR STRUCTURE TO REMEDY BOX UNDERCUT AND STRUCTURE FORMED THEREBY 08-26-2010
31. 20100211922 Method of Performing Statistical Timing Abstraction for Hierarchical Timing Analysis of VLSI circuits 08-19-2010
32. 20100210098 SELF-ALIGNED CONTACT - method of forming contacts for semiconductor devices the method including depositing an inter-level dielectric over a plurality 08-19-2010
33. 20100207246 METHOD OF MAKING AN MIM CAPACITOR AND MIM CAPACITOR STRUCTURE FORMED THEREBY 08-19-2010
34. 20100207245 HIGHLY SCALABLE TRENCH CAPACITOR - improved trench structure, and method for its fabrication are disclosed 08-19-2010
35. 20100204940 METHOD AND SYSTEM OF COMMONALITY ANALYSIS FOR LOTS WITH SCRAPPED WAFER 08-12-2010
36. 20100204839 METHOD AND APPARATUS FOR THE MONITORING OF WATER USAGE WITH PATTERN RECOGNITION 08-12-2010
37. 20100203717 CUT FIRST METHODOLOGY FOR DOUBLE EXPOSURE DOUBLE ETCH INTEGRATION 08-12-2010
38. 20100201390 PROBE CARD, METHOD FOR MANUFACTURING PROBE CARD, AND PROBER APPARATUS 08-12-2010
39. 20100201376 DETECTING ASYMMETRICAL TRANSISTOR LEAKAGE DEFECTS 08-12-2010
40. 20100200960 DEEP TRENCH CRACKSTOPS UNDER CONTACTS - Deep trenches formed beneath contact level in a semiconductor substrate function as crackstops in a die area or 08-12-2010
41. 20100200958 PEDESTAL GUARD RING HAVING CONTINUOUS M1 METAL BARRIER CONNECTED TO CRACK STOP 08-12-2010
42. 20100200949 METHOD FOR TUNING THE THRESHOLD VOLTAGE OF A METAL GATE AND HIGH-K DEVICE 08-12-2010
43. 20100200896 EMBEDDED STRESS ELEMENTS ON SURFACE THIN DIRECT SILICON BOND SUBSTRATES 08-12-2010
44. 20100196825 DEVELOPABLE BOTTOM ANTIREFLECTIVE COATING COMPOSITIONS ESPECIALLY SUITABLE FOR ION IMPLANT APPLICATIONS 08-05-2010
45. 20100194483 AUTO-CALIBRATION FOR RING OSCILLATOR VCO 08-05-2010
46. 20100194482 COMPENSATION OF VCO GAIN CURVE OFFSETS USING AUTO-CALIBRATION 08-05-2010
47. 20100193964 METHOD OF MAKING 3D INTEGRATED CIRCUITS AND STRUCTURES FORMED THEREBY 08-05-2010
48. 20100187643 METHOD FOR TUNING THE THRESHOLD VOLTAGE OF A METAL GATE AND HIGH-K DEVICE 07-29-2010
49. 20100187610 SEMICONDUCTOR DEVICE HAVING DUAL METAL GATES AND METHOD OF MANUFACTURE 07-29-2010
50. 20100185999 SHORT PATH CUSTOMIZED MASK CORRECTION - Embodiments of the present invention provide a method of performing photo-mask correction 07-22-2010
51. 20100182729 METHOD OF OPERATING TRANSISTORS AND STRUCTURES THEREOF FOR IMPROVED RELIABILITY AND LIFETIME 07-22-2010
52. 20100182041 3D CHIP-STACK WITH FUSE-TYPE THROUGH SILICON VIA 07-22-2010
53. 20100182040 PROGRAMMABLE THROUGH SILICON VIA - Through silicon vias in silicon chips are both programmable and non-programmable 07-22-2010
54. 20100181643 EFUSE WITH PARTIAL SIGE LAYER AND DESIGN STRUCTURE THEREFOR 07-22-2010
55. 20100180244 Method For Efficiently Checkpointing And Restarting Static Timing Analysis Of An Integrated Circuit Chip 07-15-2010
56. 20100180243 Method of Performing Timing Analysis on Integrated Circuit Chips with Consideration of Process Variations 07-15-2010
57. 20100180242 Method and system for efficient validation of clock skews during hierarchical static timing analysis 07-15-2010
58. 20100180056 BUS ACCESS CONTROL APPARATUS AND METHOD - apparatus that controls access by multiple IP cores to a bus is provided 07-15-2010
59. 20100178619 METHOD FOR ENHANCING LITHOGRAPHIC IMAGING OF ISOLATED AND SEMI-ISOLATED FEATURES 07-15-2010
60. 20100178615 METHOD FOR REDUCING TIP-TO-TIP SPACING BETWEEN LINES 07-15-2010
61. 20100177179 APPARATUS AND METHOD FOR ENHANCING FIELD OF VISION OF THE VISUALLY IMPAIRED 07-15-2010
62. 20100176514 INTERCONNECT WITH RECESSED DIELECTRIC ADJACENT A NOBLE METAL CAP 07-15-2010
63. 20100176513 STRUCTURE AND METHOD OF FORMING METAL INTERCONNECT STRUCTURES IN ULTRA LOW-K DIELECTRICS 07-15-2010
64. 20100176512 STRUCTURE AND METHOD FOR BACK END OF THE LINE INTEGRATION 07-15-2010
65. 20100176506 THERMOELECTRIC 3D COOLING - The invention comprises a 3D chip stack with an intervening thermoelectric coupling plate 07-15-2010
66. 20100176450 STRUCTURE AND METHOD OF FORMING A TRANSISTOR WITH ASYMMETRIC CHANNEL AND SOURCE/DRAIN REGIONS 07-15-2010
67. 20100175043 FAST AND ACCURATE METHOD TO SIMULATE INTERMEDIATE RANGE FLARE EFFECTS 07-08-2010
68. 20100175042 EFFICIENT ISOTROPIC MODELING APPROACH TO INCORPORATE ELECTROMAGNETIC EFFECTS INTO LITHOGRAPHIC PROCESS SIMULATIONS 07-08-2010
69. 20100175041 ADJUSTMENT OF MASK SHAPES FOR IMPROVING PRINTABILITY OF DENSE INTEGRATED CIRCUIT LAYOUT 07-08-2010
70. 20100175040 METHODOLOGY OF PLACING PRINTING ASSIST FEATURE FOR RANDOM MASK LAYOUT 07-08-2010
71. 20100174957 CORRELATION AND OVERLAY OF LARGE DESIGN PHYSICAL PARTITIONS AND EMBEDDED MACROS TO DETECT IN-LINE DEFECTS 07-08-2010
72. 20100173247 SUBSTRATE PLANARIZATION WITH IMPRINT MATERIALS AND PROCESSES 07-08-2010
73. 20100171036 OPC MODEL CALIBRATION PROCESS - method of calibrating a model of a lithographic process includes a plurality of test features each having different 07-08-2010
74. 20100171031 CALIBRATION OF LITHOGRAPHIC PROCESS MODELS 07-08-2010
75. 20100149723 METHOD AND STRUCTURE FOR CREATION OF A METAL INSULATOR METAL CAPACITOR 06-17-2010
76. 20100146210 METHOD TO VERIFY AN IMPLEMENTED COHERENCY ALGORITHM OF A MULTI PROCESSOR ENVIRONMENT 06-10-2010
77. 20100140674 MOSFET WITH MULTIPLE FULLY SILICIDED GATE AND METHOD FOR MAKING THE SAME 06-10-2010
78. 20100109119 METHOD OF FORMING A GUARD RING OR CONTACT TO AN SOI SUBSTRATE 05-06-2010
79. 20100103433 DIFFERENTIAL CRITICAL DIMENSION AND OVERLAY METROLOGY APPARATUS AND MEASUREMENT METHOD 04-29-2010
80. 20100102373 TRENCH MEMORY WITH SELF-ALIGNED STRAP FORMED BY SELF-LIMITING PROCESS 04-29-2010
81. 20100101638 Using 3d integrated diffractive gratings in solar cells 04-29-2010
82. 20100096744 PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME 04-22-2010
83. 20100090288 METHOD OF FORMING SOURCE AND DRAIN OF A FIELD-EFFECT-TRANSISTOR AND STRUCTURE THEREOF 04-15-2010
84. 20100080446 INLINE LOW-DAMAGE AUTOMATED FAILURE ANALYSIS 04-01-2010
85. 20100078360 Waste recycling apparatus and process thereof 04-01-2010
86. 20100061156 METHOD OF CONTROLLING MEMORY AND MEMORY SYSTEM THEREOF 03-11-2010
87. 20100042991 BUSINESS-IN-A-BOX INTEGRATION SERVER AND INTEGRATION METHOD 02-18-2010
88. 20100042955 Method of Minimizing Early-mode Violations Causing Minimum Impact to a Chip Design 02-18-2010
89. 20100039191 ACTIVE INDUCTOR FOR ASIC APPLICATION - apparatus and method for manufacturing low-cost high-density compact active inductor module using existing DRAM 02-18-2010
90. 20100038790 RELIABILITY OF WIDE INTERCONNECTS - integrated circuit which includes a semiconductor substrate a first metal wiring level on the semiconductor 02-18-2010
91. 20100038777 METHOD OF MAKING A SIDEWALL-PROTECTED METALLIC PILLAR ON A SEMICONDUCTOR SUBSTRATE 02-18-2010
92. 20100038751 STRUCTURE AND METHOD FOR MANUFACTURING TRENCH CAPACITANCE 02-18-2010
93. 20100032851 Fluorinated elastomeric gas diffuser membrane 02-11-2010
94. 20100029082 METHOD AND APPARATUS FOR ANGULAR HIGH DENSITY PLASMA CHEMICAL VAPOR DEPOSITION 02-04-2010
95. 20100022319 Golf training device and method thereof - generally to a sports training device and method thereof 01-28-2010
96. 20100022088 MULTIPLE EXPOSURE AND SINGLE ETCH INTEGRATION METHOD 01-28-2010
97. 20100019354 SEMICONDUCTOR CHIP SHAPE ALTERATION - The invention is directed to an improved semiconductor chip that reduces crack initiation and propagation into the 01-28-2010
98. 20100013446 METHOD FOR CONTROLLING THE SUPPLY VOLTAGE FOR AN INTEGRATED CIRCUIT AND AN APPARATUS WITH A VOLTAGE REGULATION MODULE AND AN INTEGRATED CIRCUIT 01-21-2010
99. 20100009161 STRUCTURE AND METHOD FOR SiCOH INTERFACES WITH INCREASED MECHANICAL STRENGTH 01-14-2010
100. 20100006985 FORMATION OF SOI BY OXIDATION OF SILICON WITH ENGINEERED POROSITY GRADIENT 01-14-2010
101. 20100005440 CALIBRATION AND VERIFICATAION STRUCTURES FOR USE IN OPTICAL PROXIMITY CORRECTION 01-07-2010
102. 20100003800 BIPOLAR TRANSISTOR WITH SILICIDED SUB-COLLECTOR 01-07-2010
103. 20090315124 WORK FUNCTION ENGINEERING FOR EDRAM MOSFETS 12-24-2009
104. 20090306807 MULTIDIMENSIONAL PROCESS WINDOW OPTIMIZATION IN SEMICONDUCTOR MANUFACTURING 12-10-2009
105. 20090300562 Design structure for out of band signaling enhancement for high speed serial driver 12-03-2009
106. 20090299679 Method of Adaptively Selecting Chips for Reducing In-line Testing in a Semiconductor Manufacturing Line 12-03-2009
107. 20090297759 Stress Locking Layer for Reliable Metallization 12-03-2009
108. 20090294872 Ge/Xe IMPLANTS TO REDUCE JUNCTION CAPACITANCE AND LEAKAGE 12-03-2009
109. 20090290401 PLACEMENT AND OPTIMIZATION OF PROCESS DUMMY CELLS 11-26-2009
110. 20090287944 System and method of controlling an operating frequency in an electronic system 11-19-2009
111. 20090276736 Test Pattern Based Process Model Calibration 11-05-2009
112. 20090275179 COMPLEMENTARY METAL OXIDE SEMICONDUCTOR DEVICE WITH AN ELECTROPLATED METAL REPLACEMENT GATE 11-05-2009
113. 20090267149 SOURCE/DRAIN JUNCTION FOR HIGH PERFORMANCE MOSFET FORMED BY SELECTIVE EPI PROCESS 10-29-2009
114. 20090267130 STRUCTURE AND PROCESS INTEGRATION FOR FLASH STORAGE ELEMENT AND DUAL CONDUCTOR COMPLEMENTARY MOSFETS 10-29-2009
115. 20090258166 DEVICE AND METHOD FOR PATTERNING STRUCTURES ON A SUBSTRATE 10-15-2009
116. 20090256594 NANOELECTROMECHANICAL DIGITAL INVERTER - digital inverter formed by three carbon nanotubes extending vertically from a substrate one CNT functioning as 10-15-2009
117. 20090256213 STRUCTURE AND METHOD FOR MANUFACTURING DEVICE WITH A V-SHAPE CHANNEL NMOSFET 10-15-2009
118. 20090256173 COMPLEMENTARY FIELD EFFECT TRANSISTORS HAVING EMBEDDED SILICON SOURCE AND DRAIN REGIONS 10-15-2009
119. 20090246958 METHOD FOR REMOVING RESIDUES FROM A PATTERNED SUBSTRATE 10-01-2009
120. 20090242953 SHALLOW TRENCH CAPACITOR COMPATIBLE WITH HIGH-K / METAL GATE 10-01-2009
121. 20090242941 STRUCTURE AND METHOD FOR MANUFACTURING DEVICE WITH A V-SHAPE CHANNEL NMOSFET 10-01-2009
122. 20090242936 STRAINED ULTRA-THIN SOI TRANSISTOR FORMED BY REPLACEMENT GATE 10-01-2009
123. 20090236691 DEEP TRENCH (DT) METAL-INSULATOR-METAL (MIM) CAPACITOR 09-24-2009
124. 20090235426 Hooded garment with an integrated tubular collar having a zipper 09-24-2009
125. 20090231025 Method and Apparatus for Extending the Lifetime of a Semiconductor Chip 09-17-2009
126. 20090230508 SOI PROTECTION FOR BURIED PLATE IMPLANT AND DT BOTTLE ETCH 09-17-2009
127. 20090230471 TRENCH MEMORY WITH SELF-ALIGNED STRAP FORMED BY SELF-LIMITING PROCESS 09-17-2009
128. 20090230438 SELECTIVE NITRIDATION OF TRENCH ISOLATION SIDEWALL 09-17-2009
129. 20090217967 POROUS SILICON QUANTUM DOT PHOTODETECTOR 09-03-2009
130. 20090217496 FASTENING APPARATUS - for fastening a first device to a second device is disclosed 09-03-2009
131. 20090217116 DIAGNOSABLE GENERAL PURPOSE TEST REGISTERS SCAN CHAIN DESIGN 08-27-2009
132. 20090211087 METHOD AND SYSTEM FOR IMPROVING ALIGNMENT PRECISION OF PARTS IN MEMS 08-27-2009
133. 20090203200 GATE PATTERNING SCHEME WITH SELF ALIGNED INDEPENDENT GATE ETCH 08-13-2009
134. 20090201973 APPARATUS FOR TRANSMITTING DATA AND ADDITIONAL INFORMATION SIMULTANEOUSLY WITHIN A WIRE-BASED COMMUNICATION SYSTEM 08-13-2009
135. 20090200674 STRUCTURE AND METHOD OF FORMING TRANSITIONAL CONTACTS BETWEEN WIDE AND THIN BEOL WIRINGS 08-13-2009
136. 20090200669 ENHANCED INTERCONNECT STRUCTURE - semiconductor interconnect structure with improved mechanical strength at the capping layer/dielectric layer/diffusion 08-13-2009
137. 20090200604 VERTICAL FIN-FET MOS DEVICES - new class of high-density, vertical Fin-FET devices that exhibit low contact resistance is described 08-13-2009
138. 20090194875 HIGH PURITY Cu STRUCTURE FOR INTERCONNECT APPLICATIONS 08-06-2009
139. 20090193387 METHODOLOGY AND SYSTEM FOR DETERMINING NUMERICAL ERRORS IN PIXEL-BASED IMAGING SIMULATION IN DESIGNING LITHOGRAPHIC MASKS 07-30-2009
140. 20090188016 Single / multiple use liquid resistant protector 07-30-2009
141. 20090186476 STRUCTURE AND METHOD FOR IMPROVED SRAM INTERCONNECT 07-23-2009
142. 20090184392 METHOD AND STRUCTURE FOR FORMING TRENCH DRAM WITH ASYMMETRIC STRAP 07-23-2009
143. 20090181320 FLUORINE-FREE HETEROAROMATIC PHOTOACID GENERATORS AND PHOTORESIST COMPOSITIONS CONTAINING THE SAME 07-16-2009
144. 20090181319 AROMATIC FLUORINE-FREE PHOTOACID GENERATORS AND PHOTORESIST COMPOSITIONS CONTAINING THE SAME 07-16-2009
145. 20090178024 METHOD, COMPUTER PROGRAM PRODUCT, AND SYSTEM FOR MERGING MULTIPLE SAME CLASS INSTANCE STATES 07-09-2009
146. 20090176367 OPTIMIZED SiCN CAPPING LAYER - back-end-of-line interconnect structure and a method of forming an interconnect structure 07-09-2009
147. 20090176339 Method of multi-port memory fabrication with parallel connected trench capacitors in a cell 07-09-2009
148. 20090175606 METHOD AND STRUCTURE TO CONTROL THERMAL GRADIENTS IN SEMICONDUCTOR WAFERS DURING RAPID THERMAL PROCESSING 07-09-2009
149. 20090175325 SYSTEM FOR MEASURING AN EYEWIDTH OF A DATA SIGNAL IN AN ASYNCHRONOUS SYSTEM 07-09-2009
150. 20090175068 SRAM DEVICE, AND SRAM DEVICE DESIGN STRUCTURE, WITH ADAPTABLE ACCESS TRANSISTORS 07-09-2009
151. 20090174084 VIA OFFSETTING TO REDUCE STRESS UNDER THE FIRST LEVEL INTERCONNECT (FLI) IN MICROELECTRONICS PACKAGING 07-09-2009
152. 20090174075 SIMULTANEOUS GRAIN MODULATION FOR BEOL APPLICATIONS 07-09-2009
153. 20090174031 DRAM HAVING DEEP TRENCH CAPACITORS WITH LIGHTLY DOPED BURIED PLATES 07-09-2009
154. 20090174010 SRAM DEVICE STRUCTURE INCLUDING SAME BAND GAP TRANSISTORS HAVING GATE STACKS WITH HIGH-K DIELECTRICS AND SAME WORK FUNCTION 07-09-2009
155. 20090174008 METHOD AND STRUCTURE TO PROTECT FETs FROM PLASMA DAMAGE DURING FEOL PROCESSING 07-09-2009
156. 20090173980 PROVIDING ISOLATION FOR WORDLINE PASSING OVER DEEP TRENCH CAPACITOR 07-09-2009
157. 20090167336 METHOD AND APPARATUS FOR DYNAMIC CHARACTERIZATION OF RELIABILITY WEAROUT MECHANISMS 07-02-2009
158. 20090164885 EFFICIENT METHOD OF MIGRATING LOTUS DOMINO DOCUMENTS TO A NON-DOMINO WEB SERVER, WHILE PRESERVING SECTIONS, USING PORTABLE JAVASCRIPT 06-25-2009
159. 20090164840 System and Method For Managing Root File System 06-25-2009
160. 20090157773 DATABASE MANAGEMENT METHOD, APPARATUS AND SYSTEM 06-18-2009
161. 20090155715 PHOTORESIST COMPOSITIONS AND METHOD FOR MULTIPLE EXPOSURES WITH MULTIPLE LAYER RESIST SYSTEMS 06-18-2009
162. 20090155172 Antibodies to MAGMAS and uses thereof - isolated and purified Magmas protein isolated and purified nucleic acids encoding Magmas protein 06-18-2009
163. 20090154263 DESIGN STRUCTURE FOR IMPROVING PERFORMANCE OF SRAM CELLS, SRAM CELL, SRAM ARRAY, AND WRITE CIRCUIT 06-18-2009
164. 20090152725 Thick metal interconnect with metal pad caps at selective sites and process for making the same 06-18-2009
165. 20090152100 Thick metal interconnect with metal pad caps at selective sites and process for making the same 06-18-2009
166. 20090150090 SYSTEM AND METHOD FOR DETECTION AND PREVENTION OF INFLUX OF AIRBORNE CONTAMINANTS 06-11-2009
167. 20090149979 RUN-TIME DISPATCH SYSTEM FOR ENHANCED PRODUCT CHARACTERIZATION CAPABILITY 06-11-2009
168. 20090148988 METHOD OF REDUCING EMBEDDED SIGE LOSS IN SEMICONDUCTOR DEVICE MANUFACTURING 06-11-2009
169. 20090148986 METHOD OF MAKING A FINFET DEVICE STRUCTURE HAVING DUAL METAL AND HIGH-K GATES 06-11-2009
170. 20090148795 PATTERNING METHOD USING A COMBINATION OF PHOTOLITHOGRAPHY AND COPOLYMER SELF-ASSEMBLYING LITHOGRAPHY TECHNIQUES 06-11-2009
171. 20090146692 Structure for apparatus for reduced loading of signal transmission elements 06-11-2009
172. 20090146316 FLIP-CHIP ASSEMBLY WITH ORGANIC CHIP CARRIER HAVING MUSHROOM-PLATED SOLDER RESIST OPENING 06-11-2009
173. 20090146263 STRUCTURE AND METHOD TO INCREASE EFFECTIVE MOSFET WIDTH 06-11-2009
174. 20090146223 PROCESS AND METHOD TO LOWER CONTACT RESISTANCE 06-11-2009
175. 20090144670 AUTOMATED OPTIMIZATION OF DEVICE STRUCTURE DURING CIRCUIT DESIGN STAGE 06-04-2009
176. 20090143999 REAL TIME SYSTEM FOR MONITORING THE COMMONALITY, SENSITIVITY, AND REPEATABILITY OF TEST PROBES 06-04-2009
177. 20090142704 METHOD FOR REDUCING SIDE LOBE PRINTING USING A BARRIER LAYER 06-04-2009
178. 20090140420 SOFT ERROR RATE MITIGATION BY INTERCONNECT STRUCTURE 06-04-2009
179. 20090137109 COMPRESSIVE NITRIDE FILM AND METHOD OF MANUFACTURING THEREOF 05-28-2009
180. 20090132985 Design structure for on-chip electromigration monitoring system 05-21-2009
181. 20090132982 METHOD FOR OPTIMIZING AN UNROUTED DESIGN TO REDUCE THE PROBABILITY OF TIMING PROBLEMS DUE TO COUPLING AND LONG WIRE ROUTES 05-21-2009
182. 20090132973 DESIGN STRUCTURE OF AN INTEGRATION CIRCUIT AND TEST METHOD OF THE INTEGRATED CIRCUIT 05-21-2009
183. 20090129485 Structure for transmitter bandwidth optimization circuit 05-21-2009
184. 20090129191 Structure for SRAM voltage control for improved operational margins 05-21-2009
185. 20090128225 STRUCTURE OF AN APPARATUS FOR PROGRAMMING AN ELECTRONICALLY PROGRAMMABLE SEMICONDUCTOR FUSE 05-21-2009
186. 20090128161 Structure for robust cable connectivity test receiver for high-speed data receiver 05-21-2009
187. 20090125868 MULTILAYER OPC FOR DESIGN AWARE MANUFACTURING 05-14-2009
188. 20090123057 Method and System for Obtaining Bounds on Process Parameters for OPC-Verification 05-14-2009
189. 20090121357 DESIGN STRUCTURE FOR BRIDGE OF A SEMINCONDUCTOR INTERNAL NODE 05-14-2009
190. 20090121270 DESIGN STRUCTURE FOR A TRENCH CAPACITOR - design structure of a trench capacitor with an isolation collar in a semiconductor substrate where the 05-14-2009
191. 20090119561 Microcomputer and Method of Testing The Same 05-07-2009
192. 20090119357 ADVANCED CORRELATION AND PROCESS WINDOW EVALUATION APPLICATION 05-07-2009
193. 20090115504 CIRCUIT DESIGN METHODOLOGY TO REDUCE LEAKAGE POWER 05-07-2009
194. 20090112963 METHOD TO PERFORM A SUBTRACTION OF TWO OPERANDS IN A BINARY ARITHMETIC UNIT PLUS ARITHMETIC UNIT TO PERFORM SUCH A METHOD 04-30-2009
195. 20090112855 METHOD FOR ORDERING A SEARCH RESULT AND AN ORDERING APPARATUS 04-30-2009
196. 20090109733 Design structure for sram active write assist for improved operational margins 04-30-2009
197. 20090108885 Design structure for CMOS differential rail-to-rail latch circuits 04-30-2009
198. 20090108442 SELF-ASSEMBLED STRESS RELIEF INTERFACE - method of forming an interconnect assembly is provided in which contacts exposed at a face of a first element 04-30-2009
199. 20090108364 DUAL WORKFUNCTION SILICIDE DIODE - CMOS diode and method of making it are disclosed 04-30-2009
200. 20090108351 FINFET MEMORY DEVICE WITH DUAL SEPARATE GATES AND METHOD OF OPERATION 04-30-2009
201. 20090108306 UNIFORM RECESS OF A MATERIAL IN A TRENCH INDEPENDENT OF INCOMING TOPOGRAPHY 04-30-2009
202. 20090107956 Thermal Gradient Control of High Aspect Ratio Etching and Deposition Processes 04-30-2009
203. 20090106594 Method and Device for Log Events Processing 04-23-2009
204. 20090103390 Three Dimensional Twisted Bitline Architecture for Multi-port Memory 04-23-2009
205. 20090101957 SIMPLIFIED METHOD OF FABRICATING ISOLATED AND MERGED TRENCH CAPACITORS 04-23-2009
206. 20090096101 BRIDGE FOR SEMICONDUCTOR INTERNAL NODE - method and apparatus for forming connections within a semiconductor device is disclosed 04-16-2009
207. 20090092810 FABRICATION OF SOI WITH GETTERING LAYER - SOI substrate has a gettering layer of silicon-germanium with 5-10% Ge, and a thickness of approximately 04-09-2009
208. 20090090993 SINGLE CRYSTAL FUSE ON AIR IN BULK SILICON 04-09-2009
209. 20090090986 FULLY AND UNIFORMLY SILICIDED GATE STRUCTURE AND METHOD FOR FORMING SAME 04-09-2009
210. 20090090977 RESISTOR AND FET FORMED FROM THE METAL PORTION OF A MOSFET METAL GATE STACK 04-09-2009
211. 20090084183 SLIP RING POSITIVE Z FORCE LIQUID ISOLATION FIXTURE PERMITTING ZERO NET FORCE ON WORKPIECE 04-02-2009
212. 20090083689 GRIDDED-ROUTER BASED WIRING ON A NON-GRIDDED LIBRARY 03-26-2009
213. 20090077515 Method of Constrained Aggressor Set Selection for Crosstalk Induced Noise 03-19-2009
214. 20090070715 METHOD FOR ELIMINATING NEGATIVE SLACK IN A NETLIST VIA TRANSFORMATION AND SLACK CATEGORIZATION 03-12-2009
215. 20090066518 ID TAG PACKAGE AND RFID SYSTEM - Embodiments of the present invention provide an ID tag package including a structure covering an ID tag therein 03-12-2009
216. 20090065872 FULL SILICIDE GATE FOR CMOS - method is provided for fabricating an n-type field effect transistor and a p-type field effect transistor in which the 03-12-2009
217. 20090059706 SRAM ACTIVE WRITE ASSIST METHOD FOR IMPROVED OPERATIONAL MARGINS 03-05-2009
218. 20090059705 SRAM HAVING ACTIVE WRITE ASSIST FOR IMPROVED OPERATIONAL MARGINS 03-05-2009
219. 20090059510 DRIVE CONVERSION ENCLOSURE - conversion enclosure allows a first group of hard disk drives of a first size to be received by a hard disk drive enclosure 03-05-2009
220. 20090059057 Method and Apparatus for Providing a Video Image Having Multiple Focal Lengths 03-05-2009
221. 20090058236 LATCH APPARATUS TO AN ENCLOSURE FOR AN ELECTRONIC DEVICE 03-05-2009
222. 20090048893 System and Method of Role-based Calendaring 02-19-2009
223. 20090039522 BIPOLAR AND CMOS INTEGRATION WITH REDUCED CONTACT HEIGHT 02-12-2009
224. 20090037866 ALTERNATING PHASE SHIFT MASK OPTIMIZATION FOR IMPROVED PROCESS WINDOW 02-05-2009
225. 20090033355 Method And Apparatus To Measure Threshold Shifting Of A MOSFET Device And Voltage Difference Between Nodes 02-05-2009
226. 20090030543 SEMICONDUCTOR MANUFACTURING PROCESS MONITORING 01-29-2009
227. 20090027075 System And Method of Digitally Testing An Analog Driver Circuit 01-29-2009
228. 20090026587 GRADIENT DEPOSITION OF LOW-K CVD MATERIALS 01-29-2009
229. 20090019691 MICRO-ELECTROMECHANICAL SUB-ASSEMBLY HAVING AN ON-CHIP TRANSFER MECHANISM 01-22-2009
230. 20090019326 Self-synchronizing bit error analyzer and circuit 01-15-2009
231. 20090014798 FINFET SRAM WITH ASYMMETRIC GATE AND METHOD OF MANUFACTURE THEREOF 01-15-2009
232. 20090014767 CARBON NANOTUBE CONDUCTOR FOR TRENCH CAPACITORS 01-15-2009
233. 20090013290 Method and System for Electromigration Analysis on Signal Wiring 01-08-2009
234. 20090005896 MANUFACTURING WORK IN PROCESS MANAGEMENT SYSTEM 01-01-2009
235. 20090004978 TRANSMITTER BANDWIDTH OPTIMIZATION CIRCUIT 01-01-2009
236. 20090002960 APPARATUS FOR RETAINING A COMPUTER CARD - in a computer having a riser card has a bracket for receiving the computer card and a retaining member 01-01-2009
237. 20090001466 METHOD OF FORMING AN SOI SUBSTRATE CONTACT 01-01-2009
238. 20090001465 METHOD OF FORMING A GUARD RING OR CONTACT TO AN SOI SUBSTRATE 01-01-2009
239. 20080318373 Method of fabricating self-aligned bipolar transistor having tapered collector 12-25-2008
240. 20080317565 Segregating Wafer Carrier Types In Semiconductor Storage Devices 12-25-2008
241. 20080316930 Robust Cable Connectivity Test Receiver For High-Speed Data Receiver 12-25-2008
242. 20080311732 Method for Forming Non-Amorphous, Ultra-Thin Semiconductor Devices Using Sacrificial Implantation Layer 12-18-2008
243. 20080305621 CHANNEL STRAIN ENGINEERING IN FIELD-EFFECT-TRANSISTOR 12-11-2008
244. 20080304509 OUT OF BAND SIGNALING ENHANCEMENT FOR HIGH SPEED SERIAL DRIVER 12-11-2008
245. 20080298520 High-speed multi-mode receiver - data receiver is provided which is operable to receive a signal controllably pre-distorted and transmitted by a 12-04-2008
246. 20080293257 DUAL LINER CAPPING LAYER INTERCONNECT STRUCTURE 11-27-2008
247. 20080291491 METHOD AND SYSTEM FOR PRINT JOB PROCESSING 11-27-2008
248. 20080291490 METHOD AND SYSTEM FOR PRINT JOB PROCESSING 11-27-2008
249. 20080290519 DUAL LINER CAPPING LAYER INTERCONNECT STRUCTURE 11-27-2008
250. 20080289651 METHOD AND APPARATUS FOR WAFER EDGE CLEANING 11-27-2008
251. 20080289096 Shower curtain rod and fixture - improved shower curtain rod and fixture 11-27-2008
252. 20080286971 CMOS Gate Structures Fabricated by Selective Oxidation 11-20-2008
253. 20080286888 TEST STRUCTURES AND METHODOLOGY FOR DETECTING HOT DEFECTS 11-20-2008
254. 20080284459 Testing Using Independently Controllable Voltage Islands 11-20-2008
255. 20080284030 ENHANCED MECHANICAL STRENGTH VIA CONTACTS 11-20-2008
256. 20080283520 Heating System - generally to a heating system 11-20-2008
257. 20080282211 METHODOLOGY TO IMPROVE TURNAROUND FOR INTEGRATED CIRCUIT DESIGN 11-13-2008
258. 20080280434 Enhanced Mechanical Strength Via Contacts 11-13-2008
259. 20080272398 CONDUCTIVE SPACERS FOR SEMICONDUCTOR DEVICES AND METHODS OF FORMING 11-06-2008
260. 20080270960 METHOD FOR INCORPORATING MILLER CAPACITANCE EFFECTS IN DIGITAL CIRCUITS FOR AN ACCURATE TIMING ANALYSIS 10-30-2008
261. 20080265931 On-chip electromigration monitoring - method is provided for monitoring interconnect resistance within a semiconductor chip assembly 10-30-2008
262. 20080265377 AIR GAP WITH SELECTIVE PINCHOFF USING AN ANTI-NUCLEATION LAYER 10-30-2008
263. 20080263553 Dynamic Service Level Manager for Image Pools 10-23-2008
264. 20080263488 METHOD FOR GENERATING A SKEW SCHEDULE FOR A CLOCK DISTRIBUTION NETWORK CONTAINING GATING ELEMENTS 10-23-2008
265. 20080257597 PRINTED CIRCUIT BOARD MANUFACTURING METHOD AND PRINTED CIRCUIT BOARD 10-23-2008
266. 20080254624 METAL CAP FOR INTERCONNECT STRUCTURES - structure and method of forming an improved metal cap for interconnect structures is described 10-16-2008
267. 20080253404 DYNAMIC TIME DIVISION MULTIPLEXING CIRCUIT WITHOUT A SHADOW TABLE 10-16-2008
268. 20080246093 STRUCTURE AND METHOD OF MAKING A SEMICONDUCTOR INTEGRATED CIRCUIT TOLERANT OF MIS-ALIGNMENT OF A METAL CONTACT PATTERN 10-09-2008
269. 20080246069 Folded Node Trench Capacitor - trench capacitor is filled with a set of two or more storage plates by consecutively depositing layers of dielectric and 10-09-2008
270. 20080237749 CMOS GATE CONDUCTOR HAVING CROSS-DIFFUSION BARRIER 10-02-2008
271. 20080237737 OVERLAPPED STRESSED LINERS FOR IMPROVED CONTACTS 10-02-2008
272. 20080237709 AFTER GATE FABRICATION OF FIELD EFFECT TRANSISTOR HAVING TENSILE AND COMPRESSIVE REGIONS 10-02-2008
273. 20080236617 USE OF DILUTE HYDROCHLORIC ACID IN ADVANCED INTERCONNECT CONTACT CLEAN IN NICKEL SEMICONDUCTOR TECHNOLOGIES 10-02-2008
274. 20080233514 POSITIVE PHOTORESIST COMPOSITION WITH A POLYMER INCLUDING A FLUOROSULFONAMIDE GROUP AND PROCESS FOR ITS USE 09-25-2008
275. 20080233366 STRUCTURE AND METHOD FOR SiCOH INTERFACES WITH INCREASED MECHANICAL STRENGTH 09-25-2008
276. 20080231312 Structure for modeling stress-induced degradation of conductive interconnects 09-25-2008
277. 20080230891 CHIP AND WAFER INTEGRATION PROCESS USING VERTICAL CONNECTIONS 09-25-2008
278. 20080230822 VERTICAL TRENCH MEMORY CELL WITH INSULATING RING 09-25-2008
279. 20080227030 Use of Mixed Bases to Enhance Patterned Resist Profiles on Chrome or Sensitive Substrates 09-18-2008
280. 20080225251 Immersion optical lithography system having protective optical coating 09-18-2008
281. 20080224328 TEMPORARY CHIP ATTACH USING INJECTION MOLDED SOLDER 09-18-2008
282. 20080224255 SUBGROUND RULE STI FILL FOR HOT STRUCTURE 09-18-2008
283. 20080218054 CARBON TUBE FOR ELECTRON BEAM APPLICATION 09-11-2008
284. 20080217777 EMBEDDED BARRIER FOR DIELECTRIC ENCAPSULATION 09-11-2008
285. 20080217731 INTERCONNECT STRUCTURE WITH DIELECTRIC AIR GAPS 09-11-2008
286. 20080217665 SEMICONDUCTOR DEVICE STRUCTURE HAVING ENHANCED PERFORMANCE FET DEVICE 09-11-2008
287. 20080217612 STRUCTURE AND METHOD OF MAPPING SIGNAL INTENSITY TO SURFACE VOLTAGE FOR INTEGRATED CIRCUIT INSPECTION 09-11-2008
288. 20080215554 Data Plotting Extension for Structured Query Language 09-04-2008
289. 20080215175 AVAILABLE TO PROMISE ALLOCATION OPTIMIZATION TOOL 09-04-2008
290. 20080209378 METHOD AND SYSTEM FOR PROTOTYPING ELECTRONIC DEVICES WITH MULTI-CONFIGURATION CHIP CARRIERS 08-28-2008
291. 20080209376 SYSTEM AND METHOD FOR SIGN-OFF TIMING CLOSURE OF A VLSI CHIP 08-28-2008
292. 20080201684 SIMULATION SITE PLACEMENT FOR LITHOGRAPHIC PROCESS MODELS 08-21-2008
293. 20080197513 BEOL INTERCONNECT STRUCTURES WITH IMPROVED RESISTANCE TO STRESS 08-21-2008
294. 20080197500 INTERCONNECT STRUCTURE WITH BI-LAYER METAL CAP 08-21-2008