UNIVERSITY OF MACAU Patent applications |
Patent application number | Title | Published |
20160113931 | Method of treating and/or preventing neurodegenerative diseases - The present disclosure provides a method of treating and/or preventing neurodegenerative diseases, such as Parkinson disease, Alzheimer disease, Huntington's disease, multiple sclerosis and amyotrophic lateral sclerosis, comprising administrating a therapeutically effective amount of a compound of formula I or a pharmaceutically acceptable salt thereof to a subject in need thereof. | 04-28-2016 |
20160101419 | MICROFLUIDICS SEPARATION METHOD AND SYSTEM THEREOF - A microfluidic system for separating an analyte from a sample fluid including a series of fluidic channels including at least one first region and at least one second region. The first region includes a plurality of L-nodes, which connects to each other in series. The second region includes a plurality of R-nodes, which connects to each other in series. The first region is configured to trigger at least about one lamination process cycle for both the sample fluid and the buffer fluid and the second region is configured to trigger at least about one reverse lamination process cycle for both the sample fluid and the buffer fluid, whereby the lamination process cycle and the reverse lamination process cycle causes the analyte to diffuse to the buffer fluid from the sample fluid. A method for separating the analyte is also disclosed. | 04-14-2016 |
20150325246 | REVERSIBLE AUDIO DATA HIDING - The present invention provides a method of reversible audio data hiding. The method of data hiding and restoring comprises the steps of: protecting audio by embedding information into the audio according to variance calculation associated to the audio, wherein the quality of the protected audio is degraded after embedding the information into the audio; publishing the protected audio widely as a trial for listen version; and decoding the protected audio for a user who purchased the copyright of the audio by extracting the original audio from the protected audio. | 11-12-2015 |
20150304155 | ZigBee Receiver Exploiting an RF-to-BB Current-Reuse Blixer and Hybrid Filter Topology - A unified balun low noise amplifier (LNA) and I/Q mixer is provided as a single-chip design, and includes a passive/active gain-boosted balun-LNA-I/Q-mixer (blixer), a filter section and a buffer amplifier. The filter section includes an IF-noise-shaping transistorized current-mode lowpass filter sharing a common power supply with the blixer, which allows the blixer and lowpass filter to draw a single bias current. The filter section also includes a complex-pole load providing image rejection and channel selection. | 10-22-2015 |
20150303955 | Complex-Pole Load Offering Concurrent Image Rejection and Channel Selection - A complex-pole load is configured as a parallel circuit, having 4 transistors arranged in pairs. Each pair of transistors has a transistor gated by a control voltage sources, and connected in parallel with a transistor diode connected for gating by the respective input. The control voltage sources result in the circuit synthesizing a first order complex pole at a positive IF (+IF) or a negative IF (−IF) for channel selection and image rejection, offering image rejection and channel selection concurrently. | 10-22-2015 |
20150303897 | IF-Noise-Shaping Transistorized Current-Mode Lowpass Filter Utilizing Cross Coupled Transistors - An IF-noise-shaping transistorized current-mode lowpass filter is applied to quadrature in a balanced circuit. A first pair of transistors receiving current inputs from a mixer are connected so that each of the first pair of transistors has its gate cross coupled to the output of the other of the first pair of transistors. A second pair of transistors are connected in series with respected outputs of respective ones of the first pair of transistors and having gates connected to a first common voltage node, and a capacitance is used to connect the current inputs of one of the first and second pairs of transistors. An active inductive load is connected between the current inputs of one of the first and second pairs of transistors. | 10-22-2015 |
20150280958 | NON-RECURSIVE DIGITAL CALIBRATION FOR JOINT-ELIMINATION OF TRANSMITTER AND RECEIVER I/Q IMBALANCES WITH MINIMIZED ADD-ON HARDWARE - A digital calibration circuit is used to provide joint-elimination of transmitter and receiver I/Q imbalances. Digital I and Q quadrature signals are received and converted to analog I and Q quadrature signals on I and Q for transmission on output channels. An output mixer is used to convert the quadrature signals to an unbalanced RF output. An unbalanced RF signal is received selectively either externally or from the RF output using a source follower, and the received signal is mixed to provide analog I and Q quadrature signals, using a local oscillator (LO). The LO adds an additional 90° phase shift between I and Q quadrature channels of the unbalanced RF input. Parameter estimating the transmitted digital I and Q quadrature signals and providing estimations of I and Q quadrature imbalance conditions. | 10-01-2015 |
20150126140 | WIRELESS TRANSMITTER - A wireless transmitter for resolving gain mismatch of TV band is disclosed. In one embodiment, a wireless transmitter comprises a two-stage 14-path harmonic-rejection mixer to manage harmonic rejection ratio in lower sub-bands, and a two-stage 6-path harmonic-rejection mixer to manage harmonic rejection ratio in upper sub-bands. The gain mismatch is resolved by selecting gain ratios of the first and the second stage of the two-stage 14-path harmonic-rejection mixer and the two-stage 6-path harmonic-rejection mixer. | 05-07-2015 |
20150123738 | POLY-PHASE LOCAL OSCILLATOR - One embodiment of the present invention features a poly-phase local oscillator generator combining frequency dividers and direct-injection-locked phase correctors. The poly-phase local oscillator generator comprises a plurality of phase correctors configured to relax frequency and tuning range of a reference local oscillator (LO), and a plurality of frequency dividers, coupled to the phase correctors, configured to offer different frequency segments. The phase correctors are expandable, so that phase accuracy can be optimized by cascading more of themselves. | 05-07-2015 |
20150123736 | WIDEBAND DRIVER AMPLIFIER - A wideband driver amplifier with embedded passive filtering and gain peaking is described. The wideband driver amplifier comprises a voltage to current circuit, a passive band-selection filter, and a current to voltage circuit. The driver amplifier features an Embedded CLC-Ladder band-selection filter and thereby immune to process variations. | 05-07-2015 |
20140270448 | SYSTEM AND METHOD FOR ATTENUATION CORRECTION IN EMISSION COMPUTED TOMOGRAPHY - The present invention relates to systems and methods for attenuation correction to improve reconstructed image quality and quantitative accuracy and reduce radiation dose in emission computed tomography. In one embodiment, the present invention provides an interpolated average CT (IACT) method and breathing control devices. | 09-18-2014 |
20140232465 | FREQUENCY COMPENSATION TECHNIQUES FOR LOW-POWER AND SMALL-AREA MULTISTAGE AMPLIFIERS - A three stage amplifier is provided and the three stage amplifier comprises a first gain stage, a second gain stage and a third gain stage wherein said first stage receives an amplifier input signal and said third gain stage outputs an amplifier output signal. The amplifier includes a feedback loop having a current buffer and a compensation capacitance provided from the output of said third gain stage to the output of the first gain stage. In addition, an active left half plane zero stage is embedded in said feedback loop for cancelling a parasitic pole of said feedback loop. | 08-21-2014 |
20140160811 | RAILWAY POWER CONDITIONER FOR CO-PHASE TRACTION SUPPLY SYSTEM - A railway power conditioner includes a DC-AC converter and a AC-DC converter for performing power conversion between AC power and DC power, a DC bus connected between the DC-AC converter and the AC-DC converter; a single-phase isolation transformer coupled to an output of the AC-DC converter and a coupling capacitor connected to the DC-AC converter. | 06-12-2014 |
20140132307 | Comparator and calibration thereof - A comparator is provided and the comparator includes a comparing input unit and a latching unit. Wherein, the comparing input unit has a first input receiving a first comparing signal and has a second input receiving a second comparing signal. The comparing input unit drives a first intermediate node signal at a first intermediate node depending on the first comparing signal according to a first strobe signal, and the comparing input unit drives a second intermediate node signal at a second intermediate node depending on the second comparing signal according to the first strobe signal. The latching unit determines a comparing result according to at least one of the first intermediate node signal and the second intermediate node signal. In addition, the latching unit latches the comparing result according to a second strobe signal. | 05-15-2014 |
20140055104 | Adaptive DC-link voltage controlled LC coupling hybrid active power filters for reactive power compensation - An adaptive dc-link voltage controlled LC coupling hybrid active power filter (LC-HAPF) for reactive power compensation includes: two dc capacitors to provide dc-link voltage; a three-phase voltage source inverter to convert dc-link voltage into compensating voltages; three coupling LC circuits to convert compensating voltages into currents; and an adaptive dc voltage controller with reactive power compensation control algorithm. The control algorithm includes: first, calculating required minimum dc-link voltage in each phase with respect to loading reactive power; three-phase required minimum dc-link voltage will be maximum one among their minimum values; compare it with predetermined voltage levels to determine final reference dc-link voltage. A dc-link voltage feedback P/PI controller outputs dc voltage reference compensating currents. An instantaneous power compensation controller outputs reactive reference compensating currents. The final reference compensating currents will be sum of them. A PWM circuit provides LC-HAPF adaptive dc-link voltage control and dynamic reactive power compensation. | 02-27-2014 |
20120306679 | N-BITS SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTING CIRCUIT - The present invention provides an n-bits successive approximation register (SAR) analog-to-digital converting (ADC) circuit, comprising: an n-bits SAR control logic, a p-type capacitor network including a DAC | 12-06-2012 |
20120286840 | DELAY GENERATOR - A delay generator comprises: a current source for supplying a current; a first delay portion, connected to the current source, comprising at least a plurality of inverters and a first capacitor having a first capacitance; and a second delay portion, connected to the current source, comprising at least a plurality of inverters and a second capacitor having a second capacitance, wherein the first capacitance is the same as the second capacitance, wherein the first delay portion generates a first delay by discharging of the first capacitor, wherein the second delay portion generates a second delay by charging of the second capacitor, and wherein the total delay generated by the delay generator is obtained by summation of the first delay and the second delay. | 11-15-2012 |
20120229313 | ANALOG TO DIGITAL CONVERTER CIRCUIT - The present invention provides an analog-to-digital converter (ADC) circuit comprising two time-interleaved successive approximation register (SAR) ADCs. Each of the two time-interleaved SAR ADCs comprises a first stage SAR sub-ADC, a residue amplifier, a second stage SAR sub-ADC and a digital error correction logic. The residue amplifier is shared between the time-interleaved paths, has a reduced gain and operates in sub-threshold to achieve power effective design | 09-13-2012 |
20120194364 | ANALOG-TO-DIGITAL CONVERTING SYSTEM - A novel analog-to-digital converter (ADC) system using a two-step conversion is disclosed. The ADC system is capable of achieving high sampling rate, low power consumption and low complexity. The new proposed ADC is formed by cascading a flash ADC having high sampling rate and low resolution with a successive approximation (SA) ADC having low power consumption and low sampling rate. | 08-02-2012 |
20100184399 | SWITCHED CURRENT RESISTOR PROGRAMMABLE GAIN ARRAY FOR LOW-VOLTAGE WIRELESS LAN AND METHOD USING THE SAME - A switched current resistor (SCR) PGA for constant-bandwidth gain control includes an inverting amplifier, a feedback resistor forming a feedback loop between an output side and an input side of the inverting amplifier, and a switched current resistor (SCR) array connected in parallel to the feedback resistor, and configured to tune a gain range between a maximum and a minimum. The SCR array includes a plurality of switched resistors, each comprising a switch in series with a resistor. When the plurality of switched resistors are switched by a gain-control logic, a plurality of switched current sources and a plurality of grounded resistors are switched correspondingly to deliver a transient current, an equivalent of which flows through the plurality of grounded resistors out from the input side of the inverting amplifier, leading to a feedback factor of the PGA being constant. | 07-22-2010 |
20100182080 | DC-OFFSET CANCELLED PROGRAMMABLE GAIN ARRAY FOR LOW-VOLTAGE WIRELESS LAN SYSTEM AND METHOD USING THE SAME - An amplifier circuit includes a transconductance amplifier at an input side of the amplifier circuit, a transimpedance amplifier connected to an output of the transconductance amplifier, and a voltage amplifier connected to an output of the transimpedance amplifier. The transconductance amplifier and the transimpedance amplifier form a low-impedance node at an interface thereof. A feedback circuit is connected between an output of the voltage amplifier and the low-impedance node between the transconductance amplifier and the transimpedance amplifier. The transconductance amplifier, the transimpedance amplifier, and the voltage amplifier form a main amplifier stage. The feedback circuit senses an imbalance in an output of the main amplifier stage, whereby a correction signal is integrated and negatively fed back to the low-impedance node between the transconductance amplifier and the transimpedance amplifier. | 07-22-2010 |
20080318534 | TWO-STEP CHANNEL SELECTION FOR WIRELESS TRANSMITTER FRONT-ENDS - A reconfigurable multimode transmitter is disclosed, operating in accordance with a two-step channel selection. The first step provides for a fine channel selection and upconversion of a desired channel to either positive or negative IF. The second step is a coarse channel selection and upconversion of a desired channel to the RF. The receiver and transmitter can be used in a transceiver. | 12-25-2008 |