| Universal Scientific Industrial (Shanghai) Co., Ltd. Patent applications |
| Patent application number | Title | Published |
|---|
| 20120086119 | CHIP STACKED STRUCTURE - A chip stacked structure is provided. The chip stacked structure includes a first die and a second die stacked on the first die. The first die has a plurality of connection structures each which has a through hole, a connection pad and a solder bump. The connection pad has a terminal connected to the through hole. The solder bump is disposed on the connection pad and located around the through hole. The second die has a plurality of through holes which are aligned and bonded to the solder bump respectively. The chip stacked structure may simplify the process and improve the process yield rate. | 04-12-2012 |
| 20120086108 | CHIP LEVEL EMI SHIELDING STRUCTURE AND MANUFACTURE METHOD THEREOF - A chip level EMI shielding structure and manufacture method thereof are provided. The chip level EMI shielding structure includes a semiconductor substrate, at least one ground conductor line, a ground layer, and a connection structure. The ground conductor line is disposed on a first surface of the semiconductor substrate, and the ground layer is disposed on a second surface of the semiconductor substrate. The connection structure is formed on a lateral wall of the semiconductor substrate for connecting the ground conductor lines with the ground layer to form a shielding. With such arrangement, the chip level EMI shielding structure can reduce the chip size and the manufacturing cost. | 04-12-2012 |
| 20120074593 | CHIP STACKED STRUCTURE AND METHOD OF FABRICATING THE SAME - A chip stacked structure and method of fabricating the same are provided. The chip stacked structure includes a first chip and a second chip stacked on the first chip. The first chip has a plurality of metal pads disposed on an upper surface thereof and grooves disposed on a side surface thereof. The metal pads are correspondingly connected to upper openings of the grooves. The second chip has a plurality of grooves on a side surface of the second chip, locations of which are corresponding to that of the grooves on the side surface of the first chip. Conductive films are formed on the grooves of the first chip and the second chip and the metal pads to electronically connect the first chip and second chip. The chip stacked structure may simplify the process and improve the process yield rate. | 03-29-2012 |
| 20120062342 | MULTI BAND-PASS FILTER - A multi band-pass filter includes a first resonator and a second resonator. The first resonator has a first frequency pass band and a second frequency pass band. Moreover, the second resonator is electromagnetically coupled to another end of the first resonator. The second resonator has a third frequency pass band and a fourth frequency pass band, wherein the third frequency pass band overlaps (or is congruous with) the first frequency pass band and the fourth frequency pass band overlaps the second frequency pass band. | 03-15-2012 |
| 20120062341 | MICRO BAND-PASS FILTER - A micro band-pass filter is disclosed. The micro band-pass filter includes a first resonator having a first inter-digital unit and a second inter-digital unit, which is connected to a first wavelength-impedance converter, on two ends thereof, and a second resonator having a third inter-digital unit and a fourth inter-digital, which is connected to a second wavelength-impedance converter unit on two ends thereof. The second inter-digital unit is adapted to face the third inter-digital unit when forming a first inter-digital coupling structure along with the third inter-digital unit, and the first inter-digital unit is adapted to face the fourth inter-digital unit when forming a second inter-digital coupling structure. | 03-15-2012 |
| 20120026669 | PORTABLE NETWORKING DEVICE - A portable networking device has a casing, a power connector, a power adapting unit, a circuit board, and a networking interface disposed on the circuit board. A receiving space is formed on an exterior side surface of the casing, and the power connector is fixed inside the casing. The power adapting unit is fixed inside the casing and electrically connected to the power connector, where the power connector can selectively connected to a detachable power plug or a power cord having a connector. The detachable power plug has a pair of conducting pins, which can be rotatably received inside the receiving space of the casing. The circuit board is disposed in the casing. The instant disclosure includes the detachable power plug having concealable conducting pins, and no external power adapter is needed. All of which allow for easy stowing and transport for the user. | 02-02-2012 |
| 20110149888 | PACKET SCHEDULING METHOD AND COMMUNICATION APPARATUS USING THE SAME - Exemplary embodiments of the present disclosure provide several packet scheduling methods and communication apparatuses using the same. The packet scheduling method is different from the conventional packet scheduling method, since it does not schedule the sleep interval of the mobile subscriber station based upon the connections as the conventional packet scheduling method. Instead, the packet scheduling method considers the quality of service, and aggregates the data bursts to the frame corresponding to the frame index to which the data bursts are shifted based upon the individual packet, such that a total time length of the sleep intervals of the mobile subscriber station is maximized, and the maximum power saving efficiency is obtained correspondingly. | 06-23-2011 |
