| 20090164753 | Operation, Control, Branch VLIW Processor - An Operation, Compare, Branch (OCB) VLIW instruction word has a memory address, a respective operation code, a respective comparison and branch code; and at least two respective branch pointers. A plurality of OCB VLIW instructions are contained in memory. The branch pointers of a given instruction word connect to a memory address determined by a comparison analysis. The branch pointers form a linked list structure connecting the OCB instructions together, thus no program counter is required. The OCB instructions can be scrambled to realize a branch obfuscated program with built in software protections in that software protection mechanisms can be placed in the lengths and positions of the pointers. The processor architecture allows multiple branching without branch penalties. Other prior art obfuscation techniques may be applied to software programs for the OCB processor. | 06-25-2009 |
