| TRACIT TECHNOLOGIES Patent applications |
| Patent application number | Title | Published |
|---|
| 20100176397 | METHOD FOR PRODUCING PARTIAL SOI STRUCTURES COMPRISING ZONES CONNECTING A SUPERFICIAL LAYER AND A SUBSTRATE - The invention relates to a method for producing a semiconductor structure comprising a superficial layer, at least one embedded layer, and a support, which method comprises:
| 07-15-2010 |
| 20090301995 | Method for Making a Plate-Like Detachable Structure, in Particular Made of Silicon, and Use of Said Method - Process for fabricating a structure in the form of a wafer, including at least a substrate, a superstrate and at least one intermediate layer interposed between the substrate and the superstrate, the process including: forming, on a substrate, at least one intermediate layer including at least one base material in which extrinsic atoms or molecules are distributed, these differing from the atoms or molecules of the base material, so as to constitute a substructure; applying a base heat treatment to this substructure such that, in the temperature range of this heat treatment, the presence of the chosen extrinsic atoms or molecules in the chosen base material causes a structural transformation of said intermediate layer; and joining a superstrate to said heat-treated intermediate layer so as to obtain said structure in the form of a wafer. | 12-10-2009 |
| 20090275152 | PROCESS FOR THE COLLECTIVE FABRICATION OF MICROSTRUCTURES CONSISTING OF SUPERPOSED ELEMENTS - The invention relates to the collective fabrication of superposed microstructures, such as an integrated circuit and a protective cover. Individual structures each comprising superposed first and second elements are fabricated collectively. The first elements (for example, integrated circuit chips) are prepared on a first plate and the second elements (for example, transparent covers) are prepared on a second plate. The plates are bonded to each other over the major portion of their facing surfaces, but with no bonding of the defined zones in which there is no adhesion. The individual structures are then diced via the top on the one hand and via the bottom on the other hand along different parallel dicing lines passing through the zones with no adhesion, so that, after dicing, the first elements retain surface portions (those lying between the parallel dicing lines) that are not covered by a second element. A connection pad may thus remain accessible at this point. | 11-05-2009 |
| 20090095399 | METHOD FOR TRIMMING A STRUCTURE OBTAINED BY THE ASSEMBLY OF TWO PLATES - A method for trimming a structure obtained by bonding a first wafer to a second waver on contact faces and thinning the first waver, wherein at least either the first wafer or the second wafer is chamfered and thus exposes the edge of the contact face of the first wafer, wherein the trimming concerns the first wafer. The method includes a) selecting the second wafer from among wafers with a resistance to a chemical etching planned in b) that is sufficient with respect to the first wafer to allow b) to be carried out; b) after bonding the first wafer to the second wafer, chemical etching the edge of the first wafer to form in the first wafer a pedestal resting entirely on the contact face of the second wafer and supporting the remaining of the first wafer; and c) thinning the first wafer until the pedestal is reached and attacked, to provide a thinned part of the first wafer. | 04-16-2009 |
| 20080254596 | Method for Transferring Wafers - The invention concerns a method for preparing a thin layer ( | 10-16-2008 |
