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TERANETICS, INC.

TERANETICS, INC. Patent applications
Patent application numberTitlePublished
20120014420Method and Apparatus for Fast Link Recovery - Embodiments of methods and apparatus for fast link recover are disclosed. One method includes sensing a link quality failure of a link between a receiver and a transmitter. If a link quality failure is sensed, then the receiver selects new pre-coder settings for the transmitter. The receiver communicates the new pre-coder settings to the transmitter. The transmitter applies the new pre-coder settings. The receiver computes its equalizer settings based on the new pre-coder settings of the transmitter. One apparatus or transceiver includes a means for determining a link quality failure of a link between the transceiver and a link partner transceiver. The transceiver selects new pre-coder settings for the link partner transceiver if a link quality failure is sensed. Additionally, the transceiver communicates the new pre-coder settings to the link partner transceiver, and computes its equalizer settings based on the new pre-coder settings of the link partner transceiver.01-19-2012
20120014419Reducing Transmit Signal Components of a Receive Signal of a Transceiver Using a Shared DAC Architecture - Embodiments of a method and apparatus of reducing transmit signal components of a receive signal of a transceiver are disclosed. One embodiment of an apparatus includes a transceiver that simultaneously transmits a transmit signal and receives a receive signal. The transceiver includes a transmit DAC that generates the transmit signal based on a transmit digital signal stream. The transmit DAC includes a plurality of transmit DAC circuit elements, and a plurality of transmit DAC switches that control which of the plurality of transmit DAC circuit elements contribute to generating the transmit signal. The transceiver additionally includes an echo cancellation DAC that generates an echo cancellation signal based on the transmit digital signal stream. The echo cancellation DAC includes a plurality of echo cancellation DAC circuit elements, and a plurality of echo cancellation DAC switches that control which of the plurality of echo cancellation DAC circuit elements contribute to generating the echo cancellation signal. A data controller receives the transmit digital signal stream, and controls both the plurality of transmit DAC switches and the plurality of echo cancellation DAC switches. A canceller (summer) cancels at least a portion of the receive signal by summing the echo cancellation signal with the receive signal.01-19-2012
20110310936Reducing Electromagnetic Interference in a Receive Signal with an Analog Correction Signal - Embodiments of methods and apparatuses for reducing electromagnetic interference in a receive signal are disclosed. One method includes receiving a receive signal. An analog cancellation signal is generated. The analog cancellation signal is summed with a receive signal, thereby mitigating electromagnetic interference in the receive signal. One apparatus includes a transceiver that includes a receive analog to digital converter (ADC) sampling a receive signal. Electromagnetic interference (EMI) processing circuitry generates an analog cancellation signal. The analog cancellation signal is summed with a receive signal, thereby mitigating electromagnetic interference in the receive signal.12-22-2011
20110296267Reducing Electromagnetic Interference in a Received Signal - Embodiments of methods and apparatus for reducing electromagnetic interference of a received signal are disclosed. One method includes receiving a signal over at least two conductors, extracting a common-mode signal from the at least two conductors, processing the common-mode signal, and reducing electromagnetic interference of the received signal by summing the processed common-mode signal with the received signal.12-01-2011
20110261863Reducing Transmit Signal Components of a Receive Signal of a Transceiver - Embodiments of a method and apparatus of reducing transmit signal components of a receive signal of a transceiver are disclosed. One method includes generating a transmit signal by passing a pre-driver transmit signal through a transmit driver. An echo cancellation signal is generated by passing the pre-driver transmit signal through an echo cancellation driver. A residual echo signal is generated by passing a pre-driver residual echo cancellation signal through a residual echo cancellation driver. The transceiver simultaneously transmits the transmit signal, and receiving the receive signal. At least a portion of an echo signal of the receive signal is canceled by summing the echo cancellation signal with the receive signal. At least another portion of the cancellation echo signal of the receive signal is canceled by summing the residual echo cancellation signal with the receive signal.10-27-2011
20100058143Efficient Decoding - Embodiments of a method and apparatus for decoding signals are disclosed. An embodiment of a decoder includes means for generating bits representing received signals, and beliefs representing an associated reliability of each bit. A bit node computation block receives the bits and associated beliefs, and generates a plurality of bit node messages. A plurality of M serially-connected pipeline stages receive the bit node messages and after M decoding cycles, and generate a plurality of check node messages once per decoding cycle, wherein for each iteration cycle, each of the M serially-connected pipeline stages performs check node computations using all of J component codes, wherein each one of the M serially-connected pipeline stages performs check node computations once per decoding cycle using a single component code that is different that component codes used for all other of the M serially-connected pipeline stages, wherein J is at least as great as M, and wherein each iteration includes M decoding cycles.03-04-2010

Patent applications by TERANETICS, INC.