| 20080315239 | THIN DOUBLE-SIDED PACKAGE SUBSTRATE AND MANUFACTURE METHOD THEREOF - The present invention discloses a manufacture method for a thin double-sided package substrate, which includes steps: providing a carrier; respectively forming a first conductive layer and a second conductive layer on the upper and lower surfaces of the carrier; forming a through-hole penetrating the first conductive layer and the carrier but not penetrating the second conductive layer; setting a conductive element in the through-hole to electrically connect the first conductive layer with the second conductive layer; forming desired circuits on the first conductive layer and/or the second conductive layer; forming a first metal layer on the first conductive layer and/or the second conductive layer; and removing the carrier located in a predetermined region to form a chip receiving bay. The present invention also discloses a package substrate made by the abovementioned manufacture method, which can reduce the overall thickness of a chip package structure, increase the heat-dissipation effect of the chip and prevent the chip package structure from humidity penetration. | 12-25-2008 |
