| STMicroelectronics (Shenzhen) R&D Co. Ltd Patent applications |
| Patent application number | Title | Published |
|---|
| 20120133284 | SYSTEM FOR REPROGRAMMING POWER PARAMETERS FOR LIGHT EMITTING DIODES - According to an embodiment of the present disclosure, a plurality of light-emitting diode (LED) modules in series are monitored. When an LED module is detected as failing or operating inadequately, a bypass switch removes the particular LED module from the series and the voltage provided to the series is modified. When the LED modules are detected as having too high of a temperature, the current provided to the LED modules is limited. | 05-31-2012 |
| 20110156821 | CIRCUIT AND METHOD FOR GENERATING A CLOCK SIGNAL - A circuit comprises a frequency divider configured to receive an oscillating signal generated by an oscillator and to divide the oscillating signal into a clock signal, wherein the division ratio of the frequency divider is set to a value equal to one of: the integer part of the resonant frequency of the oscillator and the integer part of the resonant frequency of the oscillator plus 1. | 06-30-2011 |
| 20110156774 | CIRCUIT AND METHOD FOR GENERATING A CLOCK SIGNAL - A circuit comprises a frequency divider coupled to receive an oscillating signal generated by an oscillator and a division ratio and configured to divide the oscillating signal by the division ratio into a clock signal; a temperature compensation circuit configured to measure a temperature of the oscillator and generate a division ratio to be provided to the frequency divider and a first value on the basis of the measured temperature; and a control system configured to control connection between a calibration element and the oscillator based on the first value and the oscillating signal of the oscillator. | 06-30-2011 |
| 20110156688 | Regulator Over-Voltage Protection Circuit with Reduced Standby Current - An embodiment of the invention relates to a power converter formed with an error amplifier and a related method. In an embodiment, a first switch is coupled in series with an error amplifier compensation capacitor. Upon detection of a current level greater than a threshold level, the compensation capacitor is decoupled from the error amplifier by opening the first switch. In an embodiment, a second switch is coupled in parallel with the compensation capacitor, and the current-sensing circuit enables conductivity of the second switch to discharge the compensation capacitor upon detection of the current level greater than the threshold level. The second switch is opened upon detection of the current level less than the threshold level. In an embodiment, the current-sensing circuit controls an output current of the power converter at a current-limit level upon detection of the internal current level greater than the threshold level. | 06-30-2011 |
| 20110156683 | Current mode buck-boost DC-DC controller - A current mode DC-DC controller operates with high efficiency even when the input and output voltages are close. Switches selectively connecting an input, ground and an output to inductor terminals are controlled in a buck/boost region to alternate between operation as a buck converter and operation as a boost converter. The number of switches repeatedly changing state is thus reduced, lowering switching losses and improving conversion efficiency. Current through the inductor during operation is sensed and compared to an error value to control switching from buck mode operation to boost mode operation and back. | 06-30-2011 |
| 20110156676 | GENERATING A REGULATED SIGNAL FROM ANOTHER REGULATED SIGNAL - An embodiment of a method includes generating a regulated output signal from a regulated intermediate signal in response to a reference signal and the regulated output signal, and generating the regulated intermediate signal from an input signal in response to the regulated output signal and the regulated intermediate signal. By generating one regulated signal (e.g., a regulated output voltage) from another regulated signal (e.g., a regulated intermediate voltage), one may significantly reduce the magnitude of the ripple component of the one regulated signal as compared to a conventional regulation technique. Furthermore, by generating the regulated intermediate signal in response to the regulated output signal, one may significantly increase the efficiency of the regulation as compared to conventional signal regulation. | 06-30-2011 |
| 20110154911 | FLOW METER - A flow meter for measurement of a metered fluid has a sensor element that receives a flow input of a metered fluid and outputs a flow output of the metered fluid, and a battery element. The sensor element has an inductor element and a magnetic element coupled to the inductor element. In response to movement of the magnetic element relative to the inductor element caused by a fluid pressure differential of the metered fluid, the inductive value of the inductor element changes. | 06-30-2011 |
| 20110148471 | Temperature-Independent Undervoltage Detector and Related Method - Embodiments related to an undervoltage detector are described and depicted. An undervoltage detector is formed to detect a low input bias voltage with a voltage divider network including first and second series circuits of semiconductor devices coupled to terminals of the input bias voltage source, and a resistor voltage divider including first and second voltage divider resistors coupled in series with the first and second series circuits. A ratio representing the numbers of semiconductor devices in the series circuits is substantially equal to a ratio of resistances in the resistor voltage divider. The equality of the ratios may be corrected by the presence of other resistances in the undervoltage detector. The semiconductor devices are each coupled in a diode configuration. The first series circuit is coupled to a current mirror to provide a bias current for a comparator that produces an output signal for the undervoltage detector. | 06-23-2011 |
| 20110145674 | High-efficiency dynamic transmission that has a high speed and reliability - A system and method for error correction coding is configured to dynamically implement one of a number of error correction coding methods during a transmission of data. The error correction coding method is selected based on a measured bit error rate during the transmission of data. The implementation of the error correction coding method is performed without interrupting the data transmission. | 06-16-2011 |
| 20110142165 | Flexible self-adaptive differential system to improve transmission efficiency - A system and method for transmitting data. The system and method is configured to dynamically implement one of a differential signaling method or a single-ended signaling method during a transmission of data. The signaling method is selected based on a measured interference level during the transmission of data. The implementation of the signaling method is performed without interrupting the data transmission. | 06-16-2011 |
| 20110109352 | Summation Circuit in DC-DC Converter - An integrated circuit includes a saw-tooth generator including a saw tooth node configured to have a saw-tooth voltage generated thereon; and a first switch having a first end connected to the saw tooth node. The integrated circuit further includes a second switch coupled between an output node and an electrical ground, wherein the first switch and the second switch are configured to operate synchronously. A first current source is connected to the saw tooth node. A second current source is connected to the output node. | 05-12-2011 |
| 20110109296 | Voltage Regulator Architecture - An integrated circuit includes a bandgap reference generator and a voltage regulator. The bandgap reference generator includes a first current path, and a first bipolar transistor with an emitter-collector path in the first current path. The voltage regulator includes a second current path, wherein the second current path mirrors the first current path; a resistor configured to receive a current of the second current path; a second bipolar transistor with a base and a collector of the second bipolar transistor being interconnected; and a third bipolar transistor connected in series with the second bipolar transistor and the resistor. A base and a collector of the third bipolar transistor are interconnected. | 05-12-2011 |
| 20110089923 | Accurate Current Sensing Circuit with Ultra Low Voltage Supply - An integrated circuit includes a DC-DC converter, which includes an inductor; a first transistor coupled to the inductor and configured to pass an inductor current to the inductor; and a second transistor forming a current mirror with the first transistor. The integrated circuit further includes an operational amplifier. The operational amplifier includes a first input node and a second input node. The first input node is configured to couple to a drain of the first transistor when the first transistor is turned on, and decoupled from the drain of the first transistor when the first transistor is turned off. The second input node is coupled to a drain of the second transistor. | 04-21-2011 |
| 20110074511 | LAYOUT AND PAD FLOOR PLAN OF POWER TRANSISTOR FOR GOOD PERFORMANCE OF SPU AND STOG - A power transistor for use in an audio application is laid out to minimize hot spots. Hot spots are created by non-uniform power dissipation or overly concentrated current densities. The source and drain pads are disposed relative to each other to facilitate uniform power dissipation. Interleaving metal fingers and upper metal layers are connected directly to lower metal layers in the absence of vias to improve current density distribution. This layout improves some fail detection tests by 17%. | 03-31-2011 |
| 20110074481 | NEGATIVE CHARGE PUMP WITH CURRENT PROTECTION - A charge pump circuit includes a first power transistor selectively actuated by a first control signal to deliver relatively higher amounts of current to a capacitor and a second non-power transistor connected in parallel with the first power transistor and selectively actuated by a second control signal to deliver relatively lower amounts of current to the capacitor. The charge pump circuit includes a pumped voltage output that is sensed to generate a sensed voltage output. A comparison circuit compares the sensed voltage output to a threshold voltage. A logic circuit receives an output of the comparison circuit and enables the first power transistor and disables the second non-power transistor in a first mode of operation if the comparison is not satisfied. The logic circuit further disables the first power transistor and enables the second non-power transistor in a second mode of operation if the comparison is satisfied. The logic circuit returns from the second mode of operation to the first mode of operation after the comparison is subsequently not satisfied. | 03-31-2011 |
| 20100123508 | SMOOTH SWITCHING BETWEEN ANALOG INPUT SIGNALS - A first switching circuit has an input for receiving a first input signal, and a second switching circuit has an input for receiving a second input signal. A node is connected to receive outputs from both the first and second switching circuits. A filter receives an unfiltered signal from the node to generate an output signal. A circuit is provided to alternately actuate the first and second switching circuits during a transition time period so as to smoothly transition the output of the filter between the first and second input signals. At least one of the first and second input signals is a time-varying analog signal. The smooth transition between the first and second input signals has a shape determined by pulse width and frequency characteristics of pulses output by the circuit to alternately actuate the first and second switching circuits. The shape may include a linear ramp, an S-shaped curve, a parabolic curve and a hyperbolic curve. | 05-20-2010 |
| 20090322428 | TUNABLE LINEAR OPERATIONAL TRANSCONDUCTANCE AMPLIFIER - A tunable, linear operational transconductance amplifier includes a differential voltage to current conversion unit adapted to generate first and second output signals at respective first and second output nodes responsive to first and second differential input signals. A first current amplification unit is adapted to generate a third output signal responsive to the first output signal and first and second control signals. A second current amplification unit is adapted to generate a fourth output signal responsive to the second output signal and the first and second control signals. | 12-31-2009 |
