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STMICROELECTRONICS (CROLLES2) SAS

Crolles Cedex, FR

STMICROELECTRONICS (CROLLES2) SAS Patent applications
Patent application numberTitlePublished
20120018618Imaging Device Having Improved Performance and Method of Controlling It - Imaging device comprising at least one photosite comprising a charge storage semiconductor zone, a charge collection semiconductor zone and transfer means designed to permit charge transfer between the charge storage zone and the charge collection zone, characterized in that the charge storage semiconductor zone comprises a lower semiconductor zone and a conduction channel buried beneath the upper surface of the photosite and connecting said lower semiconductor zone to the charge collection zone.01-26-2012
20110230020SCHOTTKY-BARRIER MOS TRANSISTOR ON A FULLY-DEPLETED SEMICONDUCTOR FILM AND PROCESS FOR FABRICATING SUCH A TRANSISTOR - This process for manufacturing a Schottky-barrier MOS transistor on a fully depleted semiconductor film may include depositing a first layer of a first sacrificial material on an active zone of the substrate, forming a silicon layer on top of the first layer of sacrificial material, forming a gate region on top of the silicon layer with interposition of a gate oxide layer, and selective etching of the sacrificial material so as to form a tunnel beneath the gate region. The tunnel is filled with a dielectric second sacrificial material. A controlled lateral etching of the second sacrificial material is performed so as to keep behind a zone of dielectric material beneath the gate region. Silicidation is performed at the location of the source region and drain region and at the location of the etched zone.09-22-2011
20110227653Electronic Circuit Output Stage - An electronic circuit including: a first branch, placed between two terminals of application of a D.C. voltage, including a series connection of a first constant current source, of a first diode-connected N-channel MOS transistor, of a first diode-connected P-channel MOS transistor, and of a second constant current source; a second branch, parallel to the first branch, comprising a series connection of a second N-channel MOS transistor connected as a current mirror on the first N-channel MOS transistor and of a second P-channel MOS transistor connected as a current mirror on the first P-channel transistor; and an input terminal connected between the first N-channel and P-channel transistors and an output terminal connected between the second N-channel and P-channel transistors.09-22-2011
20110140220MICROELECTRONIC DEVICE, IN PARTICULAR BACK SIDE ILLUMINATED IMAGE SENSOR, AND PRODUCTION PROCESS - A process for producing a microelectronic device includes producing a first semiconductor substrate which includes a first layer and a second layer present between a first side and a second side of the substrate. First electronic components and an interconnecting part are produced on and above the second side. The substrate is then thinned by a first selective etch applied from the first side and stopping on the first layer followed by a second selective etch stopping on the second layer. A second substrate is attached over the interconnecting part. The electronic components may comprise optoelectronic devices which are illuminated through the second layer.06-16-2011
20090184358METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE AND THE SEMICONDUCTOR DEVICE MADE THEREOF - A method for fabricating a semiconductor device and the device made thereof are disclosed. In one aspect, the method includes providing a substrate comprising a semiconductor material. The method further includes patterning at least one fin in the substrate, the fin comprising a top surface, at least one sidewall surface, and at least one corner. A supersaturation of point defects is created in the at least one fin. The at least one fin is annealed and then cooled down such that semiconductor atoms of the semiconductor material migrate via the point defects.07-23-2009
20090020786SEMICONDUCTOR DEVICE - A method for forming a semiconductor device on a substrate having a first major surface lying in a plane and the semiconductor device are disclosed. In one aspect, the method comprises, after patterning the substrate to form at least one structure extending from the substrate in a direction substantially perpendicular to a major surface of the substrate, forming locally modified regions at locations in the substrate not covered by the structure, thus locally increasing etching resistance of these regions. Forming locally modified regions may prevent under-etching of the structure during further process steps in the formation of the semiconductor device.01-22-2009
20080251848Manufacturing method for homogenizing the environment of transistors and associated device - A semiconductor device is provided that includes a plurality of patterns. Each pattern includes at least one field effect transistor. Each field effect transistor includes a source region, a drain region, a channel region, and a gate region formed above the channel region. A portion of the plurality of patterns is formed in a single active area of a semiconductor substrate, where the area delimited by an isolation region. One of the source region and the drain region of each adjacent pattern are formed in said active area.10-16-2008

Patent applications by STMICROELECTRONICS (CROLLES2) SAS