STAKTEK GROUP L.P. Patent applications |
Patent application number | Title | Published |
20090073661 | THIN CIRCUIT MODULE AND METHOD - A circuit module includes a printed circuit board (PCB) having a first side, a second side, and a bottom perimeter edge. The PCB exhibits a first thickness along the bottom perimeter edge. The first side includes a recessed area and, in that recessed area, the PCB has a second thickness that is less than the first thickness. A plurality of integrated circuits (ICs) are fixed to the PCB in the recessed area. A plurality of module contacts are connected to the ICs and are disposed along at least one of the first and second sides and are configured to provide electrical connection between the circuit module and an edge connector. | 03-19-2009 |
20080291747 | Buffered Memory Device - A memory module having a DRAM device configured to generate a low DQS state on a DQS line, and a buffer coupled to the DRAM device, the buffer having a plurality of drivers, wherein the buffer is configured to detect the low DQS state by comparing the low DQS state to a low voltage level of one of the plurality of drivers. | 11-27-2008 |
20080246134 | Package-Borne Selective Enablement Stacking - The present invention provides a system and method for selectively stacking and interconnecting leaded packaged integrated circuit devices. In preferred embodiments, the plastic body of one or more leaded packaged ICs bear conductive traces that create circuitry to provide stacking related electrical interconnections between the constituent ICs of a stacked module without the use of separate interposers or carrier structures. Typically, the circuitry is borne by the body of the upper one of the ICs of a two-IC leaded package stack to implement stacking-related connections between the constituent ICs. | 10-09-2008 |
20080222365 | Managed Memory System - A managed memory system is provided. More specifically, in one embodiment, there is provided a system including a memory device and a switch coupled to the memory device. The switch has at least a first switch position and a second switch position. The system also includes a memory controller coupled to the first switch position and a processor interface coupled to the second switch position. | 09-11-2008 |