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ST Microelectronics, Inc.
| ST Microelectronics, Inc. Patent applications | ||
| Patent application number | Title | Published |
|---|---|---|
| 20120042103 | SMART CARD WITH SELF-DETACHMENT FEATURES AND RELATED METHODS - An integrated circuit for a smart card in accordance with an exemplary embodiment includes at least one data terminal for providing communications with a host device over a system bus and a processor configured to provide an attachment signal on the at least one data terminal for recognition by the host device. Further, the processor also cooperates with the host device to perform an enumeration based upon at least one default descriptor, and receive information from the host device regarding a system event. In addition, the processor is configured to remove the attachment signal from the at least one data terminal and thereafter again provide the attachment signal on the at least one data terminal based upon the information regarding the system event, and cooperate with the host device to perform a new enumeration based upon at least one alternate descriptor. | 02-16-2012 |
| 20100241835 | PROCESSOR WITH AUTOMATIC SCHEDULING OF OPERATIONS - A high speed processor. The processor includes terminals that each execute a subset of the instruction set. In at least one of the terminals, the instructions are executed in an order determined by data flow. Instructions are loaded into the terminal in pages. A notation is made when an operand for an instruction is generated by another instruction. When operands for an instruction are available, that instruction is a “ready” instruction. A ready instruction is selected in each cycle and executed. To allow data to be transmitted between terminals, each terminal is provided with a receive station, such that data generated in one terminal may be transmitted to another terminal for use as an operand in that terminal. In one embodiment, one terminal is an arithmetic terminal, executing arithmetic operations such as addition, multiplication and division. The processor has a second terminal, which contains functional logic to execute all other instructions in the instruction set. The invention is useful for arithmetic intensive applications, such as graphic processors. | 09-23-2010 |