| ST-Ericsson SA Patent applications |
| Patent application number | Title | Published |
|---|
| 20120133430 | OFFSET CANCELLATION FOR AUDIO AMPLIFIER - An audio amplification circuit is provided having an amplifier that receives an input signal, an output, and a digital control input for receiving a control value in a number n of bits; a comparator having a first input that receives the amplifier's output signal image, a second input that receives a reference potential, and an output; and a thermometer counter having a selection input coupled to the comparator output, and an output delivering an n-bit digital value to the amplifier control input. The amplifier comprises a differential input stage having a first and a second differential branch, each traversed by a bias current, the current in the first branch being modifiable by n basic current sources which each deliver either a current identical for all current sources, or no current, as a function of one respective bit of the digital control value received at the control input. | 05-31-2012 |
| 20120129541 | Apparatuses, Method and Computer Program for Adapting a Telecommunication Service to Traffic Load in the Network - There is disclosed improvements of the access stratum layer for adapting a telecommunication service to traffic load on the network. | 05-24-2012 |
| 20120126778 | Charge Pump Circuit with Pulse-Width Modulation - Each switching element of a charge pump circuit of a voltage regulator comprises a relatively small-sized MOS transistor associated with a relatively large-sized MOS transistor connected in parallel. Only the small transistors are switched in a first mode of operation, while the large transistors are switched in a second mode of operation. In this manner the switching losses in the first mode of operation can be decreased. | 05-24-2012 |
| 20120117280 | Detection of USB Attachment - A change is managed in the attachment state between a first device and a second device which are connected via an interface. The first device comprises a high frequency clock. The first device is in a sleep state in which the high frequency clock is deactivated. A detection of a change in the attachment state of the second device is periodically triggered on said interface, on the basis of a low frequency clock. Upon detection of a change in the attachment state, the sleep mode is exited by activating the high frequency clock. | 05-10-2012 |
| 20120115544 | INTERACTIVE CONTROL OF COMMUNICATION TERMINALS - An electronic circuit is proposed for a wireless telephone terminal, configured to allow the use of devices present in another remote terminal with which it can communicate. | 05-10-2012 |
| 20120115533 | Method of Cutting Off a Transmission Signal of a Main Transmitter Relayed by a Cell of a Base Station and Associated System - Method of cutting off a transmission signal of a main transmitter relayed by a cell of a base station and associated system. According to this method, the transmission signal is cut off:—if the power of the transmission signal emitted by the main transmitter is greater than the power of each transmission signal of other transmitters relayed by the same cell of the base station, and—if the power of the transmission signal of the main transmitter does not decrease after several identical successive transmitted-power regulating commands (TPC) emitted by the base station. | 05-10-2012 |
| 20120112768 | Methods and Systems for Production Testing of DCO Capacitors - Systems provide for a test system for capacitors in a digitally controllable oscillator (DCO). The system includes: capacitor toggling logic configured to switch on and off a selected one of the capacitors at a modulation frequency; a tone generator configured to generate a tone; a mixer configured to receive the tone and an output carrier signal from the DCO while the capacitor toggling logic is switching the selected one of the capacitors on and off and to output an intermediate frequency signal having FM sidebands based on the modulation frequency and relative capacitor size; and an evaluation circuit configured to evaluate a frequency deviation associated with the selected one of the capacitors based on at least one of the FM sidebands. | 05-10-2012 |
| 20120110217 | HIGH SPEED INTERCHIP HSIC USB MONITORING - Disclosed herein is a system for monitoring high speed interchip (HSIC) universal serial bus (USB) signals in a device comprising a USB controller configured to output first USB transceiver macro-cell (UTMI+) signals, an HSIC PHY transceiver configured to receive first UTMI+ signals from the USB controller and to convert and transmit received first UTMI+ signals as first HSIC signals, and to receive second HSIC signals and transmit them as second UTMI+ signals to the USB controller, a UTMI+ conversion block configured to receive first and second UTMI+ signals and to transform the received first and second UTMI+ signals to corresponding first and second ULPI signals, and transmit first and second ULPI signals, the first and second ULPI signals being equivalent to the first and second HSIC signals, and a ULPI PHY transceiver configured to receive the first and second ULPI signals and transmit corresponding first and second USB signals. | 05-03-2012 |
| 20120108236 | METHOD AND DEVICE FOR ASSIGNING A CELL TO A WIRELESS COMMUNICATION APPARATUS, AND CORRESPONDING APPARATUS - A method and device for assigning a cell to a wireless communication apparatus, and corresponding apparatus is provided. The method for assigning a cell to a wireless communication apparatus is performed when the wireless communication device leaves a standby mode so as to send a request for access to a desired service belonging to a class of services. The method may include elaborating, for each cell and for each class of service supported by the cell, an index relating to the loading rate of the class of services within the cell. The communication apparatus may then receive the loading rate indices of the cells liable to be assigned to the communication apparatus. The communication device then may select, from among the cells liable to be assigned to the communication apparatus, the cell to which the communication apparatus is assigned, at least, as a function of the loading rate indices. | 05-03-2012 |
| 20120106680 | CREST FACTOR REDUCTION IN MULTICARRIER TRANSMISSION SCHEMES - A multicarrier transmission system uses a set of carriers spaced apart in frequency with a number of bits being assigned to each carrier. A transmitter has a mapper which maps a data signal to a parallel set of constellation values. A frequency domain-to-time domain transform stage converts the set of modulated carriers to a time-domain signal. A peak detector detects when the time-domain signal exceeds a predetermined criterion. A constellation modifier modifies the constellation value of at least one of the carriers to reduce the crest factor of the transmitted signal. A carrier is selected for modifying on the basis of a number of bits allocated to that carrier. The constellation modifier can select an alternative constellation value by an iterative method or by calculation. The constellation modifier can operate entirely in the time-domain. | 05-03-2012 |
| 20120099531 | Method for Processing Packets of the IP Type Intended to be Carried Over a Communications Channel of a Wireless Network, and Equipment for Same - A method for processing packets of the IP type within equipment of a wireless communications network comprising an encapsulation of the packets within frames carried over a communications channel of the wireless network. The said encapsulation comprises a first encapsulation of the signalling packets of the IP type within a frame of a first type containing an indication associated with this type of packet, then an additional encapsulation of the said frame of the first type within a frame of a second type different from the first type, and a second encapsulation of the packets transporting the user data of the IP type within a frame of a third type then an additional encapsulation of the said frame of the third type within a frame of the second type. | 04-26-2012 |
| 20120083210 | Channel Randomization for Backoff Efficiency Improvement - Methods and apparatus for solving problems caused by backoff procedures like that specified in the BLUETOOTH Link Layer Specification, by introducing selected randomizations of communication channels used for communication by scanning devices. | 04-05-2012 |
| 20120082143 | INCREASED THROUGHPUT IN RADIO-FREQUENCY COMMUNICATIONS - A mobile telephony radiocommunication management process, with first time slots and second time slots being provided independently of each other, said process comprising the default selection of first time slots for transmitting/receiving first bursts corresponding to these first time slots, and in the case of a first time slot at least partially overlapping with a second time slot, choosing the first time slot or the second time slot, for respectively transmitting/receiving the first burst corresponding to the first time slot or receiving the second burst corresponding to the second time slot, with this choice being made so as to minimize the number of second bursts received for a given result. | 04-05-2012 |
| 20120080954 | ENHANCED POWER IN HDMI SYSTEMS - There is provided a source device, which is adapted to communicate with a sink device through an HDMI cable. The sink device comprises an internal circuit, handshaking circuitry adapted to verify if the sink device is able to supply a current on a line of the HDMI cable, an internal power supply intended for powering the line and a switching circuit able to uncouple the internal power supply from the line and able to couple the internal circuit to the line. There is also provided a sink device, which is adapted to communicate with a source device through an HDMI cable. The sink device comprises a power supply, hand-shaking circuitry able to indicate that the sink device is able to supply a current on a line of said HDMI cable, and a circuit able to couple the power supply to the line. | 04-05-2012 |
| 20120080945 | Power Management Unit Systems and Methods - Systems and methods provide for a power management unit and its operation. The power management unit includes: a step-down power converter configured to receive a first voltage and output a second voltage, wherein the second voltage is less than the first voltage and at least one step-up power converter configured to receive the second voltage and output a third voltage, wherein the third voltage is greater than the second voltage. It also includes an inductive element connected to the step-down power converter and the at least one step-up power converter and configured to store energy and selectively release the stored energy, wherein the inductive element is time shared by both the step-down power converter and the at least one step-up power converter; and a finite state machine configured to control the time sharing of the inductive element. | 04-05-2012 |
| 20120074916 | Switch-Mode Voltage Regulator - The invention concerns a switch-mode voltage regulator, comprising : an inductor (L); a generator for producing a voltage ramp ( | 03-29-2012 |
| 20120072520 | System and Method for Establishing Reliable Communication in a Connection-Less Environment - The establishment of reliable communication, in particular in an environment of the mobile industry processor interface where communication is taking place based on the Unified Protocol is described. In this case based on the timer at the sender and based on maintaining an originator of a message at the receiver certain precautions are taken that messages are exchanged correctly and only once an acknowledgement is received from the sender, that a first and a second message have been exchanged correctly a maintained originator at the receiver is released. The same method can also be applied to sending a plurality of messages in sequence by using sequence numbers and replying to them in the same manner. In this case the timer is always restarted, once the message as a first type of message is sent from the sender side and an acknowledgement is sent after the last second type of message with a highest sequence number has been received from the receiver side. With the method and the system according to the present invention it is possible to implement the configuration protocol of the Unified Protocol even in a case where a connection-less service which is faster to use is selected. The method according to the present invention may be triggered by a bit that is set in a protocol data unit as one of the reserved bits in the header there. | 03-22-2012 |
| 20120071110 | Frequency Offset Correction - The invention relates to a radio-frequency circuit comprising: a control unit; and a phase-locked loop; wherein the control unit is arranged to determine an offset between an actual value of a reference frequency at the input to the loop on the basis of a measurement of the signal output from the filter of the loop, and a theoretical value of said frequency known to the control unit, via a relation known to the control unit, and to control a correction of said offset. | 03-22-2012 |
| 20120069871 | Temperature Compensation in a Telecommunications Device - A communications device, such as a GNSS receiver comprises an oscillator, having a temperature-dependent frequency characteristic, for generating signals at a nominal frequency; receiver circuitry, for receiving transmitted wireless signals using the signals generated by the oscillator; at least one temperature sensor, having a known positional relationship to the oscillator; an estimation device, for estimating a frequency of the signals generated by the oscillator, based on a measurement from the temperature sensor, and based on the temperature-dependent frequency characteristic of the oscillator; and at least one heat source. A change in the temperature of the oscillator is predicted, based on a state of the heat source, and further based on a model of the thermal properties of the communications device, and hence a change in the frequency of the signals generated by the oscillator is predicted, based on the temperature-dependent frequency characteristic of the oscillator. The receiver circuitry uses the estimated frequency of the signals generated by the oscillator, and the predicted change in the frequency of the signals generated by the oscillator, in receiving the transmitted wireless signals. | 03-22-2012 |
| 20120068770 | ANTI-GLITCH SYSTEM FOR AUDIO AMPLIFIER - An audio amplification circuit comprises an amplifier having an input and an output, as well as an audio output to which a load can be connected. It additionally comprises a first driver stage having an input and an output which is not coupled to the audio output, and a second driver stage having an input and an output which is coupled to the audio output. The output from the amplifier is selectively coupled to the input of the first driver stage in a first phase of operation and then selectively to the input of the second driver stage in a second phase of operation following the first phase of operation. | 03-22-2012 |
| 20120063536 | Method and Device for Processing a Digital Complex Modulated Signal Within a Polar Modular Transmission Chain - Method of processing a digital complex modulated signal, comprising performing pre-processing said digital complex modulated signal (DCMS) for obtaining a pre-processed digital complex modulated signal (PPRS) and performing a Cartesian to polar conversion of said pre-processed signal, said pre-processing including analysing the trajectory of said digital complex modulated signal and if said trajectory crosses a region (RAO) around the origin (O) of the complex plane, modifying said digital complex modulated signal such that said pre-processed signal has a modified trajectory avoiding said region. | 03-15-2012 |
| 20120059960 | METHOD FOR CONTROLLING A DATA TRANSFER ON A SERIAL TRANSMISSION DATA TRANSFER BUS - Method for controlling a data transfer on a serial transmission data transfer bus by means of a central processing unit and associated system. The method includes various steps, including determining an available bandwidth for a data bus, determining an available computing capacity percentage of the central processing unit, and determining a maximum data rate that a data transfer can be performed on the data bus based on the available bandwidth and the available computing capacity percentage. Furthermore, the method provides that the data transfer rate is controlled to not exceed the maximum data rate. | 03-08-2012 |
| 20120058798 | PROCESS FOR IMPROVING THE DETERMINATION OF THE SIR TARGET IN AN OUTER LOOP POWER CONTROL MECHANISM OF UMTS UE - In a receiver of a UMTS telecommunication system a process for performing the Outer Loop power control in a User Equipment is provided. The receiver includes an improved outer loop power control mechanism that estimates a Signal to Interference target (SIR | 03-08-2012 |
| 20120057663 | Terminal State Management in a Telecommunications Network - A signal transmitted in a radio telecommunications network is received ( | 03-08-2012 |
| 20120057628 | SYSTEM AND METHOD FOR OFDM RECEPTION IN THE PRESENCE OF DOPPLER EFFECT BASED ON TIME DOMAIN WINDOWING - An OFDM receiver for processing an OFDM received signal to perform OFDM reception in presence of Doppler effects is provided. The receiver has at least two parallel processing chains, each processing chain has a time domain windowing for processing an OFDM block. The processing consisting of the multiplication, element by element of the OFDM block, by a set of predetermined coefficients. | 03-08-2012 |
| 20120056676 | RF Amplifier with Digital Filter for Polar Transmitter - An RF power amplifier for a polar transmitter converts an amplitude component signal into a 1-bit digital amplitude signal, which is fed to a digital finite impulse response filter. Successive taps of the filter each have an RF amplification stage arranged to amplify successively delayed versions of the 1-bit digital amplitude signal, the amplifying being according to a respective tap coefficient, and according to the RF carrier modulated by the phase component. The filter is arranged to combine the outputs of the taps to provide the amplified RF signal. The power amplifier uses a one bit stream which therefore has only two states (2 values), thus achieving linearity in principle. Device mismatch between taps does not lead to non-linearity or distortion. | 03-08-2012 |
| 20120056670 | CROSS CURRENT MINIMIZATION - A method of optimising cross current in class D amplifiers and simultaneously minimizing the harmonic distortion is provided. The method overcomes the problem of using the limited speed voltage comparators often used in cross current preventing circuits. Method embodiments are based on introducing a replica amplifier with a current sensor matched to a main amplifier. The duration of a sensed cross current within the replica amplifier is compared by a current comparator with a small enough reference current. The comparator output generates a pulse with a duration equal to the duration of the cross current event in the replica amplifier. The duration of that pulse is measured and used to generate a dead time pulse for blanking amplifier pre-driver inputs. | 03-08-2012 |
| 20120044809 | Method for Controlling the Operation of a Processing Unit of a Wireless Communications Device, and Corresponding Communications Device - Method for controlling the operation of a processing unit (IC) of a wireless communications device (WAP) connected to a network (RES) via a communications channel, said processing unit being configured to process at least one application for processing data exchanged with the network (ATEL). The method comprises, in the presence of a detected or predictable processing overload of the processing unit, a transmission from the device to the network (RES) of quality information representing ( | 02-23-2012 |
| 20120039004 | Composite Electronic Circuit Assembly - A composite electronic circuit assembly comprises two MOS or CMOS circuit dice ( | 02-16-2012 |
| 20120033656 | Integrated Bluetooth and Wireless LAN Transmitters Having Simultaneous Bluetooth and Wireless LAN Transmissions - Integrated Bluetooth (BT) and Wireless Local Area Network (WLAN) transceivers are described. BT signals and WLAN signals can be transmitted simultaneously with one another. Samples from a BT signal sample stream are injected into a WLAN signal sample stream. According to one exemplary embodiment, a simultaneously transmitted BT signal/WLAN signal can be amplified and coupled onto a pin of an integrated circuit device for transmission. If there is no WLAN signal to be transmitted when a BT signal is to be transmitted, then the BT signal can be processed in a BT section of the transceiver, amplified and coupled to the same pin for transmission. | 02-09-2012 |
| 20120032741 | Integrated Bluetooth and Wireless LAN Transceivers Having Merged Low Noise and Power Amplifier - A group of transistors operate as a combined power amplifier, to amplify signals to be transmitted, and as a low noise amplifier, to amplify signals which are received. In a first mode, the group of transistors is configured to amplify the signals to be transmitted by turning all of the transistors in both a first subset and a second subset on. In a second mode, the group of transistors is configured to amplify the signals which have been received by turning on the first subset of transistors and turning off the second subset of transistors. | 02-09-2012 |
| 20120027109 | PROCESS AND RECEIVER FOR INTERFERENCE CANCELLATION OF INTERFERING BASE STATIONS IN A SYNCHRONIZED OFDM SYSTEM - A process and receiver for canceling interference generated by a set interference base stations in a synchronized OFDM communication system and receiver in a User Equipment comprising a set of Nrx antennas. The process and receiver that cancels interference generated by a set of base stations performs OFDM demodulation on a receiver signal for each antenna of a user equipment (UE). The process and receiver also monitors each UE antenna for pilot signals generated by nearby base stations. Then the process or receiver extracts the pilot signals and establishes a list of existing base station antennas. The channel power of any interfering antennas is measured and then the Nrx-N most powerful antenna is selected. The process or receiver then performs a joint detection of the N useful Data Symbols (UDS), together with the (Nrx-N) Interfering Data Symbols (IDS) that are demodulated by demodulation blocks. Thus, after being detected, the Nrx-N most powerful IDSs can be encoded and re-injected into a cancellation loop. | 02-02-2012 |
| 20120026024 | SYSTEM FOR CALIBRATING A TIME CONSTANT OF AN INTEGRATED CIRCUIT, AND INTEGRATED CIRCUIT PROVIDED WITH SUCH A SYSTEM - System and method for calibrating a time constant R | 02-02-2012 |
| 20120025847 | METHOD AND SYTEM FOR MEASURING A TIME CONSTANT OF AN INTEGRATED CIRCUIT, AND INTEGRATED CIRCUIT PROVIDED WITH SUCH A SYSTEM - A method and system for measuring a time constant RC of an integrated electronic circuit is provided. This integrated circuit may be made up of a first hardware component and of a second hardware component wherein one of the hardware components is a resistive element and the other is a capacitive element. The first and the second hardware components are connected to an inverting input of an operational amplifier of an integrator of a delta-sigma modulator. A DC voltage is applied to the modulator input. The output signal Q | 02-02-2012 |
| 20120020439 | RECEIVER WITH CHANNEL ESTIMATION CIRCUITRY - The invention concerns receive circuitry for demodulating an input signal received from a transmission channel, the receive circuitry including a frequency interpolation filter arranged to provide channel estimations (Ĥn) of the entire channel, the frequency interpolation filter having at least one filter receiving the pilot frequency channel estimations and performing filtering based on a plurality (Q) of the pilot channel estimations at a time; and a memory arranged to store the filter coefficients for the at least one filter, the coefficients being based on a frequency-domain autocorrelation of a model of the transmission channel, the model representing the time distribution of the channel power of the transmission channel determined independently of the pilot frequency channel estimations, wherein said model is based on a χ | 01-26-2012 |
| 20120019296 | Circuit With a Time to Digital Converter and Phase Measuring Method - Calibration data for calibrating time to digital conversion is obtained by switching a feed circuit ( | 01-26-2012 |
| 20120009876 | Process of Audio Data Exchanges of Information Between a Central Unit and a Bluetooth Controller - Electronic device comprising audio/video functionalities including: a central processing unit ( | 01-12-2012 |
| 20110307643 | Memory Management Process and Apparatus for the Same - Memory management process for optimizing the access to a central memory located within a processing system comprising a set of specific units communicating with each other through said memory, said process involving the steps of: a) arranging in a local memory at least a first and a second bank of storage (A, B) for the purpose of temporary object exchanged between a first data object producer ( | 12-15-2011 |
| 20110305285 | Process and Apparatus for Performing Initial Carrier Frequency Offset in an OFDM Communication System - A process for estimating the carrier frequency offset (CFO) for a Orthogonal Frequency Division Multiplex (OFDM) communication system, said process being performed in a receiver receiving a pilot sequence x=(x | 12-15-2011 |
| 20110302336 | Resolving Contention Between Data Bursts - In an embedded system, there are a plurality of data requesting devices, a plurality of data sources and a bus fabric interconnecting the data requesting devices and the data sources, wherein the bus fabric comprises a plurality of bus components. Some or all of the data sources and arbitration devices associated with the bus components resolve contentions between data bursts by selecting a first one of the contending data bursts; determining a length of a critical section of the first selected data burst; and processing the critical section of the selected data burst. Then, a second one of the contending data bursts is selected, a length of a critical section of the second selected data burst is determined, and the critical section of the second selected data burst is processed before a non-critical section of the selected data burst. | 12-08-2011 |
| 20110299575 | METHOD AND SYSTEM OF CALIBRATION OF A SECOND ORDER INTERMODULATION INTERCEPT POINT OF A RADIO TRANSCEIVER - The method of calibration of a second order intermodulation intercept point (IIP2) of a radio transceiver comprises the steps of: generating a second order intermodulation (IM2) reference signal (S | 12-08-2011 |
| 20110299571 | RECEIVER COMPRISING A DEVICE FOR CORRECTING DOPPLER EFFECT - A OFDM digital communication receiver having channel estimate and correction means and inter carrier interference cancellation means based on the use of a temporal digital filter comprising a set of digital coefficients. The receiver includes Look-Up Tables LUT(n), each corresponding to a given set of digital coefficients and an entry pointer. | 12-08-2011 |
| 20110292784 | Data Exchange Device Using Orthogonal Vectors - An integrated circuit and a method for transmitting messages from initiator units of an integrated circuit to at least one target unit of the integrated circuit. The initiator units transform first digital messages into second digital messages, the second messages being added, then transmitted to the target unit. The transformation of the first messages into second messages comprises the application of an orthogonal transformation by means of vectors obtained from rows or columns of an identity matrix. | 12-01-2011 |
| 20110285565 | PARALLEL MASH DELTA SIGMA MODULATOR - A parallel, multi-stage noise shaping (MASH) delta-sigma (ΔΣ) modulator reduces the required operating frequency by predicting the inputs to later stages of a serial MASH modulator to be multiples of the MASH input. An Nth order parallel MASH ΔΣ modulator generates N outputs (one from each stage) in a single modulator cycle. Accordingly, the Nth order parallel MASH ΔΣ modulator may be operated at 1/N the frequency of a corresponding prior art Nth order serial MASH ΔΣ modulator. | 11-24-2011 |
| 20110279060 | Control Circuit with Fast Recovery - The invention concerns a control circuit arranged to generate a control signal (V | 11-17-2011 |
| 20110274224 | METHOD AND DEVICE TO CONTROL THE GAIN OF A RADIO RECEIVER - An automatic gain control (AGC) method and system for a radio receiver are proposed in which the ACG comprises two AGC loops; a first loop controlling signal gain in the analogue portion of the radio receiver, a second loop controlling gain in the digital domain after digitization of the received signal. The analogue AGC loop has a slower response time than the digital AGC loop. When applied to a multi-branch diversity receiver, each branch has its own digital AGC loop, but the analogue gain can be common to all branches, based on measurement of the analogue signal in each branch. | 11-10-2011 |
| 20110260755 | Methods and Systems for Detecting Battery Presence - A device has a battery presence detection system. A line charging pulse signal is applied to a terminal battery detection line, which is connected when the battery is present to a ground line via a resistor and a capacitance. A detector determines whether the battery is connected to the mobile terminal based on detecting whether a line voltage edge or a line voltage level on the terminal battery detection line is present. | 10-27-2011 |
| 20110256906 | Locking of Communication Device - A communication system for implementing locking of a device ( | 10-20-2011 |
| 20110249599 | Shared RF Front-End Module For Cellular Application - The invention relates to a RF front-end stage for user equipment that is designed for use in multiple communication bands and employs Frequency Division Duplex (FDD). The invention also relates to a FDD front-end module included in such a RF front-end stage. The object of the invention is to provide an RF front-end stage for user equipment that supports a plurality of operating bands and may be produced both at lower costs and with a reduced number of circuit element devices. This object is achieved with a FDD front-end module for a RF front-end stage of a FDD user equipment that supports at least two operating bands each comprising an uplink frequency sub-band and a downlink frequency sub-band wherein at least one of the uplink frequency sub-bands and the downlink frequency sub-bands of said at least two operating bands are not adjacent to each other. | 10-13-2011 |
| 20110248754 | SYNCHRONIZATION SCHEME WITH ADAPTIVE REFERENCE FREQUENCY CORRECTION - An apparatus and a method provide synchronization of an output signal to a synchronization information. The synchronization is accomplished by providing coupling of a correction control information that controls a signal generator, e.g. a phase locked loop arrangement or a direct digital synthesis arrangement, to its exact frequency to a frequency conversion unit that converts an uncorrected reference frequency to a correct or exact reference frequency. Thereby, the uncorrected reference frequency for the signal generator can be provided by a simple crystal oscillator without any frequency controller. The setting of the signal generator and the frequency conversion unit can be done in a predetermined sequence which enables a user equipment to synchronize its reference frequency to the synchronization information emitted by a communication network. | 10-13-2011 |
| 20110211652 | Method and Apparatus for OFDM Spectral Diversity Using Guard Bands - An OFDM modulation process and means for transmitting multiple carriers through a communication channel having a bandwidth arranged ion chunks with further subcarriers being allocated to form at least one guard band, comprising automatically and periodically shifting said chunks to the left or to the side in order to overlap said guard band and increase spectral diversity. | 09-01-2011 |
| 20110210781 | LEVEL SHIFTER - A level shifter ( | 09-01-2011 |
| 20110202746 | PROCESSING ARCHITECTURE - The invention is directed towards a processing apparatus for a portable communication device. The apparatus includes: a central processing unit, first and second digital signal processing units, a first dual port memory unit adapted to store data shared between the central processing unit and the first digital signal processing unit, and a second dual port memory unit adapted to store data shared between the central processing unit and the second digital signal processing unit. The first dual port memory unit is adapted to store data shared between the first and second digital signal processing units without using the central processing unit. | 08-18-2011 |
| 20110182389 | JITTER COMPENSATION - The present invention relates to a circuit and a method for jitter compensation in a receiver system and for improving the SNR and/or the BER performance. The circuit for jitter compensation comprises: a combiner block ( | 07-28-2011 |
| 20110176641 | D.C. Offset Estimation - A combination of a phase shifter, a measurement receiver, and an offset estimator enable the d.c. offset in the transmit path of a quadrature transmitter to be distinguished from the d.c. offset in the measurement receiver. The measurement receiver performs a first measurement on the transmit path output with a “normal” phase shift of 0 degrees and 90 degrees for in-phase (I) and quadrature (Q) components, and a second measurement with a “special” phase-shift of 180 degrees and 270 degrees for the I and Q components, respectively | 07-21-2011 |
| 20110161777 | Reliable Packet Cut-Through - A cut-through data packet mechanism is described. Forwarding of a cut-through data packet by an intermediary node enables packet transmission of the cut-through data packet to begin prior to performing a frame CRC on the packet. The CRC is instead performed while transmission of the packet is occurring. If one or more errors are found in the cut-through data packet, then a packet trailer indicating such errors is transmitted toward an endpoint node that receives the cut-through packet. | 06-30-2011 |
| 20110161543 | Memory Management - An Accelerated Storage Controller (ASC) in an electronic device allows both conventional (slower) application processor to memory interfaces to be employed transparently to existing software, while also allowing software configuration to realize an accelerated storage architecture on demand. Some use cases for the electronic device do not require accelerated storage, and a bypass mode does not require any modification to existing software. Other use cases (such as fast download of multiple gigabytes of media) benefit from an accelerated storage architecture offloading transfer from the electronic device application processor, but could also work with the traditional processor to memory interface, at the cost of slower downloads. Embodiments of the present invention provide for both these possibilities in a software-configurable architecture. Furthermore, a number of other connectivity options are provided under software control to optimize performance and connectivity for different use case scenarios. | 06-30-2011 |
| 20110156940 | CONTINUOUS-TIME SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER WITH NON-INVASIVE FILTER(S) FOR IMMUNITY PRESERVATION AGAINST INTERFERERS - A continuous-time sigma-delta analog-to-digital converter (CV) comprises i) a signal path (SP) which includes at least one combiner (C | 06-30-2011 |
| 20110138096 | Methods and Systems for Reliable Link Startup - Link startup systems, methods and devices associated with interconnects are described. Asymmetric lane connections are supported by, for example, independent renumbering of the connected lanes after an initial discovery process. Low-power, hibernating states of devices are supported by, for example, initialing alternating between transmission of startup and wakeup sequences over the interconnect between devices. | 06-09-2011 |
| 20110124375 | MOBILE PHONE WITH LOW-POWER MEDIA RENDERING SUB-SYSTEM - A mobile telephone has a rendering functionality for rendering media stored in storage, and a user interface for user control. A host processor controls the communication functionality and the user interface. The co-processor controls the rendering of the media. The host processor has high power consumption in an active mode and low power consumption in a sleep mode. The co-processor conditionally supplies wake-up signals to the host processor. Upon receipt of a particular wake-up signal, the host processor switches from the sleep mode into the active mode. In the active mode, the host processor transfers a particular media segment to the co-processor before switching back to the sleep mode. The co-processor buffers the segment before rendering it. Upon detecting a low buffer level the co-processor supplies a next wake-up signal to the host processor for initiating transfer of a next media segment. | 05-26-2011 |
| 20110122931 | RECEIVE DIVERSITY SYSTEMS - A diversity receiver and a method of recovering symbols in a diversity receiver system comprises receiving first and second signals at first and second antenna elements. The first signal comprises first and second consecutive symbols modified by a first channel coefficient and the second signal comprises the first and second symbols modified by a second channel coefficient. The first and second signals are delayed and the first and second channel coefficients are estimated by applying the delayed first and second signals to a master Rake finger having first and second outputs for the estimated the first and second channel coefficients. A complex conjugate of the estimated second channel coefficient is produced. First and second composite signals are produced from the delayed first and second signals using a slave Rake finger by decoding the respective delayed first and second signals, producing a complex conjugate of the second composite signal, interleaving the first composite signal and the complex conjugate of the second composite signal and providing an interleaved signal output, and applying said interleaved signal output, the estimated first channel coefficient and the complex conjugate of the estimated second channel coefficient to a space time transmit diversity derotator for the recovery of the first and second symbols. | 05-26-2011 |
| 20110116557 | DATA PROCESSING APPARATUS - A universal asynchronous receiver-transmitter module that includes a sampling controller that assigns a variable number of active edges in a clock signal to respective bits in a serial data signal. A serial data reception path derives a bit from the serial data signal on the basis of the variable number of active edges that the sampling controller has assigned to the bit. | 05-19-2011 |
| 20110115525 | DEVICE FOR DETECTING THE PEAK VALUE OF A SIGNAL - A device for detecting the peak value of a signal with crest factor not known a priori includes a pair of peak detectors, each of which includes a rectifier element and a discharge-current generator and generates a respective output signal that is a function of the ratio between a physical dimension of the rectifier element and the intensity of discharge current produced by the generator. The ratio is different for the two detectors, and a combination network combines the output signals of the two peak detectors with one another and produces a combined signal indicating the peak value sought with high accuracy. | 05-19-2011 |
| 20110103618 | AUDIO SWITCH FOR PERFORMING AUDIO SIGNAL SWITCHING - An audio switch for audio signal switching includes input ports for obtaining digitized audio input signals, output ports for outputting a number of analog audio output signals, and a digital matrix first stage for switching a digitized audio input signal derived from one or more of the input ports, to any one of a plurality of digital stage output ports according to a specified configuration, so as to give a number of digital stage output signals. The audio switch further includes digital-to-analog converters connected to the digital stage output ports for performing digital-to-analog conversion on a number of the digital stage output signals to obtain a number of analog audio signals and to an analog second stage for switching a number of the analog audio signals to one or more of the analog audio output ports according to a specified configuration. | 05-05-2011 |
| 20110078313 | METHOD AND SYSTEM FOR MANAGING A CONNECTION IN A CONNECTION ORIENTED IN-ORDER DELIVERY ENVIRONMENT - The present disclosure provides a system and method of establishing a connection between a client and a server in an in-order delivery environment. The disclosed system and method includes a client configured to request establishing a connection by sending a first type of message to a server, and the server is configured to confirm the ability of establishing the connection by sending to the client a second type of message leading to the server being connected. The first type of message starts a first client timer measuring a first predefined time period as a first maximum response time and receipt of the second type of message or a data message stops the first client timer. The connection is closed by sending a third type of message. | 03-31-2011 |
| 20110064362 | INTEGRATED CIRCUIT DEVICE OR PACKAGE AND INTEGRATED CIRCUIT SYSTEM, WITH AN OPTICAL WAVE-GUIDE ELEMENT - An integrated circuit device or package comprising: a laminated substrate, at least an electro-optical element at least partially inserted in the laminated substrate, and at least an optical wave-guide element at least partially inserted in the laminated substrate and optically coupled to the electro-optical element. An integrated circuit system comprising an integrated circuit device and a mounting plate carrying an optical wave-guide part or fiber. | 03-17-2011 |
| 20110062576 | INTEGRATED CIRCUIT PACKAGE AND DEVICE - An integrated circuit package including: a substrate having front connection pads on a front face, an integrated circuit die linked to the front face of the substrate and having front connection pads, connection wires for connecting selected front pads of the integrated circuit die to selected front pads of the substrate, first connection balls on selected front connection pads of the integrated circuit die, and second connection balls on selected front connection pads of the substrate. An integrated circuit device including a second substrate connected to the connection balls of the integrated circuit package. | 03-17-2011 |
| 20110062571 | OPTICAL DEVICE, INTEGRATED CIRCUIT DEVICE AND SYSTEM - An optical device for an integrated circuit device, includes a laminated substrate having a through-passage and a tubular frame in which an optical lens is mounted, the tubular frame having an end part inserted or integrated in the through-passage of the laminated substrate. A integrated circuit device includes an optical device and an integrated circuit die carried by the laminated substrate and having an active optical area placed in front of the optical lens. | 03-17-2011 |
| 20110061917 | LAMINATED SUBSTRATE FOR AN INTEGRATED CIRCUIT BGA PACKAGE AND PRINTED CIRCUIT BOARDS - A laminated substrate for an integrated circuit package, including a core layer and at least one build-up layer located above only one side of said core layer. An integrated circuit package, including a laminated substrate and including an integrated circuit die placed above the side build-up layer. | 03-17-2011 |
| 20110055657 | METHOD AND SYSTEM FOR STOPPING EXECUTION OF A TURBO DECODER - A method for conditionally stopping execution of a turbo decoder is proposed. The decoder has elementary decoders. Each elementary decoder performs a sequence of decoding operations and is arranged to receive an input from at least one other elementary decoder. The method determines for each specific decoding operation if the sequence of elementary decoding operations of the specific elementary decoder has substantially converged or substantially diverged. The method terminates the execution of decoding operations if a number of sequences has substantially converged or substantially diverged. | 03-03-2011 |
| 20110012766 | MULTI-BIT SIGMA-DELTA MODULATOR WITH REDUCED NUMBER OF BITS IN FEEDBACK PATH - A sigma-delta modulator for an ADC, passes an input signal to a loop filter, then to a multi-bit quantizer of the modulator. An output of the quantizer is passed to a digital filter, and a feedback signal is passed back to the loop filter, the feedback signal having fewer bits than are produced by the multi-bit quantizer. The digital filter has an order greater than one in the passband of the sigma-delta modulator. | 01-20-2011 |
| 20100302083 | TRANSMITTER WITH DELAY MISMATCH COMPENSATION - A transmitter device is provided which comprises a digital part (DP) and an analog part (AP). The transmitter device furthermore comprises a digital modulator (DM) in the digital part (DP) for receiving bits (MB) and for digitally modulating the receiving bits (MB). A first (IDAC; RDAC) and second digital-to-analog converter (QDAC; ODAC) are provided. The transmitter device furthermore comprises at least one filter unit (H | 12-02-2010 |
| 20100297965 | AMPLITUDE MODULATION CONTROLLER FOR POLAR TRANSMITTER - Apparatus for generating a modulation signal for use in modulating the power supply of a power amplifier uses coarse and fine control for controlling the amplitude of the modulation signal, and thereby controlling the output power of the power amplifier. The modulation signal may be generated in the digital domain and converted to the analog domain by a digital-to-analog converter, with the digital-to-analog converter providing the fine control and a variable gain amplifier providing the coarse control of the analog signal. | 11-25-2010 |
| 20100289564 | ELECTRONIC DEVICE AND A METHOD OF BIASING A MOS TRANSISTOR IN AN INTEGRATED CIRCUIT - An electronic device has at least one integrated circuit with at least one MOS transistor. An adaptive analog biasing unit is configured to provide an adaptive biasing current for the at least one MOS transistor biased in the saturation region. The adaptive analog biasing unit (AAB) may be on the same chip together with the integrated circuit and may comprise a process monitor unit configure to extract a device parameter of the integrated circuits and a calculation unit configured to generate a bias current based on the output of the process monitor unit. The bias current generated by the calculation unit may be inversely proportional to the extracted device parameter. | 11-18-2010 |
| 20100289553 | SEMI-ADAPTIVE VOLTAGE SCALING FOR LOW-ENERGY DIGITAL VLSI-DESIGN - A semi-adaptive voltage scaling method and device for determining minimal supply voltages for digital electronic semiconductor circuitry, e.g., microprocessors, of electronic devices under production testing and “real” operating conditions. The SAVS operates in a closed-loop during a production test phase of the circuitry and in an open-loop mode in an application (operation) phase of the semiconductor circuitry. During production testing, a lowermost level of the supply voltage for the semiconductor circuitry is determined at one single defined temperature at which operating specifications of the circuit are met. The lowermost level is stored in a dedicated electronic memory of the circuitry together with temperature dependent parameters. Afterwards, when the digital electronic circuitry is operated in a “real” application, e.g., a mobile phone, the device and method reads the previously measured and proven data from the memory and regenerates the minimum level of supply voltage for the circuitry, taking into account the actual temperature of the application. As a result, the digital semiconductor circuitry in the “real” application is supplied with a minimum level of supply voltage, whereby specified parameters of the circuitry are met. Thus, a power consumption of the circuitry is advantageously reduced to a minimum. | 11-18-2010 |
| 20100284493 | DOWN-SAMPLED IMPULSE RESPONSE CHANNEL ESTIMATION - A method for deriving a channel transfer function from an Orthogonal Frequency-Division Multiplex (OFDM) signal received over a channel and having unmodulated sub-carriers and sub-carriers modulated with symbols, includes the steps of sampling the received OFDM signal at a sampling rate greater than the bandwidth of the OFDM signal, deriving from the sampled OFDM signal a set of time domain coefficients representative of the channel impulse response, and deriving from a subset of the set of time domain coefficients a channel transfer function in the frequency domain. | 11-11-2010 |
| 20100281096 | SIGNAL PROCESSING ARCHITECTURE AND METHOD - A data processing system provides a plurality of data processing services distributed over a plurality of data processing subsystems interconnected via a network. Each subsystem comprises a service registry for assigning a service in response to a service request and a list of services accessible within its own subsystem. The service registry stores the location of the other data processing services of the plurality of data processing services, and is configured to connect two services upon a request of one of the two services. | 11-04-2010 |
| 20100279635 | PLL CALIBRATION - A method for applying a modulation signal to a phase locked loop comprises filtering the modulation signal to provide a low frequency component and a high frequency for application to respectively the feedback and feedforward paths of a phase locked loop. The high frequency component is scaled by a gain factor before being applied to the feedforward path. The low frequency component is also scaled by a gain factor and applied to the feedforward path. The energy in a common low frequency range of the modulation signal and of the loop error signal is estimated, and the gain factors are modified dependent on the measured energy. | 11-04-2010 |
| 20100271126 | MATCHED INTEGRATED ELECTRONIC COMPONENTS - A switchable integrated electronic device includes at least three elements r | 10-28-2010 |
| 20100241422 | SYNCHRONIZING A CHANNEL CODEC AND VOCODER OF A MOBILE STATION - In one embodiment, the present invention includes a method for maintaining a vocoder and channel codec in substantial synchronization. The method may include receiving a configuration message that includes rate information and an effective radio block identifier at a mobile station, coding a current radio block via a vocoder and channel codec, configuring an encoding portion of the vocoder and channel codec with the rate information after performing the coding, and then coding the effective radio block using the rate information. Other embodiments are described and claimed. | 09-23-2010 |
| 20100220875 | POP-UP NOISE SUPPRESSION IN AUDIO - Systems and methods for suppressing pop-up noise in an audio signal are disclosed. The system includes a driver circuit shared by a pin interface and a complementary pin interface. A control unit is coupled to the pin interface and the complementary pin interface. To activate the pin interface, the control unit is configured to first activate the driver output at the complementary pin interface. Once the complementary pin interface achieves a preset voltage, the driver output is switched to the pin interface by the control unit. In addition, the driver circuit can be calibrated for a DC offset on the complementary pin interface by re-using calibration data calculated at the pin interface. Further, DC correction signals can be provided from a pre-biasing circuit based on the calibration data of the driver circuit. | 09-02-2010 |
| 20100220868 | COUPLING OF SPEAKERS WITH INTEGRATED CIRCUIT - Systems and methods for a low pin architecture to couple speakers with integrated circuits are disclosed herein. In an implementation, the low pin architecture facilitates in reducing the required pin interfaces to couple a low power speaker, a high power speaker, and earphone speakers with integrated circuits (ICs). For this, the high power speaker can be cross-coupled between the pin interfaces that are coupled to the low power speaker and the earphone speakers. These pin interfaces are driven by corresponding driver circuits. In said implementation, some of the driver circuits can be shared to drive multiple pin interfaces. These shared driver circuits include a combined cascode circuit having a first cascode circuit integrated with a second cascode circuit to reliably and selectively drive one or more of the pin interfaces. | 09-02-2010 |
| 20100220822 | INTER-CARRIER INTERFERENCE REDUCTION FOR MULTI-CARRIER SIGNALS - In mobile wireless communication systems the channel between the transmitter and receiver varies during a transmission. This is often referred to as fading, of which different kinds exist—each resulting in different impairments with specific properties. A low complexity scheme is described to reduce the noise created by inter-carrier interference or ICI. The method makes use of the guard interval and assumes slow variation of the channel. It is not restricted to wireless communication and can be used in any environment with varying channels. | 09-02-2010 |
| 20100219871 | GENERATION OF A LOW JITTER CLOCK SIGNAL - Systems and methods for generation of a low jitter clock signal for wireless circuits are disclosed. In an implementation, the system includes a wireless circuit powered by a first power supply and a low jitter clock (LJC) generator powered by a second power supply. The LJC generator provides at least one clock signal to the wireless circuit. The system further includes an LJC driver circuit including a clock buffer powered by the first power supply and a receive buffer powered by the second power supply. | 09-02-2010 |
| 20100218019 | NON-RECURSIVE ADAPTIVE FILTER FOR PREDICTING THE MEAN PROCESSING PERFORMANCE OF A COMPLEX SYSTEM'S PROCESSING CORE - A power management unit and a corresponding method for controlling performance and power consumption of a complex low-power integrated system's processing core by automatically reducing them to a level where outstanding computational operations and software tasks can be performed just in time for further processing. A linear non-recursive adaptive filter performs a processor load prediction of the system's processing core is applied, whose filter coefficients may e.g., be calculated based on the least mean square (LMS) optimization criterion or based on any other similarity measure. In this connection, the adaptive filter may e.g., be used to predict the regularity of the clock frequency in the processing core. By using this information, the linear non-recursive adaptive filter predicts the duration of how long the processing core may lower its operating voltage to still be able to complete all its tasks in time. | 08-26-2010 |
| 20100208668 | SPEED UP VIDEO RECOVERY OF VIDEOTELEPHONY AFTER AN INTERRUPTION - Recovery or resynchronization of an ongoing videotelephony communication between a near terminal and a distant terminal is achieved with mechanisms between the radio connection protocol stack in control of the radio connection on network level and the videotelephony protocol stack which is responsible for handling the audio and video data of an ongoing videotelephony communication between the near and distant terminals. A videotelephony agent in the near terminal is aware of an absence the availability of the radio connection to the data network as may be caused by a UMTS handover, so that the videotelephony agent, after resumption of the videotelephony connection, requests the distant videotelephony agent to generate an independently encoded frame of the actual video image of the distant agent for fast resynchronization. | 08-19-2010 |
| 20100188286 | TIME REFERENCE SYSTEM - A time reference system for generating a time reference from signals produced by a global navigation satellite constellation has a satellite signal receiver to receive and down-convert code-modulated signals from a plurality of satellites and a correlator to track and decode the down-converted signals to provide signals containing partial pseudo-range measurements for respective satellites. A data processing arrangement receives assistance data from an external source and performs data-bit synchronisation in which bit edges of a low frequency data bit stream carried by the received satellite signals are identified, to perform a preliminary position-velocity-time solution to provide an approximate time reference, and to perform auto-correlation of pre-selected data sequences in the data stream to resolve time ambiguities thereby to compute a precise time reference signal in weak received signal conditions. The pre-selected data sequences may be the repeated data preamble in the GPS navigation message constituted by the data stream. | 07-29-2010 |
| 20100182596 | PHOTOTRANSISTOR WITH SOURCE LAYER BETWEEN BARRIER LAYER AND PHOTOSENSITIVE SEMICONDUCTOR LAYER - A photo transistor has an active region spaced from a source by barrier. A drain is laterally spaced from the active region. Light incident on the active region creates electron-hole pairs. Holes accumulate at the barrier and modulate the effective barrier height to electrons. A gate reset voltage then is applied to gate which lower the barrier allowing the holes to escape. | 07-22-2010 |
| 20100141343 | OPERATIONAL TRANSCONDUCTANCE AMPLIFIER HAVING TWO AMPLIFICATION STAGES - An operational amplifier having a first amplification stage with an input terminal to receive a signal to be amplified, and a first output terminal, and a second amplification stage having a first input terminal connected to the first output terminal, and an output terminal to provide the amplified signal. The first and second amplification stages define, between the input terminal and the output terminal, a signal transfer function having first and second poles. The amplifier further includes a decoupling stage having a further input terminal connected to the first stage input terminal, and a further output terminal connected to the second stage output terminal. The decoupling stage is so arranged as to introduce at least one zero in the operational amplifier transfer function. | 06-10-2010 |
| 20100136965 | BACKUP OF BAD QUALITY VOICE MESSAGES - A method for backing up and re-transmitting voice messages being transmitted during a call from a mobile device to an answering machine with a dedicated address in a network includes measuring the transmission quality between the mobile device and the answering machine while a connection is established between the mobile device and the answering machine, recording the voice message in the mobile device while it is being transmitted to the answering machine, after the call has ended and the mobile device has disconnected from the network, creating a data message in the mobile device containing the recorded voice message and the address of the called device, setting up a connection from the mobile device to the network, and sending the data message. | 06-03-2010 |
| 20100135361 | CDMA RECEIVERS AND CDMA COMMUNICATIONS SYSTEMS - A CDMA communications system includes a primary station and at least one secondary station. The secondary station includes a receiver for receiving CDMA signals transmitted on the downlink. The receiver includes a plurality of Rake finger receivers having inputs for receiving signals and outputs coupled to a combining stage for combining their output signals constructively, a finger assignment stage for assigning the finger receivers to respective received signals, a processing stage for estimating the speed of the CDMA receiver from the signals received and for varying the time required to make a finger replacement decision in response to the estimated speed so that the time required decreases as the speed of the receiver increases and vice versa. | 06-03-2010 |
| 20100134636 | COMPUTER DEVICE AND METHOD FOR ADAPTING THE COMPRESSION RATE OF DIGITAL IMAGES - A computer device for a digital picture taking application includes a camera having an optical system, an electronic image sensor providing raw image data, and an image data compressor, a display, a computing subsystem and a data bus interfacing the computing subsystem with the image data compressor. The image data compressor generates a compressed picture data stream from the raw image data using a variable and externally controllable compression rate. A CPU and bus bandwidth manager monitors the available CPU utilization and bus bandwidth depending on activities of the computer program applications and allocates bus bandwidth to active computer program applications. | 06-03-2010 |
| 20100134317 | METHOD FOR CONFIGURING A WIRELESS COMMUNICATION DEVICE AS A REMOTE CONTROL, REMOTELY CONTROLLABLE ELECTRONIC DEVICE AND WIRELESS COMMUNICATION DEVICE - A method of configuring a wireless communication device operable as a remote control of an electronic device includes storing a pointer to a remote source in the electronic device, the remote source including control software for enabling the wireless communication device to remotely control the electronic device. The method also includes establishing a communication link between the electronic device and the wireless communication device, communicating the pointer from the electronic device to the wireless communication device, connecting the wireless communication device to the remote source, and installing the control software on the wireless communication device. The application further discloses an electronic device comprising such a pointer and a wireless communication device for receiving such a pointer. | 06-03-2010 |
| 20100123612 | ANALOG-TO-DIGITAL CONVERSION CIRCUIT AND DEVICE - An analog-to-digital conversion circuit and device having an input stage arranged to receive an input signal and to provide an output analog signal as a function of the input signal; an analog-to-digital conversion block arranged to receive the output analog signal and to provide a respective output digital signal. The input stage includes a first voltage buffer arranged to provide the output analog signal to the conversion block as the translation of the input signal of an amount equal to a translation voltage; a second voltage buffer arranged to provide a first reference signal to the conversion block that is representative of the translation of a first reference voltage of an amount equal to the translation voltage, so that the conversion block stores the input signal as the difference of the input signal and the first reference voltage regardless of the translation voltage. | 05-20-2010 |
| 20100113014 | METHOD AND SYSTEM FOR SYNCHRONIZATION OF AT LEAST TWO TERMINAL COMMUNICATION SYSTEMS AND AT LEAST ONE COUNTERPART COMMUNICATION STATION WITHIN A MULTI-STANDARD WIRELESS COMMUNICATION SYSTEM - A method synchronizes plural terminal communication systems and a counterpart communication station connected via a radio link within a multi-standard wireless communication system, wherein a counterpart transmission signal is transmitted from said counterpart communication station to the corresponding terminal communication system. A common reference clock signal is generated and supplied to a signal generation unit within said terminal communication system, wherein each terminal communication system comprises a conversion ratio unit having a conversion ratio. An accurate frequency datum is derived from each counterpart transmission signal in the terminal communication systems and a frequency control signal is determined from said accurate frequency datum. A synchronization between said terminal communication stations and counterpart communication station is obtained by adjusting the frequency of the common reference clock signal and/or the conversion ratio of said conversion ratio units according to the frequency control signal. | 05-06-2010 |
| 20100105407 | WIRELESS TRANSMISSION POWER CONTROL METHOD AND SYSTEM - A wireless communication system includes a primary station which has a transmitter for transmitting wireless signals on a downlink, and a plurality of secondary stations each having a receiver for receiving signals on the downlink and a transmitter for transmitting on an uplink. In a normal, loaded condition a synchronization channel and a data channel are present on the downlink and closed power control is achieved by measuring the signal to interference ratio (SIR) in a received downlink transmission, comparing the measured SIR with a target SIR and sending a power adjust indication on the uplink to cause the primary station to adjust its transmitted power on the downlink. The secondary station monitors the downlink and, in response to detecting an unloaded cell condition, determines a target SIR offset which it applies to the target SIR to overcome interference from the presence of the synchronization channel on the downlink. | 04-29-2010 |
| 20100100210 | ARITHMETIC-LOGIC UNIT FOR DIGITAL SIGNAL PROCESSOR - An arithmetic-logic unit for a digital signal processor, processing audio signals, having a multiplier circuit able to receive in input a first and a second signal and to supply in output a third signal which represents the result of the multiplication of said first and second signal, a generator circuit of a dither signal, a summation circuit downline of the multiplier circuit, said summation circuit being able to perform an addition operation between said third signal and the dither signal so as to supply a fourth signal in output, and a truncation or rounding circuit downline of the summation circuit, able to truncate or round said fourth signal. | 04-22-2010 |
| 20100074311 | TIME ACCURATE CONTROL OF RF OVER A DIGRF INTERFACE - A communication system includes a RF subsystem that communicates with a BB subsystem through a digital RF-BB interface multiplexing I/Q data and control signals in both TX and RX directions. The RF subsystem includes a FIFO buffer in each respective TX and RX chain and a timer that assigns a timestamp to the continuous stream in both TX and RX chains whenever it is equal to a time event from the BB subsystem. The BB subsystem includes a sample counter that counts the number (k) of data samples at the FIFO buffer and a controller that defines the time event. Precise alignment at the air interface between a data burst from the RF subsystem and a data burst from the BB subsystem can be achieved using the timer, based on the relation between the timer value (n) and the sample count (k). | 03-25-2010 |
| 20100069024 | BASEBAND SIGNAL INPUT CURRENT SPLITTER - A current steering mechanism is provided in a radio transmitter (e.g., a multiband radio transmitter) to provide compatibility with a variety of baseband parts. Different proportions of an input signal current (“in”) are steered to a dummy load, a mixer for a first band, and at least one other mixer for a second band. The mechanism is structured to selectively apportion a current input signal between multiple paths of the same polarity having respective load circuits and concurrently steer different proportions of the current input signal to a dummy load path and at least one mixer path. | 03-18-2010 |
| 20100039092 | INDUCTOR ASSEMBLY - An inductor assembly includes a first inductor, a second inductor being magnetically coupled to the first inductor, and a third inductor being magnetically coupled to said first and second inductors. The third inductor may be connected to a variable resistor adapted for adjusting the magnetic coupling between the first and the second inductors by varying a resistance value of said variable resistor. | 02-18-2010 |
| 20100029234 | MIXER CELL WITH A DYNAMIC BLEED CIRCUIT - A mixer is described having a Gilbert cell structure including a first input and a second input for inputting an RF signal, a third input and a fourth input for inputting a local oscillator signal, a first output and a second output for outputting an IF signal, a plurality of switches for converting the RF signal to an IF signal, and a dynamic bleed circuit for dynamically reducing the dc-current of the switches at the switching-point. As the dc-current of the switches is reduced at the point of commutation, the 1/f-noise is also strongly reduced without degrading the linearity. The switching happens at twice the local oscillator frequency. The mixer also includes a common mode feedback circuit that feeds the common mode signal, optionally amplified, to a common mode feedback control device that is in series between the dynamic bleed circuit and the supply voltage. | 02-04-2010 |
| 20100001890 | HIGH SPEED VOLTAGE FOLLOWING DEVICE FOR ANALOG-TO-DIGITAL CONVERSION SYSTEM - A voltage following device is described, for the driving of a sampling network coupleable to an analog/digital converter, comprising at least one first transistor provided with a first terminal to receive an input signal, and a second terminal to provide an output signal to the sampling network which is representative of the input signal translation of an amount equal to a gate and source voltage of said at least one first transistor. The voltage following device having a driving network of said at least one first transistor to keep said gate and source voltage equal to a shift reference voltage. | 01-07-2010 |
| 20090323547 | SYSTEM AND METHOD FOR PACKET BASED COMMUNICATIONS AND ARRANGEMENT THEREFOR - A system and method for packet-based communications is performed by implementing arbitrated packet-based communications. According to an example embodiment, packet-based data is arbitrated and output with verification data. For each arbitrated packet stream, verification data is generated in response to detecting an end of frame (EOF) symbol in the arbitrated packet stream, and the verification data is added to the packet stream. A merged packet stream is provided at an output, the merged packet stream including the plurality of arbitrated packet streams with verification data added thereto. | 12-31-2009 |
| 20090305643 | RADIO RECEIVER - A radio receiver ( | 12-10-2009 |
| 20090291662 | BALANCED MIXER WITH CALIBRATION OF LOAD IMPEDANCES - A calibration device is coupled to a balanced circuit device including first and second outputs provided with first and second load impedances. The calibration device includes an adjusting circuit to adjust the first and second load impedances into a load imbalance for linearization. A coupling circuit is inserted between the adjusting circuit and the first and second outputs to selectively couple the adjusting circuit to one of the first and second outputs, so that the adjusting circuit is coupled in parallel either to the first load impedance or to the second load impedance. | 11-26-2009 |
| 20090289610 | LOW DROPOUT REGULATOR - The present invention provides a low dropout (LDO) regulator with a stability compensation circuit. A “zero frequency” tracking as well as “non-dominant parasitic poles' frequency reshaping” are performed to achieve a good phase margin for the LDO by means of the compensation circuit. In this compensation method neither a large load capacitor nor its equivalent series resistance is needed to stabilize a regulator. LDO regulators, in system on chip application, having load capacitors in the range of few nano-Farads to few hundreds of nano-Farads can be efficiently compensated with this compensation method. A dominant pole for the regulator is realized at an internal node and the second pole at an output node of the regulator is tracked with a variable capacitor generated zero over a range of load current to cancel the effect of each other. A third pole of the system is pushed out above the unity gain frequency of the open loop transfer function with the help of the frequency compensation circuit. The compensation technique is very effective in realizing a low power, low-load-capacitor LDO desirable for system on chip applications. | 11-26-2009 |
| 20090265572 | FAST ADAPTIVE VOLTAGE SCALING - A method, digital circuit, and computer program product control a supply voltage of a processing circuit based on a processing clock of the processing circuit. A first clock frequency and at least one second clock frequency are generated, wherein the first clock frequency is used as the processing clock and the second clock frequency is adjusted based on a clock control information issued by the processing circuit. A voltage conversion ratio for converting the supply voltage to a scaled supply voltage applied to the processing circuit is directly controlled in response to the result of a monitored performance under said second clock frequency. Thereby, a new fast automatic voltage scaling approach can be provided which allows to meet critical timing requirements of portable systems and to reduce power consumption significantly. | 10-22-2009 |
| 20090239548 | APPARATUS AND METHOD FOR DERIVING POSITION INFORMATION - A wireless receiver for receiving signals from a satellite positioning system, and receiving signals from a communications system uses a common path in the receiver, and derives position information ( | 09-24-2009 |
| 20090233570 | RECEIVER FRONT-END WITH LOW POWER CONSUMPTION - A receiver includes a mixer with a first input, a second input and one output. An input signal (S | 09-17-2009 |
