| ST-ERICSSON (GRENOBLE) SAS Patent applications |
| Patent application number | Title | Published |
|---|
| 20120133430 | OFFSET CANCELLATION FOR AUDIO AMPLIFIER - An audio amplification circuit is provided having an amplifier that receives an input signal, an output, and a digital control input for receiving a control value in a number n of bits; a comparator having a first input that receives the amplifier's output signal image, a second input that receives a reference potential, and an output; and a thermometer counter having a selection input coupled to the comparator output, and an output delivering an n-bit digital value to the amplifier control input. The amplifier comprises a differential input stage having a first and a second differential branch, each traversed by a bias current, the current in the first branch being modifiable by n basic current sources which each deliver either a current identical for all current sources, or no current, as a function of one respective bit of the digital control value received at the control input. | 05-31-2012 |
| 20120068770 | ANTI-GLITCH SYSTEM FOR AUDIO AMPLIFIER - An audio amplification circuit comprises an amplifier having an input and an output, as well as an audio output to which a load can be connected. It additionally comprises a first driver stage having an input and an output which is not coupled to the audio output, and a second driver stage having an input and an output which is coupled to the audio output. The output from the amplifier is selectively coupled to the input of the first driver stage in a first phase of operation and then selectively to the input of the second driver stage in a second phase of operation following the first phase of operation. | 03-22-2012 |
| 20120039004 | Composite Electronic Circuit Assembly - A composite electronic circuit assembly comprises two MOS or CMOS circuit dice ( | 02-16-2012 |
| 20110292784 | Data Exchange Device Using Orthogonal Vectors - An integrated circuit and a method for transmitting messages from initiator units of an integrated circuit to at least one target unit of the integrated circuit. The initiator units transform first digital messages into second digital messages, the second messages being added, then transmitted to the target unit. The transformation of the first messages into second messages comprises the application of an orthogonal transformation by means of vectors obtained from rows or columns of an identity matrix. | 12-01-2011 |
