SOL CHIP LTD. Patent applications |
Patent application number | Title | Published |
20150111320 | INTEGRATED CIRCUIT COMBINATION OF A TARGET INTEGRATED CIRCUIT AND A PLURALITY OF PHOTOVOLTAIC CELLS CONNECTED THERETO USING THE TOP CONDUCTIVE LAYER - A device having a plurality of thin film photovoltaic cells (PV) formed over a passivation layer. The device comprises a plurality of thin film photovoltaic (PV) cells formed over the passivation layer, each PV cell includes at least a lower conducting layer (LCL) and an upper conducting layer (UCL); and a conducting path connecting at least a UCL of a first PV cell to at least a LCL of a second PV cell, wherein at least a first array of PV cells comprised of at least a first portion of the plurality of PV cells is connected by the respective UCL and LCL of each PV cell to provide a first voltage output. In an embodiment the passivation layer is formed over a target integrated circuit (TIC), the TIC having a top surface and a bottom surface. | 04-23-2015 |
20140048900 | INTEGRATED CIRCUIT COMBINATION OF A TARGET INTEGRATED CIRCUIT, PHOTOVOLTAIC CELLS AND LIGHT SENSITIVE DIODES CONNECTED TO ENABLE A SELF-SUFFICIENT LIGHT DETECTOR DEVICE - An integrated circuit (IC) comprises a plurality of photovoltaic (PV) cells formed over a passivation layer of a target integrated circuit (TIC), wherein at least one PV cell of the plurality of PV cells is usable as a light sensing device; an interface to an energy storage unit; the TIC comprising at least: a control unit; and a switching circuit, the switching circuit coupled to the plurality of PV cells, the energy storage, and the control unit; wherein the control unit is configured to control at least the switching circuit to configure a connection scheme, wherein the connection scheme devises at least one first PV cell of the plurality of PV cells to connect to the energy storage and at least one second PV cell to connect to the control unit for light detection. | 02-20-2014 |
20130264870 | INTEGRATED CIRCUIT ENERGY HARVESTER - A system for energy harvesting comprises a first interface for receiving energy from at least one renewable energy source (ERS); a second interface coupled to at least one load circuit; a third interface coupled to an least one primary energy storage (PES); a DC-to-DC converter connected to one of a single inductor and a single capacitor; a switching circuitry connected to the first, second, and third interfaces and the DC-to-DC converter; a control unit connected to the DC-to-DC converter and the switching circuitry, the control unit controls the system to operate in an operation mode including any one of: provide energy from the ERS to the at least one load via the DC-to-DC converter, charge the least one PES from the at least one ERS via the DC-to-DC converter, and provide energy from the at least one PES to the at least one load circuit via the DC-to-DC converter. | 10-10-2013 |
20120085385 | INTEGRATED CIRCUIT COMBINATION OF A TARGET INTEGRATED CIRCUIT AND A PLURALITY OF PHOTOVOLTAIC CELLS CONNECTED THERETO USING THE TOP CONDUCTIVE LAYER - An integrated circuit (IC) combination of a target integrated circuit (TIC) and a plurality of thin film photovoltaic cells (PV) connected thereto. The IC comprises a target integrated circuit (TIC) having a top surface and a bottom surface; a plurality of thin film photovoltaic (PV) cells formed over at least one of the top surface and the bottom surface of the TIC, each PV cell includes at least a lower conducting layer (LCL) and an upper conducting layer (UCL); and a conducting path connecting at least a UCL of a first PV cell to at least a LCL of a second PV cell, wherein at least a first array of PV cells comprised of at least a first portion of the plurality of PV cells is connected by the respective UCL and LCL of each PV cell to provide a first voltage output. | 04-12-2012 |
20120025342 | INTEGRATED CIRCUIT COMBINATION OF A TARGET INTEGRATED CIRCUIT AND A PLURALITY OF CELLS CONNECTED THERETO USING THE TOP CONDUCTIVE LAYER - A target integrated circuit (TIC) having a top conductive layer (TCL) that may be connected to a plurality of cells that are further integrated over the TIC. Each of the plurality of cells comprises two conductive layers, a lower conductive layer (LCL) below the cell and an upper conductive layer (UCL) above the cell. Both conductive layers may connect to the TCL of the TIC to form a super IC structure combined of the TIC and the plurality of cells connected thereto. Accordingly, conductivity between the TIC as well as auxiliary circuitry to the TIC maybe achieved. | 02-02-2012 |
20110169554 | INTEGRATED SOLAR POWERED DEVICE - A system and method for fabricating a self-powering integrated circuit chip having an integrated circuit, which may be a MEMS or CMOS device or the like and a thin film photovoltaic cell stack overlayed thereupon or on the opposite side of the substrate on which the IC is manufactured upon. | 07-14-2011 |