SNU INDUSTRY FOUNDATION Patent applications |
Patent application number | Title | Published |
20110053263 | Multipotent Cancer Stem Cell Lines and Method for Producing the Same - Provided is a multipotent cancer stem cell line derived from breast-cancer tissue and expressing a breast cancer stem cell marker. Also provided is a method for producing a multipotent cancer stem cell line, including (1) isolation of breast-cancer cells from previously extracted breast cancer tissue, (2) primary culture of the isolated breast cancer cells in a suspended state in a medium for suspension culture, (3) recovery of the cells in the suspended state from the primary culture, and (4) production of a multipotent cancer stem cell line by subculturing the recovered cells a predetermined number of times or more in a suspended state in the medium for suspension culture. | 03-03-2011 |
20110022890 | CLOCK AND DATA RECOVERY CIRCUIT WITH ELIMINATING DATA-DEPENDENT JITTERS - The present invention relates to a clock and data recovery circuit (CDR), and in particular, to a CDR circuit in a full digital scheme which cancels the data-dependent jitter. A DDJ cancellation circuit according to the present invention efficiently cancels the data-dependent jitter, making it possible to configure the reliable clock and data recovery circuit in the serial link data communication through the channel of the predetermined bandwidth. | 01-27-2011 |
20080252504 | METHOD OF COMPENSATING CHANNEL OFFSET VOLTAGE FOR COLUMN DRIVER AND COLUMN DRIVER FOR LCD IMPLEMENTED THEREOF - A technique for removing vertical stripe artifacts generated in a Liquid Crystal Display (LCD) panel, more particularly a technique for compensating for and removing an inter-channel offset voltage of a column driver, which causes the vertical stripe artifacts, is disclosed. An offset voltage generated in each channel for driving each pixel of the LCD panel is detected for a whole signal path and offset voltages detected for all channels are compared and extracted according to a given timing sequence by a common signal comparator, thereby preventing the offset of the detection comparator and reducing a chip size of the column driver in contrary to the prior art. Moreover, an inter-channel offset voltage is detected in a digital circuit mode, thereby compensating for process variations in a semiconductor chip manufacturing process in circuit terms. | 10-16-2008 |