SILICON WORKS CO., LTD Patent applications |
Patent application number | Title | Published |
20160143107 | LED LIGHTING APPARATUS AND CONTROL CIRCUIT THEREOF - Disclosed are an LED lighting apparatus and a control circuit thereof which controls illumination of a lamp including LEDs using a dimmer. The LED lighting apparatus includes a flicker control unit which provides a control signal corresponding to a rectified voltage having a low angle corresponding to a preset low angle region and equal to or less than a preset level or detects an initial abnormal waveform diagram of the rectified voltage and provides a control signal corresponding to the abnormal waveform period, and controls a current path for light emission of the lamp. | 05-19-2016 |
20160135256 | LIGHT EMITTING DIODE LIGHTING DEVICE - Disclosed is an LED lighting apparatus capable of performing lighting using a rectified voltage. The LED lighting apparatus may include a lamp divided into a plurality of light emitting modules, and perform lighting using a voltage obtained by lowering a rectified voltage, thereby preventing internal parts from being damaged by a surge voltage. Furthermore, the structure in which LED groups are arranged on a substrate can be improved to uniformize the light intensity. | 05-12-2016 |
20160133587 | SUBSTRATES AND INTEGRATED CIRCUIT CHIP WITH IMPROVED PATTERN - The present invention relates to a substrate and integrated circuit chip with improved patterns, and more particularly to technology that is efficient in terms of thermal control and that can reduce the causes of occurrence of defects during the operation of a terminal to which a high voltage is applied. The present invention is characterized in that a first clearance distance between a first terminal, to which a voltage higher than voltages to be applied to the remaining terminals is applied, or first terminal pattern corresponding to the first terminal and a body pattern present between an integrated circuit chip and a substrate is larger than a second clearance distance between a second terminal, including at least some of the remaining terminals other than the first terminal, or second terminal pattern corresponding to the second terminal and the body pattern. | 05-12-2016 |
20150138056 | GAMMA VOLTAGE SUPPLY CIRCUIT AND METHOD AND POWER MANAGEMENT IC - The present invention provides a gamma voltage supply circuit capable of stably supplying a gamma voltage in response to the change of external voltage and a power management IC including the same. The gamma voltage supply circuit generates a regulating voltage using an internal voltage which is not influenced by the variation in load of a source driver IC, and generates a gamma voltage using the regulating voltage. | 05-21-2015 |
20150137781 | LOW DROPOUT CIRCUIT CAPABLE OF CONTROLLED STARTUP AND METHOD OF CONTROLLING SAME - A low dropout (LDO) circuit capable of controlled startup and a method of controlling the same are disclosed herein. The LDO circuit includes an amplifier, a pass element, and a startup control circuit. The amplifier receives a feedback voltage determined by an output voltage and a predetermined reference voltage, and provides a first voltage determined by the feedback voltage and the reference voltage. The pass element is connected to an input power and an output node for providing the output voltage. The startup control circuit includes a current source, and forward one of the first voltage, provided by the amplifier based on the level of the output voltage, and a second voltage, generated using the current source, to the gate of the pass element. | 05-21-2015 |
20140341373 | METHOD OF GENERATING MESSAGE AUTHENTICATION CODE AND AUTHENTICATION DEVICE AND AUTHENTICATION REQUEST DEVICE USING THE METHOD - Provided are a method of generating a message authentication code and an authentication device and an authentication request device using the method. The method includes generating a second secret key by encrypting seed data, a first secret key, and first auxiliary data using an encryption algorithm; and encrypting the seed data, the second secret key, and second auxiliary data using the encryption algorithm, wherein the encryption algorithm receives data of a preset base number of bits and encrypts the received data, and the number of bits of the second auxiliary data varies according to a difference between the number of bits of the first secret key and the number of bits of the second secret key. | 11-20-2014 |
20140312805 | LED LIGHTING DEVICE AND LED LIGHTING CONTROL METHOD - An LED lighting device comprises an LED light source unit; a light intensity control unit configured to provide a light intensity control signal for controlling a light intensity through a plurality of steps in a light intensity control mode; and a light source driving unit configured to provide power to the LED light source unit according to the light intensity control signal. | 10-23-2014 |
20140300654 | DRIVING CONTROL CIRCUIT OF DISPLAY DEVICE - The present invention aims to provide a driving control circuit of a display device, which includes a plurality of data driving circuits each having a timing controller merged with a source driver. The data driving circuits are configured to synchronize data of the respective data driving circuits and compensate for a difference between a data enable signal and a gate output enable signal, when an abnormal display signal is received. | 10-09-2014 |
20140292742 | SOURCE DRIVER FOR DISPLAY APPARATUS - Disclosed is a source driver for a display apparatus which is insensitive to power noise, and a configuration of filtering an influence of power noise, which is introduced from an exterior of the source driver or occurs in an interior thereof, to an operation of the source driver. The present invention is applied to the case of receiving a clock signal and a data signal through the single signal line, and is embodied such that a source driver for driving a display apparatus for achieving a high speed operation and a large screen has a characteristic insensitive to power noise. | 10-02-2014 |
20140264578 | SWITCH CIRCUIT USING LDMOS DEVICE - The present invention relates to a switch circuit, and more particularly, to a switch circuit that uses an LDMOS (lateral diffusion metal oxide semiconductor) device inside an IC (Integrated Circuit). In the switch circuit that uses the LDMOS device according to an embodiment of the present invention, a gate-source voltage (V | 09-18-2014 |
20140252974 | LIGHTING APPARATUS - The present invention relates to a lighting apparatus which stably performs dimming control on a lamp implemented with light emitting diodes (LEDs) or the like. The lighting apparatus may improve power efficiency by driving power supplied to a lamp in a current regulation method, perform constant current control such that the lamp maintains constant brightness, perform dimming control for controlling the brightness of the lamp, commonly supply the power provided to the lamp to peripheral circuit modules, and perform constant voltage control such that a driving voltage supplied as power is maintained at a predetermined level or more. | 09-11-2014 |
20140239847 | LIGHT EMITTING DIODE ILLUMINATION APPARATUS AND CONTROL METHOD THEREOF - Disclosed are a light emitting diode illumination apparatus and a control method thereof. The light emitting diode illumination apparatus includes a a light source that includes a plurality of light emitting diode channels including one or more light emitting diodes, and emits light by application of a rectified voltage obtained by converting an AC voltage, and a control circuit that selectively provides current paths according to a change in a level of the rectified voltage through a plurality of switching circuits connected to the light emitting diode channels, and controls pulse widths of control pulses provided to the switching circuits such that an current supplied to the light source of each channel follows a waveform of the rectified voltage. | 08-28-2014 |
20140184291 | CIRCUIT FOR CONTROLLING VARIATION IN FREQUENCY OF CLOCK SIGNAL - Disclosed herein is a circuit for controlling a variation in the frequency of a clock signal for blocking an unwanted variation in the frequency of the clock signal. When a frequency variation out of a set range is generated in a reference clock signal in the state in which the phases of the reference clock signal and a feedback clock signal have been locked, a control voltage for generating the feedback clock signal remains constant so that an abrupt variation generated in the frequency of the feedback clock signal is blocked. | 07-03-2014 |
20140152192 | POWER SUPPLY APPARATUS FOR LED LIGHTING AND LED LIGHTING APPARATUS USING THE POWER SUPPLY APPARATUS - Disclosed are a power supply apparatus for an LED lighting and an LED lighting apparatus using the power supply apparatus. The LED lighting apparatus includes a power source unit configured to supply a rectified voltage, a voltage converter configured to include at least one first inductor and to convert the rectified voltage, an auxiliary coil configured to include a second inductor and to supply a detection voltage corresponding to the current of the first inductor of the voltage converter, a controller configured to control the current of the voltage converter using a driving pulse generated in response to a control signal and a sensing voltage, and a voltage regulation circuit configured to regulate the detection voltage and to supply the regulated voltage as an operating voltage for the controller. | 06-05-2014 |
20140152183 | LED LIGHTING APPARATUS, CURRENT REGULATOR FOR THE LED LIGHTING APPARATUS, AND CURRENT REGULATION METHOD OF THE LED LIGHTING APPARATUS - The present invention discloses an LED lighting apparatus. The LED lighting apparatus includes a converter for transforming rectified voltage in accordance with a switching operation according to a driving pulse and outputting the transformed voltage, a current regulator for generating the driving pulse having a pulse width varied in response to a control signal and the amount of current of the converter and switching the operation of the converter using the generated driving pulse, and a peripheral circuit module for providing the control signal for controlling the dimming of an LED lighting. | 06-05-2014 |
20140111108 | SYSTEM CONTROL UNIT, LED DRIVER INCLUDING THE SYSTEM CONTROL UNIT, AND METHOD OF CONTROLLING STATIC CURRENT OF THE LED DRIVER - Embodiments of the present invention provide a light-emitting diode (LED) driver and method of controlling the static current of the LED driver. In some embodiments, the LED driver is configured to calculate output currents of a pulse form using a small number of parameters and adjust a gate control signal using the mean value of the output currents of a pulse form. Accordingly, the LED driver can be used to control a static current that flows through an LED array connected to a circuit on the secondary side of a transformer using a DC voltage or an AC voltage supplied to the primary side of the transformer. In some embodiments, the LED driver includes a power conversion unit, switching unit, transformer, zero current detection unit, and system control unit. In some embodiments, the system control unit is configured to adjust the gate control signal. | 04-24-2014 |
20140091998 | INPUT BUFFER CIRCUIT AND GATE DRIVER IC INCLUDING THE SAME - The present invention discloses an input buffer circuit capable of recognizing and driving a low-voltage signal, output from a low-voltage environment, in a high-voltage environment and a gate driver IC including the input buffer circuit. The input buffer circuit is configured to include two or more multi-stage inverters and to recognize and output a gate signal having a different voltage domain from an operating voltage. Accordingly, a signal interface environment between chips operating in different voltage domains can be provided. | 04-03-2014 |
20140077715 | SYSTEM CONTROL UNIT, LED DRIVER INCLUDING THE SYSTEM CONTROL UNIT, AND METHOD OF CONTROLLING STATIC CURRENT OF THE LED DRIVER - Embodiments of the present invention provide a light-emitting diode (LED) driver for controlling a static current supplied to an LED array connected to a secondary coil of a transformer by using the peak values of currents flowing through a power transistor, which may reside in a switching element connected to a primary coil of the transformer. In some embodiments, the LED driver is configured to control the static current that flows through the LED array using an AC voltage supplied to the primary side of the transformer. In some embodiments, the LED driver includes a power conversion unit, a switching unit, a transformer, and a system control unit. In some embodiments, the method of controlling the static current of the LED driver includes a current peak value detection step, a step output current calculation step, a static current mean value calculation step, and a gate control signal update step. | 03-20-2014 |
20140070757 | CELL BALANCING INTEGRATED CIRCUIT, CELL BALANCING SYSTEM, AND CELL BALANCING METHOD - Introduced are a cell balancing integrated circuit which may be realized including a small number of switches or diodes, an energy non-consumption type cell balancing system including the cell balancing integrated circuit, and an energy non-consumption type cell balancing method. The energy non-consumption type cell balancing system includes a battery pack, a cell balancing circuit, and a plurality of inductors and capacitors. | 03-13-2014 |
20140062449 | SWITCHING MODE CONVERTER AND METHOD FOR CONTROLLING THEREOF - Disclosed herein are a switching mode converter and a method for controlling thereof. The switching mode converter includes a switching element, a bootstrap capacitor, and a control unit. The switching element is connected between one side of a first semiconductor device, another side of the first semiconductor device is connected to a ground, and an input power. The bootstrap capacitor is configured such that one side of the bootstrap capacitor is connected to the one side of the first semiconductor device. The control unit controls the output current or output voltage of a common charge pump provided to the switching element and the bootstrap capacitor in order to control the charging state of the bootstrap capacitor and the gate voltage of the switching element. | 03-06-2014 |
20140035564 | DISPLACEMENT SENSOR, APPARATUS FOR DETECTING DISPLACEMENT, AND METHOD THEREOF - Disclosed herein are a displacement sensor and a displacement detection apparatus and method. The displacement detection apparatus according to an embodiment of the present invention includes a receiving unit for receiving a plurality of receiver signals dependent on displacement of a coupler element, an acquisition unit for acquiring information about the displacement of the coupler element and information about a gap between the coupler element and a transmitting coil or the plurality of receiver coils by using the plurality of receiver signals, and a compensation unit for compensating for the acquired displacement information using the acquired gap information. The acquisition unit acquires the displacement information of the coupler element using one of the plurality of receiver signals, and acquires a compensation signal, independent of the displacement of the coupler element including the gap information, using remaining receiver signals. | 02-06-2014 |
20130335123 | DRIVER IC CHIP AND PAD LAYOUT METHOD THEREOF - Provided is a driver IC chip of a liquid crystal display (LCD). The driver IC chip has a layout of power pads, which may uniformly apply an adhesive force on the entire adhesion surface of the driver IC chip, when the driver IC chip is mounted on a display panel according to a chip-on-glass (COG) technique. | 12-19-2013 |
20130300726 | MALFUNCTION PREVENTION CIRCUIT FOR COG-FORM SOURCE DRIVER INTEGRATED CIRCUIT AND FLAT PANEL DISPLAY CONTROLLER EMPLOYING THE SAME - Provided is a malfunction prevention circuit for a COG-form source driver integrated circuit with a power sequence in which a low voltage is applied after a high voltage is applied. The malfunction prevention circuit includes: a level shifter configured to process an input signal using the low voltage and output a control signal using the high voltage; and an initialization circuit configured to initialize the control signal to a constant voltage while an initialization signal is enabled. The initialization signal is enabled during a predetermined time from the time at which the low voltage starts to be applied at the initial stage of the power sequence. | 11-14-2013 |
20130300692 | SIGNAL PROCESSING CIRCUIT AND SIGNAL PROCESSING SYSTEM OF TOUCH SCREEN - The present invention discloses a signal processing circuit and a signal processing system for processing an input signal provided from a touch screen in response to a driving signal. | 11-14-2013 |
20130300690 | CONTROL CIRCUIT OF TOUCH SCREEN AND NOISE REMOVING METHOD - The present invention discloses a control circuit of a touch screen and a noise removing method. The present invention provides a technique for performing differential sensing on two adjacent detection lines of a touch screen panel and integrating a differential sensing signal to filter noise. The control circuit and the noise removing method may remove display noise having an effect on two adjacent detection lines, three-wavelength lamp noise having a predetermined frequency, 60 Hz noise, and charger noise caused by battery charging. | 11-14-2013 |
20130278591 | EMBEDDED DISPLAYPORT SYSTEM AND METHOD FOR CONTROLLING PANEL SELF REFRESH MODE - Provided are an embedded DisplayPort (eDP) system and a method for controlling a panel self refresh mode. The eDP system enters a panel self refresh (PSR) mode when an image to display is static in a general mode, and a sink device recovers a stream clock for displaying a static image in the PSR mode. | 10-24-2013 |
20130244529 | METHOD FOR ROUTING GAMMA VOLTAGES IN FLAT PANEL DISPLAY - A method for routing gamma voltages in a flat panel display that includes a plurality of source driver integrated circuits (SDICs) each having a plurality of gamma buffers. The method includes forming routing lines to route a plurality of gamma voltages; connecting the routing lines to output terminals of the gamma buffers; applying the reset gamma voltage to the gamma buffer of selected SDIC after selecting the SDIC in which the gamma voltage is required to be reset in consideration of heating values of the SDICs, and changing connection between a routing line corresponding to the selected gamma buffer and a tap point of a resistor string of the SDIC such that the connection corresponds to the reset gamma voltage. | 09-19-2013 |
20130169310 | TESTING CIRCUIT FOR DC-DC CONVERTER - Provided is a testing circuit capable of testing functionality of various DC-DC converters without an inductor. According to the present invention, various electronic elements forming the testing circuit for a DC-DC converter are converted in the same kinds of elements or different elements in one-to-one or one-to-two or more correspondence to electronic elements forming a typical DC-DC converter. When the conversion is performed, the electronic values of the elements may be properly scaled to test the DC-DC converter without consuming high power. Therefore, various problems of the related art are minimized. | 07-04-2013 |
20130166235 | MANAGEMENT SYSTEM AND ESTIMATING METHOD FOR BATTERY PARAMETER - The present invention relates to a battery parameter management system and a battery parameter estimation method which are capable of simply estimating parameters of elements forming a battery equivalent model having a simple structure. The battery parameter system includes an amperemeter, a voltmeter, a control switch unit, and a processor, and the battery parameter estimation method includes supplying a pulse current, estimating resistance of an internal resistor, estimating capacitance of an internal capacitor, and estimating parameters of dynamic elements. | 06-27-2013 |
20130162618 | OUTPUT VOLTAGE STABILIZATION CIRCUIT OF DISPLAY DEVICE DRIVING CIRCUIT - The present invention relates to an output voltage stabilization circuit. Specifically, the present invention relates to an output voltage stabilization circuit of a display device driving circuit, which generates a reference current dependent on a high source voltage using a current source independent of a magnitude of the high source voltage, generates a reference current dependent on a low source voltage using a current source independent of a magnitude of the low source voltage, and then generates a control signal by comparing the magnitudes to each other, whereby the output voltage stabilization circuit may stabilize an output voltage regardless of an order in which the low source voltage and the high source voltage are turned off in a circuit using both the low source voltage and the high source voltage. | 06-27-2013 |
20130138370 | BATTERY STATE-OF-CHARGE ESTIMATION METHOD AND BATTERY MANAGEMENT SYSTEM - Provided are a battery state-of-charge (SOC) estimation method and a battery management system which are capable of estimating an SOC using an inexpensive processor and a small-capacity memory. The SOC estimation method includes an SOC table creation step, an SOC calculation step, an SOC comparison step, and a processing step. The battery management system includes a battery, a sensing resistor, a control switch unit, and a processor. | 05-30-2013 |
20130106296 | DEVICE FOR DRIVING LIGHT EMITTING DIODE | 05-02-2013 |
20120306551 | CIRCUIT AND METHOD FOR PREVENTING FALSE LOCK AND DELAY LOCKED LOOP USING THE SAME - The present invention relates to a false lock prevention circuit and method which is used to cause a delayed locked loop (DLL) to escape from false lock such as harmonic lock or stuck lock, when the false lock occurred in the DLL, and a DLL using the same. The false lock prevention circuit includes a harmonic lock detector configured to detect harmonic lock and a stuck lock detector configured to detect stuck lock. The harmonic lock detector includes a plurality of flip-flops configured to sample a plurality of delayed clocks and a logic unit. The harmonic lock detector compares a reference clock signal with the plurality of delayed clock signals, and detects whether or not the positive edges deviate from one cycle of the reference clock signal. | 12-06-2012 |
20120299903 | SOURCE DRIVER CIRCUIT OF LIQUID CRYSTAL DISPLAY DEVICE - Provided is a technology for preventing noisy data from being displayed before valid data is inputted when power is turned on in a liquid crystal display. A source driver circuit for a liquid crystal display includes: a power supply voltage input unit configured to divide a first power supply voltage and a second power supply voltage, such that a middle level of the second power supply voltage is lower than a level of the first power supply voltage; a power supply voltage comparison unit configured to compare division voltages inputted from the power supply voltage input unit, and output an output voltage of a high level in a time period in which the middle level of the second power supply voltage is higher than the level of the first power supply voltage; a Schmitt trigger configured to output the output voltage of the power supply voltage comparison unit as a reset signal while preventing a sensitive response to external environment; and a specific voltage supply unit configured to output a voltage of a specific level in a time period between the input of the reset signal from the Schmitt trigger and the input of a first gate start pulse. | 11-29-2012 |
20120292776 | PAD LAYOUT STRUCTURE OF SEMICONDUCTOR CHIP - Provided is a pad layout structure of a semiconductor chip capable of preventing lead-broken problems when packaging the semiconductor chip with a high aspect ratio in a tape carrier package (TCP). In the pad layout structure of the semiconductor chip, a plurality pads are arranged along upper, lower, left and right sides of the semiconductor chip with a high aspect ratio, and a longitudinal width of pads arranged at the left and right sides and a transverse width of pads arranged at both edges of the upper and lower sides are greater than a transverse width of pads arranged at centers of the upper and lower sides. | 11-22-2012 |
20120280961 | LIQUID CRYSTAL PANEL DRIVING CIRCUIT FOR DISPLAY STABILIZATION - Disclosed is a liquid crystal panel driving circuit of display stabilization, including: a plurality of output buffers buffering data voltage and supplying or cutting off the buffered data voltage to or from each of the plurality of data lines; an output MUX switch receiving outputs from two adjacent output buffers of the plurality of output buffers and transferring one of the two outputs to the plurality of data lines; a garbage switch connecting each of the plurality of data lines to a ground terminal; and a power on sensor or a power off sensor generating a power on or off reset signal in response to a turn on/off of a power supply voltage, wherein the output MUX switch is turned-off and the charge share switch and the garbage switch are turned-on, in response to the power on reset signal or the power off reset signal. | 11-08-2012 |
20120268144 | TOUCH SENSING CIRCUIT - A touch sensing circuit detects a difference in variation of coupling capacitances between mutually adjacent driving electrodes through the use of a differential amplifier, and senses whether or not a touch is made on a touch screen panel, thereby being capable of removing display noise. | 10-25-2012 |
20120241859 | SWITCH CIRCUIT USING LDMOS ELEMENT - The present invention relates to a switch circuit, and more particularly, to a switch circuit that uses an LDMOS (lateral diffusion metal oxide semiconductor) device inside an IC (Integrated Circuit). In the switch circuit that uses the LDMOS device according to an embodiment of the present invention, a gate-source voltage (V | 09-27-2012 |
20120235964 | DRIVING CIRCUIT OF DISPLAY APPARATUS AND DRIVING CHIP - Disclosed are a driving circuit of a display apparatus and a driving chip, which shuts off the output of image data, in a display apparatus in which a plurality of driving chips is connected to each other in a daisy chain method to correspond to a single display panel, when serial communication of the driving chips is not completed successfully, or when any one of the driving chips is not operated normally, thereby preventing an abnormal screen from being displayed. | 09-20-2012 |
20120194224 | PRE-EMPHASIS CIRCUIT AND DIFFERENTIAL CURRENT SIGNALING SYSTEM HAVING THE SAME - Provided is a pre-emphasis circuit which transmits a pre-emphasis output current to an output node of an output driver in response to first to fourth pre-emphasis control signals generated by a logical operation on differential input signals. The pre-emphasis circuit includes: a first pre-emphasis circuit driven in a range between a first voltage and a second voltage and configured to generate a first pre-emphasis output current in response to the first and second pre-emphasis control signals and output the generated first pre-emphasis output current to a first output node of the output driver; and a second pre-emphasis circuit driven in the range between the first voltage and the second voltage and configured to generate a second pre-emphasis output current in response to the third and fourth pre-emphasis control signals and output the generated second pre-emphasis output current to a second output node of the output driver. | 08-02-2012 |
20120169701 | READOUT INTEGRATED CIRCUIT FOR A TOUCH SCREEN - A readout integrated circuit (ROIC) for a touch screen, the readout integrated circuit includes: a touch sensor unit configured to include a plurality of touch sensors which are arranged in a matrix form having rows and columns in an inside or outside of a touch screen panel (TSP); a plurality of sensing blocks configured to sense an electrical change in each of the touch sensors, to convert the electrical change into a voltage value, and to store the voltage value; a delta circuit unit configured to receive a difference between two sensing voltage values stored in two sensing blocks, respectively, which are spaced by a predetermined distance and selected from among the plurality of sensing blocks, and to produce a delta (Ī) voltage; and an analog-to-digital converter configured to convert an analog signal output from the delta circuit unit into an N-bit digital signal (wherein, āNā is a natural number). | 07-05-2012 |
20120166896 | METHOD AND APPARATUS FOR TRANSMITTING DATA BETWEEN TIMING CONTROLLER AND SOURCE DRIVER, HAVING BIT ERROR RATE TEST FUNCTION - Disclosed is a method and apparatus for transmitting data between a timing controller and a source driver, and more particularly, a data transmission method and apparatus between a timing controller and a source driver, which has a bit error rate test (BERT) function for sensing an error rate in real time when data is transmitted and received between the timing controller and the source driver. | 06-28-2012 |
20120162291 | DRIVING CONTROL CIRCUIT OF DISPLAY DEVICE - The present invention aims to provide a driving control circuit of a display device that is capable of preventing an unnatural black screen. To this end, the driving control circuit is configured to include a plurality of TMICs, each of which is merged with a timing controller and a source driver, and the time controller is configured to adjust end locations of the horizontal blank intervals of data enable signals to match the end locations outputted from TMICs to an end location of a horizontal blank interval of a data enable signal outputted from another TMIC, and, when a gate output enable signal is supplied, perform adjustment so as to indicate a rising edge of the gate output enable signal before the data latch enable signal having the highest frequency is supplied. | 06-28-2012 |
20120161661 | DISPLAY DRIVING CIRCUIT HAVING HALF VDD POWER SUPPLY CIRCUIT BUILT THEREIN AND DISPLAY DRIVING SYSTEM INCLUDING THE SAME - The present invention relates to a display driving circuit and a display driving system, and more particularly, to a display driving circuit having a half-VDD power supply circuit built therein and a display driving system including the same, in which the display driving circuit is further provided with a half voltage VDD terminal in addition to the highest voltage VDD terminal and the lowest voltage VSS terminal, and the half voltage, which is between the highest voltage and the lowest voltage, is generated and supplied by the half voltage power supply from the inside of the display driving circuit, rather than being supplied from an external power supply. | 06-28-2012 |
20120133631 | SOURCE DRIVER OUTPUT CIRCUIT OF FLAT PANEL DISPLAY DEVICE - In a source driver output circuit of a flat panel display device, first and second latch units receive image data and store the received image data. A D/A converter converts the image data into a data voltage. An output buffer unit outputs the data voltage to a data line. A switching control unit decides whether or not the data voltages of two image data of the same channel among image data of horizontal lines adjacent to each other, stored in the first and second latch units, belong to the same grayscale voltage range, and outputs a switching control signal based on the decided result. A multiplexer unit selects a pre-charge voltage in response to the switching control signal or continuously maintains a connection state between a corresponding channel of the output buffer unit and the corresponding data line. | 05-31-2012 |
20120127137 | CIRCUIT FOR CONTROLLING NON-SIGNAL OF FLAT PANEL DISPLAY DEVICE - Disclosed is a technique, in which when driving chips are used in which control units are respectively merged in driving devices, all modes of the other driving chips are simultaneously converted into a fail safe mode when one driving chip detects a non-signal state. A circuit for controlling a non-signal of a flat panel display device includes a plurality of driving chips. When detecting a non-signal state that the normal signal (LVDS) is not inputted from an outside, each of the plurality of driving chips simultaneously changes potentials of non-signal detection pads of its own driving chip and another driving chip so that all the driving chips are operated in the fail safe mode | 05-24-2012 |
20120081338 | SOURCE DRIVER INTEGRATED CIRCUIT WITH IMPROVED SLEW RATE - Disclosed is a source driver integrated circuit with an improved slew rate by disposing a switching unit, which operates as a resistance component during display driving, before the feedback line of an output buffer. According to the source driver integrated circuit with an improved slew rate, a switching unit, which operates as a resistance component when a signal is transferred, is disposed in the feedback loop of an output buffer, so that the resistance component is not shown to a panel load, thereby improving the slew rate of an output signal. In addition, the improved slew rate makes it possible to easily implement an image through a display. | 04-05-2012 |
20120044227 | POWER SUPPLY CIRCUIT FOR LIQUID CRYSTAL DISPLAY DEVICE - A power supply circuit of a liquid crystal display device includes a first positive polarity charge charging unit including a first capacitor connected to positive and negative power terminals through switches to charge a charge, a second positive polarity charge charging unit including a second capacitor connected to the positive power terminal and a ground terminal through switches to charge a charge, a first positive polarity charge loading unit loading the charge supplied through the positive power terminal to a negative polarity terminal, a second positive polarity charge loading unit loading the charge charged in the first capacitor to a negative polarity terminal, a third positive polarity charge loading unit loading the charge charged in the second capacitor, and a positive polarity charge charging/loading control unit outputting charging control signals with a same phase to the switches, and periodically or irregularly changing durations of the charging and loading control signals. | 02-23-2012 |
20110304356 | TRANSMITTER AND RECEIVER OF DIFFERENTIAL CURRENT DRIVING MODE, AND INTERFACE SYSTEM OF DIFFERENTIAL CURRENT DRIVING MODE INCLUDING THE SAME - Differential current driving type transmitter and receiver, and an interface system having the transmitter and receiver. The transmitter includes a current source, a current direction selecting block, and a balancing switch block. The current source sources currents to a pair of transmission lines or sinks currents flowing through the pair of transmission lines. The current direction selecting block transfers a current flowing from the current source to one transmission line of the pair of transmission lines and a current flowing through the other transmission line of the pair of transmission lines to the current source. The balancing switch block initializes the pair of transmission lines to a balanced state. | 12-15-2011 |
20110298769 | LIQUID CRYSTAL DISPLAY DRIVING CIRCUIT WITH LESS CURRENT CONSUMPTION - An LCD driving circuit includes a first buffer configured to have a terminal for a first voltage, a terminal for a second voltage and a terminal for an intermediate voltage between the first voltage and the second voltage, and be driven in a range from the first voltage to the intermediate voltage; and a second buffer configured to have a terminal for the first voltage, a terminal for the second voltage and a terminal for the intermediate voltage, and be driven in a range from the intermediate voltage to the second voltage. The terminal for the intermediate voltage of the first buffer and the terminal for the intermediate voltage of the second buffer are connected with each other, and the first voltage is a highest voltage, the second voltage is a lowest voltage, and the intermediate voltage is in a range from the first voltage to the second voltage. | 12-08-2011 |
20110286562 | RECEIVER HAVING CLOCK RECOVERY UNIT BASED ON DELAY LOCKED LOOP - A receiver for receiving an input signal (a clock-embedded data (CED) signal), in which a clock signal is periodically embedded between data signals, includes a clock recovery unit configured to recover and output the clock signal and a serial-to-parallel converter configured to recover and output a data signal. The input signal (the CED signal) comprises a single level signal in which the clock signal is periodically embedded between the data signals at the same level. The clock recovery unit is configured based on a delay locked loop (DLL) without using an internal oscillator for generating a reference clock signal. | 11-24-2011 |
20110285679 | CHIP-ON-GLASS TYPE LIQUID CRYSTAL DISPLAY DEVICE - A chip-on-glass (COG) type liquid crystal display device minimizes a reflected wave from an input terminal of a source driver IC, regardless of the resistance value of a transmission line on a glass substrate, through the use of impedance matching at a front terminal of an LOG and impedance matching at an output terminal of a timing controller, thereby enhancing the frequency characteristic while maintaining a slim and lightweight design, so that it is possible to express a high-resolution high-quality image. | 11-24-2011 |
20110279407 | CIRCUIT FOR PROCESSING TOUCH LINE SIGNAL OF TOUCH SCREEN - A circuit for processing a touch line signal of a touch screen includes a plurality of sensing read circuits and a switch unit. The plurality of sensing read circuits include sensing read-out units and integrators, respectively. The sensing read-out units are configured to precharge a first sensor capacitor and a second sensor capacitor formed on a touch screen panel with a ground voltage and a supply voltage, allow charges charged in the first sensor capacitor and the second sensor capacitor to be shared, and read-out a charge sharing result obtained by allowing the charges of the first sensor capacitor and the second sensor capacitor to be shared. The integrators are configured to integrate output voltages of the sensing read-out units. The switch unit is configured to sequentially connect output terminals of the plurality of sensing read circuits to an input terminal of an analog-to-digital converter. | 11-17-2011 |
20110279298 | DIGITAL-TO-ANALOG CONVERTER CIRCUIT USING CHARGE SUBTRACTION METHOD AND CHARGE TRANSFER INTERPOLATION METHOD - A DAC circuit using a charge subtraction method and a change transfer interpolation method includes resistor cells configured to divide a voltage of data of total K bits (=upper M bits+lower N bits) by resistance dividers; a decoder group configured to receive digital data of the M bits and the N bits divided in the resistor cells, process the digital data by the unit of 2 bits, and output respective corresponding voltages; a capacitor group configured to receive the voltages outputted from the decoder group and realize charge charging by a charge subtraction method and charge transferring by a charge transfer interpolation method; and an operational amplifier having a first input terminal which receives a reference voltage and a second input terminal which receives an interpolation voltage corresponding to an amount of charges transferred from the capacitor group, and configured to generate an output voltage. | 11-17-2011 |
20110279131 | CIRCUIT AND METHOD FOR MEASURING CAPACITANCE VALUE OF TOUCH SCREEN - A circuit for measuring a capacitance value of a touch screen includes: a target capacitor unit having a target capacitor charged with a target charging voltage; a target voltage control unit to charge the target capacitor; a reference capacitor unit having a reference capacitor charged with a charging reference voltage; a reference voltage control unit to charge the reference capacitor; a comparator to compare the target charging voltage and the charging reference voltage and output a transition signal at a moment when the target charging voltage becomes higher than the charging reference voltage; and a controller to receive an output signal of the comparator and a clock signal and generate a digital output signal and a control signal, wherein a capacitance value of the target capacitor is measured using a time elapsed from a time when the target capacitor is initialized to a time when the transition signal is outputted. | 11-17-2011 |
20110273433 | BOOST CONVERTER FOR LIQUID CRYSTAL DISPLAY - In order that a boost converter of an LDI can reduce electromagnetic interference by generating a panel driving voltage through the use of a variable frequency, while achieving a stable boosting operation using the same frequency whenever each frame begins, an oscillator generates an oscillation signal having a frequency, which varies in a predetermined pattern or hops in a random pattern around a center frequency, and generates an oscillation signal having a preset fixed frequency whenever each frame begins. | 11-10-2011 |
20110268202 | TRANSMISSION UNIT ADOPTING A DIFFERENTIAL VOLTAGE DRIVING SYSTEM, TRANSMISSION UNIT AND RECEIVING UNIT SELECTIVELY ADOPTING A DIFFERENTIAL CURRENT DRIVING SYSTEM, DIFFERENTIAL VOLTAGE DRIVING SYSTEM, AND INTERFACE SYSTEM - In the transmitter, receiver and interface system capable of selective adoption of a differential current driving scheme and a differential voltage driving scheme, a differential current driving scheme and a differential voltage driving scheme can be selectively adopted in one semiconductor chip depending upon the states of the transmission lines, so that effective data transmission is possible and common parts can be shared, whereby a design time can be shortened and a layout area can be reduced. | 11-03-2011 |
20110267022 | INTERFACE SYSTEM FOR A COG APPLICATION - A current driving type transmitter using independent current signals, which can independently generate and transmit differential current indicating a logic state of data to be transmitted, using a difference between positive data current and negative data current without using external current, so that magnitudes of current applied to a pair of transmission lines can be kept constant without being influenced by the design of current sources and processing factors, a current driving type receiver using independent current signals, which can simultaneously convert a difference in levels of current, received through the transmission lines, into a voltage level by a single I-V converter, so that errors of a true line and a bar line can be lessened, and an interface system for COG application, which adopts the transmitter and receiver, so that distortion of transmitted signals can be reduced. | 11-03-2011 |
20110266962 | DRIVER IC FOR ELECTRICAL LOAD AND DRIVING METHOD THEREOF - A driver IC for electrical loads, suitable for regulating a driving voltage depending upon a feedback signal and supplying a regulated driving voltage to a power supply line to which load strings are connected in parallel. The driver IC includes driving current sources respectively connected to the load strings through regulated voltage nodes and configured to supply driving current to the load strings in response to a control signal; sensing units configured to sense and output a minimum voltage among voltages of the regulated voltage nodes; a sample-and-hold circuit configured to sample, hold and output the minimum voltage in response to the control signal; and a comparator configured to compare an output voltage of the sample-and-hold circuit and a reference threshold voltage and generate the feedback signal. | 11-03-2011 |
20110248972 | POWER CONNECTION STRUCTURE OF DRIVER IC CHIP - A power connection structure of a driver IC chip including a first power terminal unit formed on one side thereof, a second power terminal unit formed on the other side thereof, and a dummy power terminal unit formed between the first power terminal unit and the second power terminal unit. The driver IC chip is mounted to a liquid crystal panel of a liquid crystal display device in a chip-on-glass (COG) type. Both of the first power terminal unit and the dummy power terminal unit and both of the dummy power terminal unit and the second power terminal unit are connected through routing lines in the driver IC chip. | 10-13-2011 |
20110242066 | DISPLAY DRIVING SYSTEM USING SINGLE LEVEL DATA TRANSMISSION WITH EMBEDDED CLOCK SIGNAL - A display driving system using single level data transmission with embedded clock signals. The display driving system is configured to embed a clock signal of the same level between data signals and transmit these signals as a single level signal, wherein a cycle at which clock signals are embedded is controlled and a data format is constructed such that a control data transmission step can be extended over 2 words. | 10-06-2011 |
20110199821 | POWER MANAGEMENT CHIP FURNISHED WITH VOLTAGE CONTROLLER - A power management IC includes a first IC having a boost converter IC which generates a second voltage using a first voltage supplied from an outside and supplies the second voltages to a charge pump, a reference voltage generation circuit, and an EEPROM; and a second IC configured to be inputted with a third voltage and a fourth voltage as outputs of the charge pump and output a fifth voltage and a sixth voltage. The second IC has a voltage regulator which regulates the third voltage and the fourth voltage or the fifth voltage and the sixth voltage and generates an eighth voltage and a ninth voltage as voltages required for programming operation or erasing operation of the EEPROM. | 08-18-2011 |
20110199248 | Digital-To-Analog Converter Of Data Driver And Converting Method Thereof - A digital-to-analog converter of a data driver and a converting method thereof, in which information corresponding to a lower bit is converted into an analog signal through control of current transmission paths and control of a transconductance ratio. Input data corresponding to a lower bit is converted into an analog signal through control of current transmission paths and control of a transconductance ratio between a delta current generation section and an output buffer amplifier. As a consequence, not only the area of a data driver can be significantly reduced, but also the delta current generation section can be realized even without using a common node feedback circuit, whereby an additional increase in area is not caused. | 08-18-2011 |
20110181558 | DISPLAY DRIVING SYSTEM USING TRANSMISSION OF SINGLE-LEVEL SIGNAL EMBEDDED WITH CLOCK SIGNAL - A display driving system includes a timing control section having an LVDS receiving unit for receiving data signals, a data processing unit for temporarily storing the data signals, processing the data signals and outputting processed data signals, a timing generation unit for generating clock signals and timing control signals, and a transmission unit for transmitting the data signals; and a panel driving section having row driving units for sequentially emitting gate signals toward a display panel and column driving units for receiving the signals transmitted through signal lines from the transmission unit and supplying the received signals to the display panel. In the timing control section, the transmission unit has driving parts which embed the clock signals between the data signals at the same level and generate and output single level transmission data. | 07-28-2011 |
20110175943 | Gamma Voltage Output Circuit of Source Driver - A gamma voltage output circuit of a source driver includes a reference voltage generation unit configured to generate upper and lower reference voltages; and upper and lower gamma buffers configured to stabilize and output the reference voltages. The lower gamma buffers include a first gamma buffer having a first operational amplifier which operates as a rail amplifier in a region between a positive power supply voltage and a ground voltage to receive a first lower reference voltage of a positive voltage region and output a first gamma voltage of the positive voltage region, and the upper gamma buffers include a second gamma buffer having a second operational amplifier which operates as a rail amplifier in a region between the ground voltage and a negative power supply voltage to receive a first upper reference voltage of a negative voltage region and output a second gamma voltage of the negative voltage region. | 07-21-2011 |
20110175942 | Gamma Reference Voltage Output Circuit of Source Driver - A gamma reference voltage output circuit of a source driver includes a reference voltage generation unit configured to divide power supply voltages by using resistors which are connected in series, and generate a plurality of gamma reference voltages; a gamma buffer unit having a plurality of gamma buffers which selectively output, through internal switching operations, gamma reference voltages needed by a plurality of gamma voltage generation units; and the plurality of gamma voltage generation units configured to divide the gamma reference voltages which are inputted from the gamma buffer unit, by using resistors which are connected in series, in conformity with a required mode and output divided gamma voltages. | 07-21-2011 |
20110169813 | DISPLAY PANEL DRIVING CIRCUIT HAVING CHARGE SHARING SWITCH FORMED IN PAD - A display panel driving circuit includes N number of amplifiers configured to supply N number of output voltages to a display panel; N number of output switches configured to transmit output signals from the N number of amplifiers through N number of pads to the display panel; and a plurality of charge sharing switches configured to share charges among the N number of pads, wherein the charge sharing switches are formed in the pads. | 07-14-2011 |
20110169808 | AMPLIFIER INCLUDING DITHERING SWITCH AND DISPLAY DRIVING CIRCUIT USING THE AMPLIFIER - An amplifier and a display driving circuit. The amplifier includes an input stage, a bias stage and an output stage. The input stage determines voltage levels of two nodes in correspondence to two input voltages received in response to a first bias voltage, and includes four path selecting switches, two input transistors and one bias transistor. The bias stage generates two class AB output voltages which correspond to the voltage levels of the two nodes, and includes current mirrors, ten path selecting switches, class AB bias circuits and two bias transistors. The output stage generates an output voltage VOUT that corresponds to the two class AB output voltages, and includes two coupling capacitors and two push-pull transistors. The plurality of path selecting switches operate by one signal of a first path selecting signal and a second path selecting signal that are exclusively enabled with respect to each other. | 07-14-2011 |
20110164020 | DISPLAY DRIVE CIRCUIT AND DRIVE METHOD - A display driving circuit and method is capable of minimizing the residual image of a display panel as well as consumption electric current. The display driving circuit generates driving signals corresponding to valid data and black data and transmits the driving signals to a display panel, and includes N data selection switches (where N is the integer), N buffers, N buffer output selection switches, and multiple charge sharing switches. The N data selection switches select one of the valid data and the black data. The N buffers buffer the signal selected by the respective data selection switches. The N buffer output selection switches switch outputs of the buffers to output the respective driving signals. The multiple charge sharing switches connect the neighboring pairs of the driving signals. | 07-07-2011 |
20110164006 | DISPLAY DRIVE CIRCUIT - A display driving circuit includes a buffer section, an N-dot switch circuit, a charge sharing switch circuit, and a sharing voltage level control switch circuit. The buffer section buffers a plurality of pixel driving signals outputted from a plurality of DACs. The N-dot switch circuit selects paths of the plurality of pixel driving signals outputted from the buffer section in response to a first path selecting signal or a second path selecting signal that is determined depending upon a dot inversion method, and switches the paths to a plurality of output terminals. The charge sharing switch circuit shares charges among the plurality of output terminals in response to a charge sharing control signal. The sharing voltage level control switch circuit controls charge sharing between the plurality of output terminals and a voltage level upon charge sharing, in response to a sharing voltage level control signal. | 07-07-2011 |
20110157129 | SOURCE DRIVER CIRCUIT OF LIQUID CRYSTAL DISPLAY DEVICE - A source driver circuit of a liquid crystal display device including a gamma buffer. The gamma buffer includes a differential amplification section configured to differentially amplify an input signal; a current mirror section configured to operate as a current mirror; an enable section configured to convert the differential amplification section from a standby mode to an enable mode by a bias voltage; a power drop speed improvement section configured to respectively connect drains of the two PMOS transistors of the current mirror section and drains of the two NMOS transistors of the differential amplification section through two diode coupling type MOS transistors, and shorten a recovery time after a power drop; and an output section configured to be determined in a bias level thereof by the bias voltage and generate an output voltage according to a voltage of a downstream node on one side of the current mirror section. | 06-30-2011 |
20110148848 | OUTPUT DRIVER OF ELECTRONIC PAPER DISPLAY DEVICE - An output driver of an electronic paper display device includes M number of output driver sections configured to transmit M number of pieces of data, respectively, to the electronic paper display device, wherein the M number of output driver sections are divided into a plurality of groups, and are temporally dispersed and driven according to groups, thereby transmitting the M number of pieces of data to the electronic paper display device. Also, an output driver for transmitting data to an electronic paper display device includes N number of drivers, wherein a part of the N number of drivers are selected and driven according to an output impedance of the electronic paper display device. Since output driver sections are divided into groups and are dispersedly driven, peak current is reduced. Since drivers are selectively driven according to the sizes of output loads, a constant driving capability is provided. | 06-23-2011 |
20110133972 | GAMMA VOLTAGE GENERATOR AND DAC HAVING GAMMA VOLTAGE GENERATOR - A gamma voltage generator includes an RGB common gamma voltage generation section configured to generate RGB common gamma voltages using corresponding gamma reference voltages among a plurality of gamma reference voltages; and at least two of an RG gamma voltage generation section configured to generate RG gamma voltages using corresponding gamma reference voltages among the plurality of gamma reference voltages, an R gamma voltage generation section configured to generate R gamma voltages using corresponding gamma reference voltages among the plurality of gamma reference voltages, a G gamma voltage generation section configured to generate G gamma voltages using corresponding gamma reference voltages among the plurality of gamma reference voltages, and a B gamma voltage generation section configured to generate B gamma voltages using corresponding gamma reference voltages among the plurality of gamma reference voltages. | 06-09-2011 |
20110128273 | DISPLAY PANEL DRIVING CIRCUIT AND DRIVING METHOD USING THE SAME - A display panel driving circuit includes: N number of buffers (N is an integer no less than 1) configured to buffer data voltages and enable or disable supply of buffered signals in response to a charge sharing control signal; and N number of output multiplexers each configured to receive outputs of two adjacent buffers among outputs of the N number of buffers and transfer the output of one buffer or the outputs of the two buffers to a corresponding one of data lines in response to the charge sharing control signal. | 06-02-2011 |
20110109816 | CIRCUIT FOR DRIVING LCD DEVICE AND DRIVING METHOD THEREOF - A liquid crystal display driving circuit and method. A data register block of a controller applies in advance a polarity control signal to data before the data are stored in latches of a data driver, exchanges the data, and then stores the exchanged data in the latches. Thereby, it is possible to provide multiplexers, which are otherwise required for respective channels, to one controller and to decrease the size of a chip. | 05-12-2011 |
20110102687 | LCM FOR A DISPLAY PANEL - An LCM for a display panel includes a pixel array, a plurality of source driver ICs, and a plurality of gate driver ICs. The plurality of source driver ICs are disposed in a horizontal direction at an upper side or lower side of the pixel array. The plurality of gate driver ICs are disposed in a vertical direction at a left side or right side of the pixel array. The plurality of gate driver ICs are disposed at an opposite position to a position where a source driver IC, among the plurality of source driver ICs, first supplied with video data and a clock signal is disposed. | 05-05-2011 |
20110102410 | CIRCUIT AND METHOD FOR DRIVING OLED DISPLAY - A circuit for driving an organic light emitting diode display includes a display panel that displays an image by using organic light emitting diodes disposed at intersection areas of a plurality of gate lines and a plurality of data lines; a threshold voltage detection control unit that supplies a precharge voltage by sequentially turning on transistors for threshold voltage detection, which are connected among the data lines and the organic light emitting diodes on the display panel, in units of horizontal lines, and enables threshold voltages to be detected; and a source driver that detects threshold voltages of all organic light emitting diodes arranged on a corresponding horizontal line, and repeats an operation, as necessary, for sampling/holding the detected threshold voltages through M sample/hold circuits, converting the sampled/held threshold voltages into digital signals, and storing the digital signals in a memory. | 05-05-2011 |
20110102408 | LAYOUT OF LCD DRIVING CIRCUIT - A layout of a liquid crystal display driving circuit is capable of minimizing an area which the layout occupies. The layout of the liquid crystal display driving circuit transmits positive analog voltages and negative analog voltages to a liquid crystal display, and includes a digital-to-analog converter (DAC) block and a buffer block. The DAC block has N/2 positive DACs generating the respective positive analog voltages corresponding to corresponding digital data using a positive reference voltage, where N is the integer, and N/2 negative DACs generating the respective negative analog voltages corresponding to corresponding digital data using a negative reference voltage. The buffer block has N/2 positive and negative buffers, which buffer the N/2 positive and negative analog voltages, and are alternately arranged. The N/2 positive and negative DACs are divided into groups one by one or in twos or more, and the groups are alternately arranged. | 05-05-2011 |
20110096054 | LIQUID CRYSTAL DISPLAY PANEL DRIVING CIRCUIT - Disclosed is a liquid crystal display panel driving circuit for driving a liquid crystal display panel with a resolution of N bits. N-bit digital data including upper X bits and lower Y bits is inputted. The liquid crystal display panel driving circuit includes a resistor string unit according to areas, a DAC converter switching unit according to areas, and an interpolation amplifier. The resistor string unit outputs analog reference voltages at different ratios according to three areas. The DAC converter switching unit receives the N-bit digital data, selects (Y+1) analog voltages from the analog reference voltages based on the upper X bits, outputs the (Y+1) analog voltages, and outputs the (Y+1) analog voltages of different combinations based on the lower Y bits. The interpolation amplifier receives the (Y+1) analog voltages and generates an interpolated output voltage by setting weights for the (Y+1) analog voltages by using multi-factors. | 04-28-2011 |
20110089576 | PAD LAYOUT STRUCTURE OF A DRIVER IC CHIP - A pad layout structure of a driver IC chip to be mounted to a liquid crystal display panel. The pad layout structure includes power pad sections placed at respective four corners of the driver IC chip and each having a first power pad for supplying first power to the driver IC chip, a second power pad for supplying second power to the driver IC chip, a third power pad for supplying third power to the driver IC chip and a fourth power pad for supplying fourth power to the driver IC chip. | 04-21-2011 |
20110075390 | PAD LAYOUT STRUCTURE OF DRIVER IC CHIP - A pad layout structure of a driver IC chip of a liquid crystal display device includes dummy power pads and dummy ground pads, which are disposed in corners of the driver IC chip and are connected to main power pads and main ground pads by metal lines in a chip-on-film (COF) package. Accordingly, it is possible to reduce the resistance of power supply lines and ground lines, to minimize a power dip of a block located far away from the main power pads and main ground pads, and to prevent a failure in power application, which may occur due to a decrease of adhesive strength at a specific position, by dispersing the adhesion positions of the power pads and ground pads. | 03-31-2011 |
20110057968 | COG PANEL SYSTEM ARRANGEMENT - Provided is a COG panel system capable of minimizing a block dim effect by considering a relationship among a plurality of chips. The COG panel system includes: an FPC which supplies at least two power supply voltages having a constant voltage level; a plurality of SDIs which are commonly supplied with a bypass power supply voltage from the FPC and generate respective parts of a plurality of consecutive LCD driving signals required for an arbitrary one line of an LCD; and at least one block dim correction resistance. | 03-10-2011 |
20110043467 | TIMING ADJUSTING METHOD FOR TOUCH SCREEN LIQUID CRYSTAL DISPLAY DEVICE - Provided is a timing adjusting method for a touch screen liquid crystal display device. A liquid crystal module of the touch screen liquid crystal display device has a structure in which a data line connected to data pixels and a read line connected to read pixels are shared by a share line, and a display mode section for displaying data of the data pixels is performed separately from a read mode section for reading data of the read pixels. | 02-24-2011 |
20110043466 | TOUCH SCREEN LIQUID CRYSTAL DISPLAY DEVICE - An touch screen liquid crystal display device includes a panel driving circuit including a gate driving block, a data driving block, and a signal control block and a liquid crystal module that stores data in data pixels through a data pixel line, to which the data pixels are connected, in response to a data signal applied from the data driving block, and reads data through a read pixel line to which read pixels are connected. The read pixels are connected to the data pixels through a share line. | 02-24-2011 |
20110012877 | METHOD FOR GENERATING FRAME-START PULSE SIGNALS INSIDE SOURCE DRIVER CHIP OF LCD DEVICE - Provided is a method of driving a liquid crystal display apparatus, and more particularly, to a method of generating a frame start pulse signal for instructing driving of a specific function of a source driver in a source driver chip of a liquid crystal display apparatus. Accordingly, by generating a frame start pulse signal for instructing driving of a specific function of a source driver in a source driver chip unlike a conventional method where the frame start pulse signal is externally input, it is possible to reduce the number of input pins for inputting the frame start pulse signal and to remove an input line for inputting the frame start pulse signal in a process of mounting the source driver chip in a printed circuit board. | 01-20-2011 |
20100308472 | SEMICONDUCTOR CHIP HAVING POWER SUPPLY LINE WITH MINIMIZED VOLTAGE DROP - Disclosed is a power supply line in which a voltage drop generated in a resistance component of a metal line which delivers a power voltage is minimized so that the level of the power supply voltage delivered to a semiconductor chip becomes constant in the entire area of the semiconductor chip. The semiconductor chip includes: at least two power supply pads to which a power voltage applied from an external unit of the semiconductor chip is supplied; power supply main metal lines connected to each of the power supply pads; power supply branch metal lines extended from each of the power supply main metal lines to deliver a power voltage to a circuit in the semiconductor chip; and at least an electrostatic discharge (ESD) improvement dummy pad, wherein the ESD improvement dummy pad is electrically connected to the corresponding power supply main metal line and the corresponding power supply branch metal line to minimize a voltage drop. | 12-09-2010 |
20100265274 | OFFSET COMPENSATION GAMMA BUFFER AND GRAY SCALE VOLTAGE GENERATION CIRCUIT USING THE SAME - Disclosed are an offset compensation gamma buffer and a gray scale voltage generation circuit using the same. The offset compensation gamma buffer includes: a buffer which outputs an input voltage input to a positive or negative input terminal as an output voltage; and a switching unit which selectively connects the input voltage and the output voltage of the buffer to the positive and negative input terminals in response to a control signal. The output voltage of the offset compensation gamma buffer is supplied to the input of a gray scale voltage generation circuit of a source driver for driving a liquid crystal panel. The offset of the offset compensation gamma buffer is compensated using an inversion timing of the control signal. The output voltage of the offset compensation gamma buffer is supplied as a reference voltage of the voltage divider unit for generating the gray scale voltages, and the offset of the gray scale voltages is also compensated. | 10-21-2010 |
20100259564 | DISPLAY DRIVING INTEGRATED CIRCUIT AND DISPLAY DRIVING SYSTEM - Provided is a high-resolution display driving system without a new design of interfaces between a timing controller and DDIs, particularly, without an entire change of a DAC unit having a role of determining gradation representation of DDIs and offsets between channels. The high-resolution display driving system includes a timing controller and a DDI unit. The timing controller generates a differential clock signal and differential data. The DDI unit generates a plurality of converted signals corresponding to the differential data in response to an operation instructing signal, a reset/enable signal, and the differential clock signal. A scheme of data transmission from the timing controller to the DDI unit is at least one of a multi-drop scheme and an m-LVDS (mini low voltage differential signaling) scheme. | 10-14-2010 |
20100246077 | ELECTROSTATIC DISCHARGE PROTECTION DEVICE OF OUTPUT DRIVER STAGE - Provided is an electrostatic discharge (ESD) protection device of an output driver stage of a semiconductor chip. The ESD protection device of an output driver stage, which includes a p-channel metal-oxide-semiconductor (PMOS) transistor having a source connected to a first source voltage and an n-channel metal-oxide-semiconductor (NMOS) transistor having a source connected to a second source voltage, the MOS transistors having gates applied with output signals from an internal circuit and drains connected to the output pad, wherein a distance between contacts formed on a drain region and a gate poly of the MOS transistors is relatively greater than a value according to a predetermined design rule. | 09-30-2010 |
20100225637 | DISPLAY DRIVING SYSTEM WITH MONITORING UNIT FOR DATA DRIVER - A display driving system includes a timing controller configured to receive a data signal composed of image data and generate a control signal such as a clock signal; an interface configured to transmit the data signal and the control signal to a plurality of data drivers; the data drivers configured to receive the data signal and the control signal through the interface and supply received signals to a display panel to display an image; and a monitoring unit configured to feed back LOCK signals indicative of state information of the data drivers to the timing controller such that the data drivers can be monitored. | 09-09-2010 |
20100155957 | PAD LAYOUT STRUCTURE OF SEMICONDUCTOR CHIP - Provided is a pad layout structure of a semiconductor chip capable of preventing lead-broken problems when packaging the semiconductor chip with a high aspect ratio in a tape carrier package (TCP). In the pad layout structure of the semiconductor chip, a plurality pads are arranged along upper, lower, left and right sides of the semiconductor chip with a high aspect ratio, and a longitudinal width of pads arranged at the left and right sides and a transverse width of pads arranged at both edges of the upper and lower sides are greater than a transverse width of pads arranged at centers of the upper and lower sides. | 06-24-2010 |
20100141687 | METHOD OF ARRANGING GAMMA BUFFERS AND FLAT PANEL DISPLAY APPLYING THE METHOD - Provided are a method of arranging gamma buffers capable of decreasing a Kelvin of a source driver included in a flat panel display and minimizing a temperature deviation between source drivers, and the flat panel display applying the method. The method of arranging a plurality of gamma buffers which are arranged in one or more source drivers to output corresponding gamma voltages, includes a step of calculating power consumptions of the gamma buffers, wherein the method further comprises one or more steps of: changing tab points of the gamma buffers by using the calculated power consumptions of the gamma buffers; and changing positions of the gamma buffers by using the calculated power consumptions of the gamma buffers. | 06-10-2010 |
20100118024 | METHOD FOR REMOVING OFFSET BETWEEN CHANNELS OF LCD PANEL - A method of removing offsets between channels of a liquid crystal panel is provided. The method includes: alternately arranging first type output buffers and second type output buffers for driving the pixels in units of at least two rows of the pixels; and arranging the first type output buffers and the second type output buffers in units of at least two columns of the pixels so that the output buffers with types opposite to those of previous two columns are arranged. The second type output buffers are embodied by switching connections among the differential transistors and connections among the load transistors in the first type output buffers. | 05-13-2010 |
20100027223 | SEMICONDUCTOR INTEGRATED CIRCUIT HAVING HEAT RELEASE PATTERN - Provided are a semiconductor integrated circuit having a heat release pattern in a chip so as to release heat generated inside the chip and a system board having a heat release unit used to release heat generated inside the semiconductor integrated circuit. The semiconductor integrated circuit includes: one or more output pads directly connected to an output terminal having a heat release pattern; a power supply pad supplying power; and one or more dummy pads connected to a metal line for supplying power or an internal output terminal of an internal function block, wherein the heat release pattern includes a plurality of unit contacts at the output terminal or a plurality of strip contacts having an area of about or larger than the sum of two or more of the unit contacts. | 02-04-2010 |
20090015535 | DRIVING CIRCUIT FOR A LIQUID CRYSTAL DISPLAY - Provided is a driving circuit for a liquid crystal display which is suitable for reducing a chip size and has improved noise immunity in a circuit which uses a level shifter and is constructed with a channel array. The driving circuit includes: the level shifter which is disposed in a previous stage of a channel region and shifts up a level of a data signal output from a buffer to output the data signal to the channel region; and the channel region which processes an output data of the level shifter in a format requested by a system and outputs a final data in a high or low format, and wherein the level shifter is disposed in a region excluding the channel region. | 01-15-2009 |