| SILICON INTEGRATED SYSTEMS CORP. Patent applications |
| Patent application number | Title | Published |
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| 20110279980 | HEAT DISSIPATION STRUCTURE FOR LIQUID CRYSTAL TELEVISION - A heat dissipation structure for a liquid crystal television is disclosed. The liquid crystal television includes a front plate and a rear plate. The front plate has a screen and a metal backboard. The heat dissipation structure includes a printed circuit board (PCB) mounted to the metal backboard; a television integrated circuit (IC) chip for controlling operations of the liquid crystal television being attached on the PCB; and one or more heat dissipating posts provided between the PCB and the metal backboard. The heat generated by the television IC chip is dispersed to the metal backboard via the heat dissipating post or posts. | 11-17-2011 |
| 20110248932 | GHOST CANCELLATION METHOD FOR MULTI-TOUCH SENSITIVE DEVICE - A ghost cancellation method for the multi-touch sensitive device is disclosed. The multi-touch sensitive device includes a sensing array having multiple lines of a first axis and multiple lines of a second axis intersecting with each other. All the lines of the sensing array are scanned to determine which ones of the lines are touched, so as to determine touch point candidates. For each touch point candidate, a driving signal is applied to the line of the first axis, and the line of the second axis is detected to check if the touch point candidate is actually touched. | 10-13-2011 |
| 20110141054 | MULTIPLE FINGERS TOUCH SENSING METHOD USING MATCHING ALGORITHM - A touch sensing method for detecting positions of touching is disclosed. In the present invention, a reference touch profile is provided. A variable ideal combination profile indicating multiple touches is obtained by synthesizing a plurality of reference touch profiles at different positions. The variable ideal combination profile is matched with a sensing signal. Actual touch positions can be identified from the sensing signal when the matching of the variable ideal combination profile with the sensing signal is optimal. | 06-16-2011 |
| 20110135001 | HIERARCHICAL MOTION ESTIMATION METHOD USING DYNAMIC SEARCH RANGE DETERMINATION - A hierarchical motion estimation method implemented in a plurality of levels is disclosed. The hierarchical motion estimation method is used for estimating motion vectors of a frame. The frame being partitioned into blocks at a first level, and each block of the first level is partitioned into a plurality of blocks at a second level. The method includes selecting reference blocks at the first level for a specific block at the second level and determining a search range for the specific block at the second level by referring to motion vectors, which are known, of the reference blocks at the first level. By using such a method, the motion vectors of a frame can be rapidly and accurately estimated. | 06-09-2011 |
| 20090268802 | DECISION FEEDBACK EQUALIZER HAVING ADJUSTING DEVICE AND METHOD THEREOF - A decision feedback equalizer having a adjusting device and method thereof are described. The decision feedback equalizer having an adjusting device includes a feed-forward filter, a decision device, a feedback filter, the adjusting device, and a summation device. The feed-forward filter generates a forwarding signal (S | 10-29-2009 |
| 20090064067 | METHOD OF BALANCING PATH DELAY OF CLOCK TREE IN INTEGRATED CIRCUIT (IC) LAYOUT - A method of balancing the path delay of a clock tree for minimizing clock skew of the clock tree in the IC layouts is described. The method includes the following steps: (a) A design tool calculates a plurality of path delay values from the root cell to each sink via some of the inverters, wherein the maximum one of the path delay values recorded on the sinks serves as a target value, respectively; (b) The design tool compares the path delay value of each sink with the delay value of the adjacent sink from each sink to the root cell for recording the compared higher value on each inverter until the higher compared values are recorded, respectively, in the inverters and the root cell; (c) The design tool compares the path delay value on each inverter with the target value from the root cell to the sinks to determine whether to change the cell type of the inverter from a current cell type to a new cell type by selecting the new cell type from the type database; (d) The design tool adds the difference value to the original value for updating the original value recorded in this inverter; and (e) The design tool adds the difference value to the values recorded on the downstream inverters relative to the inverter for repeatedly updating the values recorded on the downstream inverters and sinks to minimize the clock skew of the clock tree. | 03-05-2009 |
