| Silicon Image, Inc. Patent applications |
| Patent application number | Title | Published |
|---|
| 20120131245 | TRANSFER OF CONTROL BUS SIGNALING ON PACKET-SWITCHED NETWORK - Embodiments of the invention are generally directed to transfer of control bus signaling on a packet-switched network. An embodiment of a method includes sending control signals from a first device on a first control bus, the control signals being sent according to an interface protocol, the control signals being intended for a second device. The method further includes detecting a current state of the first control bus, where the current state is a control signal value driven by the first device; inserting a control signal representing the current state of the control bus into a data packet; and transmitting the data packet to the second device via a packet-switched network. | 05-24-2012 |
| 20120131153 | DISCOVERY OF ELECTRONIC DEVICES IN A COMBINED NETWORK - Embodiments of the invention are generally directed to discovery of electronic devices in a combined network. An embodiment of a method includes determining an identifier for a first device in a combined network according to a first network protocol, the combined network including a first network using the first network protocol and a second network using a second network protocol, where the identifier is determined based on a unique designation for the first device, and determining addressing information for the first device according to the second network protocol, where determining the addressing information includes establishing a physical address and a logical address for the first device. The method further includes broadcasting one or more messages containing identification information and capabilities of the first device to devices in the first network and to devices in the second network. The first device records and processes information from messages received by the first device, the messages being one or more messages under the first network protocol and one or more message under the second network protocol. | 05-24-2012 |
| 20120092450 | COMBINING VIDEO DATA STREAMS OF DIFFERING DIMENSIONALITY FOR CONCURRENT DISPLAY - Embodiments of the invention are generally directed to combining video data streams of differing dimensionality for concurrent display. An embodiment of an apparatus includes an interface to receive multiple video data streams, a dimensionality of each video stream being either two-dimensional (2D) or three-dimensional (3D). The apparatus further includes a processing module to process a first video data stream as a main video image and one or more video data streams as video sub-images, the processing module including a video combiner to combine the main video data stream and the sub-video data streams to generate a combined video output. The processing module is configured to modify a dimensionality of each of the video sub-images to match a dimensionality of the main video image. | 04-19-2012 |
| 20120081138 | TESTING OF HIGH-SPEED INPUT-OUTPUT DEVICES - Embodiments of the invention are generally directed to testing of high-speed input-output devices. An embodiment of a high-speed input-output apparatus includes a transmitter and a receiver, and a loop-back connection from an output of the transmitter to an input of the receiver, the loop-back connection including a first connector and a second connector for transmission of differential signals. The apparatus further includes a first inductor having a first terminal and a second terminal and second inductor having a first terminal and a second terminal, the first terminal of the first inductor being connected to the first connector and the first terminal of the second inductor being connected to the second connector, the second terminal of the first inductor and the second terminal of the second inductor providing a test access port for direct current testing of the apparatus. | 04-05-2012 |
| 20120026157 | MULTI-VIEW DISPLAY SYSTEM - Embodiments of the invention are generally directed to a multi-view display system. An embodiment of an apparatus includes a display screen to display multiple views simultaneously, and a controller to control the views presented on the display screen. The apparatus is configurable by the controller to provide multiple view settings, the view settings including a first setting in which the apparatus provides a single view to each viewer of the display screen and a second setting in which the apparatus provides a first view to a first viewer of the display screen and a second view to a second viewer of the display screen. A first filtering element filters views presented to viewers of the display screen such that an intended view is displayed to one or more viewers. | 02-02-2012 |
| 20110249179 | EDGE DETECTION - A technique for deinterlacing an interlaced video stream is disclosed. A embodiment of a method includes calculating a pixel using edge detection, calculating a pixel using vertical interpolation, calculating a pixel using weaving, calculating a confidence level, calculating a motion value, blending the edge pixel calculation with the vertical interpolation calculation to generate a first output pixel calculation, the blending being based on the confidence level, and blending the first output pixel calculation with the weaving calculation to generate a second output pixel calculation, the blending being based on the motion value. | 10-13-2011 |
| 20110209027 | ERROR DETECTION IN PHYSICAL INTERFACES FOR POINT-TO-POINT COMMUNICATIONS BETWEEN INTEGRATED CIRCUITS - An apparatus, system and method for detecting errors in a physical interface during the transmission or receipt of data communications between integrated circuits (“ICs”) are disclosed. In one embodiment, a physical interface formed as a first IC on a first substrate portion to detect transmission errors in data exchanged with a second IC formed on a second substrate portion, the physical interface including multiple input ports and output ports, including a first subset of input ports configured to receive in-bound encoded data bits and a first subset of output ports configured to transmit in-bound decoded data bits to the second IC; and one or more error recovery modules coupled between the plurality of input ports and output ports, where a first error recovery module of the one or more error recovery modules is coupled between at least one of the first subset of input ports and at least one of the first subset of output ports. | 08-25-2011 |
| 20110193579 | DETERMINATION OF PHYSICAL CONNECTIVITY STATUS OF DEVICES BASED ON ELECTRICAL MEASUREMENT - Embodiments of the invention are generally directed to determination of physical connectivity status of devices based on electrical measurement. An embodiment of a method includes discovering a connection of a first device with a second device, and performing an electrical measurement of the second device by the first device via the connection between the first device and the second device, where performing the electrical measurement includes sensing by the first device of an element of the second device. The method further includes, if the sensing by the first device fails to detect the element of the second device and a predetermined condition for the electrical measurement is enabled, then determining by the first device that the connection with the second device has been lost. | 08-11-2011 |
| 20110170011 | TRANSMISSION AND DETECTION OF MULTI-CHANNEL SIGNALS IN REDUCED CHANNEL FORMAT - Embodiments of the invention are generally directed to transmission and detection of multi-channel signals in reduced channel format. An embodiment of a method for transmitting data includes determining whether a first type or a second type of content data is to be transmitted, where the first type of content data is to be transmitted at a first multiple of a base frequency and the second type of data is to be transmitted at a second multiple of the base frequency. The method further includes selecting one or more channels from a plurality of channels based on the type of content data, clocking a frequency on the first or second multiple of the base frequency according to the type of content data in the selected channels, modifying the content data to fit within a single output channel, and transmitting the modified data via a single output channel at the chosen multiple of the base frequency. | 07-14-2011 |
| 20110150006 | DE-ENCAPSULATION OF DATA STREAMS INTO MULTIPLE LINKS - Embodiments of the invention are generally directed to de-encapsulation of data streams into multiple links. An embodiment of a method includes receiving a data stream including multiple data frames, the data stream being in a first mode having a multiple channels of content data including a first channel sent in a first position in each data frame and a second channel sent in a second position in each data frame following the first position, with each data frame including a synchronization signal to indicate a start of the content data. The method further includes transforming the data stream into data sub-streams in a second mode, the data sub-streams including a first data sub-stream to carry data for the first channel in the second mode and a second data sub-stream to carry data for the second channel in the second mode. Transforming the data stream into in the plurality of data sub-streams includes generating the first data sub-stream by stripping the second channel from each frame of data, and generating the second data sub-stream by stripping the first channel and the synchronization signal from each frame and inserting a substitute synchronization signal before the second channel data in each data frame. The method further includes transmitting the first data sub-stream via a first link in the second mode and the second data sub-stream via a second link in the second mode. | 06-23-2011 |
| 20110149032 | TRANSMISSION AND HANDLING OF THREE-DIMENSIONAL VIDEO CONTENT - Embodiments of the invention are generally directed to transmission and handling of three-dimensional video content. An embodiment of a method includes receiving a multimedia data stream including video data utilizing an interface protocol and determining that the received video data includes three-dimensional (3D) video data, where each frame of the video data includes a first vertical synchronization (Vsync) signal prior to an active data region, the active data region including a first data region and a second data region. The method further includes converting the 3D video data from a 3D data format to a two-dimensional (2D) video format, where converting the 3D video data includes identifying a region between the first data region and the second data region, inserting a second Vsync signal between the first data region and the second data region, and providing an identifier to distinguish between the first data region and the second data region. | 06-23-2011 |
| 20100142419 | BI-DIRECTIONAL BRIDGE CIRCUIT HAVING HIGH COMMON MODE REJECTION AND HIGH INPUT SENSITIVITY - A bidirectional communications interface is provided that connects a transmitter and a receiver, or a transceiver, to a transmission line. Under an embodiment, the bidirectional interface generates positive and negative polarity data signals using two separate differential amplifiers that receive differential signal pairs from each side of a differential link to the transmission line and the transmitter. The bidirectional interface controls common mode rejection in each of the separate differential amplifiers using bias signals generated in response to an output common mode feedback voltage from each of the differential amplifiers. An output amplifier combines the positive and negative polarity data signals to form single-ended output logic signals. The output logic signals represent data received on the transmission line, and are provided to the receiver. | 06-10-2010 |
| 20090274218 | Method and System for Transmitting or Receiving N-Bit Video Data over a Serial Link - A system including a receiver, a TMDS link (or other serial link), and a transmitter configured to transmit K-bit video words (typically, encoded 8-bit video words) over the link. In typical embodiments, the transmitter is configured to pack a sequence of N-bit video words, where N≠K (e.g., N=10, 12, or 16, when K=8) into a sequence of K-bit fragments, encode the fragments, and transmit the encoded fragments. The transmitted data are indicative of a sequence of M-fragment groups, and the transmitter is typically configured also to transmit over the link packing phase data indicative of the phase of the most recently transmitted fragment. Other aspects are transmitters and receivers for use in such a system and methods implemented by any such transmitter, receiver, or system. | 11-05-2009 |
| 20090150621 | BANK SHARING AND REFRESH IN A SHARED MULTI-PORT MEMORY DEVICE - A method and system for sharing banks of memory in a multi-port memory device between components is provided. The multi-port memory device includes multiple ports to which components of a system are attached, and multiple banks of memory within the multi-port memory device that are shared by each of the ports. A bank availability pin is added to each port for each bank of memory. The bank availability pin is signaled when the bank is available to a particular port and unsignaled when the bank is unavailable. Thus, the multi-port memory device can be shared by several components simultaneously with only a small amount of additional hardware to support the sharing. Also provided are methods for refreshing the banks of memory. | 06-11-2009 |
| 20080235526 | POWER-SAVING CLOCKING TECHNIQUE - A method and system for providing a clock signal having reduced power consumption is provided, called the hybrid clock system. The hybrid clock system uses a PLL for high-speed data transfers, but provides a power-saving mode for transferring data while consuming less power. In the normal mode, the hybrid clock system contains a reference clock that operates at a low frequency that drives a PLL. The PLL multiplies the reference clock frequency to a much higher frequency, and supplies the clock signal to a data transfer circuit. In the power-saving mode, the hybrid clock system turns off the PLL and connects the reference clock directly to the data transfer circuit. | 09-25-2008 |
