| 20080251495 | Methods of preparing printed circuit boards and packaging substrates of integrated circuit - A method of forming printed circuit boards and packaging substrates for integrated circuits based on filling-vias plating and a semi-additive process, comprising the following steps: (1) providing a dielectric layer on a substrate; (2) providing blind vias on said dielectric layer; (3) providing a first seed layer after providing blind vias; (4) providing solid conductive vias by a filling-vias plating process after providing a first seed layer, and also providing a copper layer covering the first seed layer during the filling-vias plating process; (5) removing said first seed layer as well as the copper layer formed thereon, and retaining solid copper pillars in the conductive vias; (6) providing a second seed layer which is used to form wires by a semi-additive process; (7) providing a photo-sensitive thin film, and providing a plating resistant layer by image-transfer to expose a wire pattern; (8) thickening wires; (9) removing the photo-sensitive thin film; (10) removing the exposed second seed layer and retaining the thickened wires, thus form a desired conductive pattern; (11) repeating steps (1)-(10) to form an upper layer of wires, thereby completing the fabrication of the fine wires in the subsequent layers of wires and effecting inter-layer interconnections of the solid conductive vias. | 10-16-2008 |
