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SEAGATE TECHNOLOGY LLC

SEAGATE TECHNOLOGY LLC Patent applications
Patent application numberTitlePublished
20120137047MEMORY SANITATION USING BIT-INVERTED DATA - Method and apparatus for sanitizing a memory using bit-inverted data. In accordance with various embodiments, a memory location is sanitized by sequential steps of reading a bit value stored in a selected memory cell of the memory, inverting the bit value, and writing the inverted bit value back to the selected memory cell. The memory cell may be erased between the reading and writing steps, as well as after the writing step. Random bit values may be generated and stored to the memory cell, and run-length limited constraints can be used to force bit-inversions.05-31-2012
20120135159SYSTEM AND METHOD FOR IMPRINT-GUIDED BLOCK COPOLYMER NANO-PATTERNING - This disclosure describes a method for nano-patterning by incorporating one or more block copolymers and one or more nano-imprinting steps in the fabrication process. The block copolymers may be comprised of organic or organic components, and may be lamellar, spherical or cylindrical. As a result, a patterned medium may be formed having one-dimensional or two-dimensional patterns with a feature pitch of 5-100 nm and/or a bit density of at least 1 Tdpsi.05-31-2012
20120134200Magnetic Memory Cell With Multi-Level Cell (MLC) Data Storage Capability - Method and apparatus for writing data to a magnetic memory element, such as a spin-torque transfer random access memory (STRAM) memory cell. In accordance with various embodiments, a multi-level cell (MLC) magnetic memory cell stack has first and second magnetic memory elements connected to a first control line and a switching device connected to a second control line. The first memory element is connected in parallel with the second memory element, and the first and second memory elements are connected in series with the switching device. The first and second memory elements are further disposed at different non-overlapping elevations within the stack. Programming currents are passed between the first and second control lines to concurrently set the first and second magnetic memory elements to different programmed resistances.05-31-2012
20120134057Magnetic Element with Improved Stability - A magnetic element capable of detecting changes in magnetic states, such as for use as a read sensor in a data transducing head or as a solid-state non-volatile memory element. In accordance with various embodiments, the magnetic element includes a magnetically responsive stack or lamination with a first areal extent. The stack includes a spacer layer positioned between first and second ferromagnetic free layers. At least one antiferromagnetic (AFM) tab is connected to the first free layer on a surface thereof opposite the spacer layer, the AFM tab having a second areal extent that is less than the first areal extent.05-31-2012
20120127787SPIN-TRANSFER TORQUE MEMORY NON-DESTRUCTIVE SELF-REFERENCE READ METHOD - A method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage. The magnetic tunnel junction data cell has a first resistance state. Then the method includes applying a second read current thorough the magnetic tunnel junction data cell having the first resistance state. The first read current is less than the second read current. Then the first bit line read voltage is compared with the second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state.05-24-2012
20120127786FLUX PROGRAMMED MULTI-BIT MAGNETIC MEMORY - An apparatus and associated method for a non-volatile memory cell, such as a multi-bit magnetic random access memory cell. In accordance with various embodiments, a first magnetic tunnel junction (MTJ) is adjacent to a second MTJ having a magnetic filter. The first MTJ is programmed to a first logical state with a first magnetic flux while the magnetic filter absorbs the first magnetic flux to prevent the second MTJ from being programmed.05-24-2012
20120127785Using a Nearby Cell to Provide Field Assisted Switching in a Magnetic Memory Array - Method and apparatus for writing data to a magnetic memory cell, such as a spin-torque transfer random access memory (STRAM) memory cell. In accordance with various embodiments, a write current is applied through a selected magnetic memory cell to initiate magnetic precession of the selected cell to a desired magnetic state. A field assist current is concurrently flowed through an adjacent memory cell to generate a magnetic field that assists in the precession of the selected cell to the desired magnetic state.05-24-2012
20120127613SLIDER PAD FOR CONTACT MITIGATION - An apparatus and associated method for a slider pad that allows for contact to be mitigated without plastic deformation. Various embodiments of the present invention are generally directed to a slider that presents a transducer and has at least one air bearing surface (ABS) feature. The ABS feature comprises a pair of sidewalls spaced a distance X apart. A pad is deposited on the ABS feature so that the pad comprises a hemispherical cross-section and has a circumferential diameter greater than X.05-24-2012
20120124273Estimating Wear of Non-Volatile, Solid State Memory - Completion times of data storage operations targeted to a non-volatile, solid-state memory device are measured. Wear of the memory device is estimated using the measured completion times, and life cycle management operations are performed to affect subsequent wear of the memory device in accordance with the estimated wear. The life cycle management may include operations such as wear leveling, predicting an end of service life of the memory device, and removing worn blocks of the memory device from service.05-17-2012
20120120982Resistive Temperature Sensors for Improved Asperity, Head-Media Spacing, and/or Head-Media Contact Detection - A sensor supported by a head transducer has a temperature coefficient of resistance (TCR) and a sensor resistance. The sensor operates at a temperature above ambient and is responsive to changes in sensor-medium spacing. Conductive contacts connected to the sensor have a contact resistance and a cross-sectional area adjacent to the sensor larger than that of the sensor, such that the contact resistance is small relative to the sensor resistance and negligibly contributes to a signal generated by the sensor. A multiplicity of head transducers each support a TCR sensor and a power source can supply bias power to each sensor of each head to maintain each sensor at a fixed temperature above an ambient temperature in the presence of heat transfer changes impacting the sensors. A TCR sensor of a head transducer can include a track-oriented TCR sensor wire for sensing one or both of asperities of the medium.05-17-2012
20120120718Multi-Bit Magnetic Memory with Independently Programmable Free Layer Domains - An apparatus and associated method for a non-volatile memory cell, such as a multi-bit magnetic random access memory cell. In accordance with various embodiments, a magnetic tunnel junction (MTJ) has a ferromagnetic free layer with multiple magnetic domains that are each independently programmable to predetermined magnetizations. Those magnetizations can then be read as different logical states of the MTJ.05-17-2012
20120120713Asymmetric Write Current Compensation Using Gate Overdrive for Resistive Sense Memory Cells - Apparatus and associated method for asymmetric write current compensation for resistive sense memory (RSM) cells, such as but not limited to spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM) cells. In accordance with some embodiments, an RSM cell includes an RSM element coupled to a switching device. The switching device has a plurality of terminals. A control circuit compensates for asymmetric write characteristics of the RSM cell by limiting a range of voltage differentials across the terminals so as to be equal to or less than a magnitude of a source voltage applied to the switching device, thereby providing bi-directional write currents of substantially equal magnitude through the RSM element.05-17-2012
20120120708METHOD OF SWITCHING OUT-OF-PLANE MAGNETIC TUNNEL JUNCTION CELLS - A method of switching the magnetization orientation of a ferromagnetic free layer of an out-of-plane magnetic tunnel junction cell, the method including: passing an AC switching current through the out-of-plane magnetic tunnel junction cell, wherein the AC switching current switches the magnetization orientation of the ferromagnetic free layer.05-17-2012
20120120527Asperity and Head-Media Contact Detection Using Multi-Stage Temperature Coefficient of Resistance Sensor - A multi-stage sensor is situated on the head transducer and configured to interact with a magnetic recording medium. A first sensor stage of the multi-stage sensor has a temperature coefficient of resistance. A second sensor stage of the multi-stage sensor is coupled to the first sensor and has a temperature coefficient of resistance. The first sensor stage is configured to preferentially sense asperities of the media relative to the second sensor stage, and the second sensor stage configured to preferentially sense proximity to, and contact with, a surface of the media relative to the first sensor stage. The first and second sensor stages may be connected in series or in parallel.05-17-2012
20120120522Head Transducer with Multiple Resistance Temperature Sensors for Head-Medium Spacing and Contact Detection - A head transducer, configured to interact with a magnetic recording medium, includes a first sensor having a temperature coefficient of resistance (TCR) and configured to produce a first sensor signal, and a second sensor having a TCR and configured to produce a second sensor signal. One of the first and second sensors is situated at or near a close point of the head transducer in relation to the magnetic recording medium, and the other of the first and second sensors spaced away from the close point. Circuitry is configured to combine the first and second sensor signals and produce a combined sensor signal indicative of one or both of a change in head-medium spacing and head-medium contact. Each of the sensors may have a TCR with the same sign (positive or negative) or each sensor may have a TCR with a different sign.05-17-2012
20120120519Resistance Temperature Sensors for Head-Media and Asperity Detection - A temperature sensor of a head transducer measures temperature near or at the close point. The measured temperature varies in response to changes in spacing between the head transducer and a magnetic recording medium. A detector is coupled to the temperature sensor and is configured to detect a change in a DC component of the measured temperature indicative of onset of contact between the head transducer and the medium. Another head transducer configuration includes a sensor having a sensing element with a high temperature coefficient of resistance to interact with asperities of the medium. Electrically conductive leads are connected to the sensing element and have a low temperature coefficient of resistance relative to that of the sensing element, such thermally induced resistance changes in the leads have a negligible effect on a response of the sensing element to contact with the asperities.05-17-2012
20120119313Memory Cell With Phonon-Blocking Insulating Layer - An apparatus and associated method for a non-volatile memory cell with a phonon-blocking insulating layer. In accordance with various embodiments, a magnetic stack has a tunnel junction, ferromagnetic free layer, pinned layer, and an insulating layer that is constructed of an electrically and thermally insulative material that blocks phonons while allowing electrical transmission through at least one conductive feature.05-17-2012
20120113541Magneto-Elastic Anisotropy Assisted Thin Film Structure - A method includes activating a stress-effecting layer of a thin film structure, having the stress effecting layer adjacent to a magnetic layer, to induce a magneto-elastic anisotropy in the magnetic layer.05-10-2012
20120113539SKEW COMPENSATION SIGNAL - The relative trajectory of a transducer head over bit-patterned media (BPM) may be skewed with respect to a down-track direction on the media (i.e., skew error). In order to resolve the skew error, the presently disclosed technology measures the skew error without adding additional patterning on the media. A detector circuit detects a sequential series of data bits on a storage media. The sequential series of data bits alternate between at least two tracks on the storage media. The sequential series of data bits are sent to a timing circuit, which sets a time stamp indicating when each data bit is received using, for example, a delay chain or a voltage ramp. A time elapsed between receiving a first data bit, a second data bit, and a third data bit is tracked. Transducer head skew is adjusted based on a signal containing the time elapsed between the bits.05-10-2012
20120113207DETECTION SYSTEM USING HEATING ELEMENT TEMPERATURE OSCILLATIONS - A data storage system includes a recording head and a compensating resistor. The recording head has a heating element. The compensating resistor is in electrical series with the heating element and is external to the recording head. A method includes applying an alternating current at a first angular frequency to a recording head. A voltage drop across the recording head heating element is measured. A component of the voltage drop is extracted. The component has a frequency that is three times the frequency of the first angular frequency.05-10-2012
20120111952Field Assisted Switching of a Magnetic Memory Element - Method and apparatus for writing data to a magnetic memory element, such as a spin-torque transfer random access memory (STRAM) memory cell. In accordance with various embodiments, a write current is applied through a magnetic memory element to initiate magnetic precession of the element to a desired magnetic state. A flow of a field assist current is subsequently initiated adjacent the magnetic memory element during continued application of the write current to induce a magnetic field upon the element. The field assist current persists after the write current is terminated to provide field assisted precession to the desired magnetic state.05-10-2012
20120110258STORAGE DEVICE CACHE - Implementations described and claimed herein provide a method and system for comparing a storage location related to a new write command on a storage device with storage locations of a predetermined number of write commands stored in a first table to determine frequency of write commands to the storage location. If the frequency is determined to be higher than a first threshold, the data related to the write command is stored in a write cache.05-03-2012
20120110239Causing Related Data to be Written Together to Non-Volatile, Solid State Memory - A first write request that is associated with a first logical address is received via a collection of write requests targeted to a non-volatile, solid state memory. It is determined whether the logical address is related to logical addresses of one or more other write requests of the collection that are not proximately ordered with the first write request in the collection. In response to this determination, the first write request and the one or more other write requests are written together to the memory.05-03-2012
20120106241SPIN-TRANSFER TORQUE MEMORY SELF-REFERENCE READ METHOD - A spin-transfer torque memory apparatus and self-reference read schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage, the magnetic tunnel junction data cell having a first resistance state and storing the first bit line read voltage in a first voltage storage device. Then applying a low resistance state polarized write current through the magnetic tunnel junction data cell, forming a low second resistance state magnetic tunnel junction data cell. A second read current is applied through the low second resistance state magnetic tunnel junction data cell to forming a second bit line read voltage. The second bit line read voltage is stored in a second voltage storage device. The method also includes comparing the first bit line read voltage with the second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state.05-03-2012
20120106240COMPOUND CELL SPIN-TORQUE MAGNETIC RANDOM ACCESS MEMORY - A compound magnetic data storage cell, applicable to spin-torque random access memory (ST-RAM), is disclosed. A magnetic data storage cell includes a magnetic storage element and two terminals communicatively connected to the magnetic storage element. The magnetic storage element is configured to yield any of at least three distinct magnetoresistance output levels, corresponding to stable magnetic configurations, in response to spin-momentum transfer inputs via the terminals.05-03-2012
20120106239Magnetic Memory Element With Multi-Domain Storage Layer - An apparatus and method for enhancing data writing and retention to a magnetic memory element, such as in a non-volatile data storage array. In accordance with various embodiments, a programmable memory element has a reference layer and a storage layer. The reference layer is provided with a fixed magnetic orientation. The storage layer is programmed to have a first region with a magnetic orientation antiparallel to said fixed magnetic orientation, and a second region with a magnetic orientation parallel to said fixed magnetic orientation. A thermal assist layer may be incorporated into the memory element to enhance localized heating of the storage layer to aid in the transition of the first region from parallel to antiparallel magnetic orientation during a write operation.05-03-2012
20120106001SHIELD WITH WINE GLASS SHAPED CAVITY - A write element for magnetic recording includes a main pole and a shield. The main pole has first and second sides with respect to a down-track direction. The shield at least partially surrounds the main pole with a continuously concave inner sidewall. The angle between the inner sidewall of the shield and the direction of motion of the write element is greater than the angle between the sides of the main pole and the direction of motion.05-03-2012
20120105096Assessing Connection Joint Coverage Between a Device and a Printed Circuit Board - The present disclosure relates to assessing coverage of a connection joint, such as a solder joint, between a device and a printed circuit board (PCB). In accordance with various embodiments, a PCB includes a conductive thermal pad adapted to be electrically and mechanically connected to an exposed pad of a component by an intervening connection joint to establish a thermal path to dissipate thermal energy from the component. An isolated test via that extends through the conductive thermal pad in non-contacting relation thereto, the test via adapted to mechanically and electrically contact said intervening connection joint. A coverage characteristic of the intervening connection joint can be determined in relation to application of an electrical signal to the test via.05-03-2012
20120104522MAGNETIC TUNNEL JUNCTION CELLS HAVING PERPENDICULAR ANISOTROPY AND ENHANCEMENT LAYER - A magnetic tunnel junction cell that includes a ferromagnetic free layer; an enhancement layer having a thickness of at least about 15 Å; an oxide barrier layer; and a ferromagnetic reference layer, wherein the enhancement layer and the oxide barrier layer are positioned between the ferromagnetic reference layer and ferromagnetic free layer and the oxide barrier layer is positioned adjacent the ferromagnetic reference layer, and wherein the ferromagnetic free layer, the ferromagnetic reference layer, and the enhancement layer all have magnetization orientations that are out-of-plane05-03-2012
20120104349PROGRAMMABLE RESISTIVE MEMORY CELL WITH SACRIFICIAL METAL - Programmable metallization memory cells include an electrochemically active electrode and an inert electrode and an ion conductor solid electrolyte material between the electrochemically active electrode and the inert electrode. A sacrificial metal is disposed between the electrochemically active electrode and the inert electrode. The sacrificial metal has a more negative standard electrode potential than the filament forming metal.05-03-2012
20120104348PROGRAMMABLE METALLIZATION MEMORY CELLS VIA SELECTIVE CHANNEL FORMING - Methods for making a programmable metallization memory cell are disclosed.05-03-2012
20120102297Storing Corresponding Data Units in a Common Storage Unit - A storage device controller may segregate data units that are typically accessed together to a common storage unit. In one example, a storage device includes a control unit configured to receive a plurality of logical blocks to be stored in the storage device, wherein a first set of addresses comprises logical block addresses (LBAs) of the plurality of logical blocks, and a non-volatile memory configured to store logical blocks in a plurality of storage units, wherein one of the plurality of storage units includes logical blocks corresponding to a second set of addresses. The control unit may determine an intersection of the first set of addresses with the second set of addresses and to store each of the logical blocks having LBAs in the determined intersection of addresses in a common storage unit of the storage device, wherein the common storage unit comprises one of the plurality of storage units.04-26-2012
20120102281STORAGE DEVICE WITH MANUAL LEARNING - In a particular embodiment, a system is disclosed that includes a controller to read data from and write data to a first storage medium. The controller is adapted to monitor logical block addresses (LBAs) of each read operation from the first storage medium and to selectively store files associated with the monitored LBAs that are less than a predetermined length at a second storage medium to enhance performance of applications associated with the LBAs.04-26-2012
20120102276Storing Corresponding Data Units in a Common Storage Unit - A storage device controller may segregate data units that are typically accessed together to a common storage unit. In one example, a storage device includes a control unit configured to receive a plurality of logical blocks to be stored in the storage device, wherein a first set of addresses comprises logical block addresses (LBAs) of the plurality of logical blocks, and a non-volatile memory configured to store logical blocks in a plurality of storage units, wherein one of the plurality of storage units includes logical blocks corresponding to a second set of addresses. The control unit may determine an intersection of the first set of addresses with the second set of addresses and to store each of the logical blocks having LBAs in the determined intersection of addresses in a common storage unit of the storage device, wherein the common storage unit comprises one of the plurality of storage units.04-26-2012
20120102259Predictive Read Channel Configuration - The read channel of a solid state non-volatile memory may be configured to compensate for shifts in the threshold voltages of memory cells of the memory. A log of write time information and write temperature information from one or more write operations is stored in a data unit header. The read channel configuration, which may include reference voltages used for the read operation, is determined using the write time information and the write temperature information. Memory cells of the data unit are read using the configured read channel. A historical profile spanning multiple write operations may also be developed and used to configure the read channel.04-26-2012
20120100287LAMINAR FLOW PLATING RACK - A plating apparatus includes a vessel and a rack operable to be positioned inside the vessel. The rack includes a number of mandrels including a number of substrate mounting surfaces. The number of mandrels is non-revolving with respect to the rack. The rack further includes a number of gears coupled with the number of mandrels. A partition separates the number of gears from the number of mandrels. A diffuser is positioned below the rack. The diffuser is operable to produce a substantially uniform laminar flow of a fluid from a bottom to a top of the vessel. Thus, the laminar flow may reduce dead zones in the bath and remove defect-causing particles and gases away from the substrate.04-26-2012
20120099407METHOD AND APPARATUS FOR COUPLING A LASER DIODE TO A MAGNETIC WRITER - A write head includes a cavity configured to couple a laser diode to the write head. A bottom of the cavity includes a heat conductive element configured to contact the laser diode, a plurality of thermal studs disposed below the heat conductive element, and a substrate disposed below the thermal studs. The heat conductive element, thermal studs, and substrate are thermally coupled to draw heat from the laser diode.04-26-2012
20120099226COMPACT MICROACTUATOR HEAD ASSEMBLY - Method and apparatus for a head gimbal assembly (HGA) which incorporates a microactuator. In accordance with various embodiments, a gimbal assembly has a gimbal island disposed within an aperture of a gimbal plate, which is mechanically decoupled from the gimbal island. At least one microactuator element is attached between the gimbal island and the gimbal plate to allow rotation of the gimbal island independent of the gimbal plate. The gimbal assembly is suspended from a dimple which extends from the gimbal island.04-26-2012
20120099224SLIDER FOR A HEAD GIMBAL ASSEMBLY WITH AN INVERTED DIMPLE - Apparatus and method for forming a head gimbal assembly (HGA). In accordance with various embodiments, a slider is formed with opposing first and second side surfaces, an air bearing feature on said first side surface and a dimple extending from said second side surface adapted to facilitate multi-axial rotation of the slider.04-26-2012
20120087607RESTRAINING MOTOR SHAFT PLAY - An apparatus and associated method characterized by an enclosure having a side member that defines a substantially orthogonally directed cavity penetrating the side member. A motor shaft in the enclosure has a distal end that is operably aligned with the cavity. A shear transfer member in the enclosure is operably affixed to the motor shaft. One of the shaft and the shear transfer member is sized for a close mating engagement with the side member in the cavity, and the shear transfer member is further sized for being simultaneously shear coupled to the side member.04-12-2012
20120087186MULTI-BIT MEMORY WITH SELECTABLE MAGNETIC LAYER - An apparatus and associated method for a multi-bit memory capable of being selected with a magnetic layer. Various embodiments of the present invention are generally directed to a first selection layer with a low coercivity that is disposed between first and second storage layers that each have a high coercivity. In response to magnetic saturation of the first selection layer, programming of a logical state to the second storage layer is allowed.04-12-2012
20120087175Asymmetric Write Current Compensation - An apparatus and method for compensating for asymmetric write current in a non-volatile unit cell. The unit cell comprises a switching device and an asymmetric resistive sense element (RSE), such as an asymmetric resistive random access memory (RRAM) element or an asymmetric spin-torque transfer random access memory (STRAM) element. The RSE is physically oriented within the unit cell relative to the switching device such that a hard direction for programming the RSE is aligned with an easy direction of programming the unit cell, and an easy direction for programming the RSE is aligned with a hard direction for programming the unit cell.04-12-2012
20120082866PATTERNED TEMPLATE WITH 1xN NUCLEATION SITE TO GRAIN GROWTH FOR UNIFORM GRAIN SIZE RECORDING MEDIA - A perpendicular magnetic media includes a substrate, a patterned template, a seed layer and a magnetic layer. The patterned template is formed on the substrate and includes a plurality of growth sites that are evenly spaced apart from each other. The seed layer is formed over the patterned template and the exposed areas of the substrate. Magnetic material is sputter deposited onto the seed layer with one grain of the magnetic material nucleated over each of the growth sites. The grain size distribution of the magnetic material is reduced by controlling the locations of the growth sites which optimizes the performance of the perpendicular magnetic media.04-05-2012
20120081951NON-VOLATILE MEMORY WITH STRAY MAGNETIC FIELD COMPENSATION - A method and apparatus for stray magnetic field compensation in a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM). In some embodiments, a first tunneling barrier is coupled to a reference structure that has a perpendicular anisotropy and a first magnetization direction. A recording structure that has a perpendicular anisotropy is coupled to the first tunneling barrier and a nonmagnetic spacer layer. A compensation layer that has a perpendicular anisotropy and a second magnetization direction in substantial opposition to the first magnetization direction is coupled to the nonmagnetic spacer layer. Further, the memory cell is programmable to a selected resistance state with application of a current to the recording structure.04-05-2012
20120080725VERTICAL TRANSISTOR MEMORY ARRAY - A method includes providing a semiconductor wafer having a plurality of pillar structures extending orthogonally from the semiconductor wafer. An electrically conducting interconnect element is deposited onto at least selected vertical pillar transistors and a non-volatile variable resistive memory cell is deposited onto the electrically conducting interconnect layer to form a vertical transistor memory array.04-05-2012
20120080402PLANARIZATION METHOD FOR MEDIA - A planarization process may planarize a media disk that has data trenches between data features and larger servo trenches between servo features. A filler material layer is deposited on the media disk and provides step coverage of the trenches. The filler material has data recesses over the data trenches and servo recesses over the servo trenches that must be removed to produce a planar media surface. A first planarization process is used to remove the data recesses and a second planarization process is used to remove the servo recesses.04-05-2012
20120080317ELECTRODEPOSITION OF CoNiP FILMS - A method of forming CoNiP on a substrate that includes the steps of placing a substrate in an electroplating bath, the electroplating bath containing an electroplating composition, the electroplating composition including: a nickel source; a cobalt source; and at least about 0.1 M phosphorus source; and applying a deposition current to the substrate, wherein application of the deposition current to the substrate will cause a CoNiP layer having a thickness of at least about 500 nanometers to be electrodeposited on the substrate.04-05-2012
20120079635METHODS AND DEVICES FOR CORRECTING ERRORS IN ATOMIC FORCE MICROSCOPY - In certain embodiments, a probe scans a surface to produce a first scan. The first scan is used to estimate a vertical offset for scanning the surface to produce a second scan. In certain embodiments, an AFM device engages a probe to a surface using a piezo voltage. The probe scans the surface to produce a first scan. The first scan is used to estimate a vertical offset such that the probe uses the piezo voltage to engage the surface for a second scan at a different vertical position.03-29-2012
20120079355OPPORTUNISTIC DECODING IN MEMORY SYSTEMS - Approaches for decoding data read from memory cells of a nonvolatile, solid state memory involve attempting to decode hard data using a hard decoding process prior to a time that soft data is available to the decoder. The hard data includes information about the digital symbols stored in the memory cells without data confidence information. The soft data includes information about the digital symbols stored in the memory cells and data confidence information. In response to the hard decoding process failing to achieve convergence, after the soft data becomes available to the decoder, the soft data is decoded using a soft decoding process. The decoder generates an output of the decoded data after the hard decoding process or the soft decoding process achieves convergence.03-29-2012
20120079288SECURE HOST AUTHENTICATION USING SYMMETRIC KEY CRYTOGRAPHY - Methods of securely authenticating a host to a storage system are provided. A series of authentication sessions are illustratively performed. Each of the authentication sessions includes the host transmitting an authentication request to the storage system. The storage system authenticates the host based at least in part upon a content of the authentication request. After each successful authentication of the host to the storage system, an encryption key that was utilized in encrypting the authentication request that was transmitted to the storage system is deleted. After each encryption key deletion, a new encryption key that is different than the previous key is optionally stored and is utilized in the next authentication session.03-29-2012
20120075930REUSE OF INFORMATION FROM MEMORY READ OPERATIONS - A nominal reference read operation compares analog voltages of the memory cells to at least one nominal reference voltage. A shifted reference read operation compares the analog voltages of the memory cells to at least one shifted reference voltage that is shifted from the nominal reference voltage to compensate for an expected change in the analog voltages of the memory cells. Data stored in the memory cells is decoded by a first decoding process that uses the information from either the nominal reference read operation or the shifted reference read operation. The data stored in the memory cells is decoded by a second decoding process that uses the information from both the nominal reference read operation and the shifted reference read operation.03-29-2012
20120075748PERPENDICULAR WRITE HEAD WITH LAMINATED SIDE SHIELDS - A perpendicular write head, the write head having an air bearing surface, the write head including a magnetic write pole, wherein at the air bearing surface, the write pole has a trailing side, a leading side that is opposite the trailing side, and first and second sides; side gaps, wherein the side gaps are proximate the write pole along the first and second side edges; and side shields proximate the side gaps, wherein the side shields have gap facing surfaces and include at least one set of alternating layers of magnetic and non-magnetic materials, wherein only one kind of material makes up the gap facing surfaces at the air bearing surfaces.03-29-2012
20120074488VERTICAL TRANSISTOR WITH HARDENING IMPLATATION - A method includes providing a semiconductor wafer having a plurality of pillar structures extending orthogonally from the semiconductor wafer. Each pillar structure forms a vertical pillar transistor having a top surface and a side surface orthogonal to the top surface. Then a hardening species is implanted into the vertical pillar transistor top surface. Then the vertical pillar transistor side surface is oxidized to form a side surface oxide layer. The side surface oxide layer is removed to form vertical pillar transistor having rounded side surfaces.03-29-2012
201200744663D MEMORY ARRAY WITH VERTICAL TRANSISTOR - A memory array includes a base circuitry layer and a plurality of memory array layers stacked sequentially to form the memory array. Each memory array layer is electrically coupled to the base circuitry layer. Each memory array layer includes a plurality of memory units. Each memory unit includes a vertical pillar transistor electrically coupled to a memory cell.03-29-2012
20120074131INTEGRATED RESISTIVE HEATERS FOR MICROELECTRONIC DEVICES AND METHODS UTILIZING THE SAME - A device having a substrate having a first surface and a second opposing surface; and at least one electrical connection assembly, wherein each electrical connection assembly includes: a resistive heater disposed on the first surface of the substrate, wherein the resistive heater is electrically connected to a circuit via a heater electrical connection; an electrical connection precursor, wherein the electrical connection precursor includes a fusible conductive material that is electrically connected to a lead; and a first insulating layer, wherein the resistive heater is disposed beneath the electrical connection precursor, wherein the first insulating layer functions to electrically insulate the resistive heater and the heater electrical connection from the electrical connection precursor and the lead, and wherein activation of the resistive heater functions to at least partially flow the fusible conductive material, wherein each electrical connection assembly can be activated individually by passing a current through the resistive heater.03-29-2012
20120072639Selection of Units for Garbage Collection in Flash Memory - A data structure is formed that references a garbage collection metric for each of a plurality of associated garbage collection units of a flash memory device. Each garbage collection metric is based on one or more device state characteristics of the associated garbage collection unit. In response to a threshold change in the one or more device state variables, a region of interest within the data structure is sorted based on the garbage collection metrics. One or more garbage collection units are selected for garbage collection operations from the sorted region of interest.03-22-2012
20120070694Perpendicular Media with Cr-Doped Fe-Alloy Containing Soft Underlayer (SUL) - A perpendicular magnetic recording medium having a substrate, a Cr-doped Fe-alloy-containing underlayer containing about 8 to 18 at % Cr and a perpendicular recording magnetic layer, and a process for improving corrosion resistance of the recording medium and for manufacturing the recording medium are disclosed.03-22-2012
20120069995CONTROLLER CHIP WITH ZEROIZABLE ROOT KEY - The present invention is a data storage device that includes a control chip with a zeroizable root key. In one embodiment, the control chip comprises a digital memory, the zeroizable root key being a derived root key obtained by applying a firmware root key to a different root key stored within the digital memory such that the setting of each bit of the different root key is locked.03-22-2012
20120069630WRITE VERIFY METHOD FOR RESISTIVE RANDOM ACCESS MEMORY - Write verify methods for resistance random access memory (RRAM) are provided. The methods include applying a reset operation voltage pulse across a RRAM cell to change a resistance of the RRAM cell from a low resistance state to a high resistance state and applying a forward resetting voltage pulse across the RRAM cell if the RRAM cell has a high resistance state resistance value less than a selected lower resistance limit value. The method also includes applying a reverse resetting voltage pulse across the RRAM cell if the RRAM cell has a high resistance state resistance values is greater than a selected upper resistance limit value. The reverse resetting voltage pulse has a second polarity being opposite the first polarity.03-22-2012
20120068564HYDRODYNAMIC DISC DRIVE SPINDLE MOTOR HAVING HYDRO BEARING WITH LUBRICANT - A lubricating fluid contains a synthetic ester base fluid having a viscosity index of at least 110, from 0.01% to 5% by weight, based on the total weight of the lubricating fluid, of at least one tri-C03-22-2012
20120063031Tranducing head writer having write pole bridge feature, and devices thereof - A transducing head writer comprising a write pole having write pole tip, a yoke disposed on the write pole at a location that is recessed from the write pole tip, and a bridge feature disposed on the write pole between the yoke and the write pole tip, where the bridge feature has a geometry that is larger at a recessed end adjacent to the yoke compared to a proximate end adjacent to the write pole tip.03-15-2012
20120063027BIT PATTERNED MAGNETIC STORAGE MEDIUM - A magnetic storage medium comprises a plurality of discrete magnetic elements and first and second adjoining servo sectors. Each of the servo sectors comprises first and second rows of the discrete magnetic elements extending in a track direction. The second row of the discrete magnetic elements are stacked relative to the discrete magnetic elements of the first row in a cross-track direction that is perpendicular to the track direction. The discrete magnetic elements of the first servo sector are staggered in the cross-track direction relative to the discrete magnetic elements of the second servo sector.03-15-2012
20120061783MEMORY CELL WITH RADIAL BARRIER - Magnetic tunnel junction cells and methods of making magnetic tunnel junction cells that include a radially protective layer extending proximate at least the ferromagnetic free layer of the cell. The radially protective layer can be specifically chosen in thickness, deposition method, material composition, and/or extent along the cell layers to enhance the effective magnetic properties of the free layer, including the effective coercivity, effective magnetic anisotropy, effective dispersion in magnetic moment, or effective spin polarization.03-15-2012
20120058312THERMAL COMPENSATED STAMPERS/IMPRINTERS - A method of manufacturing a stamper/imprinter for patterning a recording medium via thermally assisted nano-imprint lithography, comprising steps of: selecting a recording medium for patterning, comprising a substrate with a first coefficient of thermal expasnsion (CTE); providing a first stamper/imprinter comprising a topographically patterned surface having a correspondence to a selected pattern to be formed in a surface of the medium; providing a sheet of a material having a second CTE matching the first CTE; molding a layer of a polymeric material surrounding the sheet of material and having a surface in conformal contact with the topographically patterned surface of the first stamper/imprinter; and separating the layer of polymeric material from the patterned surface of the first stamper/imprinter to form a second stamper/imprinter comprising a topographically patterned stamping/imprinting surface having a correspondence to the selected pattern.03-08-2012
20120057440Grating For VCSEL Coupling To A Heat Assisted Magnetic Recording Head - An apparatus includes a waveguide including a core layer having curved edges shaped to reflect light to a focal point, and a grating positioned adjacent to or imbedded in the core layer, wherein at least a portion of the grating is positioned between the curved edges and adjacent to or imbedded in a portion of the core layer that is not traversed by light reflected from the curved edges. A data storage device that includes the apparatus is also provided.03-08-2012
20120045969POLISHING AMORPHOUS/CRYSTALLINE GLASS - An apparatus and associated method for polishing a workpiece with a polishing slurry having ceria particulates and silica particulates.02-23-2012
20120045662Recording Head For Heat Assisted Magnetic Recording With Diffusion Barrier Surrounding A Near Field Transducer - An apparatus includes a near field transducer positioned adjacent to an air bearing surface, a first magnetic pole, a heat sink positioned between the first magnetic pole and the near field transducer, and a diffusion barrier positioned between the near field transducer and the first magnetic pole. The diffusion barrier can be positioned adjacent to the magnetic pole or the near field transducer.02-23-2012
20120044967Capping Method For Laser Diode Protection - A method includes: positioning a laser in the cavity in an end of a slider, wherein the laser has an output facet positioned adjacent to a first wall of the cavity to define a first gap between the output facet and the first wall of the cavity, and filling at least a portion of the first gap adjacent to the output facet. An apparatus including a slider including a cavity in a trailing end of the slider, a laser positioned in the cavity and having an output facet positioned adjacent to a first wall of the cavity to define a first gap between the output facet and the first wall of the cavity, and a sealing material filling at least a portion of the first gap adjacent to the output facet is also provided.02-23-2012
20120044593TEMPERATURE INDUCED HEAD SKEW - One way to minimize full DC head-skew re-calibrations rendered necessary by changes in storage media drive operating temperature is to compensate for temperature-induced DC head-skew using a known relationship between temperature-induced DC head-skew and storage media operating temperature. More specifically, a first DC head-skew is measured at a first arbitrary temperature of the storage media drive. A second DC head-skew is measured at a second arbitrary temperature of the storage media drive. A DC head-skew correction factor is calculated using the first and second DC head-skews at the first and second arbitrary temperatures. When a multi-head storage media drive is powered-up for operation, a temperature sensor located in the storage media drive assembly measures the current storage media drive temperature. The head-skew correction factor is applied based on the measured temperature to correct the DC head-skew.02-23-2012
20120042422VARIABLE PIXEL DENSITY IMAGING - A method and associated apparatus for topographically characterizing a workpiece. The workpiece is scanned with a scanning probe along a first directional grid, thereby scanning a reference surface and an area of interest subportion of the reference surface, at a variable pixel density including a first pixel density outside the area of interest and a second pixel density inside the area of interest to derive a first digital file characterizing topography of the workpiece. The workpiece is further scanned along the reference surface and the area of interest with the scanning probe along a second directional grid that is substantially orthogonal to the first directional grid and at a constant pixel density to derive a second digital file characterizing topography of the workpiece. A processor executes computer-readable instructions stored in memory that generate a topographical profile of the workpiece in relation to the first and second digital files.02-16-2012
20120042182FORCED IDLE CACHE - An interface controller of an electronic device manages power consumption of the electronic device by caching data associated with write commands received while the electronic device is in an idle mode. In one implementation, an interface controller directs write commands to a write cache until disc access is required. Additionally, the interface controller may direct write commands to the write cache until the write cache becomes full or a non-cached read command is received. Once, disc access is required, the data associated with the cached commands are flushed to the hard disc. In one implementation, the interface controller transitions the electronic device to a lower power state and maintains the electronic device in the lower power state until disc access is required. When disc access is required, the interface controller transitions the electronic device to a higher power state.02-16-2012
20120040496PROGRAMMABLE RESISTIVE MEMORY CELL WITH OXIDE LAYER - Programmable metallization memory cells include an electrochemically active electrode and an inert electrode and an ion conductor solid electrolyte material between the electrochemically active electrode and the inert electrode. An electrically insulating oxide layer separates the ion conductor solid electrolyte material from the electrochemically active electrode.02-16-2012
20120039155Hybrid Near-Field Transducer For Heat Assisted Magnetic Recording - An apparatus includes a planar waveguide having a core layer and a cladding layer adjacent to the core layer, the waveguide being shaped to direct light to a focal point; a magnetic pole adjacent to the cladding layer; and a near-field transducer positioned adjacent to the focal point, wherein the near-field transducer includes an enlarged portion and a peg having a first end positioned adjacent to an end of the waveguide and a second end positioned adjacent to a side of the enlarged portion. A data storage device that includes the apparatus is also provided.02-16-2012
20120039115STRAM WITH COMPOSITE FREE MAGNETIC ELEMENT - Spin-transfer torque memory includes a composite free magnetic element, a reference magnetic element having a magnetization orientation that is pinned in a reference direction, and an electrically insulating and non-magnetic tunneling barrier layer separating the composite free magnetic element from the magnetic reference element. The free magnetic element includes a hard magnetic layer exchanged coupled to a soft magnetic layer. The composite free magnetic element has a magnetization orientation that can change direction due to spin-torque transfer when a write current passes through the spin-transfer torque memory unit.02-16-2012
20120039113THREE DIMENSIONALLY STACKED NON VOLATILE MEMORY UNITS - A memory unit including a first transistor spanning a first transistor region in a first layer of the memory unit; a second transistor spanning a second transistor region in a second layer of the memory unit; a first resistive sense memory (RSM) cell spanning a first memory region in a third layer of the memory unit; and a second RSM cell spanning a second memory region in the third layer of the memory unit, wherein the first transistor is electrically coupled to the first RSM cell, and the second transistor is electrically coupled to the second RSM cell, wherein the second layer is between the first and third layers, wherein the first and second transistor have an transistor overlap region, and wherein the first memory region and the second memory region do not extend beyond the first transistor region and the second transistor region.02-16-2012
20120039112Hierarchical Cross-Point Array of Non-Volatile Memory - A method and apparatus for reading data from a non-volatile memory cell. In some embodiments, a cross-point array of non-volatile memory cells is arranged into rows and columns. A selection circuit is provided that is capable of activating the first block of memory cells while deactivating the second block of memory cells. Further, a read circuit is provided that is capable of reading a logical state of a predetermined memory cell in the first block of memory cells with a reduced leak current by programming a first resistive state to the block selection elements corresponding to the first block of memory cells while programming a second resistive state to the block selection elements corresponding to the second block of memory cells.02-16-2012
20120039111POLARITY DEPENDENT SWITCH FOR RESISTIVE SENSE MEMORY - A memory unit includes a resistive sense memory cell configured to switch between a high resistance state and a low resistance state upon passing a current through the resistive sense memory cell and a semiconductor transistor in electrical connection with the resistive sense memory cell. The semiconductor transistor includes a gate element formed on a substrate. The semiconductor transistor includes a source contact and a bit contact. The gate element electrically connects the source contact and the bit contact. The resistive sense memory cell electrically is connected to the bit contact. The source contact is more heavily implanted with dopant material then the bit contact.02-16-2012
20120037875MIRRORED-GATE CELL FOR NON-VOLATILE MEMORY - A memory comprising at least one memory cell operationally connected to a bit line, a source line and a word line. The memory cell comprises a substrate having a first source contact, a second source contact, and a bit contact between the first source contact and the second source contact, a first transistor gate electrically connecting the first source contact and the bit contact and a second transistor gate electrically connecting the bit contact and the second source contact. The word line electrically connects the first transistor gate to the second transistor gate.02-16-2012
20120036674COLLECTING DEBRIS FROM A TOOL - An apparatus and associated method are provided for collecting debris from a tool. A housing defines a channel, at least one of the tool and the housing being selectively movable to operably orient the tool at a predefined reference relationship to the channel. A magnetic member is operable to demagnetize at least one of the tool and the debris. A windage source in fluid communication with the channel is operable to establish a windage contacting the tool to cooperate with the magnetic member in removing the debris from the tool. A conduit connected to the channel collects the removed debris.02-16-2012
20120036328DYNAMIC CACHE REDUCTION UTILIZING VOLTAGE WARNING MECHANISM - An interface controller of a storage device configured to manage a write cache of the storage device responsive to changes in a voltage supply provided to the storage device. In one implementation, the interface controller reduces the size of the write cache responsive to the voltage supply dropping at or below a first threshold. The interface controller further disables write permissions to the write cache responsive the voltage supply dropping at or below a second threshold, wherein the second threshold is lower in magnitude that the first threshold. The interface controller periodically receives the voltage supply responsive to transmitting sequential requests to a servo firmware of the storage device.02-09-2012
20120036312Wear Leveling Technique for Storage Devices - A method for managing wear levels in a storage device having a plurality of data blocks, the method comprising moving data to data blocks having higher erasure counts based on a constraint on static wear levelness that tightens over at least a portion of the lives of the plurality of data blocks.02-09-2012
20120033482Bit Set Modes for a Resistive Sense Memory Cell Array - Various embodiments of the present invention are generally directed to a method and apparatus for providing different bit set modes for a resistive sense memory (RSM) array, such as a spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM) array. In accordance with some embodiments, a group of RSM cells in a non-volatile semiconductor memory array is identified for application of a bit set operation. A bit set value is selected from a plurality of bit set values each separately writable to the RSM cells to place said cells in a selected resistive state. The selected bit set value is thereafter written to at least a portion of the RSM cells in the identified group.02-09-2012
20120032131PROGRAMMABLE RESISTIVE MEMORY CELL WITH OXIDE LAYER - Programmable metallization memory cells include an electrochemically active electrode and an inert electrode and an ion conductor solid electrolyte material between the electrochemically active electrode and the inert electrode. An electrically insulating oxide layer separates the ion conductor solid electrolyte material from the electrochemically active electrode.02-09-2012
20120028078Perpendicular Magnetic Recording Media with Magnetic Anisotropy Gradient and Local Exchange Coupling - A perpendicular magnetic recording medium adapted for high recording density and high data recording rate comprises a non-magnetic substrate having at least one surface with a layer stack formed thereon, the layer stack including a perpendicular recording layer containing a plurality of columnar-shaped magnetic grains extending perpendicularly to the substrate surface for a length, with a first end distal the surface and a second end proximal the surface, wherein each of the magnetic grains has: (1) a gradient of perpendicular magnetic anisotropy field H02-02-2012
20120027326FLUID DYNAMIC BEARING MOTOR INCLUDING MOLDED PLASTIC - A fluid dynamic bearing motor and method are described, wherein motor components, including complex shaped motor components, are molded of plastic. The molding ensures form control and dimensional control thereby accomplishing design requirements, and eliminating or reducing component costs and component machining. The mold can be shaped to form various motor geometries, thereby eliminating the need for multiple component assembly and related assembly costs. In an aspect, a plastic integral motor hub is formed by injection molding. Alternatively, a plastic motor hub is affixed to a metal sleeve. In another aspect, fluid containment structures are molded into the motor component, reducing the number of components as compared with machined metal components. In a further aspect, bearing structures such as grooves are molded into the motor component, thereby eliminating processes such as electrochemical machining. In yet a further aspect, a plastic hub faces a thrustplate, reducing expensive sleeve machining.02-02-2012
20120026627MULTI-LAYER STACK ADJACENT TO GRANULAR LAYER - In some embodiments, an article comprising a first magnetic recording layer, the first magnetic recording layer including a granular layer having a first magnetic anisotropy and a multi-layer stack adjacent the granular layer, the multi-layer stack comprising one or more substantially magnetic film layers alternating with one or more polarization conductor layers, wherein the multi-layer stack has a second magnetic anisotropy that is greater than the first magnetic anisotropy.02-02-2012
20120026626APPARATUS INCLUDING A PERPENDICULAR MAGNETIC RECORDING LAYER HAVING A CONVEX MAGNETIC ANISOTROPY PROFILE - An apparatus may include a first magnetic layer, a first exchange break layer formed on the first magnetic layer, a second magnetic layer formed on the first exchange break layer, a second exchange break layer formed on the second magnetic layer, and a third magnetic layer formed on the second exchange break layer. The first magnetic layer has a first magnetic anisotropy energy, H02-02-2012
20120026625LAMINATED CONTACT PAD - A contact pad includes a first layer of material with a first yield strength and a second layer of material with a second yield strength is laminated to the first layer. A third yield strength of the laminated composite of the first layer and the second layer exceeds the first yield strength and the second yield strength due to the Hall-Petch phenomenon. An overcoat covers an edge of the first layer and the second layer of the contact pad to prevent wear. A method of creating the contact pad or other microelectronic structure includes depositing a first layer of material with a first yield strength on a substrate. A second layer of material with a second yield strength is deposited on the first layer. An edge of the first layer and the second layer is coated with an overcoat material to prevent wear of the first and second layers.02-02-2012
20120026624MAXIMIZING PERFORMANCE UNDER A POWER ENVELOPE CONSTRAINT - The present invention is a method of maximizing drive performance under any power constraint. In one embodiment, the method includes actively adjusting a seek power draw based on a comparison of real-time calculations of average seek power to a target power threshold.02-02-2012
20120025426METHOD AND SYSTEM FOR THERMAL IMPRINT LITHOGRAPHY - A method and apparatus of thermal imprint lithography includes moving an imprinter against a surface to be imprinted, supplying energy to a layer of heating material, and forming features in the surface to be imprinted. The imprinter comprises a main body and the layer of heating material under the main body. In an embodiment the layer of heating material is electrically heated. In alternate embodiments, the layer of heating material is optically heated.02-02-2012
20120025339MAGNETIC MEMORY WITH STRAIN-ASSISTED EXCHANGE COUPLING SWITCH - A magnetic tunnel junction cell having a free layer and first pinned layer with perpendicular anisotropy, the cell including a coupling layer between the free layer and a second pinned layer, the coupling layer comprising a phase change material switchable from an antiferromagnetic state to a ferromagnetic state. In some embodiments, at least one actuator electrode proximate the coupling layer transfers a strain from the electrode to the coupling layer to switch the coupling layer from the antiferromagnetic state to the ferromagnetic state. Memory devices and methods are also described.02-02-2012
20120023282Multi-Tier Address Mapping in Flash Memory - A user data portion of a flash memory arrangement is grouped into a plurality of mapping units. Each of the mapping units includes a user data memory portion and a metadata portion. The mapping units form a plurality of groups that are associated with at least one lower tier of a forward memory map. For each of the groups, a last written mapping unit within the group is determined. The last written mapping unit includes mapping data in the metadata portion that facilitates determining a physical address of other mapping units within the group. A top tier of the forward memory map is formed that includes at least physical memory locations of the last written mapping units of each of the groups. A physical address of a targeted memory is determined using the top tier and the metadata of the at least one lower tier.01-26-2012
20120023144Managing Wear in Flash Memory - At least two groupings are established for a plurality of erase units. The erase units include flash memory units that are available for writing subsequent to erasure. The groupings are based at least on a recent write frequency of data targeted for writing to the erase units. A wear criteria is determined for each of the erase units and the erase units are assigned to one of the respective groupings based on the wear criteria of the respective erase units and further based on a wear range assigned to each of the at least two groupings.01-26-2012
20120021535MAGNETIC STACK WITH OXIDE TO REDUCE SWITCHING CURRENT - A magnetic stack having a ferromagnetic free layer, a metal oxide layer that is antiferromagnetic at a first temperature and non-magnetic at a second temperature higher than the first temperature, a ferromagnetic pinned reference layer, and a non-magnetic spacer layer between the free layer and the reference layer. During a writing process, the metal oxide layer is non-magnetic. For magnetic memory cells, such as magnetic tunnel junction cells, the metal oxide layer provides reduced switching currents.01-26-2012
20120020195Transducer Assembly For Light Delivery - An apparatus having a transducer assembly that includes a waveguide having first and second cladding layers and a core layer between the first and second cladding layers, and a grating structured to couple electromagnetic radiation into the waveguide. The grating has a plurality of elongated slits that are substantially parallel to a longitudinal axis of the waveguide. The apparatus further has a light source mounted adjacent the waveguide to direct light onto the grating.01-26-2012
20120020148MULTI-BIT STRAM MEMORY CELLS - A multi-bit spin torque magnetic element that has a ferromagnetic pinned layer having a pinned magnetization orientation, a non-magnetic layer, and a ferromagnetic free layer having a magnetization orientation switchable among at least four directions, the at least four directions being defined by a physical shape of the free layer. The magnetic element has at least four distinct resistance states. Magnetic elements with at least eight magnetization directions are also provided.01-26-2012
20120018788MAGNETIC STACK WITH LAMINATED LAYER - A magnetic stack with a multilayer free layer having a switchable magnetization orientation, the free layer comprising a first ferromagnetic portion and a second ferromagnetic portion with an electrically conducting non-magnetic intermediate layer between the first portion and the second portion. The magnetic stack also includes a first ferromagnetic reference layer having a pinned magnetization orientation, a first non-magnetic spacer layer between the free layer and the first reference layer, a second ferromagnetic reference layer having a pinned magnetization orientation, and a second non-magnetic spacer layer between the free layer and the second reference layer.01-26-2012
20120017045MULTI-RESOLUTION CACHE MONITORING - Multi-resolution cache monitoring devices and methods are provided. Multi-resolution cache devices illustratively have a cache memory, an interface, an information unit, and a processing unit. The interface receives a request for data that may be included in the cache memory. The information unit has state information for the cache memory. The state information is organized in a hierarchical structure. The process unit searches the hierarchical structure for the requested data.01-19-2012
20120016533TEMPERATURE MONITORING SYSTEMS AND METHODS - This disclosure is related to systems and methods for temperature monitoring of electronics, such as a controller or processor within a data storage device. In one example, a controller may be configured to determine an operation to perform and determine a temperature of electronics associated with executing the operation. The controller may then delay execution of the operation when the temperature is greater than a threshold.01-19-2012
20120014175Magnetic Tunnel Junction and Memristor Apparatus - A magnetic memory device includes a magnetic tunnel junction having a free magnetic layer having a magnetization orientation that is switchable between a high resistance state magnetization orientation and a low resistance state magnetization orientation and a memristor solid state element electrically coupled to the magnetic tunnel junction. The memristor has a device response that is an integrated voltage versus an integrated current.01-19-2012
20120014168Dual Stage Sensing for Non-Volatile Memory - A method and apparatus for accessing a non-volatile memory cell. In some embodiments, a memory block provides a plurality of memory cells arranged into rows and columns. A read circuit is configured to read a selected row of the memory block by concurrently applying a control voltage to each memory cell along the selected row and, for each column, using a respective local sense amplifier and a column sense amplifier to successively differentiate a voltage across the associated memory cell in said column to output a programmed content of the row.01-19-2012
20120011376CIRCUIT FOR SUPPLEMENTING ELECTRICAL CURRENT TO A PERIPHERAL DEVICE - A data bus can supply power from a first power source to a sink device. The data bus is coupled to a second power source. An electrical current from the second power source supplements an electrical current on the data bus if the voltage on the data bus decreases to less than a threshold value.01-12-2012
20120011301DYNAMICALLY CONTROLLING AN OPERATION EXECUTION TIME FOR A STORAGE DEVICE - In general, this disclosure is directed to techniques for adjusting the timing of operations for a storage device. According to one aspect of the disclosure, a method includes receiving, with at least one device, a workload indicator. The method further includes adjusting, with the at least one device, an operation execution time for the storage device responsive to at least the workload indicator. In some examples, the workload indicator may include a host demand indicator. In additional examples, the workload indicator may include a resource utilization indicator. In further examples, the operation execution time may be one of a write operation execution time or a read operation execution time.01-12-2012
20120009856LAPPING A WORKPIECE - An apparatus and associated method for constructing an abrading tool having a desired surface texture for a lapping surface of the tool. The abrading tool has a platen defining an external surface and a cavity intersecting the external surface. An adhesive is disposed in the cavity. An abrasive member is adhered at a proximal end thereof to the platen in the cavity by the adhesive so that the abrasive member extends beyond the external surface at a distal end thereof to define the lapping surface.01-12-2012
20120008374Data Storage Using Read-Mask-Write Operation - Method and apparatus for writing data to a storage array, such as but not limited to an STRAM or RRAM memory array, using a read-mask-write operation. In accordance with various embodiments, a first bit pattern stored in a plurality of memory cells is read. A second bit pattern is stored to the plurality of memory cells by applying a mask to selectively write only those cells of said plurality corresponding to different bit values between the first and second bit patterns.01-12-2012
20120003773QUANTUM DOT SENSITIZED WIDE BANDGAP SEMICONDUCTOR PHOTOVOLTAIC DEVICES & METHODS OF FABRICATING SAME - A quantum dot (QD) sensitized wide bandgap (WBG) semiconductor heterojunction photovoltaic (PV) device comprises an electron conductive layer; an active photovoltaic (PV) layer adjacent the electron conductive layer; a hole conductive layer adjacent the active PV layer; and an electrode layer adjacent the hole conductive layer. The active PV layer comprises a wide bandgap (WBG) semiconductor material with E01-05-2012
20120003399Recording Media Having a Nanocomposite Protection Layer and Method of Making Same - A method includes: forming a recording layer on a substrate and depositing a nanocomposite layer on the recording layer, the nanocomposite layer including a wear-resistant material and a solid lubricant material, wherein the atomic percentage of the solid lubricant material in the nanocomposite layer is in a range from about 5% to about 99%.01-05-2012
20120002318Transducer Assembly For Heat Assisted Magnetic Recording Light Delivery - An apparatus includes a transducer assembly including a waveguide having a core layer and a cladding layer adjacent to the core layer, and a grating structured to couple electromagnetic radiation into the waveguide; and a light source mounted on the cladding to direct light onto the grating at an acute angle with respect to a plane containing the grating.01-05-2012
20110310513AUXILIARY MAGNETORESISTIVE SHIELD - An apparatus includes a magnetoresistive read element, first and second primary shields, and an auxiliary shield. The magnetoresistive read element is located between the first and the second primary shields, and the auxiliary shield is located between the magnetoresistive read element and the first primary shield. In another embodiment, the apparatus includes a plurality of magnets located between a plurality of shields for a magnetoresistive element. The plurality of magnets is optionally offset from the magnetoresistive element.12-22-2011
20110310511APPARATUS INCLUDING MODIFIED WRITE POLE TIP - An apparatus that includes a write element including a write element tip having a leading edge, a trailing edge, and first and second side edges connecting the leading edge to the trailing edge, wherein the trailing edge is non-planar; a trailing shield proximate the trailing edge of the write element; a first side shield proximate the first side edge; and a second edge proximate the second side edge.12-22-2011
20110307709MANAGING SECURITY OPERATING MODES - A storage device that supports Trusted Computer Group (TCG) security allows management of TCG security features by a Basic Input/Output System (BIOS) using non-TCG security commands supported by the BIOS. In one implementation, a BIOS that does not support TCG security but does support ATA security can use ATA drive unlock to invoke TCG drive unlock on the storage device. Further, the storage device can be transitioned among multiple security operating modes (e.g., Undeclared, ATA security or TCG security).12-15-2011
20110302477Data Hardening to Compensate for Loss of Data Retention Characteristics in a Non-Volatile Memory - Method and apparatus for enhancing reliability and integrity of data stored in a non-volatile memory, such as in a solid-state drive (SSD) having an array of flash memory cells. In accordance with various embodiments, a controller is adapted to harden data stored in a first location of said memory in relation to a detected loss of retention characteristics of the first location. In some embodiments, the data are hardened by storing redundancy information associated with said data in a second location of said memory. The redundancy information can be a redundant set of the data or higher level error correct codes (ECC). The hardened data can be recovered to the host during a read operation by accessing the data stored in both the first and second locations.12-08-2011
20110302474Ensuring a Most Recent Version of Data is Recovered From a Memory - Method and apparatus for ensuring a most recent version of data is retrieved from a memory, such as a non-volatile flash memory array. In accordance with various embodiments, a controller is adapted to sequentially store different versions of an addressable data block having a selected logical address in different locations within a memory. The controller assigns a revision indication value to each said version, with at least two of said stored versions concurrently sharing the same revision indication value. In some embodiments, the revision indication value constitutes a repeating cyclical sequence count that is appended to each block, or logically combined with a code value and stored with each block. The total number of counts in the sequence is less than the total number of versions resident in the memory.12-08-2011
20110300687NANO-DIMENSIONAL NON-VOLATILE MEMORY CELLS - A non-volatile memory cell that includes a first electrode; a second electrode; and an electrical contact region that electrically connects the first electrode and the second electrode, the electrical contact region has a end portion and a continuous side portion, and together, the end portion and the continuous side portion form an open cavity, wherein the memory cell has a high resistance state and a low resistance state that can be switched by applying a voltage across the first electrode and the second electrode.12-08-2011
20110300410Bit-Patterned Magnetic Media Formed in Filler Layer Recesses - A recessed field is formed surrounding resist columns that are in a pattern of bit patterned magnetic media. A filler layer is formed in the recessed field. The resist columns are removed to leave recesses in the filler layer that replicate the pattern. Bit patterned magnetic media is formed in the recesses.12-08-2011
20110299324WRITE CURRENT COMPENSATION USING WORD LINE BOOSTING CIRCUITRY - Apparatus and method for write current compensation in a non-volatile memory cell, such as but not limited to spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM). In accordance with some embodiments, a non-volatile memory cell has a resistive sense element (RSE) coupled to a switching device, the RSE having a hard programming direction and an easy programming direction opposite the hard programming direction. A voltage boosting circuit includes a capacitor which adds charge to a nominal non-zero voltage supplied by a voltage source to a node to generate a temporarily boosted voltage. The boosted voltage is applied to the switching device when the RSE is programmed in the hard programming direction.12-08-2011
20110299323Floating Source Line Architecture for Non-Volatile Memory - A method and apparatus for writing data to a non-volatile memory cell, such as an RRAM memory cell. In some embodiments, a semiconductor array of non-volatile memory cells comprises a resistive sense element (RSE) and a switching device. A RSE of a plurality of memory cells is connected to a bit line while the switching device of a plurality of memory cells is connected to a word line and operated to select a memory cell. A source line is connected to the switching device and connects a series of memory cells together. Further, a driver circuit is connected to the bit line and writes a selected RSE of a selected source line to a selected resistive state by passing a write current along a write current path that passes through the selected RSE and through at least a portion of the remaining RSE connected to the selected source line.12-08-2011
20110299080CHARACTERIZING OPTICAL ANTENNA NEAR FIELD TRANSDUCERS - An apparatus and associated method for characterizing a near field transducer (NFT) is provided that has computer instructions stored in memory and executable to perform computational logic that, in response to a selected electromagnetic radiation excitation of resonant collective oscillations on a surface of the NFT, compares a magnitude of a depolarization field associated with the excited resonant collective oscillations to a predetermined threshold to characterize the NFT in terms of demonstrated radiant efficiency performance.12-08-2011
20110298456TUNNELING MAGNETO-RESISTIVE SENSORS WITH BUFFER LAYERS - In certain embodiments, a tunneling magneto-resistive (TMR) sensor includes a sensor stack positioned between a seed layer and a cap layer. The seed layer includes a first buffer layer that includes a non-magnetic nickel alloy.12-08-2011
20110298069MAGNETIC RANDOM ACCESS MEMORY WITH DUAL SPIN TORQUE REFERENCE LAYERS - A magnetic data storage cell, applicable to spin-torque random access memory (ST-RAM), is disclosed. A magnetic cell includes first and second fixed magnetic layers and a free magnetic layer positioned between the fixed magnetic layers. The magnetic cell also includes terminals configured for providing a spin-polarized current through the magnetic layers. The first fixed magnetic layer has a magnetization direction that is substantially parallel to the easy axis of the free magnetic layer, and the second fixed magnetic layer has a magnetization direction that is substantially orthogonal to the easy axis of the free magnetic layer. The dual fixed magnetic layers provide enhanced spin torque in writing to the free magnetic layer, thereby reducing the required current and reducing the feature size of magnetic data storage cells, and increasing the data storage density of magnetic spin torque data storage.12-08-2011
20110298068MAGNETIC TUNNEL JUNCTION WITH COMPENSATION ELEMENT - A magnetic tunnel junction having a compsensation element is disclosed. The magnetic tunnel junction includes a reference element, and a compensation element having an opposite magnetization moment to a magnetization moment of the reference element. A free magnetic layer is between the reference element and the compensation element, and an electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic layer from the reference element. The free magnetic layer includes Co12-08-2011
20110296273METHODS AND DEVICES TO REDUCE OUTER CODE FAILURE RATE VARIABILITY - The variability of outer code failure rate of memory pages of a solid state memory device can be reduced by selectively grouping the pages included in the outer code words. The data in the page groups are encoded into outer code words which are stored in the memory device. Encoding the data of the page groups and storing the encoded data includes intermittently accumulating an outer code parity as the pages are sequentially stored in the memory device according to a particular order. The pages can be randomly selected for the page groups or can be grouped based on predicted or measured failure rate information. In a memory device having multi-level memory cells, predicting the failure rate of a page can be based on whether the page is a most significant bit (MSB) page or a least significant bit (LSB) page.12-01-2011
20110296272OUTER CODE PROTECTION FOR SOLID STATE MEMORY DEVICES - Outer code words can span multiple data blocks, multiple die, or multiple chips of a memory device to protect against errors in the data stored in the blocks, die and/or chips. A solid state memory device is arranged in multiple data blocks, each block including an array of memory cells arranged in a plurality of pages. The data is encoded into inner code words and symbol-based outer code words. The inner code words and the symbol-based outer code words are stored in the memory cells of the multiple blocks. One or more inner code words are stored in each page of each block and one or more symbols of each outer code word are stored in at least one page of each block. The inner code words and the outer code words are read from the memory device and are used to correct the errors in the data.12-01-2011
20110292716Asymmetric Write Current Compensation Using Gate Overdrive for Resistive Sense Memory Cells - Apparatus and associated method for asymmetric write current compensation for resistive sense memory (RSM) cells, such as but not limited to spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM) cells. In accordance with some embodiments, an RSM cell includes an RSM element coupled to a switching device. The switching device has a plurality of terminals. A control circuit compensates for asymmetric write characteristics of the RSM cell by limiting a range of voltage differentials across the terminals so as to be equal to or less than a magnitude of a source voltage applied to the switching device, thereby providing bi-directional write currents of substantially equal magnitude through the RSM element.12-01-2011
20110292548HEAD GIMBAL ASSEMBLIES WITH WINDAGE DIVERSION FEATURES - A head gimbal assembly includes windage diversion structures that can comprise a base plate attached to the head gimbal assembly, a load beam, an actuator arm connected to the load beam, and a slider attached to the load beam. The base plate further comprises a grooved or channel portion that is oriented so that a plurality of grooves or channels diverts at least a portion of air flow away from the slider or load beam. A storage device and a method are also disclosed.12-01-2011
20110292546TIMING TRACK FOR MASTER TEMPLATE SUBSTRATE - A patterned recording media is formed from a master template that includes a data area and a timing track area having a final timing track. In order to form the final timing track, a first timing track is etched into master template and tested for accuracy by comparing the angular position of the master template to the timing track. If errors are detected in the timing track, the errors are used to create additional timing tracks which are etched into the master template. This process of improving the timing track is repeated until a final timing track is formed that has errors below a predetermined level. The timing tracks formed prior to the final timing track are removed and the master template is used to make stampers which are used to make patterned media disks.12-01-2011
20110287656MODULAR INTERFACE COMMUNICATIONS WITH A STORAGE CARTRIDGE - A serial interface connector and corresponding method electrically connects to a storage cartridge that has a housing enclosing a serial communications device. The serial interface connector has a first plurality of electrical contacts and a retainer. The retainer operably contactingly engages the housing to impart a bias that retains the electrical contacts of the serial interface connector seated in electrical connection with a respective second plurality of electrical contacts of the serial communications device.11-24-2011
20110286131DIRECTING WINDAGE ESTABLISHED BY A ROTATING DISC - An apparatus and associated method for directing windage involves a body defining an aperture. A fastener is operably disposed in the aperture and is selectively engageable with a fixed support member between a first mode permitting rotation of the body around the fastener longitudinal axis, and a second mode affixing the body in place to the support member at a desired rotational orientation. A shroud depends from the body and is sized at a distal end for an operable mating relationship adjacent an arcuate edge of a disc that is rotatable around a disc axis. The shroud distal end is operably disposed a first distance from the fastener longitudinal axis in a direction of a plane including the fastener longitudinal axis and the disc axis. A leading edge of the shroud, with respect to a direction of windage established by disc rotation, is disposed a second distance from the fastener longitudinal axis that is the same or less than the first distance from the fastener longitudinal axis.11-24-2011
20110286127NEAR FIELD TRANSDUCER WITH SHAPED ENERGY RADIATING END - A magnetic recording head consists of a write pole and a near field transducer close to the write pole that focuses light energy to a focal point. A near field transducer is positioned to receive light energy from a waveguide. The near field transducer comprises an energy-receiving end and an energy-radiating end. The energy-receiving end is located near the focal point of the waveguide and the energy-radiating end is shaped such that it is narrower closer to the write pole and wider farther from the write pole.11-24-2011
20110283813TESTING A TORQUE TOOL - An apparatus and associated method for gaging the repeatability of a tool is provided by a pivot assembly. The pivot assembly has a pivot member with a tool engagement feature to selectively receive a torque from the tool at a pivot axis. The pivot assembly also has a first magnetically permeable member fixed in movement with the pivot member. The pivot assembly further has a second magnetically permeable member. An abutment member abuttingly engages the pivot member to limit its pivotal travel at a position where the first and second magnetically permeable members are magnetically coupled together, without contacting each other for being separated by a gap, by a magnetic force of attraction urging the pivot member toward the second magnetically permeable member.11-24-2011
20110283048STRUCTURED MAPPING SYSTEM FOR A MEMORY DEVICE - This disclosure is related to systems and methods for a structured mapping system for a memory device, such as a solid state data storage device. In one example, a data storage device may include a multi-level address mapping system. The multi-level address mapping system may be implemented completely independent of a host computer and a host computer operating system. Also, the multi-level mapping system may be stored to allow each level, or subsets of each level, to be re-written independently of the other levels or the other subsets.11-17-2011
20110283044DEVICE AND METHOD FOR RELIABLE DATA STORAGE - A data storage device comprising at least one non-volatile storage medium having a plurality of data blocks, and a controller configured to allocate at least one of the data blocks for a writing operation based at least in part on data integrities of the data blocks.11-17-2011
20110281023SELF-ALIGNED BEVELS FOR WRITE POLES - A method of depositing material onto a base portion of a wafer is disclosed. The method includes forming a bevel into a portion of a surface of the base portion of the wafer and depositing a first layer of conductive material onto the beveled portion of the base portion so that part of the first layer includes a wedge shape above the surface of the base portion. A second layer of conductive material is deposited onto the base portion including the portion of the base portion onto which the first layer of material is deposited.11-17-2011
20110280069ITERATIVE DEMODULATION AND DECODING FOR MULTI-PAGE MEMORY ARCHITECTURE - Methods and systems for accessing encoded data stored in a solid state non-volatile memory device include iteratively demodulating and decoding the data. The memory device includes memory cells arranged to store multiple bits of data per memory cell. The memory cells are capable of storing multiple pages of data. Each bit stored in a memory cell is associated with a page of data that is different from other pages associated with other bits stored in the memory cell. The multiple pages are demodulated responsive to sensed voltage levels of the memory cells, and a demodulated output is provided for each page of the multiple pages. A decoded output for each page of the multiple pages is generated. Decoding the page and demodulating the multiple pages proceeds iteratively, including an exchange of information between the decoder and the demodulator.11-17-2011
20110280068JOINT ENCODING OF LOGICAL PAGES IN MULTI-PAGE MEMORY ARCHITECTURE - Multiple logical pages are jointly encoded into a single code word and are stored in the same physical page of a solid state non-volatile memory (NVM) device having multi-level memory cells. A first logical page of the multiple logical pages is stored in the memory device as first bits of the multi-level memory cells while a second logical page of the multiple logical pages is temporarily cached. After the first logical page is stored as the first bits of the memory cell, the second logical page is stored as second bits of the memory cells.11-17-2011
20110277316SELF-ALIGNED BEVELS FOR WRITE POLES - A method, including depositing a layer of material onto a base portion of a wafer, is disclosed. The layer of material has a first surface adjacent the base portion. The method also includes depositing a pattern of masking material onto a portion of a second surface of the layer. Material from the layer of material that is unprotected by the pattern of masking material is removed from the layer of material. By removing such material a portion of the layer of material is suspended from the base portion.11-17-2011
20110268991HEAD WITH HIGH READBACK RESOLUTION - An apparatus that includes a first read shield and a second read shield and a reader stack between the first and second read shields. The first and second read shields each include a thin high permeability layer closest to the reader stack and a low permeability layer and/or a geometric feature to control magnetic field flux lines in a free layer of the reader stack.11-03-2011
20110267930Method and Apparatus for Aligning a Laser Diode on a Slider - An apparatus includes a structure including a waveguide and a pocket adjacent to an input facet of the waveguide. A laser has an output facet and is positioned in the pocket. A stop is included one at least one of the laser and a wall of the pocket. The stop is positioned at an interface between the laser and the wall of the pocket such that the output facet of the laser and the input facet of the waveguide are separated by a gap.11-03-2011
20110267873NON-VOLATILE MEMORY WITH PROGRAMMABLE CAPACITANCE - Non-volatile memory with programmable capacitance is disclosed. Illustrative data memory units include a substrate including a source region and a drain region. A first insulating layer is over the substrate. A second insulating layer is over the substrate and between the source region and drain region. A solid electrolyte layer is between the first insulating layer and second insulating layer. The solid electrolyte layer has a capacitance that is controllable between at least two states. A first electrode is electrically coupled to a first side of the solid electrolyte layer and is electrically coupled to a voltage source. A second electrode is electrically coupled to a second side of the solid electrolyte layer and is electrically coupled to the voltage source. Multi-bit memory units are also disclosed.11-03-2011
20110267720READER SHIELD WITH TILTED MAGNETIZATION - An apparatus that includes a first read shield and a second read shield and a reader stack between the first and second read shields. The first and second read shields each include a tilted magnetization layer closest to the reader stack to control magnetic field flux lines in a free layer of the reader stack and thereby improve a selectivity of the reader to independently sense and isolate media transitions.11-03-2011
20110267715MAGNETIC DEVICE CONTAINING A HEATER - An apparatus that includes a writer that includes a write pole, at least one return pole, a writer coil and a write pole tip, wherein the write coil wraps around the write pole such that the flow of electrical current through the write coil generates a magnetic flux at the write pole tip, and wherein the write coil has a writer coil shape; and a heater that includes a resistive material, wherein the heater has a heater shape that substantially matches the writer coil shape.11-03-2011
20110266469Method and Apparatus for Aligning a Laser Diode on a Slider - A structure includes a channel waveguide and a pocket adjacent to an input facet of the channel waveguide. A laser having an output facet is positioned in the pocket. The structure includes a stop on either the laser or a wall of the pocket. The stop is positioned at an interface between the laser and the wall of the pocket such that the output facet of the laser and the input facet of the waveguide are separated by a gap.11-03-2011
20110264843DATA SEGREGATION IN A STORAGE DEVICE - An example method includes providing at least two data storage areas in a memory, providing a first amount of over-provisioning for a first of the at least two data storage areas and a second amount of over-provisioning for a second of the at least two data storage areas, categorizing data based on a characteristic of the data, and storing the data in one of the at least two data storage areas based on the categorization.10-27-2011
20110262633LUBRICANT DEPOSITION ONTO MAGNETIC MEDIA - A method, in one embodiment, can include pumping a gas into a reservoir that includes a lubricant. In addition, the method can include changing the gas into a supercritical fluid that extracts lubricant molecules from the lubricant resulting in a mixture of the supercritical fluid and the lubricant molecules. Furthermore, the method can include utilizing the mixture to deposit a lubricant molecule onto a magnetic media.10-27-2011
20110262066PRESS FITTING A CARTRIDGE BEARING - An apparatus and associated method involving an actuator assembly having an actuator body defining a bore and a bearing assembly in the bore. The bearing assembly has a shaft, and further has a bearing having an inner race that is affixed to the shaft and an outer race that is rotatable relative to the inner race. The bearing also has a sleeve defining an annular rigid portion circumscribing the outer race and affixed thereto. The sleeve further defines an annular predictably deformable portion depending from the rigid portion that is entirely disposed longitudinally distant from the outer race and sized to deform when press fit into the bore to operably align the shaft in the bore.10-27-2011
20110260383NONCONTACT POSITIONING OF A WORKPIECE - An apparatus and associated method for orienting a workpiece during processing. A fixture supports the workpiece adjacent a noncontacting biaser. At least one of the fixture and the biaser are selectively movable in a first direction with respect to the other. The biaser directs a first magnetic force capable of moving the workpiece relative to the fixture in a different second direction without physical contact between the biaser and the workpiece during a travel path segment of movement between the fixture and the biaser. The biaser further directs a second magnetic force capable of moving the workpiece relative to the fixture in a third direction. that is different than the second direction, without physical contact between the biaser and the workpiece during a subportion of the travel path segment of movement between the fixture and the biaser.10-27-2011
20110260274MAGNETIC STACK HAVING REFERENCE LAYERS WITH ORTHOGONAL MAGNETIZATION ORIENTATION DIRECTIONS - A magnetic cell includes a ferromagnetic free layer having a free magnetization orientation direction and a first ferromagnetic pinned reference layer having a first reference magnetization orientation direction that is parallel or anti-parallel to the free magnetization orientation direction. A first oxide barrier layer is between the ferromagnetic free layer and the first ferromagnetic pinned reference layer. The magnetic cell further includes a second ferromagnetic pinned reference layer having a second reference magnetization orientation direction that is orthogonal to the first reference magnetization orientation direction. The ferromagnetic free layer is between the first ferromagnetic pinned reference layer and the second ferromagnetic pinned reference layer.10-27-2011
20110258380FAULT TOLERANT STORAGE CONSERVING MEMORY WRITES TO HOST WRITES - A data storage apparatus and associated method involving a memory with a plurality of storage elements defining an associated set of stored data, and memory control logic that, responsive to a request to store first data in a first storage element of the plurality of storage elements, computes without storing to any of the plurality of storage elements first redundancy data for the associated set of stored data inclusive of the first data.10-20-2011
20110255190Limiting Disc Deflection - A data storage apparatus and associated method is provided involving a data storage disc that is rotatable around a first axis. An actuator is rotatable around a second axis to operably position a data transfer member between an innermost radial location of the data storage disc and an outermost radial storage location of the data storage disc. A snubber is supported by the actuator and has a distal edge configured as being, in relation to a reference plane including the first axis and the second axis when the actuator is rotated to position the data transfer member at the innermost radial location, arcuate along a first radius on one side of the reference plane and arcuate along a second radius different than the first radius on the other side of the reference plane.10-20-2011
20110254113ST-RAM MAGNETIC ELEMENT CONFIGURATIONS TO REDUCE SWITCHING CURRENT - In order to increase an efficiency of spin transfer and thereby reduce the required switching current, a current perpendicular to plane (CPP) magnetic element for a memory device includes either one or both of a free magnetic layer, which has an electronically reflective surface, and a permanent magnet layer, which has perpendicular anisotropy to bias the free magnetic layer.10-20-2011
20110252289ADJUSTING STORAGE DEVICE PARAMETERS BASED ON RELIABILITY SENSING - In general, this disclosure is directed to techniques for adjusting storage device parameters based on reliability sensing. According to one aspect, a method includes retrieving a codeword from a plurality of data blocks within a storage device, wherein each of the data blocks stores a respective portion of the codeword, generating a detected value for a bit within a first portion of the codeword based on information related to a reliability of a data block associated with the first portion, and performing error correction on a second portion of the codeword based on the detected value for the bit within the first portion of the codeword. According to another aspect, a method includes obtaining information related to a reliability of a data block within a storage device, and adjusting a data capacity for the storage device based on the information related to the reliability of the data block.10-13-2011
20110252205Managing Access Commands By Multiple Level Caching - Apparatus and associated method concerning managing access commands with a main storage space, a volatile buffer, and a nonvolatile buffer. The volatile buffer is configured to store a plurality of command nodes that are associated with data access commands received from a remote device and directed to the main storage space. The apparatus also has command prioritizing logic configured for using a prescribed rule in repeatedly identifying two or more candidate command nodes of the plurality that are at least individually favored for execution with respect to the main storage space, for selecting one of the candidate command nodes for the execution, and for transferring a nonselected one of the candidate command nodes from the volatile buffer to the nonvolatile buffer where the nonselected command node continues to be considered for execution with respect to the main storage space but is no longer considered by the prescribed rule when identifying subsequent candidate command nodes in the volatile buffer.10-13-2011
20110249355METHOD AND SYSTEM FOR ERROR CHECKING IN BIT-PATTERNED MEDIA - A disc drive system provides increased reliability by detecting and correcting errors associated with bit-patterned media. Write synchronization errors associated with bit-patterned media are addressed by including data storage for temporarily storing data that is being written to the disc drive. The data is read from both the disc drive and the storage medium and compared to detect write synchronization errors. The disc drive system utilizes the identified write synchronization errors for at least one of timing recovery, equalizer training detection, error correction code application, and error recovery.10-13-2011
20110247862Flexible Printed Circuit Cable With Multi-Layer Interconnection - A multi-layer flexible printed circuit cable (flex circuit) with an electrical interconnection between independent conductive layers, and a method for forming the same. In accordance with various embodiments, a partial aperture is formed in the flex circuit that extends through a first conductive layer and an intervening insulative layer to an underlying surface of a second conductive layer that spans the partial aperture. A solder material is reflowed within the partial aperture to electrically interconnect the first and second conductive layers.10-13-2011
20110246710Encoding and Decoding to Reduce Switching of Flash Memory Transistors - Methods of encoding data to and decoding data from flash memory devices are provided. User data having an unknown ratio of 1's to 0's is received. The user data is utilized in generating transformed data that has a predictable ratio of 1's to 0's. The transformed data is stored to flash memory. The transformed data is illustratively generate by either applying an “exclusive or” function to the user data or by converting the user data into a number having a greater number of bits.10-06-2011
20110243176INTEGRATING AND ALIGNING LASER CHIPS ON SLIDERS FOR HAMR APPLICATIONS - A method of producing a slider wafer populated with electromagnetic components optically aligned with photonic elements for HAMR applications. Laser chips are transferred from a laser substrate wafer to the slider wafer by a massively parallel printing transfer process. After wafer bonding the laser chips to the slider wafer, the shape and optical alignment of the photonic elements are precisely aligned en masse by lithographic processing.10-06-2011
20110242883THERMALLY ASSISTED MULTI-BIT MRAM - Methods of writing to a multi-bit MRAM memory unit are described. The method includes to self-detected writing to a multi-bit (i.e., multilevel) thermally assisted MRAM. The self-detected writing increases a reading margin between data state levels and decreases reading margin variability due to cell resistance variation.10-06-2011
20110241666MAGNETIC ELEMENT WITH IMPROVED AREAL RESOLUTION - An apparatus and associated method for a magnetic element capable of detecting changes in magnetic states. Various embodiments of the present invention are generally directed to a free layer that has a first areal extent that is sensitive to a magnetic field and a synthetic antiferromagnetic (SAF) layer adjacent to the free layer and has a second areal extent that is greater than the first areal extent.10-06-2011
20110235480DIRECT WAVEGUIDE LIGHT DELIVERY TO NFT FOR HEAT ASSISTED MAGNETIC RECORDING - A magnetic recording head comprises a write pole having a pole tip adjacent to an air bearing surface, a return pole, an optical near field transducer positioned adjacent the pole tip and an air bearing surface for exposing a portion of a magnetic storage medium to high energy radiation. The energy is directly provided to the near field transducer by a ridge waveguide with tapered coupling elements, by a two dimensional straight or curved waveguide with a beveled end with a metal/dielectric coating for delivering energy to the near field transducer, or by a curved waveguide. The waveguide with tapered coupling elements or with beveled end can be fabricated by means of conventional wafer processing.09-29-2011
20110235205Laminated Exchange Coupling Adhesion (LECA) Media For Heat Assisted Magnetic Recording - An apparatus includes a plurality of bilayer structures positioned adjacent to each other, each of the bilayer structures including a first layer of magnetic material having a first Curie temperature and a second layer of magnetic material positioned adjacent to the first layer, wherein the second layer has a second Curie temperature that is lower than the first Curie temperature, and magnetic grains of the first layer are unstable when the second layer of magnetic material is heated above the second Curie temperature. The recording temperature is reduced due to the smaller switching volume achieved by using vertically decoupled laminations at elevated temperatures.09-29-2011
20110231623Garbage Collection Management in a Data Storage Device - Method and apparatus for handling data in a data storage device. In accordance with some embodiments, a memory space with a plurality of garbage collection units (GCUs) that are each arranged into pages of memory that store user data identified by logical addresses (LAs) and each GCU has a metadata region that stores metadata that correlates the LAs with physical addresses (PAs). A header region in each page of memory stores a bitmask and a sequence map of the LAs in each page that are used by a log manager to creates a bitmask table stored in a first cache and a hierarchical log stored in a second cache. The bitmask table and hierarchical log are used to determine when the LAs stored in the selected GCU are stale, and update the bitmask for each page in the selected GCU after the stale data has been erased.09-22-2011
20110231596Multi-Tiered Metadata Scheme for a Data Storage Array - Method and apparatus for managing metadata associated with a data storage array. In accordance with various embodiments, a group of user data blocks are stored to memory cells at a selected physical address of the array. A multi-tiered metadata scheme is used to generate metadata which describes the selected physical address of the user data blocks. The multi-tiered metadata scheme provides an upper tier metadata format adapted for groups of N user data blocks, and a lower tier metadata format adapted for groups of M user data blocks where M is less than N. The generated metadata is formatted in accordance with a selected one of the upper or lower tier metadata formats in relation to a total number of the user data blocks in the group.09-22-2011
20110231424METHOD AND SYSTEM FOR AUTOMATED FILE AGGREGATION ON A STORAGE DEVICE - A method and system for aggregating data files from one or more computing systems to a storage device. The method allows a configuration of a path and a plurality of selected file types of files to be aggregated onto a storage device by scanning a system for files corresponding to the path and automatically identifying files having a file type corresponding to the selected file types. The aggregation method also functions as a system and graphical user interface.09-22-2011
20110231420METHOD AND SYSTEM FOR AUTOMATICALLY INITIATING A FILE AGGREGATION PROCESS BETWEEN COMMUNICATIVELY COUPLED DEVICES - A method and system for automatically detecting a coupling of a storage device to one or more computing systems. The method automatically identifies a configuration specific to the computing system and accesses the configuration specific to the computing system. The method automatically identifies a plurality of files residing on the computing system corresponding to the configuration and automatically aggregates the plurality of files to the storage device.09-22-2011
20110228660METHOD AND APPARATUS FOR MEASURING A SIGNAL, METHOD OF TESTING WITH A SPINSTAND, A METHOD OF WRITING A TEST DATA PATTERN AND A SPINSTAND - There is disclosed a method and apparatus for measuring a signal using a measurement system. The signal has a frequency component that is to be detected by the measurement. The frequency component has a varying phase. The signal has at least one interruption thereto. The method includes: processing the signal with the measurement system to detect the frequency component in the signal and stalling the measurement system before the start of the interruption. The stall period is calculated such that the processing of the signal is resumed: i) after the end of the interruption, and ii) where there is substantially no discontinuity between the phase of the frequency component in the signal at the end of the stall and in the phase of the frequency component in the signal at the beginning of the stall.09-22-2011
20110228599Non-Volatile Memory Cell with Programmable Unipolar Switching Element - A non-volatile memory cell with a programmable unipolar switching element, and a method of programming the memory element are disclosed. In some embodiments, the memory cell comprises a programmable bipolar resistive sense memory element connected in series with a programmable unipolar resistive sense switching element. The memory element is programmed to a selected resistance state by application of a selected write current in a selected direction through the cell, wherein a first resistance level is programmed by passage of a write current in a first direction and wherein a second resistance level is programmed by passage of a write current in an opposing second direction. The switching element is programmed to a selected resistance level to facilitate access to the selected resistance state of the memory element.09-22-2011
20110228598TRANSMISSION GATE-BASED SPIN-TRANSFER TORQUE MEMORY UNIT - A transmission gate-based spin-transfer torque memory unit is described. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. A NMOS transistor is in parallel electrical connection with a PMOS transistor and they are electrically connected with the source line and the magnetic tunnel junction data cell. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. The PMOS transistor and the NMOS transistor are separately addressable so that a first write current in a first direction flows through the PMOS transistor and a second write current in a second direction flows through the NMOS transistor.09-22-2011
20110228597Static Magnetic Field Assisted Resistive Sense Element - Apparatus and associated method for writing data to a non-volatile memory cell, such as spin-torque transfer random access memory (STRAM). In accordance with some embodiments, a resistive sense element (RSE) has a heat assist region, magnetic tunneling junction (MTJ), and pinned region. When a first logical state is written to the MTJ with a spin polarized current, the pinned and heat assist regions each have a substantially zero net magnetic moment. When a second logical state is written to the MTJ with a static magnetic field, the pinned region has a substantially zero net magnetic moment and the heat assist region has a non-zero net magnetic moment.09-22-2011
20110228428TRILAYER READER WITH CURRENT CONSTRAINT AT THE ABS - A magnetoresistive read sensor with improved sensitivity and stability is described. The sensor is a trilayer stack positioned between two electrodes. The trilayer stack has two free layers separated by a nonmagnetic layer and a biasing magnet positioned at the rear of the stack and separated from the air bearing surface by the stripe height distance. Current in the sensor is confined to regions close to the air bearing surface by an insulator layer to enhance reader sensitivity.09-22-2011
20110225347LOGICAL BLOCK STORAGE IN A STORAGE DEVICE - In general, this disclosure relates to storage of logical blocks in a storage device. Aspects of this disclosure describe techniques to monitor the frequency of access of one or more logical blocks referenced by one or more logical block addresses. Based on the frequency of access, in non-limiting aspects of this disclosure, a controller may select one or more physical blocks of a common memory storage block. The storage device may store the logical blocks in the selected physical blocks.09-15-2011
20110225346GARBAGE COLLECTION IN A STORAGE DEVICE - In general, this disclosure relates to garbage collection in a storage device. Aspects of this disclosure describe techniques to identify one or more candidate memory storage blocks that should be recycled during garbage collection. The one or more candidate memory storage blocks may be identified based at least on monitored soft metrics of the candidate memory storage blocks. During garbage collection, the identified one or more candidate memory storage blocks may be recycled to free up storage space.09-15-2011
20110223445METHOD & APPARATUS FOR MULTI-STAGE SPUTTER DEPOSITION OF UNIFORM THICKNESS LAYERS - A method of forming a uniform thickness layer of a selected material on a surface of a substrate comprises steps of: 09-15-2011
20110221016FLUX-CLOSED STRAM WITH ELECTRONICALLY REFLECTIVE INSULATIVE SPACER - Flux-closed spin-transfer torque memory having a specular insulative spacer is disclosed. A flux-closed spin-transfer torque memory unit includes a multilayer free magnetic element including a first free magnetic layer anti-ferromagnetically coupled to a second free magnetic layer through an electrically insulating and electronically reflective layer. An electrically insulating and non-magnetic tunneling barrier layer separates the free magnetic element from a reference magnetic layer.09-15-2011
20110217003Waveguide For Heat Assisted Magnetic Recording - An apparatus includes a slider mounted on an arm, a first waveguide including a first core guiding layer, a second waveguide mounted on the slider and including a second core guiding layer having a uniform thickness smaller than the thickness of the first core guiding layer, and a coupler for coupling light from the first core guiding layer to the second core guiding layer, wherein the coupler comprises a curved mirror formed in the second waveguide and positioned to reflect light from the first core guiding layer into the second core guiding layer.09-08-2011
20110216511PCBA LOW COST SNAP-ON FRAME MOUNT - The present invention is directed to a printed circuit board assembly having a circuit board with opposing side edges and an open frame housing with parallel mounting frames extending along the side edges of the circuit board. Each mounting frame has a body portion having a support shelf and an overhang ledge forming a channel, the channel nesting an associated side edge of the circuit board. A mounting peg is supported to extend transversely to the entry of the channel, and temporary deforming of the ledge permits entry of the associated side edge into the channel, the circuit board having a complementary peg retention hole appropriately sized to receive the mounting peg.09-08-2011
20110216437REAL-TIME GAIN IDENTIFICATION - A real-time gain identification system for a mechatronic system, such as a servo system, including at least two actuators is provided. In an example implementation, a servo system comprises a primary actuator and a piezoelectric secondary actuator. A controller generates a disturbance for one of the actuators that is compensated for (e.g., canceled) using another actuator. In one implementation, a gain of the actuator at an arbitrary time is calculated based upon a comparison of a signal used to compensate for the disturbance (e.g., cancel the disturbance) at that arbitrary time to a signal known to compensate for a disturbance (e.g., cancel the disturbance) under known conditions. For example, a gain may be determined based on a ratio of a signal used to cancel a disturbance at an arbitrary point to a signal known to cancel the disturbance under known conditions. Similar methodologies can be applied in other mechatronic systems with multiple actuators.09-08-2011
20110211428HEAT-ASSISTED MAGNETIC RECORDING WITH SHAPED MAGNETIC AND THERMAL FIELDS TO MINIMIZE TRANSITION CURVATURE - Devices and methods are provided for heat-assisted magnetic recording (HAMR). In an illustrative example, a device includes a magnetic write pole having a convex pole tip; a magnetic opposing pole longitudinally displaced from the magnetic write pole; and a thermal-source component disposed proximate to the magnetic write pole and comprising a laterally elongated thermal-source peg disposed proximate to the convex pole tip.09-01-2011
20110211310SIGNAL PATH INTERCONNECTION AND ASSEMBLY - Various embodiments are generally directed to an apparatus that provides an interconnection with efficient data signal throughput. In some embodiments, a controller printed circuit board (PCB) supports a controller integrated circuit (IC) and a support bracket. A memory PCB is supported by the support bracket in a spaced apart, parallel relation to the controller PCB. The memory PCB supports at least one memory IC and has an edge connector which engages the support bracket. A flex circuit is provided that interconnects the edge connector to an interposer positioned on the controller PCB between the respective areal extent of the controller PCB and the memory PCB to form a data signal path between the memory IC and the controller IC.09-01-2011
20110211272MAGNETIC FIELD DETECTING DEVICE AND METHODS OF USING THE SAME - A disclosed device having a principle axis and including a magnetoresistive stack, the magnetoresistive stack having first and second opposing surfaces, the magnetoresistive stack including a free layer, a spacer layer, and a reference layer, wherein the spacer layer is positioned between the first and reference layer, the free layer includes magnetic material having a free magnetic orientation in a first plane; the spacer layer includes a nonmagnetic material; and the reference layer includes a magnetic material having a pinned magnetic orientation in a second plane, wherein the second plane is perpendicular to the first plane and parallel to the principle axis of the device; an insulating layer at least a portion of the outer surface of the magnetoresistive stack; a shielding layer surrounding at least a portion of the insulating layer; and a conducting layer, wherein the conducting layer provides electrical connection between the magnetoresistive stack and the shielding layer.09-01-2011
20110205864Optical Waveguide Clad Material - An apparatus includes a waveguide having a core layer and first and second cladding layers on opposite sides of the core layer, wherein the cladding layers comprise a binary oxide composition. In another example, the cladding layers include a ternary or quaternary combination of oxides and/or oxynitrides. In another example, the cladding layers include a silicon oxynitride.08-25-2011
20110205863HAMR NFT Materials With Improved Thermal Stability - A near field transducer includes gold and at least one dopant. The dopant can include at least one of: Cu, Rh, Ru, Ag, Ta, Cr, Al, Zr, V, Pd, Ir, Co, W, Ti, Mg, Fe, or Mo. The dopant concentration may be in a range from 0.5% and 30%. The dopant can be a nanoparticle oxide of V, Zr, Mg, Ca, Al, Ti, Si, Ce, Y, Ta, W, or Th, or a nitride of Ta, Al, Ti, Si, In, Fe, Zr, Cu, W or B.08-25-2011
20110205861LIGHT SOURCE POWER CONTROL FOR HEAT ASSISTED MAGNETIC RECORDING (HAMR) - Apparatus and method for light source power control during the writing of data to a storage medium. In accordance with various embodiments, a data recording head is provided having a magnetic transducer and a light source. The light source is driven at a first power level to irradiate an adjacent storage medium prior to the writing if data to the medium using the magnetic transducer. The first power level is insufficient to alter a magnetization state of the medium. The light source is subsequently transitioned to a higher, second power level to irradiate the storage medium during the writing of data to said medium using the magnetic transducer, the second power level being sufficient to alter said magnetization state of the medium.08-25-2011
20110205830Semiconductor Control Line Address Decoding Circuit - Apparatus and method for decoding addresses of control lines in a semiconductor device, such as a solid state memory (SSM). In accordance with some embodiments, a switching circuit includes an array of switching devices coupled to 208-25-2011
20110205788Spin-Torque Bit Cell With Unpinned Reference Layer and Unidirectional Write Current - Method and apparatus for using a uni-directional write current to store different logic states in a non-volatile memory cell, such as a modified STRAM cell. In some embodiments, the memory cell has an unpinned ferromagnetic reference layer adjacent a cladded conductor, a ferromagnetic storage layer and a tunneling barrier between the reference layer and the storage layer. Passage of a current along the cladded conductor induces a selected magnetic orientation in the reference layer, which is transferred through the tunneling barrier for storage by the storage layer. Further, the orientation of the applying step is provided by a cladding layer adjacent a conductor along which a current is passed and the current induces a magnetic field in the cladding layer of the selected magnetic orientation.08-25-2011
20110205671MAGNETIC RECORDING HEAD WITH NOTCHED SHIELD - A magnetic recording head includes a magnetic recording write element including a main pole. The main pole has a leading edge and an opposing trailing edge and a first side surface and a second side surface separating the leading edge from the trailing edge. A first side magnetic shield is positioned adjacent the first side surface and a second side magnetic shield positioned adjacent to the second side surface. A first side shield gap separates the first side shield from the first side of the main pole. A second side shield gap separates the second side shield from the second side of the main pole. A front magnetic shield is separated from the main pole trailing edge by a front shield gap. A recess extends into the front shield adjacent to the trailing edge, and parallel to the trailing edge. The recess extends laterally away from the main pole and into the front shield a distance greater than the first side shield gap or second side shield gap.08-25-2011
20110205665COVALENTLY BOUND MONOLAYER FOR A PROTECTIVE CARBON OVERCOAT - A magnetic data storage medium may include a substrate, a magnetic recording layer, a protective carbon overcoat, and a monolayer covalently bound to carbon atoms adjacent a surface of the protective carbon overcoat. According to this aspect of the disclosure, the monolayer comprises at least one of hydrogen, fluorine, nitrogen, oxygen, and a fluoro-organic molecule. In some embodiments, a surface of a read and recording head may also include a monolayer covalently bound to carbon atoms of a protective carbon overcoat.08-25-2011
20110202707NVMHCI ATTACHED HYBRID DATA STORAGE - A hybrid data storage device includes a solid-state memory device, a disc-type memory device and a hybrid data storage device controller in communication with the solid-state memory device and the disc-type memory device. The hybrid data storage device controller is configured to receive Non-Volatile Memory Host Controller Interface (NVMHCI) commands from a host and use logic to make decisions for the optimization and efficient performance of the solid-state memory device and the disc-type memory device.08-18-2011
20110200845CURRENT PERPENDICULAR TO THE PLANE READER WITH IMPROVED GIANT MAGNETO-RESISTANCE - In some embodiments, a current perpendicular to the plane giant magneto-resistance (CPP GMR) read sensor may include a reference layer and/or a free layer that includes a plurality of sub-layers. For example, at least one of the reference layer or free layer may include a first ferromagnetic sub-layer, a second ferromagnetic sub-layer, and a Heusler alloy layer located between the first ferromagnetic sub-layer and the second ferromagnetic sub-layer. In some embodiments, a CPP GMR read sensor may include a current closed path (CCP) spacer layer between the reference layer and the free layer. The CCP spacer layer may include Ag and Al08-18-2011
20110199832MAGNETIC FLOATING GATE MEMORY - An apparatus includes at least one memory device including a floating gate element and a magnetic field generator that operably applies a magnetic field to the memory device. The magnetic field directs electrons in the memory device into the floating gate element.08-18-2011
20110198731Apparatus and Method for Defining Laser Cleave Alignment - An apparatus includes a crystalline substrate. A cleaving guide on the substrate is positioned over a cleave plane of the crystalline substrate and positioned in a known location with respect to a feature of an electronic device on the substrate. Cleaving of the substrate along the cleave plane changes a physical characteristic of the cleaving guide and measurement of the physical characteristic provides a parameter representative of the relative position of the cleave plane and the cleaving guide.08-18-2011
20110195276RESIST ADHENSION TO CARBON OVERCOATS FOR NANOIMPRINT LITHOGRAPHY - In an imprint lithography process, a carbon overcoat (COC) layer has nitrogen introduced into an upper surface region thereof before application of an adhesion layer to the COC/substrate combination. This results in the formation of a thin layer of nitrogenated carbon at the surface of the COC layer that promotes covalent bonding with the functional groups of the adhesion layer and, thus, significantly improves resist adhesion upon imprint template removal. Thus, an embodiment of an imprint lithography method comprises introducing nitrogen into an upper surface region of the COC layer, forming an adhesion layer on the nitrogenated COC layer, forming resist on the adhesion layer, contacting the resist with an imprint template having patterned features formed therein such that the resist fills the patterned features of the imprint template, and separating the imprint template from the resist such that a negative image of the patterned features is formed in the resist. An embodiment of an imprint structure comprises a substrate, a COC layer formed on the substrate, the COC layer having a nitrogenated upper surface region formed therein, and adhesion layer formed on the COC layer, and resist formed on the adhesion layer.08-11-2011
20110195275MATERIAL DEPOSITION ON TRANSDUCING HEAD - An apparatus includes a slider body having a leading edge and an opposite trailing edge, as well as a top face and a bottom face each extending between the leading edge and the trailing edge. The slider body further includes a plurality of protrusions extending from the bottom face, a first recess defined on one of the protrusions, and a sacrificial layer deposited on the slider body in the recess. A bottom surface of the sacrificial layer extends at least as far from the bottom face as bottom surfaces of the plurality of protrusions. In another aspect, a first blocking feature is located at a first uptrack edge on an air bearing surface of a slider, with the first blocking feature being substantially continuous along the first uptrack edge and protruding outwardly from the air bearing surface to reduce particle interaction with the air bearing surface.08-11-2011
20110194343STRAM WITH COMPENSATION ELEMENT AND METHOD OF MAKING THE SAME - Spin-transfer torque memory having a compensation element is disclosed. A spin-transfer torque memory unit includes a free magnetic layer having a magnetic easy axis and a magnetization orientation that can change direction due to spin-torque transfer when a write current passes through the spin-transfer torque memory unit; a reference magnetic element having a magnetization orientation that is pinned in a reference direction; an electrically insulating and non-magnetic tunneling barrier layer separating the free magnetic layer from the magnetic reference element; and a compensation element adjacent to the free magnetic layer. The compensation element applies a bias field on the magnetization orientation of the free magnetic layer. The bias field is formed of a first vector component parallel to the easy axis of the free magnetic layer and a second vector component orthogonal to the easy axis of the free magnetic layer. The bias field reduces a write current magnitude required to switch the direction of the magnetization orientation of the free magnetic layer.08-11-2011
20110194337Non-Volatile Memory Cell With Precessional Switching - A method and apparatus for writing data to a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM) memory cell. In some embodiments, a selected resistive state is written to a magnetic tunneling structure by applying a succession of indeterminate write pulses thereto until the selected resistive state is verified.08-11-2011
20110194335MAGNETIC MEMORY WITH PHONON GLASS ELECTRON CRYSTAL MATERIAL - A magnetic memory unit includes a tunneling barrier separating a free magnetic element and a reference magnetic element. A first phonon glass electron crystal layer is disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element. A second phonon glass electron crystal layer also be disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element to provide a Peltier effect on the free magnetic element and the reference magnetic element.08-11-2011
20110194334DIODE ASSISTED SWITCHING SPIN-TRANSFER TORQUE MEMORY UNIT - A memory array includes a cross-point array of bit and source lines. A memory is disposed at cross-points of the cross-point array. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. A transistor is electrically between the magnetic tunnel junction data cell and the bit line or source line and a diode is in thermal or electrical contact with the magnetic tunnel junction data cell to assist in resistance state switching.08-11-2011
20110194330MEMORY ARRAY WITH READ REFERENCE VOLTAGE CELLS - The present disclosure relates to memory arrays with read reference voltage cells. In particular the present disclosure relates to variable resistive memory cell apparatus and arrays that include a high resistance state reference memory cell and a low resistance state reference memory cell that provides a reliable average reference voltage on chip to compare to a read voltage of a selected memory cell and determine if the selected memory cell is in the high resistance state or low resistance state. These memory arrays are particularly suitable for use with spin-transfer torque memory cells and resolves many systematic issues related to generation of a reliable reference voltage.08-11-2011
20110194213MAGNETIC READ HEAD - In some examples, a system comprising a data storage member including a magnetic storage medium, the magnetic storage medium having a plurality of magnetic bit domains aligned on at least one data track, where a transition boundary between respective magnetic bit domains defines a transition curvature. The system may further comprise a magnetic read head including a first shield layer, a second shield layer, and a read sensor stack provided proximate to the first and second shield layers, where the magnetic read head senses a magnetic field of each of the plurality of magnetic bit domains according to a read playback sensitivity function. In some examples, the shield layers and read sensor stack may be configured to provide a reader playback sensitivity function that substantially corresponds to the shape of the respective magnetic bit domains.08-11-2011
20110193148MAGNET-ASSISTED TRANSISTOR DEVICES - A transistor device includes a magnetic field source adapted to deflect a flow of free electron carriers within a channel of the device, between a source region and a drain region thereof. According to preferred configurations, the magnetic field source includes a magnetic material layer extending over a side of the channel that is opposite a gate electrode of the transistor device.08-11-2011
20110191654ADJUSTABLE ERROR CORRECTION CODE LENGTH IN AN ELECTRICAL STORAGE DEVICE - An apparatus includes a memory that is allocated to reported portions and overprovisioned portions. The apparatus includes an error correction circuit that communicates with the memory in error correction coded data that has a controllable ECC length. The ECC length is a function of a history of error reports. A memory allocation engine balances a size of the overprovisioned portions to maintain a size of the reported portions. The balancing is performed as a function of an average of ECC lengths in the ECC length table over a time interval in which a size of the memory decreases with accumulated erase cycles of the memory.08-04-2011

Patent applications by SEAGATE TECHNOLOGY LLC