| SANYO Semiconductor Manufacturing Co., Ltd. Patent applications |
| Patent application number | Title | Published |
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| 20110079880 | SEMICONDUCTOR DEVICE - A serially-connected diode pair made of diodes having a high withstand voltage and a low on-resistance is formed based on a high withstand voltage vertical PNP bipolar transistor process technology. Two of the diode pairs are connected in parallel to form a bridge so that there is formed a high-efficiency full-wave rectifier circuit that is free from a leakage current due to a parasitic transistor. The serially-connected diode pair is formed by connecting a diode composed of a P type semiconductor substrate, that makes an anode, and an N type buried layer, that makes a cathode, and a diode composed of a P+ type conductive layer, that makes an anode, and an N type epitaxial layer, that makes a cathode, in series with an electrode AC | 04-07-2011 |
| 20100230631 | ETCHING LIQUID COMPOSITION - A metal film such as an aluminum film or an aluminum alloy film is etched with good controllability, preventing a resist from bleeding, to have a proper taper configuration and superior flatness. | 09-16-2010 |
| 20100130000 | Method of manufacturing semiconductor device - When a bump electrode is formed on an opening formed in a semiconductor substrate, the invention prevents a void that is caused by gas trapped in the opening. A method of manufacturing a semiconductor device of the invention includes forming a first wiring on a main surface of a semiconductor substrate, forming an opening in the semiconductor substrate from the back surface to the main surface so as to expose the back surface of the first wiring, forming a second wiring connected to the back surface of the first wiring and extending from inside the opening onto the back surface of the semiconductor substrate, forming a solder layer connected to part of the second wiring on the bottom of the opening and extending from inside the opening onto the back surface of the semiconductor substrate, and forming a bump electrode on the opening by reflowing the solder layer. | 05-27-2010 |
| 20100102460 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device and its manufacturing method are offered to increase the number of semiconductor devices obtained from a semiconductor wafer while simplifying a manufacturing process. After forming a plurality of pad electrodes in a predetermined region on a top surface of a semiconductor substrate, a supporter is bonded to the top surface of the semiconductor substrate through an adhesive layer. Next, an opening is formed in the semiconductor substrate in a region overlapping the predetermined region. A wiring layer electrically connected with each of the pad electrodes is formed in the opening. After that, a stacked layer structure including the semiconductor substrate and the supporter is cut by dicing along a dicing line that is outside the opening. | 04-29-2010 |
| 20100065945 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor integrated circuit is reduced in size by suppressing lateral extension of an isolation region when impurities are thermally diffused in a semiconductor substrate to form the isolation region. Boron ions (B+) are implanted into an epitaxial layer through a third opening K | 03-18-2010 |
| 20100052101 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor integrated circuit is reduced in size by suppressing lateral extension of an impurity region when impurities in the impurity region are thermally diffused in a semiconductor substrate. A second photoresist is formed on an insulation film. The second photoresist is formed to have second openings K | 03-04-2010 |
| 20100052090 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - The invention is directed to reduction of a manufacturing cost and enhancement of a breakdown voltage of a PN junction portion abutting on a guard ring. An N− type semiconductor layer is formed on a front surface of a semiconductor substrate, and a P type semiconductor layer is formed thereon. An insulation film is formed on the P type semiconductor layer. Then, a plurality of grooves, i.e., a first groove, a second groove and a third groove are formed from the insulation film to the middle of the N− type semiconductor layer in the thickness direction thereof. The plurality of grooves is formed so that one of the two grooves next to each other among these, that is closer to an electronic device, i.e., to an anode electrode, is formed shallower than the other located on the outside of the one. Then, an insulating material is deposited in the first groove, the second groove and the third groove. The lamination body of the semiconductor substrate and the layers laminated thereon is then diced along dicing lines. | 03-04-2010 |
| 20090309194 | MESA TYPE SEMICONDUCTOR DEVICE AND MAUFACTURING METHOD THEREOF - This invention is directed to solving problems with a mesa type semiconductor device, which are deterioration in a withstand voltage and occurrence of a leakage current caused by reduced thickness of a second insulation film on an inner wall of a mesa groove corresponding to a PN junction, and offers a mesa type semiconductor device of high withstand voltage and high reliability and its manufacturing method. After the mesa groove is formed by dry-etching, wet-etching with an etching solution including hydrofluoric acid and nitric acid is further applied to a sidewall of the mesa groove to form an overhang made of the first insulation film above an upper portion of the mesa groove. The overhang serves as a barrier to prevent the second insulation film formed in the mesa groove and on the first insulation film around the mesa groove beyond an area of the overhang from flowing toward a bottom of the mesa groove due to an increased fluidity resulting from a subsequent thermal treatment. As a result, the inner wall of the mesa groove corresponding to the PN junction is covered with the second insulation film thick enough to secure a desired withstand voltage and to reduce a leakage current. | 12-17-2009 |
| 20090309193 | MESA TYPE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - Problems with a conventional mesa type semiconductor device, which are deterioration in a withstand voltage and occurrence of a leakage current caused by reduced thickness of an insulation film on an inner wall of a mesa groove corresponding to a PN junction, are solved using an inexpensive material, and a mesa type semiconductor device of high withstand voltage and high reliability is offered together with its manufacturing method. A stable protection film made of a thermal oxide film is formed on the inner wall of the mesa groove in the mesa type semiconductor device to cover and protect the PN junction, and an insulation film having negative electric charges is formed to fill a space in the mesa groove covered with the thermal oxide film so that an electron accumulation layer is not easily formed at an interface between an N | 12-17-2009 |
| 20090218542 | ANISOTROPIC SILICON ETCHANT COMPOSITION - An etchant composition contains (a) an alkaline compound mixture of an organic alkaline compound and inorganic alkaline compound and (b) a silicon-containing compound. The organic alkaline compound is composed of one or more ingredients from quaternary ammonium hydroxide and ethylenediamine. The inorganic alkaline compound is composed of one or more ingredients from sodium hydroxide, potassium hydroxide, ammonia and hydrazine. The silicon-containing inorganic compound is composed of one or more ingredients from metal silicon, fumed silica, colloidal silica, silica gel, silica sol, diatomaceous earth, acid clay and activated clay, and the silicon-containing organic compound is composed of one or more ingredients from quaternary ammonium salts of alkyl silicate and quaternary ammonium salts of alkyl silicic acid. | 09-03-2009 |
| 20090206376 | SEMICONDUCTOR DEVICE - A conventional semiconductor device has a problem that, when a vertical PNP transistor as a power semiconductor element is used in a saturation region, a leakage current into a substrate is generated. In a semiconductor device of the present invention, two P type diffusion layers as a collector region are formed around an N type diffusion layer as a base region. One of the P type diffusion layers is formed to have a lower impurity concentration and a narrower diffusion width than the other P type diffusion layer. In this structure, when a vertical PNP transistor is turned on, a region where the former P type diffusion layer is formed mainly serves as a parasite current path. Thus, a parasitic transistor constituted of a substrate, an N type buried layer and a P type buried layer is prevented from turning on, and a leakage current into the substrate is prevented. | 08-20-2009 |
| 20090189257 | MESA TYPE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A mesa type semiconductor device and its manufacturing method are offered to increase a withstand voltage as well as reducing a leakage current. An N | 07-30-2009 |
| 20090160035 | MESA SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - The invention provides a mesa semiconductor device and a method of manufacturing the same which enhance the yield and productivity. An N− type semiconductor layer is formed on a front surface of a semiconductor substrate, and a P type semiconductor layer is formed thereon. An anode electrode is further formed on the P type semiconductor layer so as to be connected to the P type semiconductor layer, and a mesa groove is formed from the front surface of the P type semiconductor layer deeper than the N− type semiconductor layer so as to surround the anode electrode. Then, a second insulation film is formed from inside the mesa groove onto the P type semiconductor layer on the outside of the mesa groove. The second insulation film is made of an organic insulator such as polyimide type resin or the like. The lamination body made of the semiconductor substrate and the layers laminated thereon is then diced along a scribe line. | 06-25-2009 |
| 20090160034 | MESA SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - The invention provides a mesa semiconductor device and a method of manufacturing the same which minimize the manufacturing cost and prevents contamination and physical damage of the device. An N− type semiconductor layer is formed on a front surface of a semiconductor substrate, and a P type semiconductor layer is formed thereon. An anode electrode is further formed on the P type semiconductor layer so as to be connected to the P type semiconductor layer, and a mesa groove is formed from the front surface of the P type semiconductor layer deeper than the N− type semiconductor layer so as to surround the anode electrode. Then, a second insulation film is formed from inside the mesa groove onto the end portion of the anode electrode. The second insulation film is made of an organic insulator such as polyimide type resin or the like. The lamination body made of the semiconductor substrate and the layers laminated thereon is then diced along a scribe line. | 06-25-2009 |
| 20090124091 | ETCHING SOLUTION COMPOSITION FOR METAL FILMS - The present invention aims to provide an etching solution composition which enables to etch a metal film in a controllable manner, form a desired definite tapered shape, and obtain a smooth surface without causing etching solution exudation trace. Said problems have been solved by the present invention, which is an etching solution composition for etching metal films containing one or more surfactants selected from the group consisting of alkyl sulfate or perfluoroalkenyl phenyl ether sulfonic acid and the salts thereof. | 05-14-2009 |
