| SANMINA-SCI CORPORATION Patent applications |
| Patent application number | Title | Published |
|---|
| 20120059970 | MEMORY CONTROLLER SUPPORTING CONCURRENT VOLATILE AND NONVOLATILE MEMORY MODULES IN A MEMORY BUS ARCHITECTURE - A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus. | 03-08-2012 |
| 20120059967 | MEMORY BUS ARCHITECTURE FOR CONCURRENTLY SUPPORTING VOLATILE AND NON-VOLATILE MEMORY MODULES - A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus. | 03-08-2012 |
| 20110267764 | MULTI-USE REMOVABLE ELECTRONIC DATA STORAGE DEVICE CARRIER MODULE - A built-in dual purpose interposer device for a data storage device carrier mechanism is provided. The interposer device may fill empty or voided space in the carrier mechanism created when a data storage device is changed between a “direct plug” position, or first configuration, and an “interposer” position, or second configuration. The interposer device may be changed back and forth between the first and second configuration multiple times. When in the first configuration, the interposer device may provide structural support to a front end of the carrier mechanism and when in the second configuration, the interposer device may provide an internal mounting base for the data storage device at the base or bottom end of the carrier mechanism. The ability to interchange the interposer device may provide for a built-in base for attaching the interposer device without having to add in additional parts or costs. | 11-03-2011 |
| 20110153903 | METHOD AND APPARATUS FOR SUPPORTING STORAGE MODULES IN STANDARD MEMORY AND/OR HYBRID MEMORY BUS ARCHITECTURES - A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus. | 06-23-2011 |
| 20110133899 | Circuit Board with Radio Frequency Identification for Collecting Stage-by-Stage Manufacturing Metrics - A radio frequency identification (RFID) tag is coupled to a circuit board to track the specific operating and environmental conditions of each manufacturing stage as the circuit board passes through the manufacturing stages. An RFID reader and data collector are used at each stage to read the RFID tag and store its identifying information along with processing information, operating conditions, and results for each stage. This permits to quickly and accurately collect manufacturing information for each circuit board at various manufacturing stages as well as the operating conditions for each stage at a particular time. Such manufacturing metrics can then be retrieved on a stage-by-stage basis for a particular circuit board by an identifier printed on the circuit board. | 06-09-2011 |
| 20110012489 | RACK SYSTEM - A rack system for housing electronic and/or electrical equipment is provided comprising a rectangular base frame, a rectangular top frame, and four elongated vertical support members each extending along a longitudinal axis between and joined to two associated corners of the rectangular base frame and the rectangular top frame. The rectangular base frame, rectangular top frame, and the four elongated vertical support members may be constructed from members having the same substantially A-frame cross-section. Each support member may be constructed from an elongated sheet material extending along a longitudinal axis by bending the sheet material about an axis parallel to the longitudinal axis of the sheet material to form at least three elongated sections, where a first section and a second section are adjacent and substantially perpendicular to each other and a third section extends between approximately mid-point of the first section and approximately mid-point of the second section. | 01-20-2011 |
| 20100008175 | BATTERY-LESS CACHE MEMORY MODULE WITH INTEGRATED BACKUP - A memory module is provided comprising a substrate having an interface to a host system, volatile memory, non-volatile memory, and a logic device. The logic device may receive the indicator of an external triggering event and copies data from the volatile memory devices to the non-volatile memory devices upon receipt of such indicator. When the indicator of the triggering event has cleared, the logic device restores the data from the non-volatile to the volatile memory devices. The memory module may include a passive backup power source (e.g., super-capacitor) that is charged by an external power source and temporarily provides power to the memory module to copy the data from volatile to non-volatile memory. A voltage detector within the memory module may monitor the voltage of an external power source and generates an indicator of a power loss event if voltage of the external power source falls below a threshold level. | 01-14-2010 |
| 20090288874 | Simultaneous and Selective Partitioning of Via Structures Using Plating Resist - Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the PCB stackup through conductive layers, dielelectric layers and through the plating resist. Thus, the PCB panel has multiple through-holes that can then be plated simultaneously by placing the PCB panel into a seed bath, followed by immersion in an electroless copper bath. Such partitioned vias increase wiring density and limit stub formation in via structures. Such partitioned vias allow a plurality of electrical signals to traverse each electrically isolated portion without interference from each other. | 11-26-2009 |
| 20090036167 | System and method for base station heat dissipation using chimneys - A base station system and method for base station heat dissipation using chimneys where the base station system comprises a first structure, an enclosure, and a chimney. The first structure supports base station circuitry that generates heat. The enclosure encloses the first structure and the base station circuitry and forms an internal space. The chimney comprises a second structure forming dedicated space for heat dissipation. The chimney transfers the heat generated by the base station circuitry from the internal space to an external space outside the enclosure. | 02-05-2009 |
| 20090025213 | Substantially Continuous Layer of Embedded Transient Protection For Printed Circuit Boards - The protection of sensitive components on printed circuit boards by using planar transient protection material in one or more layers of a printed circuit board stackup is disclosed. | 01-29-2009 |
| 20090008076 | Systems and Methods For Base Station Enclosures - A technique for climate control of, for example, base station circuitry within an enclosure involves placing base station circuitry within the enclosure and controlling the climate therein. A system according to this technique includes an enclosure suitable for use outside in a wide range of extreme weather conditions. A controller may, for example, control a fan tray with a heater to pull ambient air through a filtration unit, through the fan tray where the air is heated, and through cold start recirculation dampers. | 01-08-2009 |
| 20080301934 | Simultaneous and selective partitioning of via structures using plating resist - Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the PCB stackup through conductive layers, dielectric layers and through the plating resist. Thus, the PCB panel has multiple through-holes that can then be plated simultaneously by placing the PCB panel into a seed bath, followed by immersion in an electroless copper bath. Such partitioned vias increase wiring density and limit stub formation in via structures. Such partitioned vias allow a plurality of electrical signals to traverse each electrically isolated portion without interference from each other. | 12-11-2008 |
| 20080296057 | Simultaneous and selective partitioning of via structures using plating resist - Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the PCB stackup through conductive layers, dielectric layers and through the plating resist. Thus, the PCB panel has multiple through-holes that can then be plated simultaneously by placing the PCB panel into a seed bath, followed by immersion in an electroless copper bath. Such partitioned vias increase wiring density and limit stub formation in via structures. Such partitioned vias allow a plurality of electrical signals to traverse each electrically isolated portion without interference from each other. | 12-04-2008 |
| 20080217049 | EMBEDDED CAPACITIVE STACK - A novel method for manufacturing embedded a capacitive stack and a novel capacitive stack apparatus are provided having a capacitive core that serves as a structural substrate on which alternating thin conductive foils and nanopowder-loaded dielectric layers may be added and tested for reliability. This layering and testing allows early fault detection of the thin dielectric layers of the capacitive stack. The capacitive stack may be configured to supply multiple isolated capacitive elements that provide segregated, device-specific decoupling capacitance to one or more electrical components. The capacitive stack may serve as a core substrate on which a plurality of additional signaling layers of a multilayer circuit board may be coupled. | 09-11-2008 |
| 20080216298 | EMBEDDED CAPACITIVE STACK - A novel method for manufacturing embedded a capacitive stack and a novel capacitive stack apparatus are provided having a capacitive core that serves as a structural substrate on which alternating thin conductive foils and nanopowder-loaded dielectric layers may be added and tested for reliability. This layering and testing allows early fault detection of the thin dielectric layers of the capacitive stack. The capacitive stack may be configured to supply multiple isolated capacitive elements that provide segregated, device-specific decoupling capacitance to one or more electrical components. The capacitive stack may serve as a core substrate on which a plurality of additional signaling layers of a multilayer circuit board may be coupled. | 09-11-2008 |
