| SAMSUNG ELECTRO-MECHANICS COMPANY, LTD. Patent applications |
| Patent application number | Title | Published |
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| 20110221528 | BALUN FUNCTION WITH REFERENCE ENHANCEMENT IN SINGLE-ENDED PORT - Systems and methods are provided for a transformer or balun function with reference enhancement. The systems and methods may include a transformer having at least a primary winding and a secondary winding for reference enhancement, where the primary winding includes a center tap, where the secondary winding includes a first port and a second port, and an electrical connection that electrically connects the second port and the center tap of the primary winding to provide a common reference for the primary winding and the secondary winding. The primary winding of the transformer may be configured to receive differential outputs of a power amplifier, and the transformer may be configured to convert the differential outputs from a balanced signal to an unbalanced signal available at the first port of the secondary winding. | 09-15-2011 |
| 20110221522 | SHARING OF INDUCTOR INTERSTAGE MATCHING IN PARALLEL AMPLIFICATION SYSTEM FOR WIRELESS COMMUNICATION SYSTEMS - A power amplifier system can include a plurality of driver amplifiers and a plurality of power amplifiers, where each driver amplifier and power amplifier includes at least one respective input port and at least one respective output port. The power amplifier system also includes a shared inductive device that provides common interstage matching between the respective output ports of the plurality of driver amplifiers and the respective input ports of the plurality of power amplifiers. The shared inductive device can be a shared inductor or a shared transformer. | 09-15-2011 |
| 20110068636 | SYSTEMS AND METHODS FOR A SPDT SWITCH OR SPMT SWITCH WITH TRANSFORMER - A SPDT or SPMT switch may include a transformer having a primary winding and a secondary winding, where a first end of the secondary winding is connected to a single pole port, where a first end of the primary winding is connected to a first throw port; a first switch having a first end and a second end, where the first end is connected to ground; and a second switch, where a second end of the secondary winding is connected to both a second end of the first switch and a first end of the second switch, where a second end of the second switch is connected to a second throw port, where the first switch controls a first communication path between the single pole port and the first throw port, and where the second switch controls a second communication path between the second throw port and the single pole port. | 03-24-2011 |
| 20100148877 | INTEGRATED POWER AMPLIFIERS FOR USE IN WIRELESS COMMUNICATION DEVICES - An integrated power amplifier can include a carrier amplifier, where the carrier amplifier is connected to a first quarter wave transformer at the input of the carrier amplifier. In addition, the power amplifier can further include at least one peaking amplifier connected in parallel with the carrier amplifier; a first differential combining structure, where the first combining structure includes a first plurality of quarter wave transformers that are configured to combine respective first differential outputs of the carrier amplifier in phase to generate a first single-ended output signal, and a second differential combining structure, where the second combining structures includes a second plurality of quarter wave transformers that are configured to combine respective second differential outputs of the at least one peaking amplifier in phase to generate a second single-ended output signal, where the first single-ended output signal and the second single-ended output signal are combinable in-phase to provide an overall output. | 06-17-2010 |
| 20100074367 | ADAPTIVE COMBINER ERROR CALIBRATION ALGORITHMS IN ALL-DIGITAL OUTPHASING TRANSMITTER - Systems and methods may include a signal component separator that receives a non-constant envelope input signal and at least one phase offset value, and generates first digital phase data and second digital phase data; at least one digital phase modulator that receives the first phase data and the second phase data and operates with a frequency synthesizer to generate a first component signal having a first constant envelope and a second component signal having a second constant envelope; at least one power amplifier that amplifies the first component signal and the second component signal; a non-isolated power combiner that combines the first amplified component signal and the second amplified component signal to generate an output signal having a non-constant envelope; and a mismatch compensator that monitors the output signal to determine the at least one phase offset value, where the at least one phase offset value is utilized by the signal component separator for phase adjustment. | 03-25-2010 |
| 20100073084 | SYSTEMS AND METHODS FOR A LEVEL-SHIFTING HIGH-EFFICIENCY LINC AMPLIFIER USING DYNAMIC POWER SUPPLY - Systems and methods may be provided for a LINC system having a level-shifting LINC amplifier. The systems and methods may include a dynamic power supply that is adjustable to provide at least a first voltage supply level and a second voltage supply level higher than the first voltage supply level; a first power amplifier that amplifies a first component signal to generate a first amplified signal; a second power amplifier that amplifiers a second component signal to generate a second amplified signal, where the first component signal and the second component signal are components of an original signal, where the first component signal and the second component signal each have a constant envelope, and where the original signal has a non-constant envelope, and where the first and second power amplifiers are biased at the first voltage supply level or the second voltage supply level based upon an analysis of an amplitude of the original signal. | 03-25-2010 |
| 20100073052 | FRACTIONAL RESOLUTION INTEGER-N FREQUENCY SYNTHESIZER - Embodiments of the invention may provide for a frequency synthesizer capable to generate an output signal in which the frequency is a fractional portion of the reference frequency without a fractional divider. Based on mathematical relationship (“relatively prime”) between the reference frequency and other injection frequencies mixed with the output signal of a voltage controlled oscillator, the synthesizer is able to generate signals evenly spaced in the frequency domain like Fractional-N PLLs. The synthesizer may include an Integer-N PLL, a SSB mixer, frequency dividers, and frequency multipliers. A Integer-N PLL may include a Phase and Frequency Detector, a Charge Pump, a Loop Filter and a Dual Modulus Divider. By not requiring a fractional divider, the frequency synthesizer is able to avoid adopting any compensation circuits such as Sigma-Delta modulator to suppress fractional spurs. Therefore, the chip area, power consumption and complexity will be reduced considerably. | 03-25-2010 |
