QUINTIC HOLDINGS Patent applications |
Patent application number | Title | Published |
20130171947 | SYSTEM AND METHOD OF DUPLEX WIRELESS AUDIO LINK OVER BROADCAST CHANNELS - A device and method of duplex audio communication over a broadcast channel are disclosed. The device and method disclosed in the present invention use the clear channel technique to automatically select an un-occupied channel for the transmit side and utilizes an identification embedded in a sub-channel to allow the receiver to automatically tune to the channel used by the transmitter. The clear channels may be determined by respective transceivers or determined by a master transceiver. | 07-04-2013 |
20120238228 | Radio Transmitter and Radio Receiver with Channel Condition Assessment - FM radio transmitter is being widely used in portable devices as a convenient way to output audio contents to ubiquitously available FM radio receivers in cars or homes. However, the signal from the FM radio transmitter may be interfering with the signal being broadcast by an FM radio station. A scan system is incorporated into the FM radio transmitter to quickly and reliably identify a vacant channel for the FM radio transmitter to use. The scan system measures on-channel and out-of-channel signal quality and selects a best channel for transmission based on the measured on-channel and out-of-channel signal quality. The scan system is also incorporated into an FM radio receiver to quickly and reliably tune to a valid channel. The scan system selects the valid channel based on the measured on-channel and out-of-channel signal quality. | 09-20-2012 |
20120082067 | SYSTEM AND METHOD OF DUPLEX WIRELESS AUDIO LINK OVER BROADCAST CHANNELS - A device and method of duplex audio communication over a broadcast channel are disclosed. Low-power transmission over a broadcast channel is permissible for personal use as long as the transmitted power level is below a level allowed by respective regulatory. For example, low-power FM transmitter can be used to provide a wireless audio link between two audio devices. One such application scenario is a wireless speakerphone used as an audio extension from a cellphone for group conference purposes. Such applications face issues of potential interference from other users of the same channel and the need of manually selecting and tuning a pair of channels. The device and method disclosed in the present invention use the clear channel technique to automatically select an un-occupied channel for the transmit side and utilizes an identification embedded in a sub-channel to allow the receiver to automatically tune to the channel used by the transmitter. The clear channels may be determined by respective transceivers or determined by a master transceiver. | 04-05-2012 |
20120034895 | Circuit and Method for Peak Detection with Hysteresis - In a communication system, the signal received or transmitted is required to be maintained within a range for proper operation. For example, a radio frequency signal received from an antenna is usually amplified by a low-noise amplifier (LNA) with adjustable gain. The input RF signal is properly amplified by the LNA further processing by subsequently receive path of the receiver. A peak detector may be used to detect the peak amplitude of the amplified input and provides a proper gain for the LNA. The detected peak amplitude may be affected by the noises which may inadvertently cause the gain control to fluctuate randomly. In order to avoid the above issues, some hysteresis has to be built into the peak detection so that the gain control will not be so sensitive to the noise. The present invention discloses a system and method for peak detection with accurate hysteresis. The peak detection uses a high threshold path and a low threshold path to derive the high and low thresholds for gain control with hysteresis. The high threshold path and the low threshold path use pre-amplifiers with different gain factors to amplify low level signals to overcome the non-linearity issue of input-output transfer characteristic of the peak detectors and consequently results in a peak detection system with accurate hysteresis. | 02-09-2012 |
20120026407 | System and Method for Configurable Multi-standard Receiver - A configurable multi-standard receiver. A receiver comprises a mixer, a processing module and an analog to digital converter is disclosed to receive multi-standard radio signals. The processing module includes a first selection switch and first parameter control, where the first selection switch configures the processing module as a complex filter or a real-valued filter and the first parameter control configures the characteristics of the filter. Furthermore, the analog to digital converted is preferably implemented using sigma delta modulation to achieve a desired noise shaping. The sigma delta modulation comprises a second selection switch and second parameter control. The second selection switch configures the sigma delta modulation to function as a unit having a complex loop filter or a unit having real-valued loop filters. The second parameter control configures the characteristics of the loop filter. The settings for the first and second selection switches and the first and second control parameters may be stored in a control register. | 02-02-2012 |
20120025921 | Low Noise VCO Circuit Having Low Noise Bias - A low noise VCO circuit for an LC VCO circuit comprising MOS varactors is disclosed. The LC VCO circuit usually comprises an LC tuning circuit coupled with a pair of cross-coupled transistors used as a negative impedance element. A pair of varactors is used to provide fine tuning by applying a control voltage to the varactor. Since the varactor is also coupled to the pair of cross-coupled transistor, the process variation and temperature change may affect the bias voltage coupled to the pair of varactors. Therefore, a bias circuit usually is used to alleviate the impact of process variation and temperature change associated with the pair of transistor. Nevertheless, the bias voltage typically is implemented by providing a current flowing through a resistor, wherein the current is generated by a current source. The noise associated with the current source will affect the performance of the VCO circuit. A low noise VCO circuit is disclosed which utilizes a low noise bias circuit. The low noise bias circuit comprises a current source, a load device and a voltage divider wherein the load device is coupled to the voltage divider in parallel. The load device may be implemented using a bipolar transistor or a diode-connected MOS device. | 02-02-2012 |
20120025911 | Low Noise Amplifier with Current Bleeding Branch - An LNA circuit for providing a wide range of gain while maintaining the output headroom. In a radio frequency (RF) receiver, the signal received by the receiver may be extremely small. For a transmitter in a short distance, the received signal may be relatively strong. A low power amplifier usually is used to amplify the input signal. The LNA has to be designed to accommodate a wide range of gain. A convention LNA circuit supporting a wide range of gain often suffers from reduced output headroom due to increased current through the load resistor. The present invention discloses the use of current bleeding branch to allow a portion of current to flow through the current bleeding branch and consequently reduces the current that would have flown through the load resistor. Consequently, the voltage across the load resistor may be maintained low to allow adequate output headroom. | 02-02-2012 |
20120007651 | SYSTEM AND METHOD FOR SIGNAL MIXING BASED ON HIGH ORDER HARMONICS - A system and method for signal mixing using high-order harmonics of a local oscillation (LO) signal. In a radio frequency (RF) system, the input RF signal is converted to a lower frequency signal such as an intermediate frequency (IF) signal or a baseband signal for further processing. A voltage controlled oscillator (VCO) is often used to generate a VCO signal which is then divided down to provide the needed LO signals for down conversion. The present invention discloses a system and method for generating a composite harmonic signal based on a linear combination of divided down LO signals with specific phase shifts. Consequently a VCO signal with lower frequency can be used to conserve power. The composite harmonic signal is mixed with the input RF signal to generate a series of mixed signal including one associated with a high-order harmonic of the divided down LO signal. Systems to implement the high order harmonic mixing is also disclosed which comprises a plurality of mixer sections with configurable weighting factors. A combination circuit is used to combine the weighted mixed signals which contains a term corresponding the mixing of the input RF signal with a high order LO harmonic. | 01-12-2012 |
20120007638 | SYSTEM AND METHOD FOR MULTIPLE-PHASE CLOCK GENERATION - A system and method of clock generation to provide divided-by-2 clocks with prescribed phase shifts are disclosed. In a communication system with high-order harmonic mixing, the system requires LO signals with a set of prescribed phase shifts, such as 0°, 45°, 90°, and 135°, or 0°, 60° and 120°. Often, the clock generation system involves a divide-by-2 divider to derive the clock signals with the prescribed phase shifts. In a conventional implementation of the divide-by-2 divider, the system is subject to phase uncertainty in the output signal. Accordingly, a system comprises multiple latch pairs and respective differential clocks are used to generate the clocks with the set of correct prescribed phase shifts. | 01-12-2012 |
20120001699 | SYSTEM AND METHOD FOR EXTENDING VCO OUTPUT VOLTAGE SWING - Voltage controlled oscillator (VCO) has been widely used in radio frequency communication systems. In a typical VCO implementation, a pair of directly cross-coupled MOS transistors is used as a switching device and an LC resonant circuit is used to tune the desired frequency. The direct cross coupling of the MOS transistor pair will result in limited output voltage swing since a large swing may cause the MOS transistors into a linear region to increase phase noise. The VCO system to increase the output voltage swing according to one embodiment of the present invention includes DC-blocking capacitors to avoid direct cross coupling of the MOS pair. The VCO further includes circuit to provide bias for the gate voltage of the MOS pair. A method for increasing the output voltage swing is disclosed for a VCO system having LC resonant circuit. The method includes providing DC-blocked cross coupling from the drains of the cross-coupled transistor pair to the gates of the cross-coupled transistor pair. The method also includes providing an offset voltage to the gates of the cross-coupled transistor pair to reduce the maximum gate-to-drain voltage of a cross-coupled NMOS transistor pair or maximum drain-to-gate voltage of a cross-coupled PMOS transistor pair so that the cross-coupled transistor pair will work in a saturation region when the output voltage swing is increased. | 01-05-2012 |
20110316654 | SYSTEM AND METHOD FOR TUNING-CAPACITOR-ARRAY SHARING - A system and method for sharing a switched capacitor array (SCA) by two tuning circuits are disclosed. In a multiple-band radio receiver, there is a need to use multiple tuning circuits for signals in different bands. The tuning circuit typically comprised an adjustable capacitance device and other tuning components, where the adjustable capacitance device is often implemented in SCA. The present invention discloses a system and method comprising n sections of capacitor elements where each capacitor element comprises a capacitor and switches to selectively connect the capacitor to one of the tuning circuit. Consequently, the SCA can be shared by the two tuning circuits. The control bits for the switched may be provided from a programmable control register. | 12-29-2011 |
20110159835 | CRYSTAL-LESS CLOCK GENERATION FOR RADIO FREQUENCY RECEIVERS - Systems and methods of clock generation for radio frequency receiver. In radio frequency receiver, the system requires accurate local oscillating (LO) signal and system clocks for proper operation and to ensure high quality performance. In order to achieve accurate LO frequency and system clock, a crystal or and accurate reference clock is provide to the clock generation circuit. How a low-cost receiver, it is desirable to eliminate the requirement for a crystal or an accurate reference clock. The present invention discloses systems and methods to utilize a pilot signal embedded in the transmitted signal. The pilot signal usually has very accurate frequency which is particular true for broadcast system such as FM broadcast. In various embodiments of the present invention, the systems and methods measure the relation between the frequency of the pilot signal and the current clock generated. The measured result is compared with a know relation corresponding to the frequency of the pilot signal and the target clock signal and the result is used to adjust the clock generation circuit. | 06-30-2011 |
20110053534 | CLOCK GENERATION FOR INTEGRATED RADIO FREQUENCY RECEIVERS - Systems of clock generation for integrated radio frequency receiver. In an integrated radio frequency receiver, a mixer is often used to down convert the incoming radio frequency signal. The down converted signal is then digitized and digital signal processing circuitry is used for efficient and flexible implementation of various functions to receive the underlying audio and/or data information. The mixer requires clock generation circuitry to provide a proper local oscillator signal for a selected channel. On the other hand, the digital signal processing circuitry requires its separate digital clock for proper operations. The clock generation system utilizes single local oscillator generation circuitry to provide the local oscillator signals required by the mixer and the digital clock signals required by the digital signal processing circuitry. In order to maintain a fixed frequency for the digital clock signal regardless channel selection, a fractional divider coupled with sigma-delta circuitry is used to derive the digital clock signal. | 03-03-2011 |
20110034139 | System and Method of Automatic Tuning Adjustment for Portable Radio Frequency Receivers - Systems and method for automatic adjustment of tunable filter for portable radio frequency receivers. The effective antenna impedance for a portable radio frequency receiver is often affected by human body. The front end tunable filter may become off tuned due to human body effect. The system relies on radio frequency signals received from an antenna interface and utilizes receive path circuitry to derive signal parameters about the received signal. Tuning control circuitry is used to provide control signals based on the signal parameters to adjust the tunable filter to achieve the best receiver performance. A method is disclosed for automatic adjustment of the tunable filter. The method comprises steps of receiving radio frequency signals, filtering the received radio frequency, processing the filtered signal to obtain digitized signals, deriving signal parameters based on the digitized signal; providing control signals to adjust the tunable filter, and repeating the steps until a desired result is achieved with respect to the signal parameters. | 02-10-2011 |
20100215120 | Low-Power Polar Transmitter - Apparatus and methods for providing transmit signals in polar transmitters are described. A modulation signal may be provided from a VCO to low noise and low power signal paths and selectively combined based on a desired output power level. CMOS and CML divider circuits may be used to implement the low noise and low power signal paths respectively, and logic may be provided to select desired signals from the low noise and low power signal stages based on the desired output power level. | 08-26-2010 |
20090311973 | Radio Transmitter and Radio Receiver with Channel Condition Assessment - FM radio transmitter is being widely used in portable devices as a convenient way to output audio contents to ubiquitously available FM radio receivers in cars or homes. However, the signal from the FM radio transmitter may be interfering with the signal being broadcast by an FM radio station. A scan system is incorporated into the FM radio transmitter to quickly and reliably identify a vacant channel for the FM radio transmitter to use. The scan system measures on-channel and out-of-channel signal quality and selects a best channel for transmission based on the measured on-channel and out-of-channel signal quality. The scan system is also incorporated into an FM radio receiver to quickly and reliably tune to a valid channel. The scan system selects the valid channel based on the measured on-channel and out-of-channel signal quality. | 12-17-2009 |
20090310803 | CHANNEL COORDINATION BETWEEN A WIRELESS EARPHONE AND A TRANSMITTER - A method of the present invention includes coordinating tuning to the same channel of a radio band wherein the following steps are performed: tuning to a channel, within a radio band, that uses a side band; receiving control information in the side band of the channel; and processing the received audio information in the channel using the control information. | 12-17-2009 |
20090310786 | Systems for Channel Coordination of Audio and Data Transmission in a Broadcast Band - Systems for audio and data transmission in a broadcast band are disclosed. The system comprises a channel condition assessment module at the transmit side to identify an un-occupied or empty channel to transmit. The system also comprises a means to achieve automatic channel coordination between the transmit side and the receive side. Further, the transmit side includes a digital interface module and the receive side includes a digital output interface module configured to control an embedding electronic device. Means for enhancing audio privacy and digital data rate are also disclosed. | 12-17-2009 |
20090243690 | SINGLE-CLOCK-BASED MULTIPLE-CLOCK FREQUENCY GENERATOR - In an embodiment of the present invention, a clock generator circuit is disclosed to include a phase locked loop (PLL) that is responsive to a clock signal quadrature output frequency and a clock signal in-phase output frequency. The clock generator circuit generates a single clock frequency that is a fraction of the frequency of the clock signal quadrature output frequency and the clock signal in-phase output frequency. The PLL includes a single voltage controlled oscillator (VCO) that generates the single clock frequency. A plurality of dividers is included in the clock generator circuit and is responsive to the clock signal quadrature output frequency and the clock signal in-phase output frequency and generates multiple clock frequencies, each clock frequency being a unique frequency, each of the plurality of dividers generating an output that is phase and frequency synchronized to the single clock frequency. | 10-01-2009 |