| QIMONDA FLASH GMBH Patent applications |
| Patent application number | Title | Published |
|---|
| 20090273017 | Method for Forming Trenches on a Surface of a Semiconductor Substrate - A method for forming trenches on a surface of a semiconductor substrate is described. The method may include: etching a first plurality of trenches into the surface of the semiconductor substrate; filling the first plurality of trenches with at least one material; and etching a second plurality of trenches into every second trench of the first plurality of trenches. Furthermore, a method for forming floating-gate electrodes on a semiconductor substrate and an integrated circuit is described. | 11-05-2009 |
| 20090261397 | Integrated Circuit with Floating-Gate Electrodes Including a Transition Metal and Corresponding Manufacturing Method - An integrated circuit is described. The integrated circuit may comprise a multitude of floating-gate electrodes, wherein at least one of the floating-gate electrodes has a lower width and an upper width, the lower width being larger than the upper width, and wherein the at least one of the floating-gate electrodes comprises a transition metal. A corresponding manufacturing method for an integrated circuit is also described. | 10-22-2009 |
| 20090196110 | INTEGRATED CIRCUIT, AND METHOD FOR TRANSFERRING DATA - An integrated circuit and a method for transferring data is provided. One embodiment provides a method for transferring data in an integrated circuit. The method includes driving a first line in accordance with data to be transferred. The data is transmitted from the first line to a second line based on a capacitive coupling. | 08-06-2009 |
| 20090072274 | INTEGRATED CIRCUIT INCLUDING A FIRST GATE STACK AND A SECOND GATE STACK AND A METHOD OF MANUFACTURING - An integrated circuit including a first gate stack and a second gate stack and a method of manufacturing is disclosed. One embodiment provides non-volatile memory cells including a first gate stack and a gate dielectric on a first surface section of a main surface of a semiconductor substrate, and a second gate stack including a memory layer stack on a second surface section. A first pattern is transferred into the first gate stack and a second pattern into the second gate stack. | 03-19-2009 |
