| PHISON ELECTRONICS CORP. Patent applications |
| Patent application number | Title | Published |
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| 20120131263 | MEMORY STORAGE DEVICE, MEMORY CONTROLLER THEREOF, AND METHOD FOR RESPONDING HOST COMMAND - A memory storage device, a memory controller thereof, and a method for responding host commands are provided. The memory storage device has a flash memory chip and a buffer memory. The present method includes receiving a write command issued by a host system and determining whether the write command causes the memory storage device to trigger a data moving procedure. If the write command does not cause the memory storage device to trigger the data moving procedure, the present method further includes sending an acknowledgement message corresponding to the write command to the host system after data corresponding to the write command is completely transferred to the buffer memory. | 05-24-2012 |
| 20120110300 | DATA MANAGEMENT METHOD, MEMORY CONTROLLER AND MEMORY STORAGE APPARATUS - A data management method, a memory controller and a memory storage apparatus are provided. The method includes grouping physical units of a rewritable non-volatile memory module into at least a data area and a free area. The method also includes configuring logical units for mapping to the physical units of the data area and writing update data belonging to the logical pages of the logical units orderly into the physical pages of physical units gotten from the free area. The method further includes configuring root units for the logical pages, configuring an entry chain for each of the root units and building entries on the entry chains for recording update information of the updated logical pages, wherein each of the logical pages corresponds to a root unit. Accordingly, the table size for storing the update information is effectively reduced and the time for searching valid data is effectively shortened. | 05-03-2012 |
| 20120110243 | DATA WRITING METHOD, MEMORY CONTROLLER, AND MEMORY STORAGE APPARATUS - A data writing method for a rewritable non-volatile memory module is provided, the rewritable non-volatile memory module has a plurality of physical blocks, each of the physical blocks has a plurality of physical pages, a portion of the physical blocks are mapped to a plurality of logical blocks, and each of the logical blocks has a plurality of logical pages. The data writing method includes receiving data, and the data has a plurality of data bits and belongs to one of the logical pages. The data writing method also includes determining whether each of the data bits is a specific value. The data writing method further includes not writing the data into the physical pages when each of the data bits is the specific value. Thereby, the performance of a memory storage apparatus is improved. | 05-03-2012 |
| 20120096321 | BLOCK MANAGEMENT METHOD, MEMORY CONTROLLER, AND MEMORY STORAGE APPARATUS - A block management method for managing physical blocks of a rewritable non-volatile memory, and a memory controller and a memory storage apparatus using the same are provided. The method includes grouping the physical blocks into at least a data area, a free area, and a replacement area, and grouping the physical blocks of the data area and the free area into a plurality of physical units. The method also includes when one of the physical blocks belonging to of the physical units of the data area becomes a bad physical block, getting a physical block from the replacement area and replacing the bad physical block with the gotten physical block. The method further includes associating a physical unit that contains no valid data in the free area with the replacement area. Thereby, the physical blocks can be effectively managed and the access efficiency can be improved. | 04-19-2012 |
| 20120089805 | MEMORY STORAGE DEVICE, MEMORY CONTROLLER THEREOF, AND METHOD FOR AUTOMATICALLY CREATING FILL-FILE THEREOF - A memory storage device, a memory controller thereof, and a method for automatically creating a fill-file thereof are provided. In the present method, a plurality of logical addresses is configured and grouped into a plurality of logical blocks to be mapped to physical blocks of a memory chip in the memory storage device. When a host system is powered on, whether the logical addresses have been formatted into a partition is determined. If the logical addresses have been formatted into a partition, whether a fill-file of a predetermined file capacity exists is determined. If the fill-file does not exist, data related to the fill-file is respectively filled into a file allocation table (FAT) and a root directory of the formatted partition when the host system reads the FAT and the root directory, so as to automatically create the fill-file. | 04-12-2012 |
| 20120089766 | NON-VOLATILE MEMORY STORAGE APPARATUS, MEMORY CONTROLLER AND DATA STORING METHOD - A non-volatile memory storage apparatus having a connector, an energy storage circuit, a power regulator and supply circuit, a non-volatile memory module, a memory controller and a buffer memory is provided. The power regulator and supply circuit is configured for transforming an output voltage from the energy storage circuit into a first voltage used for the non-volatile memory module and a second voltage used for the memory controller and the buffer memory. The memory controller is configured for writing data stored temporarily in the buffer memory into the non-volatile memory module with a special writing mode when receiving a detecting signal indicating that an input voltage is continuously smaller than a predetermined voltage for a predetermined period or receiving a detecting signal indicating that an inactive status of the connector or receiving a suspend mode signal, a warm reset signal or a hot reset signal from a host system. | 04-12-2012 |
| 20120079231 | DATA WRITING METHOD, MEMORY CONTROLLER, AND MEMORY STORAGE APPARATUS - A data writing method and a memory controller and a memory storage apparatus using the same are provided. The data writing method includes grouping a plurality of physical blocks into a plurality of physical units, grouping the physical units into at least a data area and a free area, and configuring a plurality of logical units for mapping to the physical units of the data area. The data writing method also includes getting a physical unit from the free area, writing data in at least one of the logical units into the gotten physical unit, and writing an end mark into the gotten physical unit, and in the gotten physical unit, the end mark follows the data belonging to the at least one logical unit. Thereby, the storage space of each physical unit can be effectively used, and the lifespan of the memory storage apparatus can be prolonged. | 03-29-2012 |
| 20120072805 | MEMORY STORAGE DEVICE, MEMORY CONTROLLER THEREOF, AND METHOD THEREOF FOR GENERATING LOG LIKELIHOOD RATIO - A memory storage device, a memory controller, and a log likelihood ratio (LLR) generation method are provided. A read data corresponding to a first storage state is obtained from memory cells of a flash memory chip in the memory storage device by using bit data read voltages. An error checking and correcting procedure is performed on the read data to obtain a second storage state corresponding to the read data when the read data is written. An amount of storage error is obtained in storage states satisfying a statistic number, and a storage error means that data is in the second storage state when being written and is in the first storage state when being read. A logarithmic operation is executed according to the statistic number, an amount of the storage states, and the amount of storage error to generate a first LLR of the read data. | 03-22-2012 |
| 20120059972 | HYBRID STORAGE APPARATUS AND HYBRID STORAGE MEDIUM CONTROLLLER AND ADDRESSING METHOD THEREOF - A hybrid storage apparatus including a non-volatile memory module, a hard disk module, and a hybrid storage medium controller is provided. The hybrid storage medium controller groups physical bocks of the non-volatile memory module into at least a storage area and a replacement area, and the hybrid storage medium controller configures a plurality of logical blocks for mapping to the physical blocks in the storage area and configures a plurality of logical disk addresses for mapping to physical disk addresses of the hard disk module. The hybrid storage medium controller further configures a plurality of logical access addresses to be accessed by a host system and initially maps a portion of the logical access addresses to the logical blocks and the other logical access addresses to a portion of the logical disk addresses. Accordingly, the hybrid storage apparatus can have improved data access performance and prolonged lifespan. | 03-08-2012 |
| 20120036369 | MEMORY IDENTIFICATION CODE GENERATION METHOD, MANAGEMENT METHOD, CONTROLLER, AND STORAGE SYSTEM - An identification code generation method and a management method for a non-volatile memory, and a controller and a storage system using the same are provided, and the non-volatile memory has a plurality of physical blocks. The identification code generation method includes testing the physical blocks to obtain an availability state of the physical blocks and identifying a plurality of good physical blocks or bad physical blocks among the physical blocks according to the availability state. The identification code generation method also includes generating a memory identification code corresponding to the non-volatile memory according to the good physical blocks or the bad physical blocks. Thereby, in the present invention, a unique memory identification code is generated and is prevented from being stolen. | 02-09-2012 |
| 20120030411 | DATA PROTECTING METHOD, MEMORY CONTROLLER AND PORTABLE MEMORY STORAGE APPARATUS - A data protecting method for a portable memory storage apparatus is provided. The method includes determining whether a mode signal is at a data protecting mode, and performing a file hiding procedure to change a file allocation table if the mode signal is at the data protecting mode, wherein a host system coupled to the portable memory storage device is allowed to only access a portion of logical addresses of the portable memory storage apparatus according to the changed file allocation table and files stored in the portable memory storage apparatus before the file hiding procedure are written into another portion of the logical addresses. Additionally, the method still includes performing a file showing procedure to change the file allocation table if the mode signal is not at the data protecting mode, wherein the host system may access all the logical addresses according to the changed file allocation table. | 02-02-2012 |
| 20120020151 | STORAGE APPARATUS AND METHOD OF MANUFACTURING THE SAME - A storage apparatus including a circuit board, a control circuit element, a terminal module and a storage circuit element is provided. The circuit board includes a first surface, a second surface, a connect part, openings, metal contacts and metal units. The openings pass through the circuit board from the first surface to the second surface and the metal contacts are exposed on the first surface. The terminal module is disposed on the first surface and has elastic terminals and each of the elastic terminals has a first contact part and a second contact part. The first contact parts respectively contact with the metal contacts and the second contact parts respectively pass through the openings to protrude from the second surface. The metal units are disposed on the second surface and located between the openings and the connect part. Accordingly, the volume of the storage apparatus can be reduced. | 01-26-2012 |
| 20120011309 | METHOD FOR PREVENTING READ-DISTURB HAPPENED IN NON-VOLATILE MEMORY AND CONTROLLER THEREOF - A method for preventing read-disturb happened in non-volatile memory and a controller thereof are disclosed. The non-volatile memory includes a plurality of blocks, and each block includes a plurality of pages. The method includes storing a program code executed by a controller of the non-volatile memory storage device for controlling the non-volatile memory storage device into at least a first block of the blocks; and copying the program code stored in the first block into at least a second block of the blocks when power is supplied to the non-volatile memory storage device. | 01-12-2012 |
| 20110317488 | DATA READING METHOD AND CONTROL CIRCUIT AND MEMORY CONTROLLER USING THE SAME - A data reading method for a flash memory module is provided. The method includes applying a bit-data-read voltage to get read data from memory cells of the flash memory module. The method also includes setting a minus-adjustment-bit-data-read voltage and a plus-adjustment-bit-data-read voltage corresponding to the bit-data-read voltage based on an error-distribution estimated value and applying the minus-adjustment-bit-data-read voltage and the plus-adjustment-bit-data-read voltage to obtain soft values corresponding to the read data from the memory cells. The method further includes calculating a soft-information estimated value corresponding to each bit of the read data according to the soft-values. Accordingly, the method can effectively obtain soft information. | 12-29-2011 |
| 20110311012 | METHOD AND DATA TRANSCEIVING SYSTEM FOR GENERATING REFERENCE CLOCK SIGNAL - A method and a data transceiving system for generating a reference clock signal are provided. The data transceiving system comprises a voltage controlled oscillator, a phase lock loop (PLL) unit, and a data receiver. The voltage controlled oscillator is used to generate a reference clock signal. The PLL unit is used to increase a clock frequency of the reference clock signal to generate a PLL clock signal. The data receiver is used to compare the PLL clock signal with a clock signal of an input data stream, so as to output a voltage adjusting signal to the voltage controlled oscillator. The voltage controlled oscillator adjusts the clock frequency of the reference clock signal to be generated according to the reference clock signal, so as to lock the clock frequency of the PLL clock signal to a base frequency of the clock signal of the input data stream. | 12-22-2011 |
| 20110302364 | DATA WRITING METHOD FOR NON-VOLATILE MEMORY AND CONTROLLER USING THE SAME - A data writing method for a non-volatile memory is provided, wherein the non-volatile memory includes a data area and a spare area. In the data writing method, a plurality of blocks in a substitution area of the non-volatile memory is respectively used for substituting a plurality of blocks in the data area, wherein data to be written into the blocks in the data area is written into the blocks in the substitution area, and the blocks in the substitution area are selected from the spare area of the non-volatile memory. A plurality of temporary blocks of the non-volatile memory is used as a temporary area of the blocks in the substitution area, wherein the temporary area is used for temporarily storing the data to be written into the blocks in the substitution area. | 12-08-2011 |
| 20110258496 | DATA READING METHOD, MEMORY STORAGE APPARATUS AND MEMORY CONTROLLER THEREOF - A data reading method for a writable non-volatile memory module having physical pages is provided. The method includes grouping the physical pages into a plurality of physical page groups. The method also includes reading first data from a physical page of a first physical page group by applying a first threshold voltage set. The method still includes, when the first data can be corrected by an error checking and correcting circuit and an error bit number corresponding to the first data is not smaller than an error bit number threshold, calculating compensation voltages for the first threshold voltage set. The method further includes adjusting the first threshold voltage set by the compensation voltages and applying the adjusted first threshold voltage set to read data from the physical pages of the first physical page group. Accordingly, data stored in the rewritable non-volatile memory module can be correctly read. | 10-20-2011 |
| 20110258495 | METHODS OF CALCULATING COMPENSATION VOLTAGE AND ADJUSTING THRESHOLD VOLTAGE AND MEMORY APPARATUS AND CONTROLLER - Methods of calculating a compensation voltage and adjusting a threshold voltage, a memory apparatus, and a controller are provided. In the present invention, data is written into a rewritable non-volatility memory, and the data is then read from the rewritable non-volatility memory and compared with the previously written data to obtain error bit information. The compensation voltage of the threshold voltage is calculated according to the error bit information, and the threshold voltage is adjusted according to the compensation voltage. | 10-20-2011 |
| 20110252209 | DATA ACCESS METHOD AND SYSTEM, STORAGE MEDIUM CONTROLLER AND STORAGE SYSTEM - A data access method for writing data into a storage apparatus is provided, wherein the storage apparatus has a storage unit, the storage unit has a partition, the storage property of the partition is set as a write protect mode and the storage apparatus is coupled to a host system having an operation system. The data access method includes transmitting a command from the host system to the storage apparatus through a human interface device path and setting the storage property of the first partition as a writable mode in response the command. The data access method also includes storing data into the partition by using built-in commands of the operation system. Accordingly, the data access method can write data into a partition that has been at the write protect mode when a user logins the operation system with a limited user authority mode. | 10-13-2011 |
| 20110252191 | METHOD OF DYNAMICALLY SWITCHING PARTITIONS, MEMORY CARD CONTROLLER AND MEMORY CARD STORAGE SYSTEM - A method of dynamically switching partitions for a memory card having a plurality of physical blocks is provided. The method includes configuring logical blocks for mapping to at least a portion of the physical blocks and dividing the logical blocks into first and second partitions; coupling the memory card to a host system and setting CSD corresponding to the memory card as a first default value corresponding to the first partition, wherein the host system requests the CSD to obtain the first default value and accesses the first partition according to the first default value; and setting the CSD corresponding to the memory card as a second default value corresponding to the second partition in response to a switch command from the host system, wherein the host system re-requests the CSD to obtain the second default value and accesses the second partition according to the second default value. | 10-13-2011 |
| 20110231732 | ERROR CORRECTING METHOD, AND MEMORY CONTROLLER AND MEMORY STORAGE SYSTEM USING THE SAME - An error correcting method for a memory chip is provided. The memory chip has a plurality of physical blocks, each of the physical blocks has a plurality of physical pages, and the physical pages belonging to the same physical block are individually written and simultaneously erased. The error correcting method includes sequentially writing a plurality of data into the physical pages of a first physical block and generating a parity information according to the data. The error correcting method further includes writing the parity information into one of the physical pages of the first physical block following the data and correcting the data in the first physical block according to the parity information. Accordingly, the parity information can be used for correcting error bits in the data when an error checking and correcting circuit can not correct the error bits. Thereby, the error correcting ability is enhanced. | 09-22-2011 |
| 20110231621 | SYSTEM RECOVERY METHOD, AND STORAGE MEDIUM CONTROLLER AND STORAGE SYSTEM USING THE SAME - A system recovery method is provided. The system recovery method includes grouping storage addresses corresponding to a storage device into a first memory area and a second memory area. The system recovery method also includes storing initial data from a host system into the storage addresses of the first memory area, storing update data for updating the initial data into the storage addresses of the second memory area, and establishing an address corresponding table to record update information corresponding to the storage addresses for storing the update data. The system recovery method further includes erasing the update information from the address corresponding table when the storage device is powered off and re-coupled to the host system. Thereby, the system recovery method can instantly recover system settings. | 09-22-2011 |
| 20110231597 | DATA ACCESS METHOD, MEMORY CONTROLLER AND MEMORY STORAGE SYSTEM - A data access method for accessing a non-volatile memory module is provided. The data access method includes configuring a plurality of logical addresses and grouping the logical addresses into logical blocks to map to the physical blocks of the non-volatile memory module, and a host system formats the logical addresses into one partition by using a file system and the partition stores at least one file and a file description block corresponding to the file. The data access method further includes searching an end mark corresponding to entry values of the file description block, setting logical addresses storing the end mark as default pattern addresses, and setting values stored in the logical addresses as default values corresponding to the default pattern addresses. Accordingly, the data access method can divide one partition into a write protect area and a writable area by updating data stored in the default pattern addresses. | 09-22-2011 |
| 20110219172 | NON-VOLATILE MEMORY ACCESS METHOD AND SYSTEM, AND NON-VOLATILE MEMORY CONTROLLER - A non-volatile memory access method and system, and a non-volatile memory controller are provided for accessing a plurality of physical blocks in a non-volatile memory chip, and each physical block has a plurality of physical pages. The method includes determining whether there is enough space in a first physical block to write a plurality of specific physical pages when data stored in one of the specific physical pages are to be updated; and writing valid data and data to be updated into the first physical block when the first physical block has enough space to write the specific physical pages. | 09-08-2011 |
| 20110213912 | MEMORY MANAGEMENT AND WRITING METHOD, AND MEMORY CONTROLLER AND MEMORY STORAGE SYSTEM USING THE SAME - A memory management and writing method for managing a memory module is provided. The memory module has a plurality of memory units and a plurality of data input/output buses corresponding to the memory units. The method includes configuring a plurality of logical units, dividing each of the logical units as a plurality of logical parts, and mapping the logical parts of each of the logical units to physical blocks of the memory units. The method also includes respectively establishing mapping tables corresponding to the data input/output buses, and only using one of the data input/output buses to write data from a host system into the corresponding memory unit according to the mapping table corresponding to the data input/output bus. Accordingly, the method can effectively increase the speed of writing data into the memory module. | 09-01-2011 |
| 20110202780 | DATA WRITING METHOD FOR NON-VOLATILE MEMORY, AND CONTROLLER AND STORAGE SYSTEM USING THE SAME - A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface. | 08-18-2011 |
| 20110202715 | MANAGEMENT-PARTITIONABLE STORAGE SYSTEM, USE METHOD AND MANAGEMENT METHOD THEREOF, AND CONTROLLER THEREOF - A management partitionable storage system, a use method for the management partitionable storage system, a management method and a controller thereof are provided. Herein, whether the management-partitionable storage system is connected into a host is determined. The management-partitionable storage system includes a simulated compact disc (CD) partition and a data storage partition. When the management-partitionable storage system is coupled to the host, the simulated compact disc partition is mounted on a mount point of the host. A command is received from the mount point, wherein the command includes an identification code corresponding to the data storage partition. The command is executed to the data storage partition according to the identification code. | 08-18-2011 |
| 20110202690 | DATA WRITING METHOD FOR NON-VOLATILE MEMORY, AND CONTROLLER AND STORAGE SYSTEM USING THE SAME - A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface. | 08-18-2011 |
| 20110197014 | MEMORY MANAGEMENT AND WRITING METHOD AND REWRITABLE NON-VOLATILE MEMORY CONTROLLER AND STORAGE SYSTEM USING THE SAME - A memory management and writing method for managing a plurality of physical units of a memory chip is provided. The present method includes grouping the physical units into a first physical unit group and a second physical unit group, recording and calculating a first erase count of the first physical unit group and a second erase count of the second physical unit group, and calculating an erase count difference between the first erase count and the second erase count. The present method also includes determining whether the erase count difference is larger than an erase count difference threshold when a write command is received. The method further includes executing a switched writing procedure to write data corresponding to the write command into the memory chip when the erase count difference is larger than the erase count difference threshold. Thereby, the lifespan of the memory chip is effectively prolonged. | 08-11-2011 |
| 20110191525 | FLASH MEMORY STORAGE DEVICE, CONTROLLER THEREOF, AND DATA PROGRAMMING METHOD THEREOF - A flash memory storage device, a controller thereof, and a data programming method are provided. The flash memory storage device has a flash memory comprising a plurality of physical blocks, each physical block includes a plurality of physical addresses, and the physical addresses comprises at least one fast physical address and at least one slow physical address. The method comprises at least grouping the physical blocks into a data area and a spare area; setting a predetermined block number; obtaining m physical blocks from the spare area, receiving a write command comprising a write data and a logical address, determining a logical address range of a buffer according to the logical address and the predetermined block number. When all logical addresses to be programmed with the write data are within the logical address range of the buffer, using a fast mode to program the data into the m physical blocks. | 08-04-2011 |
| 20110191524 | FLASH MEMORY STORAGE DEVICE, CONTROLLER THEREOF, AND PROGRAM MANAGEMENT METHOD THEREOF - A flash memory storage device, a controller thereof, and a programming management method thereof are provide for the flash memory storage device including a flash memory chip, wherein at least a first thread and a second thread are to be implemented within the flash memory storage device. The method includes defining a predetermined programming unit and receiving a first write command sent by a host. The method also includes distributing a control right of the flash memory chip to the first thread if the first write command is determined to be executed by the first thread, and controlling the first thread to release the control right of the flash memory chip after the first thread finishes a programming operation of the predetermined programming unit. | 08-04-2011 |
| 20110185435 | FLASH MEMORY STORAGE SYSTEM, AND CONTROLLER AND ANTI-FALSIFYING METHOD THEREOF - A flash memory storage system having a flash memory controller, a flash memory chip and a smart card chip is provided. The flash memory chip is configured to store security data. The flash memory controller generates a signature corresponding to the security data according to, a private key and the security data with a one-way hash function, and stores the signature into the smart card chip. | 07-28-2011 |
| 20110161565 | FLASH MEMORY STORAGE SYSTEM AND CONTROLLER AND DATA WRITING METHOD THEREOF - A flash memory storage system having a flash memory controller and a flash memory chip is provided. The flash memory controller configures a second physical unit of the flash memory chip as a midway cache physical unit corresponding to a first physical unit and temporarily stores first data corresponding to a first host write command and second data corresponding to a second host write command in the midway cache physical unit, wherein the first and second data corresponding to slow physical addresses of the first physical unit. Then, the flash memory controller synchronously copies the first and second data from the midway cache physical unit into the first physical unit, thereby shortening time for writing data into the flash memory chip. | 06-30-2011 |
| 20110161564 | BLOCK MANAGEMENT AND DATA WRITING METHOD, AND FLASH MEMORY STORAGE SYSTEM AND CONTROLLER USING THE SAME - A block management method for managing a plurality of physical blocks is provided. The method includes grouping the physical blocks into a plurality of physical units, grouping a portion of the physical units into a data area and a spare area, configuring a plurality of logical units, and grouping the logical units into a plurality of logical unit groups and configuring another portion of the physical units as a plurality of global random physical units corresponding to the logical unit groups, wherein each of the global random physical units corresponds to one of the logical unit groups. The method further includes getting the physical units from the spare area as global random substitute physical units of the global random physical units. Accordingly, the method can store data in the global random physical units or the global random substitute physical units, thereby reducing the time for executing a host write command. | 06-30-2011 |
| 20110154162 | DATA WRITING METHOD FOR A FLASH MEMORY, AND FLASH MEMORY CONTROLLER AND FLASH MEMORY STORAGE APPARATUS USING THE SAME - A data writing method for a flash memory, and a flash memory controller and a flash memory storage apparatus using the same are provided. First, data is received from a host system. Next, the data is divided into at least one frame. Afterwards, an error checking and correcting (ECC) code corresponding to the frame is generated so as to form at least one ECC frame. Then, the ECC frame is divided into a plurality of frame segments. Finally, the frame segments are written into a flash memory chip according to a non-sequentially ranking order. | 06-23-2011 |
| 20110148475 | DRIVING CIRCUIT OF INPUT/OUTPUT INTERFACE - A driving circuit of an input/output (I/O) interface is provided. The driving circuit includes a main output stage and an enhancing unit. The main output stage receives at least one driving signal and outputs an output signal corresponding to an input signal accordingly. The enhancing unit is coupled to the main output stage. The enhancing unit receives and detects the level of the output signal so as to drive the output force of the main output stage in a first output level or a second output level, wherein the first output level is higher than the second output level. | 06-23-2011 |
| 20110145482 | BLOCK MANAGEMENT METHOD FOR FLASH MEMORY, AND FLASH MEMORY CONTROLLER AND FLASH MEMORY STORAGE DEVICE USING THE SAME - A block management method for managing blocks of a flash memory storage device is provided. The flash memory storage device includes a flash memory controller. The block management method includes the following steps. At least a part of the blocks is grouped into a first partition and a second partition. Whether an authentication code exists is determined. When the authentication code exists, the blocks belonging to the first partition are provided for a host system to access, so the host system displays the first partition and hides the second partition. An authentication information is received from the host system. Whether the authentication information and the authentication code are identical is authenticated. When the authentication information and the authentication code are identical, the blocks belonging to the second partition are provided for the host system to access, so the host system displays the second partition and hides the first partition. | 06-16-2011 |
| 20110145481 | FLASH MEMORY MANAGEMENT METHOD AND FLASH MEMORY CONTROLLER AND STORAGE SYSTEM USING THE SAME - A flash memory management method for managing a plurality of physical units of a flash memory chip is provided. The flash memory management method includes grouping a portion of the physical units into a data area and a spare area; configuring a plurality of logical units and setting mapping relationships between the logical units and the physical units of the data area. The flash memory management method further includes receiving data and writing the data into the physical unit mapped to a second logical unit among the logical units, and the data belongs to a first logical unit among logical units. Accordingly, the flash memory management method can effectively reduce the number of times for organizing valid data, thereby reducing the time for executing a host write-in command. | 06-16-2011 |
| 20110145480 | FLASH MEMORY STORAGE SYSTEM FOR SIMULATING REWRITABLE DISC DEVICE, FLASH MEMORY CONTROLLER, COMPUTER SYSTEM, AND METHOD THEREOF - A flash memory storage system including a flash memory chip, a connector, and a controller is provided. The flash memory chip has a plurality of physical blocks. The connector is configured to couple to a host system. The controller is coupled to the flash memory chip and the connector. The controller configures a plurality of logical blocks and maps the logical blocks to a portion of the physical blocks. In addition, the controller identifies rewritable disc commands from the host system and writes data from the host system into the physical blocks mapped to the logical blocks according to the rewritable disc commands. Thereby, a rewritable disc device is simulated by using the flash memory storage system. | 06-16-2011 |
| 20110140742 | TRANSMISSION DEVICE HAVING EMPHASIS FUNCTION - A transmission driver including a main driving stage and a sub-driving stage is provided. The main driving stage has a main current source, and is adapted for receiving a first differential input data stream and outputting a differential output data stream by using the main current source. The sub-driving stage has two sub-current sources, and is adapted for receiving a second differential input data stream and counteracting/reducing the attenuation or distortion of the differential output data stream caused by a long transmission distance by using the sub-current sources. There is a delay of a specific bit length between the first and the second differential input data streams. | 06-16-2011 |
| 20110131165 | EMOTION ENGINE, EMOTION ENGINE SYSTEM AND ELECTRONIC DEVICE CONTROL METHOD - An emotion engine and an emotion engine system adapted to an electronic device are provided. The emotion engine system includes a behavior control unit, a sensing unit, a time unit, and a behavior data bank. The behavior control unit provides a first behavior mode and a second behavior mode. When the sensing unit is enabled, it generates a trigger sensing signal or an initial sensing signal for the behavior control unit. The time unit generates a timing signal for the behavior control unit. The behavior data bank stores a plurality of behavior data, wherein the first and the second behavior modes are respectively corresponding to at least one of the behavior data. The behavior control unit determines the behavior data corresponding to the second behavior mode according to the timing signal, the trigger sensing signal and the first behavior mode. Additionally, an electronic device control method is also provided. | 06-02-2011 |
| 20110125954 | DATA STORAGE METHOD FOR FLASH MEMORY, AND FLASH MEMORY CONTROLLER AND FLASH MEMORY STORAGE SYSTEM USING THE SAME - A data storage method for storing data into a flash memory chip is provided. The flash memory chip has a plurality of physical addresses, and these physical addresses include a plurality of fast physical addresses and a plurality of slow physical addresses. In the data storage method, the usage rate of the physical addresses is monitored. When the usage rate is not larger than a usage rate threshold value, only the fast physical addresses are used for storing the data into the flash memory chip. When the usage rate is larger than the usage rate threshold value, the fast physical addresses and the slow physical addresses are used for storing the data into the flash memory chip. Thereby, the speed of storing data into the flash memory chip is effectively increased. | 05-26-2011 |
| 20110125815 | DATA PROCESSING METHOD, DATA PROCESSING SYSTEM, AND STORAGE DEVICE CONTROLLER - A method and a system for processing data, and a storage device controller are provided. In the present method, a storage device is provided, and the storage device is coupled to a host. The method also includes, when the host gives a write-in command and the write-in command includes a logical accessing address and a first data, determining whether the logical accessing address is one of logical accessing addresses of file system information. When the logical accessing address is one of the logical accessing addresses of the file system information, the storage device writes a second data into the storage device at a predetermined time, and the second data is different from the first data. | 05-26-2011 |
| 20110113184 | DATA BACKUP METHOD FOR A FLASH MEMORY AND CONTROLLER AND STORAGE SYSTEM USING THE SAME - A data backup method for backing up data temporarily stored in a cache memory of a flash memory storage device is provided, where the flash memory storage device has a plurality of physical units. The data backup method includes logically grouping a portion of the physical units into a data area and a cache area. The data backup method also includes determining whether a trigger signal is received; and when the trigger signal is received, copying the data temporarily stored in the cache memory into the cache area. Accordingly, the data backup method can quickly write the data temporarily stored in the cache memory into the physical units, thereby preventing a time out problem which may occur in the flash memory storage device. | 05-12-2011 |
| 20110107015 | DATA WRITING METHOD FOR A FLASH MEMORY, AND FLASH MEMORY CONTROLLER AND FLASH MEMORY STORAGE SYSTEM USING THE SAME - A data writing method for writing data from a host system into a flash memory chip having a plurality of physical blocks is provided. The method includes configuring a plurality of logical access addresses and recording address centers and address radiuses for the physical blocks. The method also includes receiving data to be written in logical access addresses, determining opened physical blocks among the physical blocks, and writing the data into the flash memory chip based on the logical access addresses, and the address centers and the address radiuses of the opened physical blocks. Accordingly, the method can effectively reduce the degree of data dispersion of each of the physical blocks, reduce the time for organizing valid data, and increase the speed for writing data. | 05-05-2011 |
| 20110099324 | FLASH MEMORY STORAGE SYSTEM AND FLASH MEMORY CONTROLLER AND DATA PROCESSING METHOD THEREOF - A flash memory storage system including a flash memory chip, a connector, and a flash memory controller is provided. The flash memory controller configures a plurality of logical addresses and maps the logical addresses to a part of the physical addresses in the flash memory chip, and a host system uses a file system to access the logical addresses. Besides, the flash memory controller identifies a deleted logical address among the logical addresses and marks data in the physical address mapped to the deleted logical address as invalid data. Thereby, the flash memory storage system can identify data deleted by the host system in the physical addresses, so that the time for sorting data can be effectively reduced. | 04-28-2011 |
| 20110087950 | DATA WRITING METHOD FOR A FLASH MEMORY, AND CONTROLLER AND STORAGE SYSTEM USING THE SAME - A data writing method for writing data from a host system into a flash memory chip is provided, and the flash memory chip have a plurality of physical blocks. The method includes receiving a host writing command and write data thereof, and executing the host writing command. The method also includes giving a data program command for writing the write data into one of the physical blocks to the flash memory chip, and giving a command for determining whether data stored in the physical block has any error bit. Accordingly, the method can effectively ensure the correctness of data to be written into the flash memory chip. | 04-14-2011 |
| 20110087827 | DATA WRITING METHOD FOR A FLASH MEMORY, AND CONTROLLER AND STORAGE SYSTEM USING THE SAME - A data writing method for writing data from a host system into a flash memory chip is provided. The method includes configuring a plurality of logical page addresses, grouping the logical page addresses into a plurality of logical blocks, and recording the data dispersion degree of each of the logical blocks. The method also includes receiving write-in data from the host system, identifying a logical block that a logical page address to be written by the host system belongs to, and writing the write-in data into the flash memory chip according to the data dispersion degree of the logical block, wherein the data dispersion degree of each of the logical blocks is not larger than a logical block data dispersion degree threshold value. Accordingly, the method can effectively reduce the time for executing a host write command. | 04-14-2011 |
| 20110084743 | PHASE LOCKED LOOP AND VOLTAGE CONTROLLED OSCILLATOR THEREOF - A phase locked loop (PLL) and a voltage controlled oscillator (VCO) thereof are provided. The VCO includes a ring oscillator circuit and a control circuit. The ring oscillator circuit is used for providing an output clock signal; and the control circuit is coupled to the ring oscillator circuit, and used for receiving an output voltage to respectively provide a first voltage-frequency gain and a second voltage-frequency gain so as to control a frequency of the output clock signal provided by the ring oscillator circuit, wherein the first voltage-frequency gain is larger than the second voltage-frequency gain. | 04-14-2011 |
| 20110078363 | BLOCK MANAGEMENT METHOD FOR A FLASH MEMORY AND FLASH MEMORY CONTROLLER AND STORAGE SYSTEM USING THE SAME - A block management method for managing a plurality of physical blocks of a flash memory chip is provided. The block management method includes configuring a plurality of logical addresses; mapping the logical addresses to a plurality of logical blocks; and mapping the logical blocks to the physical blocks. Additionally, the block management method also includes obtaining deleting records related to a plurality of deleted logical addresses from a host system, wherein data stored in the deleted logical addresses is recognized as invalid by the host system. And, the block management method further includes obtaining a deleted logical block, marking each of the logical addresses mapped to the deleted logical block as a bad logical address, and linking the physical block mapped to the deleted logical block to a spare area. Accordingly, the block management method can effectively prolong the lifespan of a flash memory chip. | 03-31-2011 |
| 20110072193 | DATA READ METHOD, AND FLASH MEMORY CONTROLLER AND STORAGE SYSTEM USING THE SAME - A data read method for reading data to be accessed by a host system from a plurality of flash memory modules is provided. The data read method includes receiving command queuing information related to a plurality of host read commands from the host system, each of the host read commands is corresponding to one of a plurality of data input/output buses coupled to the flash memory modules. The data read method also includes re-arranging the host read commands and generating a command giving sequence according to the data input/output buses corresponding to the host read commands. The data read method further includes sequentially receiving and processing the host read commands from the host system according to the command giving sequence and pre-reading data corresponding to a second host read command. Thereby, the time for executing the host read commands can be effectively shortened. | 03-24-2011 |
| 20110067118 | METHOD AND SYSTEM FOR PROTECTING DATA, STORAGE DEVICE, AND STORAGE DEVICE CONTROLLER - A method and a system for protecting data, a storage device, and a storage device controller are provided. In the present method, when a host accesses data in the storage device, whether the host performs a play operation or a copy operation on the data is first determined. If the host performs the play operation on the data, the storage device continues to execute the play operation so as to allow the host to access the data. On the other hand, if the host performs the copy operation on the data, the storage device executes an interference procedure so as to prevent or retard the data from being copied into the host. | 03-17-2011 |
| 20110066818 | STORAGE DEVICE, MEMORY CONTROLLER, AND DATA PROTECTION METHOD - A storage device, a memory controller, and a data protection method are provided. The method includes when receiving a read command sent by a host, adopting a corresponding output flow rate limit to determine an operation that is executed on read data corresponding to the read command by the host according to location information included in the read command or a type of a transmission interface between the host and the storage device. The method also includes executing an interference procedure by the storage device to prevent the read data from being copied to the host or slow down the speed of copying the read data to the host when identifying that the operation is a copy operation. | 03-17-2011 |
| 20110055513 | METHOD AND SYSTEM FOR EXECUTING APPLICATONS, STORAGE MEDIUM CONTROLLER AND STORAGE DEVICE - An application executing method for automatically executing an application stored in a storage unit of an external storage device in an operating system (OS) of a computer host is provided. The method includes dividing the storage unit into a first partition and a second partition; emulating the first partition as compact disc-read only memory (CR-ROM); storing a switch program in the first partition; and storing the application in the second partition. The method also includes providing only the first partition to be accessed by the OS and automatically executing the switch program by the OS to decouple and re-couple the external storage device to the computer host. Additionally, the method further includes providing only the second partition to be accessed by the OS and executing the application when the external storage device is re-coupled to the computer host. | 03-03-2011 |
| 20110055457 | METHOD FOR GIVING PROGRAM COMMANDS TO FLASH MEMORY, AND CONTROLLER AND STORAGE SYSTEM USING THE SAME - A method for giving program commands to a flash memory chip is provided, the method is suitable for writing data from a host system into the flash memory chip. In the present method, a plurality of host write commands and data corresponding to the host write commands are received from the host system by using a native command queuing (NCQ) protocol, and cache program commands are gived to the flash memory chip to write the data into the flash memory chip. Accordingly, the time for executing the host write commands is effectively shortened by writing the data through the cache program commands and the NCQ protocol. | 03-03-2011 |
| 20110035602 | DATA SCRAMBLING, DESCRAMBLING, AND DATA PROCESSING METHOD, AND CONTROLLER AND STORAGE SYSTEM USING THE SAME - A data scrambling method for scrambling raw data from a host system is provided. The data scrambling method includes generating a random number and storing the random number into a storage unit. The data scrambling method also includes receiving a user password from the host system, generating a padded value by using a first function unit based on the random number and the user password, and generating a nonce value by using a second function unit based on the padded value and a key. The data scrambling method further includes generating scrambled data corresponding to the raw data by using a third function unit based on the nonce value and the raw data. Accordingly, the raw data of the host system can be effectively protected. | 02-10-2011 |
| 20110022787 | DATA WRITING METHOD FOR NON-VOLATILE MEMORY AND CONTROLLER USING THE SAME - A data writing method for a non-volatile memory is provided, wherein the non-volatile memory includes a data area and a spare area. In the data writing method, a plurality of blocks in a substitution area of the non-volatile memory is respectively used for substituting a plurality of blocks in the data area, wherein data to be written into the blocks in the data area is written into the blocks in the substitution area, and the blocks in the substitution area are selected from the spare area of the non-volatile memory. A plurality of temporary blocks of the non-volatile memory is used as a temporary area of the blocks in the substitution area, wherein the temporary area is used for temporarily storing the data to be written into the blocks in the substitution area. | 01-27-2011 |
| 20110022786 | FLASH MEMORY STORAGE APPARATUS, FLASH MEMORY CONTROLLER, AND SWITCHING METHOD THEREOF - A flash memory storage apparatus including a multi level cell (MLC) NAND flash memory, a flash memory controller, and a host transmission bus is provided. The MLC NAND flash memory includes a plurality of blocks for storing data, wherein each of the blocks has an upper page and a lower page, and the writing speed of the lower page is faster than that of the upper page. The flash memory controller is electrically connected to the MLC NAND flash memory and is used for executing storage mode switching steps. The host transmission bus is electrically connected to the flash memory controller and is used for communicating with a host. The flash memory storage apparatus provided by the present invention can provide multiple storage modes in order to store different data. | 01-27-2011 |
| 20110022746 | METHOD OF DISPATCHING AND TRANSMITTING DATA STREAMS, MEMORY CONTROLLER AND MEMORY STORAGE APPARATUS - A method of dispatching and transmitting data stream, which is used for a memory storage apparatus having a non-volatile memory module and a smart card chip, is provided. The method includes configuring a plurality of logical block addresses, and a plurality of specific logical block addresses are used for storing a specific file. The method also includes receiving a response data unit from the smart card chip and storing the response data unit in a buffer memory. The method also includes, when a logical block address corresponding to a read command from a host system belongs to one of the specific logical block addresses and the buffer memory stores a response data unit, transmitting the response data unit stored in the buffer memory to the host system. Accordingly, the method can make the host system to correctly receive the response data unit from the smart card chip. | 01-27-2011 |
| 20110010489 | LOGICAL BLOCK MANAGEMENT METHOD FOR A FLASH MEMORY AND CONTROL CIRCUIT STORAGE SYSTEM USING THE SAME - A logical block management method for managing a plurality of logical blocks of a flash memory device is provided. The logical block management method includes providing a flash memory controller, grouping the logical blocks into a plurality of logical zones, wherein each logical block maps to one of the logical zones. The logical block management method also includes counting a use count value for each logical block, and dynamically adjusting mapping relations between the logical blocks and the logical zones according to the use count values. Accordingly, the logical block management method can effectively utilizing the logical zones to determine usage patterns of the logical blocks and use different mechanisms to write data, so as to increase the performance of the flash memory storage device. | 01-13-2011 |
| 20110004723 | DATA WRITING METHOD FOR FLASH MEMORY AND CONTROL CIRCUIT AND STORAGE SYSTEM USING THE SAME - A data writing method for a flash memory and a control circuit and a storage system using the same are provided. The data writing method includes determining whether the size of data to be stored by a host system is smaller than a predetermined value according to a write command received from the host system, when the size of the data is smaller than the predetermined value, the data is written into a corresponding buffer physical block or a corresponding spare buffer physical block. The data writing method further includes combining valid data belonging to the same logical block during the executions of several write commands. Accordingly, the response time during the execution of each write command is shortened, and the problem of timeout is avoided. | 01-06-2011 |
| 20100325524 | CONTROL CIRCUIT CAPABLE OF IDENTIFYING ERROR DATA IN FLASH MEMORY AND STORAGE SYSTEM AND METHOD THEREOF - A flash memory control circuit including a microprocessor unit, a first interface unit for connecting a flash memory, a second interface unit for connecting a computer host, an error correcting unit, a memory management unit, and a marking unit is provided. The memory management unit divides each page in the flash memory into a plurality of data bit areas, and a plurality of redundancy bit areas and a plurality of error correcting bit areas corresponding to the data bit areas, wherein each of the data bit areas has a plurality of sectors for respectively storing a sector data. The marking unit stores a data accuracy mark corresponding to each sector data in the corresponding redundancy bit area to record the status of the sector data. Thereby, the flash memory controller can effectively identify error data in the flash memory by using the error correcting codes and the data accuracy marks. | 12-23-2010 |
| 20100325344 | DATA WRITING METHOD FOR FLASH MEMORY AND CONTROL CIRCUIT AND STORAGE SYSTEM USING THE SAME - A data writing method for writing data into a flash memory chip is provided, wherein the flash memory chip includes a plurality of physical units. The data writing method includes providing a flash memory control circuit and configuring a plurality of logical units, wherein each logical unit is mapped to at least one physical unit. The data writing method also includes configuring a plurality of logical addresses and mapping the logical addresses to the logical units, wherein at least one logical unit is mapped to at least two non-continuous logical addresses. The data writing method further includes writing the data from a host system into the corresponding physical units according to the logical units mapped to the logical addresses through the flash memory control circuit. Thereby, the data to be moved while writing data into the physical units is reduced, and accordingly the data writing speed is effectively increased. | 12-23-2010 |
| 20100325180 | METHOD AND SYSTEM FOR EXECUTING A FILE STORED IN A HIDDEN STORAGE AREA OF A STORAGE DEVICE - A file executing method for executing a computer executable code set stored in a hidden storage area of a storage device in an operating system of a computer host is provided. The method includes connecting the storage device to the computer host and providing a loader for managing the computer executable code set. The method also includes running the loader in a main memory of the computer host, requesting the operating system to allocate a first address segment in the main memory for running the loader, loading the computer executable code set from the hidden storage area into the first address segment by using the loader, transforming the computer executable code set into an executable content of the operation system by using the loader and storing the executable content into the first address segment; and establishing a derivative execution procedure by using the loader to execute the executable content. | 12-23-2010 |
| 20100318724 | FLASH MEMORY CONTROL CIRCUIT, FLASH MEMORY STORAGE SYSTEM, AND DATA TRANSFER METHOD - A flash memory control circuit including a microprocessor unit, a first interface unit, a second interface unit, a buffer memory, a memory management unit, and a data read/write unit is provided. The memory management unit manages a plurality of flash memory units, wherein each of the flash memory units has a plurality of flash memories, each of the flash memories has a plurality of memory cell arrays, and each of the memory cell arrays at least has an upper page and a lower page. The memory management unit groups the memory cell arrays of the corresponding flash memories into a plurality of data transfer unit sets (DTUSs). The data read/write unit interleavingly transfers data to the flash memory units in units of the DTUSs. Thereby, the flash memory control circuit can transfer the data stably and the usage of the buffer memory can be reduced. | 12-16-2010 |
| 20100287616 | CONTROLLER CAPABLE OF PREVENTING SPREAD OF COMPUTER VIRUSES AND STORAGE SYSTEM AND METHOD THEREOF - A controller capable of preventing spread of computer viruses is provided. The controller includes a microprocessor unit, and a first interface unit, a second interface unit, a comparing unit and a filter unit which are coupled to the microprocessor unit. The first interface unit is coupled to a storage medium, and the second interface unit is coupled to a computer host. The comparing unit determines whether data read form the storage medium by the computer host is an automatic executing file. And, the filter unit replaces the read data with a predetermined data and transmit the predetermined data to the computer host when the read data is the automatic executing file. Accordingly, the controller is capable of preventing the spread of the computer viruses designed in an automatic executing file. | 11-11-2010 |
| 20100274949 | DATA ACCESS METHOD FOR FLASH MEMORY AND STORAGE SYSTEM AND CONTROLLER USING THE SAME - A data access method for accessing a flash memory storage system, a storage system and a controller using the same are provided. A flash memory has a plurality of physical blocks, which are grouped into a system area, a data area, and a spare area. One or more variable tables are established to record transient information of each set of mother-child blocks of the data area and the spare area. The number of the variable table could be adjusted adaptively according to time required for writing the variable table into the system area, such that an overall data access efficiency of the flash memory storage system is enhanced. | 10-28-2010 |
| 20100262892 | DATA ACCESS METHOD FOR FLASH MEORY AND STORAGE SYSTEM AND CONTROLLER THEREOF - A data access method for accessing data in a flash memory is provided, wherein the data has a plurality of sub-data. The data access method includes generating an error correction code (ECC) for the data and writing the data and the ECC into the flash memory. The data access method also includes generating a corresponding bit checking code for each of the sub-data and writing the bit checking codes into the flash memory. When the sub-data subsequently is read from the flash memory, whether the sub-data contains any error is determined only according to the bit checking code corresponding to the sub-data. Thereby, the data access efficiency is improved. | 10-14-2010 |
| 20100252931 | FLASH MEMORY STORAGE APPARATUS - A flash memory storage apparatus is provided. The flash memory storage apparatus includes a substrate, a control and storage circuit unit, a ground lead, at least a signal lead, and a power lead. The control and storage circuit unit, the power lead, the signal lead, and the ground lead are disposed on the substrate, in which the power lead, the signal lead, and the ground lead respectively electrically connect to the control and storage circuit unit. Moreover, the flash memory storage apparatus further includes an extra ground lead electrically connected to the ground lead or a protrusion on the substrate, such that the ground lead first electrically connects to a host when the flash memory storage apparatus is plugged into the host. | 10-07-2010 |
| 20100241789 | DATA STORAGE METHOD FOR FLASH MEMORY AND DATA STORAGE SYSTEM USING THE SAME - A data storage method for a flash memory storage device is provided. The method includes disposing a pattern identification unit in the flash memory storage device and disposing a pattern analysis unit in a host connected to the flash memory storage device. The method further includes analyzing a usage pattern of each flash memory storage address in the flash memory storage device by using the pattern analysis unit, receiving information from the pattern analysis unit through the pattern identification unit to identify the usage pattern of each flash memory storage address, and storing data into each flash memory storage address through a corresponding process according to the usage pattern of the flash memory storage address. Thereby, data can be stored according to the usage pattern of each flash memory storage address, and accordingly the speed of storing data into the flash memory storage device can be effectively increased. | 09-23-2010 |
| 20100235899 | DATA PROCESSING SYSTEM, CONTROLLER, AND METHOD THEREOF FOR SEARCHING FOR SPECIFIC MEMORY AREA - A data processing system, a controller, and a method for searching for a specific logical block are provided. Logical blocks are searched out from a peripheral unit, where data of the searched logical blocks are not yet stored in a cache memory of a master control unit. During searching for the logical blocks, a plurality of read commands are executed. The read commands are set to read data of a plurality of separated logical blocks of the peripheral unit respectively, such that the search time is shortened. | 09-16-2010 |
| 20100205352 | MULTILEVEL CELL NAND FLASH MEMORY STORAGE SYSTEM, AND CONTROLLER AND ACCESS METHOD THEREOF - A multi level cell (MLC) NAND flash memory storage system is provided. A controller of the MLC NAND flash memory storage system declares it a signal level cell (SLC) NAND flash memory chip to a host system connected thereto and provides a plurality of SLC logical blocks to the host system. When the controller receives a write command and a user data from the host system, the controller writes the user data into a page of a MLC physical block and records the page of the SLC logical block corresponding to the page of the MLC physical block. When the controller receives an erase command from the host system, the controller writes a predetermined data into the page of the MLC physical block mapped to the SLC logical block to be erased, wherein the predetermined data has the same pattern as a pattern of the erased page. | 08-12-2010 |
| 20100181377 | CARD READER WITH NEAR FIELD COMMUNICATION FUNCTION AND NEAR FIELD COMMUNICATION DEVICE THEREOF - A card reader with a near field communication (NFC) function is provided. The card reader includes a connector for connecting a host, a radio frequency (RF) antenna, and a circuit board having a secure digital (SD) reader chip and a micro SD interface slot. The micro SD interface slot has two RF pads coupled to the RF antenna, and a micro SD memory card having a flash memory chip, a control circuit, and a smart card circuit is inserted into the micro SD interface slot in a detachable manner. Thereby, the host can access data in the flash memory chip through the SD reader chip and the micro SD interface slot, and the smart card circuit can perform a NFC through the RF antenna and the micro SD interface slot. | 07-22-2010 |
| 20100180145 | DATA ACCESSING METHOD FOR FLASH MEMORY, AND STORAGE SYSTEM AND CONTROLLER SYSTEM THEREOF - A data accessing method for accessing data in a plurality of physical page addresses of a plurality of physical blocks in a flash memory chip is provided. The data accessing method includes proving a plurality of logical page addresses for a host system, creating a logical page to physical page mapping table and a physical page to logical page mapping table to record the mapping between the logical page addresses and the physical page addresses. The data accessing method also includes writing data into the physical page addresses, and updating the logical page to physical page mapping table and the physical page to logical page mapping table. The data accessing method further includes determining whether the physical page addresses are valid or invalid based on the logical page to physical page mapping table and the physical page to logical page mapping table. | 07-15-2010 |
| 20100180069 | BLOCK MANAGEMENT METHOD FOR FLASH MEMORY, AND STORAGE SYSTEM AND CONTROLLER USING THE SAME - A block management method for a flash memory of a storage system is provided, wherein the flash memory includes a plurality of physical blocks. The block management method includes grouping the physical blocks into a plurality of physical units, and grouping the physical units into a data area, a spare area, and a replacement area. The block management method further includes performing a first physical unit switch which switches the physical units between the data area and the spare area, and performing a second physical unit switch which switches the physical units between the spare area and the replacement area. Therefore, the block management method can uniformly use the physical blocks and thereby effectively prolong a lifespan of the storage system. | 07-15-2010 |
| 20100174902 | PORTABLE STORAGE MEDIA WITH HIGH SECURITY FUNCTION - A portable storage media with high security function is disclosed. The portable storage media comprises a microprocessor, a sensor and a memory. The microprocessor is connected to a data transmission interface, a sensor transmission interface and a memory transmission interface, wherein the data transmission interface is adopted for connecting to a host end. The sensor is connected to the sensor transmission interface of said microprocessor, wherein said sensor is adopted for inputting a biological feature. The memory is connected to the memory transmission interface of the microprocessor. The biological features are used as the passwords for accessing the protected data or files stored in the portable storage media. An encrypting program is adopted for encrypting/decrypting the data or files to prevent any hackers from stealing the data or files from the portable storage media. | 07-08-2010 |
| 20100156448 | FLASH STORAGE DEVICE AND METHOD AND SYSTEM FOR TESTING THE SAME - A flash storage device and a testing method and a testing system for the flash storage device are provided. The testing system includes a testing apparatus and the flash storage device. The flash storage device includes a controller, a flash memory module, a plurality of peripheral pins and at least one test pin. The flash storage device receives an enable signal transmitted from the testing apparatus through the test pin. Subsequently, the controller outputs a signal to the testing apparatus through each peripheral pin based to the enable signal. Finally, the testing apparatus verifies the signal outputted by each peripheral pin. | 06-24-2010 |
| 20100146255 | MOTHERBOARD, STORAGE DEVICE AND CONTROLLER THEREOF, AND BOOTING METHOD - A motherboard, a storage device and a controller thereof and a booting method are provided. In the present invention, when powered on, an unfetch signal is transmitted to a central processor unit (CPU) by a controller such that an operation of the CPU is suspended. Next, a system firmware in the storage device is loaded by the controller. After the system firmware is loaded, a fetch-done signal is transmitted to the CPU by the controller such that the CPU starts executing a booting procedure. | 06-10-2010 |
| 20100146190 | FLASH MEMORY STORAGE SYSTEM, AND CONTROLLER AND METHOD FOR ANTI-FALSIFYING DATA THEREOF - A flash memory storage system is provided. The flash memory storage system includes a controller having a rewritable non-volatile memory and a flash memory chip. The rewritable non-volatile memory stores a data token and the flash memory chip stores a security data and a message digest. When the security data in the flash memory chip is updated, the controller updates the data token and generates an eigenvalue, and updates the message digest according to the updated data token and the updated eigenvalue by using a one-way hash function, respectively. When the security data in the flash memory chip is processed by the controller, the controller determinates whether the security data is falsified according to the data token, the eigenvalue and the message digest. In such a way, the security data stored in the flash memory storage system can be effectively protected. | 06-10-2010 |
| 20100125772 | ERROR CORRECTING CONTROLLER, FLASH MEMORY CHIP SYSTEM, AND ERROR CORRECTING METHOD THEREOF - An error correcting controller for connecting an old host controller having an old error correcting function with a new flash memory which requires a new error correcting function is provided. When the old host controller needs to write data into the new flash memory, the error correcting controller generates a new error correcting code according to the new error correcting function for the data. Then, when the old host controller needs to read the data from the new flash memory, the error correcting controller performs an error correcting procedure according to the new error correcting code and transmits information to the old host controller according to the result of the error correcting procedure and the old error correcting function. Accordingly, it is possible to allow the old host controller to access the new flash memory without changing the architecture of the old host controller. | 05-20-2010 |
| 20100115184 | FLASH MEMORY STORAGE SYSTEM AND CONTROLLER AND DATA PROTECTION METHOD THEREOF - A flash memory storage system including a controller and a flash memory chip is provided, wherein the controller is disposed with a rewritable non-volatile memory. When the controller writes a security data into the flash memory chip, the controller randomly generates a data token and generates a message digest according to the security data and the data token by using a one-way hash function, wherein the data token and the message digest are respectively stored in the rewritable non-volatile memory and the flash memory chip. Subsequently, when the controller reads the security data from the flash memory chip, the controller determinates whether the security data is falsified according to the data token and the message digest respectively stored in the rewritable non-volatile memory and the flash memory chip. Thereby, the security data in the flash memory chip can be effectively protected. | 05-06-2010 |
| 20100110643 | FLASH DRIVE AND HOUSING ASSEMBLY THEREOF - A flash drive and a housing assembly thereof is provided. The housing assembly comprises a housing, a base and a rotating mechanism. The housing has a first opening, a second opening, and a space, the first opening is situated at a side surface of the housing, and the second opening is situated on a top surface of the housing. The base is used for accommodating a storage device which has a connecting member, the base is movably disposed in the space and has a slot facing the second opening. The rotating mechanism is disposed at the second opening and mounted to the housing, the rotating mechanism has a protrusion portion movably engaged in the slot. When the rotating mechanism rotates relative to the housing, the protrusion portion moves along the slot and drives the base to reciprocate between a first position and a second position. | 05-06-2010 |
| 20100095044 | MOTHERBOARD SYSTEM, STORAGE DEVICE FOR BOOTING UP THEREOF AND CONNECTOR - A motherboard system is provided. The motherboard system includes a central processing unit (CPU), a control unit and an interface connector. The control unit is electrically connected to the CPU. The interface connector is electrically connected to the control unit and has a boot loader interface unit and a peripheral storage device interface unit, wherein the boot loader interface unit is electrically connected to the control unit and is configured for electrically connecting a system read only memory. When the power of the motherboard system is turned on, the CPU sends a read only memory fetch cycle to the control unit and fetches a booting program from the system read only memory configured in an external device via the boot loader interface unit. Accordingly, the system read only memory can be conveniently updated and maintained. | 04-15-2010 |
| 20100091469 | STORAGE APPARATUS - A storage apparatus including a circuit board, a first flash memory, a first golden finger, a control unit, and a supporting component is provided. The circuit board has a first surface and a second surface. The first flash memory is disposed on the circuit board. The first golden finger and the control unit are disposed on an end of the circuit board, in which the first golden finger is disposed on the first surface, and the control unit is disposed on the second surface, and the control unit is substantially on the backside of the first golden finger. The control unit is electrically connected with the first memory and the first golden finger. The supporting component is used for supporting the circuit board. | 04-15-2010 |
| 20100088540 | BLOCK MANAGEMENT AND REPLACEMENT METHOD, FLASH MEMORY STORAGE SYSTEM AND CONTROLLER USING THE SAME - A block management and replacement method for a flash memory is provided. The method includes grouping physical blocks of the flash memory into physical units and dividing the physical units as a usage area and a replacement area, wherein the physical blocks grouped into the same physical unit are accessed by using a multi-planes accessing command. The method also includes when one of the physical block of the physical unit in the usage area is damaged, replacing the physical unit having the damaged physical block with one physical unit selected from the replacement area and recording the undamaged physical block within the replaced physical unit if there is an applicable physical unit in the replacement area; and replacing the damaged physical block with one physical block selected from the replacement area if there is no applicable physical unit but an undamaged physical block in the replacement area. | 04-08-2010 |
| 20100066458 | OSCILLATOR AND DRIVING CIRCUIT AND OSCILLATION METHOD THEREOF - An oscillator, a driving circuit and an oscillation method are provided. The driving circuit and a crystal are coupled in parallel to generate a clock signal. The driving circuit includes a buffer unit and a control unit. The buffer unit is coupled in parallel to the crystal, and used to amplify an oscillation signal outputted from the crystal to generate the clock signal. The control unit is coupled to the buffer unit, and used to generate a control signal to the buffer unit. The control unit determines a voltage level of the control signal by detecting whether the clock signal or the oscillation signal satisfies an oscillation condition of the crystal, so as to control a gain value of the buffer unit. Therefore, noise of different frequency bands loaded into the clock signal can be avoided. | 03-18-2010 |
| 20100064094 | Memory managing method for non-volatile memory and controller using the same - A memory managing method for a non-volatile memory and a controller using the same are disclosed. The controller includes a system wear leveling member for performing a first wear leveling process in a non-volatile memory for choosing a memory unit; and a subsystem wear leveling member for performing a second wear leveling process in the chosen memory unit for selecting a block from the chosen memory unit for data programming; whereby uneven use of the blocks of the chosen memory unit is avoided. | 03-11-2010 |
| 20100058073 | STORAGE SYSTEM, CONTROLLER, AND DATA PROTECTION METHOD THEREOF - A storage system including a storage unit, a connector, and a controller is provided. A personal identification number (PIN) message digest and a cipher text are stored in the storage unit. When the storage system is connected to a host system through the connector, the controller requests a password from the host system and generates a message digest through a one-way hash function according to the password. After that, the controller determinates whether the message digest matches the PIN message digest. If the message digest matches the PIN message digest, the controller decrypts the cipher text in the storage unit through a first encryption/decryption function according to the password to obtain an encryption/decryption key. Eventually, the controller encrypts and decrypts user data through a second encryption/decryption function according to the encryption/decryption key. Thereby, the user data stored in the storage system can be effectively protected. | 03-04-2010 |
| 20100057979 | DATA TRANSMISSION METHOD FOR FLASH MEMORY AND FLASH MEMORY STORAGE SYSTEM AND CONTROLLER USING THE SAME - A data transmission method suitable for transmitting data from a cache to a plurality of flash memory groups through a single data bus in a flash memory storage system is provided. The data transmission method includes sequentially sorting and grouping data to be written at continuous logical addresses in the cache in unit of logical blocks. The data transmission method further includes respectively transmitting the grouped sector data into the flash memory groups through the data bus in an interleaving manner, wherein data in the same logical block is transmitted and written into physical blocks of the same flash memory group. Thereby, the data is prevented from being written into different physical blocks, and accordingly the lifespan of the flash memory storage system is prolonged. | 03-04-2010 |
| 20100042775 | BLOCK MANAGEMENT METHOD FOR FLASH MEMORY, AND STORAGE SYSTEM AND CONTROLLER USING THE SAME - A block management method for managing a flash memory is provided. The method includes dividing the flash memory into a cache area and a storage area and dividing the cache area into a plurality of cache sub-areas, wherein the storage area has a plurality of physical blocks and each cache sub-area contains at least one physical block. The method also includes configuring a plurality of logical blocks for mapping the physical blocks of the storage area, and allocating one of the cache sub-areas for each logical block, wherein when the host writes the data into the logical blocks, the data may be temporarily stored in the cache sub-areas allocated for the logical blocks. Accordingly, it is possible to increase efficiency of the flash storage system and avoid wearing of the physical blocks, so as to prolong a lifetime of the flash storage system. | 02-18-2010 |
| 20100042774 | BLOCK MANAGEMENT METHOD FOR FLASH MEMORY, AND STORAGE SYSTEM AND CONTROLLER USING THE SAME - A block management method for a flash memory chip having multiple planes is provided, wherein each plane has a plurality of physical blocks. The method includes disposing a plurality of physical units, wherein each physical unit includes a physical block of each plane, and the physical blocks in the physical unit have a simultaneously-operable relationship. The method also includes writing data in a single plane access mode when a host system does not update all the physical blocks in an updated the physical unit. The method further includes writing the data in a multi-planes access mode when the host system updates all the physical blocks in the updated physical unit, wherein the physical blocks for writing the data have the simultaneously-operable relationship. | 02-18-2010 |
| 20100042773 | FLASH MEMORY STORAGE SYSTEM AND DATA WRITING METHOD THEREOF - A flash memory storage system and a data writing method thereof are provided. The flash memory storage system includes a controller, a connector, a cache memory, a SLC NAND flash memory and a MLC NAND flash memory. When the controller receives data to be written into the MLC NAND flash memory from a host system, the data is temporarily stored in the cache memory first and then is written into the MLC NAND flash memory from the cache memory. And, the controller may backup the data stored in the cache memory to the SLC NAND flash memory. Accordingly, it is possible to reduce a response time for a flush command, thereby improving a performance of the flash memory storage system. | 02-18-2010 |
| 20100030979 | DATA MANAGEMENT METHOD, AND STORAGE APPARATUS AND CONTROLLER THEREOF - A data management method, a controller and a storage apparatus thereof are provided. The method is adapted for a storage apparatus having a plurality of blocks. Parts of the blocks are linked to configure a plurality of mother and child blocks (M&C block). The data management method includes: (a) checking whether a mother and child block currently to be written with data is the same of a mother and child block which has been most lately written with data; (b) when it is determined that the mother and child block currently to be written with data is not the same of the mother and child block which has been most lately written with data, saving a transient data of the mother and child block currently to be written with data to a mother and child block transient relationship table. | 02-04-2010 |
| 20100023675 | WEAR LEVELING METHOD, AND STORAGE SYSTEM AND CONTROLLER USING THE SAME - A wear leveling method for a flash is provided, wherein the flash memory includes a plurality of physical blocks grouped into at least a data area and a spare area. The method includes setting a first predetermined threshold value as a wear-leveling start value and randomly generating a random number as a memory erased count, wherein the random number is smaller than the wear-leveling start value. The method also includes counting the memory erased count each time when the physical blocks are erased and determining whether the memory erased count is smaller than the wear-leveling start value, wherein a physical blocks switching is performed between the data area and the spare area when the memory erased count is not smaller then the wear-leveling start value. Accordingly, it is possible to uniformly use the physical blocks, so as to effectively prolong a lifetime of the store system. | 01-28-2010 |
| 20100011154 | DATA ACCESSING METHOD FOR FLASH MEMORY AND STORAGE SYSTEM AND CONTROLLER USING THE SAME - A data accessing method for a flash memory and a storage system and a controller using the same are provided. The data accessing method includes grouping a plurality of physical blocks of the flash memory into a data area, a spare area, and a random area and when a write command and a new data to be written are received from a host, determining whether the new data is a continuous data, wherein the new data is written temporarily into the physical blocks in the random area if the new data is not a continuous data. Thereby, the number of data moving and physical block erasing is reduced and accordingly the data accessing speed in a random writing mode is increased. | 01-14-2010 |
| 20100011153 | BLOCK MANAGEMENT METHOD, AND STORAGE SYSTEM AND CONTROLLER USING THE SAME - A block management method for managing a multi level cell (MLC) NAND flash memory is provided, wherein the MLC NAND flash memory has a plurality of physical blocks grouped into at least a data area and a spare area, each of the physical blocks has a plurality of pages divided into a plurality of upper pages, and a plurality of lower pages with a writing speed thereof being greater than that of the upper pages. The block management method includes configuring a plurality of logical blocks for being accessed by a host, recording the logical block belonged to a frequently accessed block and executing a special mode to use the lower pages of at least two physical blocks of the MLC NAND flash memory for storing data of one logical block belonged to the frequently accessed block. Accordingly, it is possible to increase the access speed of a storage system. | 01-14-2010 |
| 20100011151 | DATA ACCESSING METHOD, AND STORAGE SYSTEM AND CONTROLLER USING THE SAME - A data accessing method, and a storage system and a controller using the same are provided. The data accessing method is suitable for a flash memory storage system having a data perturbation module. The data accessing method includes receiving a read command from a host and obtaining a logical block to be read and a page to be read from the read command. The data accessing method also includes determining whether a physical block in a data area corresponding to the logical block to be read is a new block and transmitting a predetermined data to the host when the physical block corresponding to the logical block to be read is a new block. Thereby, the host is prevented from reading garbled code from the flash memory storage system having the data perturbation module. | 01-14-2010 |
| 20090327585 | DATA MANAGEMENT METHOD FOR FLASH MEMORY AND STORAGE SYSTEM AND CONTROLLER USING THE SAME - A data management method a flash memory storage system and a controller using the same are provided. The data management method is used for accessing a flash memory of the flash memory storage system, wherein the flash memory includes a plurality of physical blocks and the physical blocks are grouped into a data area and a spare area. The data management method includes configuring a plurality of logical blocks for be accessed by a host. The data management method also includes dividing each physical block into a plurality of physical parts and mapping the logical blocks to the physical parts. The data management method further includes accessing the mapped physical parts according to the physical blocks to be accessed by the host. Accordingly, it is possible to increase the usage and the accessing speed of the physical blocks in the flash memory storage system. | 12-31-2009 |
| 20090313396 | SYSTEM, CONTROLLER AND METHOD THEREOF FOR TRANSMITTING AND DISTRIBUTING DATA STREAM - A system, a controller, and a method for transmitting and distributing a data stream from a host to a storage device having a non-volatile memory and a chip are provided. A specific mark is added into a data stream which is transmitted from the host to the storage device, such that the data stream can be dispatched to the chip by transmitting a write command. The, a response message generated by the chip can be received inerrably by executing a plurality of read commands. | 12-17-2009 |
| 20090307413 | DATA WRITING METHOD FOR FLASH MEMORY AND STORAGE SYSTEM AND CONTROLLER USING THE SAME - A data writing method for a multi-level cell (MLC) NAND flash memory and a storage system and a controller using the same are provided. The flash memory includes a plurality of blocks. Each of the blocks includes a plurality of page addresses. The page addresses are categorized into a plurality of upper page addresses and a plurality of lower page addresses. The writing speed of the lower page addresses is faster than that of the upper page addresses. The data writing method includes receiving a writing command and data and writing the data into a page address. The page address is skipped when it is an upper page address and a corresponding lower page address stores a valid data written by a previous writing command. Thereby, the accuracy of the data written by the previous writing command is ensured when a programming error occurs to the flash memory. | 12-10-2009 |
| 20090307412 | MEMORY MANAGEMENT METHOD FOR NON-VOLATILE MEMORY AND CONTROLLER USING THE SAME - A memory management method for a non-volatile memory and a controller using the same are provided. The non-volatile memory is substantially divided into a plurality of blocks. First, non-erasing information of a plurality of memory units comprising at least one block is recoded and used as a reference to establish an evaluation value. Then, whether to move data of at least one block on the memory units to another memory unit according to the evaluation value is determined. Accordingly, problems of read disturb and data retention due to excessive reading times can be resolved. | 12-10-2009 |
| 20090300271 | STORAGE SYSTEM HAVING MULTIPLE NON-VOLATILE MEMORIES, AND CONTROLLER AND ACCESS METHOD THEREOF - A non-volatile memory storage system including a transmission interface, a memory module, and a controller is provided. The memory module includes first and second non-volatile memory chips. The first and the second non-volatile memory chips can be simultaneously enabled by receiving a chip enable signal from the controller via a chip enable pin. When the controller performs a multichannel access, the controller provides an access instruction to the first and second non-volatile memory chip, after enabling the first non-volatile memory chip and the second non-volatile memory chip with the chip enable signal. When the controller performs a single channel access, the controller provides the access signal to one of the first and second non-volatile memory chips, and provides a non-access instruction to the other one, after enabling the first non-volatile memory chip and the second non-volatile memory chip with the chip enable signal. | 12-03-2009 |
| 20090287877 | MULTI NON-VOLATILE MEMORY CHIP PACKAGED STORAGE SYSTEM AND CONTROLLER AND ACCESS METHOD THEREOF - A multi non-volatile memory chip packaged storage system having a memory module, a controller, a first and a second control buses and a first and a second I/O buses is provided. The memory module at least includes a first and a second non-volatile memory chips which are both enabled by receiving a chip enabled signal via a chip enabled pin, wherein the memory module and the controller are stacked and packaged as a single chip. After the first and the second non-volatile memory chips are enabled by the chip enable signal via the chip enabled pin, the controller may active the first and second control buses and the first and second I/O buses to access the first and the second non-volatile memory chips, or only active the first control and I/O buses or the second control and I/O buses to access the corresponding first or second non-volatile memory chip. | 11-19-2009 |
| 20090287876 | METHOD, APPARATUS AND CONTROLLER FOR MANAGING MEMORIES - A method, an apparatus and a controller for managing memories are provided. In the present invention, a data accessing format of each of the memories is adjusted such that the accessing units for each data accessing operation are unified. A mapping table is then established for recording the adjusted data accessing format. When a data accessing command is received from a host, the mapping table is inquired so as to execute the data accessing command. Accordingly, incompatibility of hardware structures can be resolved, and management of different types of flash memory can be achieved. | 11-19-2009 |
| 20090265505 | DATA WRITING METHOD, AND FLASH STORAGE SYSTEM AND CONTROLLER USING THE SAME - A data writing method, and a flash storage system and a controller using the same are provided. The method includes grouping the physical blocks of a flash memory into the physical blocks of a data area, a spare area and a special area. The method also includes writing the update data into the corresponding physical block of the special area when the update data is the single accessing unit. The method may include moving a part of valid data in a physical block mapping a logical block where the update data is belonged into a physical block of the spare area during each data writing command. Accordingly, it is possible to reduce the response time for each data writing command, thereby preventing a time-out problem caused by a flash memory having a large erasing unit configured at the flash storage system. | 10-22-2009 |
| 20090259916 | DATA ACCESSING METHOD, CONTROLLER AND STORAGE SYSTEM USING THE SAME - Data accessing method for a flash memory, and a controller and a storage system using the same are provided. The data accessing method includes reading data from a physical address of a flash memory according to a physical address to be read corresponding to a logical address to be read in a read command, and determining whether or not the read physical address is the physical address to be read. The data accessing method also includes transmitting the data only if the read physical address is the physical address to be read. Accordingly, it is possible to ensure the transmitted data is data to be accessed by the read command. | 10-15-2009 |
| 20090259896 | BAD BLOCK IDENTIFYING METHOD FOR FLASH MEMORY, STORAGE SYSTEM, AND CONTROLLER THEREOF - A bad block identifying method for a flash memory, a storage system, and a controller thereof are provided. The bad block identifying method includes determining whether a programming error occurs in a block of the flash memory after the block is programmed and marking the block as a bad block when the programming error successively occurs in the block. Since the block is determined to be a bad block only when the programming error repeatedly occurs in the block, misjudgment of bad block in the flash memory can be avoided and accordingly the lifespan of the flash memory storage system can be prolonged. | 10-15-2009 |
| 20090259796 | DATA WRITING METHOD FOR NON-VOLATILE MEMORY AND STORAGE SYSTEM AND CONTROLLER USING THE SAME - A data writing method for a non-volatile memory and a storage system and a controller using the same are provided. The data writing method includes executing a non-volatile memory writing program pre-stored in the non-volatile memory on a host, managing data desired to be written through the non-volatile memory writing program, executing a write-enabling command to temporarily disable a write protection of the non-volatile memory and executing a write command through the non-volatile memory writing program to write the data in a writing unit not recorded with any data in the non-volatile memory, and re-enabling the write protection after completing the writing by executing a write-protecting command. Accordingly, it is possible to avoid damage to the non-volatile memory due to multiple writings which are not desired in the non-volatile memory. | 10-15-2009 |
| 20090248961 | MEMORY MANAGEMENT METHOD AND CONTROLLER FOR NON-VOLATILE MEMORY STORAGE DEVICE - A memory management method and a controller for a non-volatile memory storage device are provided. The memor management method and the controller are adapted for establishing a logical-to-physical mapping table of each block in a memory buffer of the controller by merely reading the data stored in a system management area within a start page of each block, so as to promote the management efficiency of the non-volatile memory storage device. In addition, the method and the controller of the present invention integrate all of or a part of the system management areas within the start page for efficiently managing and using the memory capacity of all the system management areas within the start page. | 10-01-2009 |
| 20090240868 | MANAGEMENT METHOD, MANAGEMENT APPARATUS, AND CONTROLLER FOR MEMORY DATA ACCESS - A management method, a management apparatus, and a controller for memory data access are provided. The management apparatus is disposed between a host and a device for managing the data transmitted between the host and the device, wherein the management apparatus includes a control unit and a storage unit. When the control unit receives a data writing command from the host, it searches for a set mapped to the data in the storage unit and updates the data in the set. Then, the control unit collects the other parts of the data in the storage unit and the device, integrates all parts of the data, and writes the integrated data into the device. Accordingly, the efficiency in data transmission can be improved, and the number of data writing operations can be reduced so that the lifespan of the device can be prolonged. | 09-24-2009 |
| 20090237852 | HOT PLUG ELECTRONIC DEVICE WITH HIGH USING SAFETY AND OVER-THERMAL PROTECTION DEVICE THEREOF - A hot plug electronic device with high using safety is provided. The hot plug electronic device includes an operation circuit, a voltage regulator and an over-thermal protection device. The operation circuit is used for communicating with an external host. The voltage regulator is coupled to the operation circuit for supplying power to the operation circuit. The over-thermal protection device is coupled to the voltage regulator for sensing the present temperature of the hot plug electronic device, and accordingly controlling the voltage regulator to normally supply/stop supplying the power to the operation circuit. | 09-24-2009 |
| 20090222643 | BLOCK MANAGEMENT METHOD FOR FLASH MEMORY AND CONTROLLER AND STORAGE SYSETM USING THE SAME - A block management method for managing a mapping relationship between a plurality of logical blocks and a plurality of physical blocks of a flash memory is provided. The block management method includes: grouping the logical blocks into a plurality of logical zones; recording the mapping relationship between each logical block in each logical zone and all the data physical blocks among the physical blocks in a corresponding logical zone table in unit of the logical zones; and recording all the no-data physical blocks among the physical blocks with a single no-data physical block table. Thereby, the logical blocks can be mapped to all the physical blocks so that frequent access to specific physical blocks can be avoided when a user writes data into a specific logical zone frequently, and accordingly the lifespan of the flash memory can be prolonged. | 09-03-2009 |
| 20090217136 | STORAGE APPARATUS, CONTROLLER AND DATA ACCESSING METHOD THEREOF - A storage apparatus is provided. The controller of the storage apparatus includes an error correction module and a data disordering module. The error correction module is configured to perform an error correction procedure for a data packet to be written into a flash memory module of the storage apparatus for generating sequence data codes containing the data packet and corresponding error correcting codes, wherein the data packet includes a data area recording data to be written and a spare area recording data related to the data packet. The data disordering module is configured to convert the sequence data codes into non-sequence data codes, wherein the data of the data area and the spare area and error correcting codes are dispersed in the non-sequence data codes. Accordingly, it is possible to effectively increase the safety of the data packet. | 08-27-2009 |
| 20090216936 | DATA READING METHOD FOR FLASH MEMORY AND CONTROLLER AND STORAGE SYSTEM USING THE SAME - A data reading method suitable for a flash memory storage system having a flash memory is provided, wherein the flash memory is substantially divided into a plurality of blocks and these blocks are grouped into at least a data area and a spare area. The data reading method includes: respectively determining whether the blocks in the data area are frequently read blocks; allocating a buffer storage area corresponding to the frequently read block and copying data stored in the frequently read block to the buffer storage area; and reading the data from the buffer storage area corresponding to the frequently read block when the data stored in the frequently read block is to be read. As described above, data loss caused by read disturb can be effectively prevented. | 08-27-2009 |
| 20090204745 | Programming device for non-volatile memory and programming method thereof - The invention presents a programming method for a non-volatile memory with a bit signal to be programmed unidirectionally. The method includes the steps of a) providing first data each having a first number of sequential bits of first status in a data page in a non-volatile memory, b) decoding the first number of sequential bits of the first status in the first data into a second number of sequential bits of second status, and c) programming second data in a portion of the data page where the first status has been decoded to the second status. | 08-13-2009 |
| 20090198877 | SYSTEM, CONTROLLER, AND METHOD FOR DATA STORAGE - A system, a controller, and a method for data storage are provided. The system includes a first storage unit, a second storage unit, and a controller. The first storage unit comprises a single-layer structure for storing data, and the second storage unit comprises a multi-layer structure for storing data. The controller is coupled to the first storage unit, the second storage unit, and a host and controls the host to set the first storage unit as a master storage device and set the second storage unit as a slave storage device. As a result, the host can recognize the first storage unit and the second storage unit as two independent storage devices for storing data. Thereby, the data storage process can be simplified. | 08-06-2009 |
| 20090198875 | DATA WRITING METHOD FOR FLASH MEMORY, AND CONTROLLER AND SYSTEM USING THE SAME - A data writing method for a flash memory is provided. The data writing method includes following steps. First, a block is selected as a substitute block from a spare area of the flash memory, wherein the substitute block is used for substituting a data block in a data area for writing a new data. Next, the new data is directly written into the substitute block starting from a start page, wherein there is valid data in the data block before the address for writing the new data. Thereby, meaningless data moving can be reduced, system performance can be improved, and overlong waiting time for writing the new data can be prevented. | 08-06-2009 |
| 20090187709 | METHOD, SYSTEM AND CONTROLLER FOR TRANSMITTING AND DISPATCHING DATA STREAM - A method for transmitting and dispatching data stream, which is used for transmitting data stream to a storage device having a non-volatile memory and a smart card chip from a host, is provided. The method includes: setting a key between the host and the storage device; creating a temporary file in the non-volatile memory; verifying the temporary file based on the key; recording a logical block address of the temporary file when verification of the temporary file is successful; and judging whether the data stream from the host is written at the logical block address, wherein the data stream is identified to be a command-application protocol data unit (C-APDU) and is dispatched to the smart card chip when the data stream from the host is written at the logical block address. Accordingly, it is possible to efficiently distinguish a general data from a command of the smart card chip. | 07-23-2009 |
| 20090187699 | NON-VOLATILE MEMORY STORAGE SYSTEM AND METHOD FOR READING AN EXPANSION READ ONLY MEMORY IMAGE THEREOF - A non-volatile memory storage system including a connecting interface, a non-volatile memory, a buffer memory, a microcontroller, and a virtual host module is provided. The connecting interface is used for connecting to a host. The non-volatile memory is used for storing user data, wherein the non-volatile memory further stores an expansion read only memory (ROM) image to be read by the host. The buffer memory is used for temporarily storing the expansion ROM image. The microcontroller controls the operation between the connecting interface, the buffer memory, and the non-volatile memory. The virtual host module provides an activation code in the expansion ROM image to the host through the microcontroller. Thereby, both the size and the fabrication cost of the non-volatile memory storage system can be effectively reduced. | 07-23-2009 |
| 20090175075 | FLASH MEMORY STORAGE APPARATUS, FLASH MEMORY CONTROLLER, AND SWITCHING METHOD THEREOF - A flash memory storage apparatus including a multi level cell (MLC) NAND flash memory, a flash memory controller, and a host transmission bus is provided. The MLC NAND flash memory includes a plurality of blocks for storing data, wherein each of the blocks has an upper page and a lower page, and the writing speed of the lower page is faster than that of the upper page. The flash memory controller is electrically connected to the MLC NAND flash memory and is used for executing storage mode switching steps. The host transmission bus is electrically connected to the flash memory controller and is used for communicating with a host. The flash memory storage apparatus provided by the present invention can provide multiple storage modes in order to store different data. | 07-09-2009 |
| 20090172256 | DATA WRITING METHOD FOR FLASH MEMORY, AND FLASH MEMORY CONTROLLER AND STORAGE DEVICE THEREOF - A data writing method for a block of a multi level cell NAND flash memory including upper page addresses and lower page addresses is provided, wherein a writing speed at the lower page addresses is higher than that at the upper page addresses. The data writing method includes receiving a writing command and determining whether an address to be written with new data in the writing command is the upper page address of the block. The method also includes copying old data previously recorded on the lower page addresses of the block as an old data backup when the address to be written in the writing command is the upper page address of the block and then writing the new data to the address to be written. Thus, old data may be protected while writing data to the upper page address of the multi level cell NAND flash memory. | 07-02-2009 |
| 20090172255 | WEAR LEVELING METHOD AND CONTROLLER USING THE SAME - A wear leveling method for a multi level cell (MLC) NAND flash memory is provided. The flash memory includes a first zone and a second zone respectively having a plurality of blocks, wherein each of the blocks includes an upper page and a lower page. The wear leveling method includes: respectively determining whether to start a block swapping operation of a wear leveling process in the first zone and the second zone of the flash memory according to different start-up conditions; and respectively performing the block swapping operation in the first zone and the second zone, wherein the blocks in the first zone are accessed by using only the lower pages, and the blocks in the second zone are accessed by using both the upper pages and the lower pages. Thereby, the lifespan of the flash memory is effectively prolonged and meaningless consumption of system resources is avoided. | 07-02-2009 |
| 20090172254 | METHOD FOR PREVENTING READ-DISTURB HAPPENED IN NON-VOLATILE MEMORY AND CONTROLLER THEREOF - A method for preventing read-disturb happened in non-volatile memory and a controller thereof are disclosed. The non-volatile memory includes a plurality of blocks, and the blocks are grouped into at least a data group and a spare group, each block includes a plurality of pages. The method includes recording read times of at least a first block of the blocks within the data group and then renewing the original data stored in the first block when the read times of the first block is greater than a predetermined value. | 07-02-2009 |
| 20090157782 | RANDOM NUMBER GENERATOR AND RANDOM NUMBER GENERATING METHOD THEREOF - A random number generator and a random number generating method thereof are provided. The random number generator includes a signal generating unit and a sampling unit. The signal generating unit is adapted for memorizing a status of a noise generated during a transient of an output signal of an output buffer, and accordingly generating a frequency conversion signal which changes according to time and ambient factors. The sampling unit is coupled to the signal generating unit for receiving the frequency conversion signal, and sampling the frequency conversion signal according to a sampling clock pulse, so as to obtain a plurality of sets of unpredictable random number codes. | 06-18-2009 |
| 20090150684 | ANTI-ATTACKING METHOD FOR PRIVATE KEY, CONTROLLER, STORAGE DEVICE AND COMPUTER READABLE RECORDING MEDIUM HAVING THE SAME - An anti-attacking method for a private key is provided. The method includes using a plurality of storage areas for storing the same security information. The method also includes selecting one of the storage areas as a currently-used storage area for accessing the security information and synchronously updating the security information stored in the other storage areas while updating the security information stored in the currently-used used storage area when generating a digital signature by using a signature rule and the private key. The method further includes selecting one of the other storage areas as the currently-used storage area for correctly accessing the security information when detecting an attack on the security information stored in the currently-used storage area during generation of the digital signature. Therefore, it is possible to prevent the attacker from stealing the private key. | 06-11-2009 |
| 20090150597 | DATA WRITING METHOD FOR FLASH MEMORY AND CONTROLLER USING THE SAME - A data writing method for a flash memory is provided. The data writing method includes: dividing a new data into at lease one sub-data by the length of a writing unit; selecting one of a plurality of spare blocks from the flash memory as a substitute block for substituting a data block, wherein the new data is to be written into the data block; sequentially writing the sub-data having the length of the writing unit into the substitute block in the writing unit; and storing the sub-data not having the length of the writing unit into a temporary area. The writing efficiency of the flash memory can be improved by temporarily storing the sub-data not having the length of the writing unit into the temporary area and then writing the sub-data not having the length of the writing unit with subsequent data into the substitute block. | 06-11-2009 |
| 20090122478 | FLASH MEMORY DISK WITH ROTATABLE AND TELESCOPIC PROTECTION STRUCTURE AND METHOD USING THE SAME - A flash memory disk includes a holder, a plug, a housing and a pulling ring. The plug is joined with the holder and exposed out of the holder. The housing has a containing space for accommodating the holder and the plug, wherein two sides opposite to each other respectively have a through sliding groove and the third side of the housing there has an opening. The two arms of the pulling ring have sliding blocks, and the sliding blocks are moveable and matched with the through sliding grooves, wherein the pulling ring is rotated about the axis connecting both the sliding blocks, and when the sliding blocks of the pulling ring is moved, the holder would be located between a first position where the plug is entirely accommodated in the containing space and a second position where the plug is entirely protruded out of the opening. | 05-14-2009 |
| 20090106484 | DATA WRITING METHOD FOR NON-VOLATILE MEMORY AND CONTROLLER USING THE SAME - A data writing method for a non-volatile memory is provided, wherein the non-volatile memory includes a data area and a spare area. In the data writing method, a plurality of blocks in a substitution area of the non-volatile memory is respectively used for substituting a plurality of blocks in the data area, wherein data to be written into the blocks in the data area is written into the blocks in the substitution area, and the blocks in the substitution area are selected from the spare area of the non-volatile memory. A plurality of temporary blocks of the non-volatile memory is used as a temporary area of the blocks in the substitution area, wherein the temporary area is used for temporarily storing the data to be written into the blocks in the substitution area. | 04-23-2009 |
| 20090094409 | WEAR LEVELING METHOD AND CONTROLLER USING THE SAME - A wear leveling method for non-volatile memory is provided, by which the non-volatile memory is substantially divided into a plurality of blocks and the blocks are grouped into a data area and a spare area. The method includes selecting a block based on an erased sequence when getting the block from the spare area. The method also includes performing a wear leveling procedure. | 04-09-2009 |
| 20090091978 | WEAR LEVELING METHOD AND CONTROLLER USING THE SAME - A wear leveling method under limited system resources is provided, the wear levelling method is suitable for a non-volatile memory, the non-volatile memory is substantially divided into a plurality of blocks, and the blocks are at least grouped into a data area, a spare area and a substitution-transient area. The blocks within the data area may be divided into a plurality of lately-used blocks and a plurality of lately-unused blocks. The method includes only recording erase times of the lately-used blocks and blocks within the spare area and selecting a block used for the substitution-transient area is selected from the spare area according to a judgment condition of erase times of another block within the spare area plus a first threshold value. The method also includes performing a wear leveling procedure. Wherein, the selected block and the other block are selected in a random mode or a sequential mode. | 04-09-2009 |
| 20090089496 | Dual-interface data storage apparatus - The present invention discloses a dual interface data storage apparatus, including: a memory module, a first interface and a second interface connected with the memory module, a housing, and a movable carriage for carrying the memory module, the first interface, and the second interface. The housing accommodates the memory module, the first interface and the second interface, and has a first opening at one end and a second opening at the other end for either allowing the first interface or the second interface to pass through the first opening or the second opening. | 04-02-2009 |
| 20090089485 | WEAR LEVELING METHOD AND CONTROLLER USING THE SAME - A wear leveling method for a non-volatile memory is provided. The non-volatile memory is substantially divided into a plurality of blocks, and these blocks are grouped into at least a data area, a spare area, a substitute area, and a temporary area. The wear leveling method includes selecting blocks from the spare area according to different purposes and executing a wear leveling procedure. | 04-02-2009 |
| 20090089484 | DATA PROTECTION METHOD FOR POWER FAILURE AND CONTROLLER USING THE SAME - A data protection method suitable for a plurality of physical blocks mapped to a logical block in a non-volatile memory is provided. The data protection method includes recording data update information in each of the physical blocks for identifying an update relationship of the physical blocks and re-establishing the update relationship of the physical blocks according to the data update information. The data update information is composed of a plurality of words having a circular relationship, and the number of these words is greater than the number of the physical blocks. The data update information is sequentially recorded in each of the physical blocks according to the update relationship and the circular relationship. | 04-02-2009 |
| 20090086511 | CONVERTER CIRCUIT WITH PULSE WIDTH FREQUENCY MODULATION AND METHOD THEREOF - A converter circuit is provided herein. In the converter, a voltage converting unit receives an input voltage and outputs an output voltage according to the magnitude of the input voltage by switching operation based on a control clock signal. A comparing circuit generates a power good pulse signal by comparing the output voltage with a reference voltage. A pulse width frequency modulation circuit receives the power good pulse signal and a source clock signal to provide the control clock signal. The pulse width of the source clock signal is varied gradually and the frequency of the source clock signal is also changed during a period that the power good pulse signal remains in the first logic state, and the pulse width frequency modulated source clock signal is output as the control clock signal. | 04-02-2009 |
| 20090083476 | SOLID STATE DISK STORAGE SYSTEM WITH PARALLEL ACCESSSING ARCHITECTURE AND SOLID STATE DISCK CONTROLLER - A solid state disk (SSD) storage system with a parallel accessing architecture, including a SSD controller and a plurality of transmission interfaces of a predetermined bit number and bandwidth, and a solid state disk controller thereof are provided. The SD controller forms channels for transmitting control signals and data with one or more flash memories through each of the transmission interfaces. That is, independent transmission channels are constituted between the SSD controller, the transmission interfaces with multiple bits, and the flash memories. In one embodiment, the transmission interfaces are compatible with MMC 4.0 protocol or higher. Moreover, a host controls and accesses the flash memories through a SATA bus interface and the SSD controller, and uses a direct memory access (DMA) engine with a bidirectional connection port in the SSD controller to transmit data. | 03-26-2009 |
| 20090061696 | Data storage apparatus - The present invention discloses a data storage apparatus, including a memory module, a USB connector connected with the memory module, a housing for accommodating the memory module, a movable carriage for holding the memory module and the USB connector, and a rotary driving mechanism for transmitting a rotary motion into a linear motion for driving the USB connector. | 03-05-2009 |
| 20090006866 | STORAGE APPARATUS, MEMORY CARD ACCESSING APPARATUS AND METHOD OF READING/WRITING THE SAME - A storage apparatus having a non-volatile memory and a controller is provided, wherein the non-volatile memory includes a root directory area and a data area, and a password file is stored in the root directory area. The controller identifies a user by using a password in the password file, and the user can access the data area through an encryption/decryption unit of the controller only if the user passes the identification. By using the secured storage apparatus, the risk of the password and encrypted data being cracked is reduced. Accordingly, the protection over the data stored in the storage apparatus is enhanced. | 01-01-2009 |
| 20080313400 | DATA ACCESSING SYSTEM, CONTROLLER AND STORAGE DEVICE HAVING THE SAME, AND OPERATION METHOD THEREOF - A data accessing system for interfacing between a smart card and a non-volatile memory is provided. The non-volatile memory has a smart card exclusive area accessible to a plurality of smart card applications. The smart card exclusive area includes a plurality of record unit sets respectively having a plurality of record units. The data accessing system has a buffer for temporarily storing data to be written into the smart card exclusive area and a data accessing protocol including an access parameter table, a plurality of application information tables, and a plurality of record unit set link tables. The smart card applications access the smart card exclusive area in a unit of record unit set, and the size of a record unit set is a multiple of an access unit of the non-volatile memory. Accordingly, the number of accesses to the non-volatile memory is reduced and data security is increased. | 12-18-2008 |
| 20080301355 | FLASH MEMORY INFORMATION READING/WRITING METHOD AND STORAGE DEVICE USING THE SAME - A flash memory information read/write method in which an external resource such as host, external memory, EEPROM, or external controller is used to read and update new flash memory information after fabrication of a flash memory device, enabling the new flash memory information to be written in a predetermined address in a flash memory module of the flash device by a controller of the flash memory device, so that every flash memory device that has an erroneous or damaged factory data or information is still usable, and the flash memory controller provider needs not to continuously develop new firmware controllers for different flash memories. | 12-04-2008 |
| 20080270816 | Portable data storage apparatus and synchronization method for the same - The present invention discloses a portable data storage apparatus for use with a host device, including an interface coupled to the host device for data transmission therebetween, a real time clock (RTC) for synchronizing the portable data storage apparatus with a clock time, and a memory module for storing data and a detection program for detecting time discrepancy between system time of the host device and the clock time of the RTC after the storage apparatus is loaded to the host device. | 10-30-2008 |
| 20080256322 | Secure storage apparatus and method for controlling the same - The present invention discloses a storage apparatus in communication with one or more external systems, including at least one storage region, at least one logical partition formed by using a first part of the storage region for storing data, and a logic controller, provided with an authentication module for setting one access mode for controlling access to the logical partition according to the access mode when a vendor command from the external system requesting access to the logical partition is received. | 10-16-2008 |
| 20080256293 | CARRIER FOR MANUFACTURING A MEMORY DEVICE, METHOD USING THE SAME, MEMORY DEVICE USING THE SAME AND MANUFACTURING METHOD OF A MEMORY DEVICE USING THE SAME - A carrier including a bottom plate, an intermediate cover, and a top cover for manufacturing a memory device is introduced herein. A printed circuit board is disposed on the bottom plate, and memory elements are arranged and disposed on the PCB. The intermediate cover is used to press peripheral regions of the printed circuit board, and to expose the regions where the memory elements are formed on the printed circuit board. The printed circuit board is closely attached to a surface of the bottom plate by fixing the intermediate cover. The top cover is used to cover the memory elements formed on the printed circuit board after some manufacturing processes, and by exerting an external force, the formed memory elements are clamped down, so as to protect the memory elements from being affected by the printed circuit board in the following thermal process due to the thermal stress deformation. | 10-16-2008 |
| 20080250249 | Data access method against cryptograph attack - The present invention discloses a data access method accomplished by the following steps of: creating a predetermined password; generating a first encryption key; encrypting data based on the first encryption key; prompting for the predetermined password upon receipt of an access request; decoding a header of the NAND flash memory based on a user-entered password; examining the header to determine whether a mapping between the user-entered password and the first encryption key is defined; and decrypting and outputting the data by a decryption key when the mapping between the user-entered password and the first encryption key is defined. | 10-09-2008 |
| 20080250192 | Integrating flash memory system - The present invention discloses an integrating data processing system. The system includes a master device with a host interface for processing data, at least one NAND flash memory unit having a unit interface, and a flash memory controller. For controlling access to the NAND flash memory unit, the flash memory controller is provided with a first interface connected with the host interface of the master device, and a second interface connected with the unit interface of the NAND flash memory unit. The first interface is identical to the unit interface of the flash memory and the second interface is identical to the host interface of the master device. The master device can access the NAND flash memory unit via the flash memory controller thereby facilitating to fit in with the development of new flash memory device without upgrading the original master device. | 10-09-2008 |
| 20080203970 | Battery-powered apparatus for portable system - The invention presents a battery-powered apparatus with an internal battery device and an external battery device for a portable system. Meanwhile the battery powered apparatus, applied to a portable system, includes a power path switching circuit having a power path multiplexer, a logic controller and a voltage detector connected to an external power supply, an internal battery device, an external battery device and the portable system, wherein the voltage detector is in response to inputting voltages of the external power supply, the internal battery device and the external battery device, and then provides the logic controller with information for determining one of the external power supply, the internal battery device and the external battery device electrically conducted to the portable system via the power path multiplexer; and a rechargeable battery charging circuit connected to the external power supply, the internal battery device, and the external battery device; and having a charging arbitrator in response to the external power supply, the internal battery device and the external battery device for determining to recharge the internal battery device and the external battery device. | 08-28-2008 |
