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PEREGRINE SEMICONDUCTOR CORPORATION

PEREGRINE SEMICONDUCTOR CORPORATION Patent applications
Patent application numberTitlePublished
20110002080METHOD AND APPARATUS FOR USE IN DIGITALLY TUNING A CAPACITOR IN AN INTEGRATED CIRCUIT DEVICE - A method and apparatus for use in a digitally tuning a capacitor in an integrated circuit device is described. A Digitally Tuned Capacitor DTC is described which facilitates digitally controlling capacitance applied between a first and second terminal. In some embodiments, the first terminal comprises an FW+ terminal and the second terminal comprises an RF terminal. In accordance with some embodiments, the DTCs comprises a plurality of sub-circuits ordered in significance from least significant bit (LSB) to most significant bit (MSB) sub-circuits, wherein the plurality of significant bit sub-circuits are coupled together in parallel, and wherein each sub-circuit has a first node coupled to the first RF terminal, and a second node coupled to the second FW terminal. The DTCs further include an input means for receiving a digital control word, wherein the digital control word comprises bits that are similarly ordered in significance from an LSB to an MSB.01-06-2011
20080230837RADIATION-HARDENED SILICON-ON-INSULATOR CMOS DEVICE, AND METHOD OF MAKING THE SAME - A silicon-on-insulator metal oxide semiconductor device comprising ultrathin silicon-on-sapphire substrate; at least one P-channel MOS transistor formed in the ultrathin silicon layer; and N-type impurity implanted within the ultrathin silicon layer and the sapphire substrate such that peak N-type impurity concentration in the sapphire layer is greater than peak impurity concentration in the ultrathin silicon layer.09-25-2008