| PANASONIC SEMICONDUCTOR ASIA PTE., LTD. Patent applications |
| Patent application number | Title | Published |
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| 20120078511 | METHOD AND APPARATUS FOR PROVIDING DIRECTIONAL NAVIGATION INDICATION - A method and apparatus to enhance the direction navigation capabilities of GPS-enabled devices, through the use of light indicators is proposed. The light indicators are positioned on the top, bottom, and sides of the GPS screen. The light indicators blink at different rates relatively to a distance to a destination. The light indicators show various effects to indicate various instructions, such as to go forward direction, to go onto an overhead bridge, to enter into an underground tunnel. | 03-29-2012 |
| 20120019227 | POWER SUPPLY CIRCUIT - An apparatus for selecting either a High VIN path or a Low VIN path from a voltage source to a low voltage circuit is disclosed. The apparatus has a clamped step down circuit operable to select the High VIN path when a voltage level from the voltage source is above or equal to a pre-determined voltage level and, a power supply control circuit operable to select the Low VIN path when the voltage level from the voltage source is below the pre-determined voltage level. | 01-26-2012 |
| 20120008241 | ESD PROTECTION CIRCUIT AND METHOD - An ESD protection circuit for reducing the regulator output capacitance includes a ground isolation circuit or a VCC isolation circuit to isolate regulator output from ground terminal or VCC terminal whenever ESD occurs, causing dropping of the differential voltage between regulator output and ground. The isolation circuits function to minimize the leakage current. | 01-12-2012 |
| 20110235222 | OUTPUT SHORT TO GROUND PROTECTION CIRCUIT - An output short to ground protection circuit protects an electronic device when it is short circuited to ground. The protection circuit has an NMOS transistor coupled to the output power transistor. A fixed voltage generator is connected to a gate terminal of the NMOS transistor. A first voltage clamping circuit and a second voltage clamping circuit are provided. The voltage clamping circuits are utilized so as to limit the current outputted by the output power transistor when the short circuit occurs. | 09-29-2011 |
| 20110234599 | SWING DISPLAY DEVICE AND METHOD - A swing display device includes a CPU which calculates and produces synchronizing signal relative to the length of the message to be displayed. Learning the speed of the synchronizing signal, the user swings the swing display device back-and-forth according to the synchronizing signal to produce the image in the air. | 09-29-2011 |
| 20110234184 | START-UP IN-RUSH CURRENT PROTECTION CIRCUIT FOR DCDC CONVERTER - A protection circuit for protecting DCDC converter with a power MOS transistor from start-up in-rush current includes a coupling capacitor and a voltage clamping circuit. By using the coupling capacitor to turn-off the power MOS transistor, there is no current consumed during the normal operation of the circuit. Enable signal or leakage current circuit is used to discharge the capacitor so that the circuitry can work in another turning-on of power supply. | 09-29-2011 |
| 20110215786 | ON-OFF TIMER CIRCUIT FOR USE IN DC-DC CONVERTER - An ON-OFF timer circuit for use in a DC-DC converter to minimize or eliminate the risk of developing sub-harmonic oscillations that may cause the dc-dc system to be unstable is presented. The apparatus controls and limits the ‘On’ time duration and ‘Off’ time duration within one pulse cycle. | 09-08-2011 |
| 20110208885 | DATA BUS CONTROL METHOD AND APPARATUS - A method and apparatus to prevent I2C device from hanging the I2C data bus and thus stopping other devices in the system from transmitting or receiving data is presented. A logic transition detector detects a logic transition at the output data line of an I2C device and triggers a timer. The timer starts counting after it is triggered. A reset module resets the I2C interface module in the I2C device after the timer counts to a specified period of time. The timer is reset when the logic transition detector detects another logic transition at the output data line of the I2C device. | 08-25-2011 |
| 20110084684 | SWITCHING OF RESISTOR EPI BIASING FOR REVERSED RESISTOR CONNECTION IN OFFSET ELEMENT CANCELLATION SYSTEM - A method of improving voltage detection accuracy and precision by employing a switchable resistor epi bias design, which consists of switches to control connection of resistor epi bias. By constantly maintaining the resistor epi bias to its own resistor terminal bias via switches, higher accuracy detection than conventional resistor bias method can be achieved. | 04-14-2011 |
| 20100250804 | METHOD FOR IC COMMUNICATION SYSTEM - A method of optimizing the usage of communication buses is disclosed. In this method, a slave may function, when necessary, as a ‘pseudo-master’. This allows direct communication between slaves, one of which functions as a ‘pseudo-master’. This hence relieves the Master device of the load required as an intermediary for the communication of said slaves. | 09-30-2010 |
| 20100134698 | GROUND DETECTION CIRCUIT FOR VIDEO SIGNAL DRIVER TO PREVENT LARGE CLAMP TRANSISTOR CURRENT - A large current flowing out from video signal line driver is prevented whenever the video signal line is being grounded. The system includes a video signal line driver circuit transmitting video signal at pre-determined DC level, a large current prevention circuit detecting video signal line being shorted to ground and cut-off excessive current source out from video signal line driver circuit into video signal line, a start-up time enhancement circuit improving start-up time of ground detection circuit so that system start-up time is not limited by large current prevention circuit, and a switching threshold control circuit setting the switching threshold of large current prevention circuit and start-up time enhancement circuit. | 06-03-2010 |
| 20090243579 | DCDC CONVERTER WITH SOFT-STARTUP AND SOFT-TRANSITION FOR ADJUSTABLE OUTPUT VOLTAGE - A method and exemplary apparatus that incorporate soft-start circuit together with adjustable output voltage control are introduced. By implementing a gradual increment of voltage steps/fast decrement, it can totally eliminate overshoot and limit in-rush current significantly at the initial startup and output voltage transition that happens after startup. | 10-01-2009 |
| 20090243577 | REVERSE CURRENT REDUCTION TECHNIQUE FOR DCDC SYSTEMS - The purpose of the present invention is to provide a method for switching devices that enables the prediction of when a reverse current condition will occur regardless of voltage-mode or current-mode switching regulator. According to the present invention, the reverse current reduction technique is realized by implementing a circuit which takes in the PWM signal, switching regulator's output signal and the Supply Voltage, before outputting a logic signal to indicate the start of reverse current flow; an OR gate, which outputs a logic signal to control the turning ON/OFF of the PMOS buffer at the output. | 10-01-2009 |
| 20090219090 | OUTPUT DC OFFSET PROTECTION FOR CLASS D AMPLIFIERS - A class D amplifier with output DC offset protection is disclosed. The DC offset protection receives a PWM input signals from the outputs and investigates the PWM output signals whether there is a large DC voltage difference is being reflected on the speaker load. If so, shutdown signal SD will be sent by the DC offset protection to the PWM control logic and gate driver, thus, shutting down the output of the class D system and preventing disastrous condition from being develop across the speaker. | 09-03-2009 |
| 20090140796 | SLEW RATE CONTROL IN OUTPUT DRIVER - A slew rate control circuit in output driver of switching circuit to prevent power ground undershoot is introduced. The gate capacitance of lower power transistor is first fast discharged to ensure the operation of the output signal. The gate capacitance of lower power transistor is then slowly discharged to limit OUT SLEW RATE. The gate capacitance of lower power transistor is further slowly discharged when the power ground level is below common ground. With above controlling, the gate voltage slew rate of lower power transistor is reduced when the lower power transistor is almost fully turned OFF. Therefore, undershoot at the power ground is avoided. Similar slew rate control circuit can also be derived in output driver of switching circuit to prevent PVCC overshoot. | 06-04-2009 |
| 20090115465 | LOW POWER, HIGH SLEW RATE CCD DRIVER - A low power, high slew rate output driver circuit system is provided. The Circuit system comprises a cascade of two high-speed stages and a variable current biasing block. The combination of these two elements enables the realization of a high slew rate, yet low power output driver system. | 05-07-2009 |
| 20090115464 | MULTIPLE-BRANCHING CONFIGURATION FOR OUTPUT DRIVER TO ACHIEVE FAST SETTLING TIME - A multiple branching configuration for output driver which achieves a fast settling time is provided. The multiple branching configuration comprises breaking down a typical output buffer stage into multiple branches; and utilizing multiple unit area sized transistors connected in parallel. | 05-07-2009 |
| 20090102408 | BACKWARD PEDALING DETECTION CIRCUIT FOR E-BIKE MOTOR DRIVER - A backward pedaling detection circuit has a charging/discharging circuit for charging and discharging the external capacitor to meet the threshold voltage required by the hysteresis comparator, based on the input from the hall sensor. An internal pull-down circuit, based on the pedal speed, keeps the circuit from false triggering. A comparator with hysteresis (Schmitt trigger) sets the upper and lower threshold voltage and eliminates the effect of noise. AND gates act like switches to allow the selected signal to pass through. | 04-23-2009 |
