| ORMET CIRCUITS, INC. Patent applications |
| Patent application number | Title | Published |
|---|
| 20110171372 | PREPARATION OF METALLURGIC NETWORK COMPOSITIONS AND METHODS OF USE THEREOF - The present invention provides conductive metal compositions for electronic applications, and methods of preparation and uses thereof. More specifically, the present invention provides metallic particle transient liquid phase sintering compositions containing blended formulations of metal and metal alloy components that form interconnected conductive metallurgical networks with increased stability, resistance to thermal stress and ability to mitigate CTE mismatch between materials. | 07-14-2011 |
| 20100252616 | CONDUCTIVE COMPOSITIONS CONTAINING BLENDED ALLOY FILLERS - The present invention provides electrically and thermally conductive compositions for forming interconnections between electronic elements. Invention compositions comprise three or more metal or metal alloy particle types and an organic vehicle comprising a flux that is application specific. The first particle type includes a reactive high melting point metal that reacts with a reactive low melting point metal(s) in the other particles to form intermetallic species. The reactive low melting point metal(s) of the invention are provided in two distinct particle forms. The first reactive low melting point metal particle includes a carrier that facilitates the reaction with the reactive high melting point metal. The second reactive low melting point metal particle acts primarily as a source of the reactive low melting point metal. Combination of the three particle types provides several advantages including reduction of the undesirable characteristics of the carrier metal while preserving and, in some embodiments, enhancing, the advantageous facilitation of the metallic reaction. | 10-07-2010 |
| 20100230145 | METHODS TO PRODUCE HIGH DENSITY, MULTILAYER PRINTED WIRING BOARDS FROM PARALLEL-FABRICATED CIRCUITS AND FILLED VIAS - The invention provides methods to mass laminate and interconnect high density interconnect circuit layers fabricated through parallel processing. Invention methods employ an inside-out interconnection strategy that eliminates plating of vias and provides defect-free outer circuit layers. Conductive paste and via layers are also key features of the invention. | 09-16-2010 |
