| NUVOTON TECHNOLOGY CORPORATION Patent applications |
| Patent application number | Title | Published |
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| 20120133376 | Sensing Device and Method - A sensing device includes an oscillator, a driver, a switch, a counter and a timer. The oscillator includes an input coupled to a reference capacitor. The driver alternately sources and sinks current in accordance with an oscillation signal outputted by the oscillator. The switch connects or disconnects the reference capacitor with a sensing capacitor. The counter counts value for the oscillation signal. The timer counts operation periods respectively when the switch connects the reference capacitor with the sensing capacitor and when the switch disconnects the reference capacitor with the sensing capacitor, and the counter counts values corresponding to conditions of the switch connecting and disconnecting the reference capacitor with the sensing capacitor during the operation periods, respectively. | 05-31-2012 |
| 20120068985 | CHIP AND COMPUTER SYSTEM - A computer system is provided. The computer system comprises system and peripheral hardware devices, a display device and a chip. The display device comprises a display panel and an on-screen display (OSD) control module. The chip comprises a computer system environment information monitoring module, a control connection interface and a control module. The computer system environment information monitoring module monitors computer system environment information according to the system and peripheral hardware devices. The control connection interface is electrically connected to the OSD control module. The control module is electrically connected to the computer system environment information monitoring module and the control connection interface to control the OSD control module through the control connection interface according to the computer system environment information to further control the display function of the display panel. | 03-22-2012 |
| 20110274290 | FAST START-UP CIRCUIT FOR AUDIO DRIVER - A driver device for suppression audible transients of an audio amplifier includes an amplifier for receiving an audio signal and a bias circuit configured to quickly generate a voltage level for biasing the amplifier, wherein the voltage level is maintained even if the driver device is powered off. The bias circuit may include a CMOS inverter having a negative feedback that has a standby current of less than 100 nA. The bias circuit further includes a buffer for rapidly charging an external capacitor. The buffer may change to a high impedance state rapidly when the power supply is disconnected. | 11-10-2011 |
| 20110254817 | DISPLAY, CONTROL CIRCUIT THEREOF, AND METHOD OF DISPLAYING IMAGE DATA - A method of displaying image data includes the steps as follows. Image data with various data bits are transmitted, and one of the image data is selectively received and processed to output N-bit image data, where 0| 10-20-2011 | |
| 20110239033 | Bus Interface and Clock Frequency Control Method of Bus Interface - A bus interface includes a chip select terminal, a first transmission bus terminal, a second transmission bus terminal, and a clock control device. The chip select terminal transmits a chip select signal to start the data transmission. When the data transmission starts, the first transmission bus terminal sends data to the second device, and the second transmission bus terminal sends the data from the second device to the first device. The clock control device includes a frequency processing unit and a transmission clock generating unit. The frequency processing unit outputs a clock control signal when a frequency to set value changes. The transmission clock generating unit receives the clock control signal and generates a transmission clock in accordance with the frequency setting value. | 09-29-2011 |
| 20110221452 | CAPACITIVE SENSOR AND SENSING METHOD - A capacitive sensing method is provided. The capacitive sensing method includes the step of alternately charging/discharging a capacitive sensing electrode of a capacitive sensor for predetermined times under an active mode and charging/discharging the capacitive sensing electrode during a fixed period under a standby mode while an object is not coupled to the capacitive sensing electrode, in which the capacitive sensing electrode has a first capacitance while the object is not coupled to the capacitive sensing electrode. The capacitive sensing method also includes the step of generating a switch signal while the object is coupled to the capacitive sensing electrode under the standby mode such that the capacitive sensing electrode has a second capacitance larger than the first capacitance and the step of switching the standby mode to the active mode according to the switch signal. | 09-15-2011 |
| 20110216038 | SYSTEMS AND METHODS FOR DETECTING MULTIPLE TOUCH POINTS IN SURFACE-CAPACITANCE TYPE TOUCH PANELS - Surface-capacitance-based multi-touch touch panel apparatus including a multiplicity of electrically conductive shapes e.g. diamonds arranged along at least one of rows and columns whose capacitance is measured by capacitive sensors; wherein the rows and columns include a set of linear arrays including at least one individual linear array which includes a plurality of first sets of shapes, each first set including n>=1 shapes all shorted to a single set-specific capacitive sensor such that no two first sets are both shorted to a common capacitive sensor. | 09-08-2011 |
| 20110157083 | RESISTIVE TOUCH APPARATUS - The subject matter discloses an apparatus, comprising a first resistive sheet and a second resistive sheet disposed in proximity to the first resistive sheet, such that pressure applied at a first touch point and at a second touch point on the first resistive sheet causes flow of electrical current between the first resistive sheet and the second resistive sheet. The apparatus further comprises a control unit coupled to a first terminal and to a second terminal, and configured to measure a first resistance between the first terminal and the second terminal; and configured to estimate a distance between the first touch point and the second touch point. The apparatus further estimates the location of the first touch point and the second touch point. | 06-30-2011 |
| 20110135103 | System and Method for Audio Adjustment - A system and a method for audio adjustment are provided. The method includes following steps. A first output audio signal generated from the under-test audio playback device according to a frequency response test signal is received. The first output audio signal is analyzed to generate a set of suggested equalization parameter. A set of equalization parameters are adjusted according to the suggested equalization parameters, and a sound test signal is generated from an original sound signal according to the equalization parameters and output to the under-test audio playback device. A second output audio signal is generated from the under-test audio playback device in response to the sound test signal. Whether the auditory effect of the second output audio signal is close to the original sound signal or matches the user's need is determined. The equalization parameters are adjusted when the auditory effect of the second output audio signal is not close to the original sound signal or the user is not satisfied with the auditory effect. | 06-09-2011 |
| 20110128658 | ESD PROTECTION APPARATUS AND ESD DEVICE THEREIN - An electrostatic discharge (ESD) protection device is provided. The ESD protection device includes a source region and a drain region. The source region is to be coupled to a low-level voltage. The drain region is disposed apart from the source region and includes a first P-type heavily doped region and at least one first N-type heavily doped region. The first P-type heavily doped region is configured to couple to a pad, and the first N-type heavily doped region is adjacent to the first P-type heavily doped region and floated. An electrostatic discharge protection apparatus is also disclosed herein. | 06-02-2011 |
| 20110121394 | CHIP AND ELECTROSTATIC DISCHARGE PROTECTION DEVICE THEREOF - An ESD protection device is provided, which includes a P-type doped region, an N-type doped region, a first P+ doped region, a first N+ doped region, a second N+ doped region and a third N+ doped region. The N-type doped region is located in the P-type doped region. The first P+ doped region connected to a pad is located in the N-type doped region. A part of the first N+ doped region is located in the N-type doped region and the residue part thereof is located in the P-type doped region. The second and the third N+ doped regions are located in the P-type doped region and outside the N-type doped region, and are respectively electrically connected to a first power rail and a second power rail. In addition, the second N+ doped region is located between the first and the third N+ doped regions. | 05-26-2011 |
| 20110102476 | DRIVER OF FIELD SEQUENTIAL DISPLAY AND DRIVING METHOD THEREOF - A driver of a field sequential display is provided. The driver includes a first power device, a second power device, and a driving waveform generator. The first power device generates a first power when the field sequential display is in a color mode. The second power device generates a second power when the field sequential display is in a monochrome mode. The voltage and current of the second power are respectively smaller than the voltage and the current of the first power. The driving waveform generator coupled to the first power device and the second power device and generates a plurality of scan signals and a plurality of display signals according to the first power or the second power, so as to drive a display panel of the field sequential display. | 05-05-2011 |
| 20110007019 | SYSTEMS AND METHODS FOR USING TFT-BASED LCD PANELS AS CAPACITIVE TOUCH SENSORS - A display screen system operative in the presence of backlight, which may be provided by a rear light source or by a mirror according to reflective LCD technologies, to identify presence of a conductive member such as a finger, the system comprising a structural, transparent planar element including an array of structural, planar conductive areas independently electrically addressable by a source of electric power, each conductive area having a plurality of transparency states controlled by said source of electric power; and capacitance sensing circuitry operative to sense capacitance of at least one of said conductive areas. | 01-13-2011 |
| 20100324841 | Capacitive Detection Systems, Modules and Methods - Capacitive detection systems, modules, and methods. In one embodiment, time interval measurement(s) are generated that are monotonic functions of the capacitance(s) of capacitive sensor(s) in a capacitive sensing area. In one embodiment, the generated time interval measurement(s), or any other monotonic function(s) of capacitance(s) of capacitive sensor(s) in a capacitive sensing area, may be analyzed to detect the presence of an object near the capacitive sensing area and/or to detect the position of an object near the capacitive sensing area. | 12-23-2010 |
| 20100302198 | Power Efficient Capacitive Detection - Capacitive detection systems, modules, and methods. In one embodiment, a power saving mode is implemented when deemed appropriate, based on an analysis of previous detection or non-detection of the presence and/or position of an object near a capacitive sensing area. | 12-02-2010 |
| 20100265218 | DRIVING METHOD OF FIELD SEQUENTIAL DISPLAY - A driving method of a field sequential display apparatus is provided. First, a plurality of scan lines of the field sequential display apparatus are sequentially driven according to a scanning sequence in a first period of a first field, wherein the first field is in a first frame. Next, the scan lines are sequentially driven according to an opposite sequence in a second period of the first field, wherein the opposite sequence is in the reverse order of the scanning sequence. Finally, the scan lines are simultaneously driven or not driven in a third period of the first field. Consequently, the disclosed driving method can promote the uniformity of the image brightness. | 10-21-2010 |
| 20100246049 | COMPUTER HAVING FUNCTION FOR DISPLAYING STATUS OF OPERATION AND FLOPPY MODULE - A floppy module includes a floppy disk controller (FDC), a control circuit, and a display. The FDC has a first control terminal, a second control terminal, and a plurality of third control terminals. Wherein, the first control terminal and the second control terminal may respectively output a first control signal and a second control signal, and the first and second control signals having the same statuses are used for controlling a floppy disk. The display has a fourth control terminal and a plurality of data terminals respectively coupled to a portion of the third control terminals. Additionally, the control circuit may use the first control signal to replace the second control signal for controlling the floppy disk, and transmit the second control signal to the fourth control terminal such that a status information is shown on the display as the floppy disk being idle. | 09-30-2010 |
| 20100199096 | INTEGRATED CIRCUIT AND MEMORY DATA PROTECTION APPARATUS AND METHODS THEREOF - A memory data protection apparatus including a storage device, a cipher, and a validator is provided. The storage device is embedded in a chip electrically coupled to an external memory for storing an offset value, a signature and a key. The cipher electrically coupled to the storage device and the external memory to receive the key includes an encrypter and a decrypter. The encrypter is capable of executing an encryption to output an encrypted data and an encrypted certified data. The decrypter is capable of executing a decryption to output a decrypted data. The validator electrically coupled to the storage device receives the signature, the offset value and the certified data and determines an access limit of the external memory by validating the certified data with the signature and the offset value. The memory data protection apparatus accesses an original data in the external memory according to the access limit. | 08-05-2010 |
| 20100185797 | KEYBOARD-MOUSE SWITCH AND SWITCHING METHOD THEREOF - A keyboard-mouse switch is disclosed. The keyboard-mouse switch mentioned above is embedded in a computer apparatus and includes an information monitoring unit, a hot-key look up table and a hot-key identification controller. The information monitoring unit receives input information generated by at least one of a keyboard and a mouse. The hot-key look up table stores at least start up hot-key information. The hot-key identification controller receives the start up hot-key information and the input information. The hot-key identification identifies whether the input information is hot-key information or not and dis/enables the input information to be transmitted to the computer apparatus according to the start up hot-key information and the hot-key information. | 07-22-2010 |
| 20100176891 | SINGLE-PIN RC OSCILLATOR - Apparatus includes a single-pin input interface, which is operative to sense a voltage across a capacitor of a Resistor-Capacitor (RC) network in which the capacitor is repetitively charging and discharging so that the voltage oscillates as a function of time. A measurement circuit is coupled to measure time durations in which the capacitor is charging and in which the sensed voltage lies between first and second predefined thresholds. A clock generation circuit is coupled to generate an output clock signal having a frequency, and to adjust the frequency responsively to the measured time durations. | 07-15-2010 |
| 20100176787 | POWER CONVERTER - A power converter is provided. The power converter comprises an output pin having an address setting function, for flexibly setting a system management bus (SMBus) slave address. As such, the present invention is adapted for saving the amount of the strapping pins employed in the power converter, and thus saving the IC packaging cost. | 07-15-2010 |
| 20100148851 | LOW VOLTAGE ANALOG CMOS SWITCH - A CMOS analog switch circuit includes an NMOS switch transistor, a PMOS switch transistor, and a bias circuit. In an embodiment, the bias circuit includes a first and a second native bias transistors having their gate terminals coupled to a first and a second terminals of the CMOS switch circuit, respectively. The source terminals of the first and the second native bias transistors are coupled together and are also coupled to the body terminal of the PMOS switch transistor. In an configuration, the first and the second native bias transistors are characterized by substantially 0V threshold voltages, and the PMOS switch transistor is configured to exhibit a lower on-resistance in response to the greater of the voltages of the first terminal and the second terminal of the CMOS analog switch circuit. | 06-17-2010 |
| 20100146169 | Bus-handling - A processor, comprising a processing unit having an active state and a sleep state in which at least one of its sub-sections is inactive and a communication port adapted to receive signals from external units over a bus, which is configured to be not fully operative when the processor is in the sleep state. The processor additionally includes a bus monitoring unit configured to stall the bus responsive to identifying transmissions on the bus directed to the communication port, while the processing unit is in the sleep state and to indicate to the communication port that a transmission started while it was in the sleep state. | 06-10-2010 |
| 20100128899 | LARGE RC TIME-CONSTANT GENERATION FOR AUDIO AMPLIFIERS - A circuit for generating a large RC time-constant includes an input node for receiving an input signal making a transition from a first state to a second state characterized by a first time-constant, and an output node for providing an output signal making a transiting from the first state to the second state in response to the input signal. The circuit also includes a first MOS field effect transistor coupled between the input node and the output node. The circuit further includes a first capacitor coupled between the output node and a ground node. A switch circuit is connected to a gate of the first MOS field effect transistor. The switch circuit is configured to bias the MOS field effect transistor to operate in saturation mode and the transition of the output signal is characterized by a time-constant associated with this large output resistance and the capacitor coupled to the output node. | 05-27-2010 |
| 20100128898 | METHOD AND APPARATUS FOR OPERATION SEQUENCING OF AUDIO AMPLIFIERS - A circuit, system and method provide the suppression of pop at power up of audio amplifiers. The output driver is tri-stated at power up and is enabled after a predetermined time constant. In one embodiment, the output driver includes a MOS transistor pair connected in a push-pull configuration and switches that are under the control of a delay circuit. the. The output driver and the delay circuit may be part of a power amplifier in an audio system. The delay circuit may be implemented using mixed analog and digital signals or a digital controller configured to receive a clock frequency and execute a machine readable program code. The delay circuit is responsive for the start-up behavior of the audio system. | 05-27-2010 |
| 20100128401 | ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT AND DEVICE - An electrostatic discharge (ESD) protection circuit is provided. The ESD protection circuit includes a first rail, a second rail, a first transistor and a resistance unit. The drain of the first transistor is electrically coupled to the first rail, and the source and gate of the first transistor are electrically coupled to the second rail. The resistance unit is electrically coupled between a body of the first transistor and the second rail. When ESD occurs, the resistance unit provides a resistance between the body of the first transistor and the second rail. An ESD protection device is also provided. | 05-27-2010 |
| 20100127772 | FEEDBACK AMPLIFIER AND AUDIO SYSTEM THEREROF - A feedback amplifier includes an operational amplifier having an input end and an output end. A first resistor is coupled with the input end of the operational amplifier. A second resistor has a first end coupled with the input end of the operational amplifier and a second end coupled with the output end of the amplifier. A voltage divider has a first end being operably coupled with the output end of the operational amplifier and a second end being analog grounded. In an embodiment, the feedback amplifier further includes a first switch coupled to the first end of the voltage divider and the output end of the operational amplifier, and a second switch coupled to an internal node of the voltage divider. In an embodiment, the feedback amplifier is configured to provide attenuation when the first switch is open and second switch is closed. | 05-27-2010 |
| 20100117687 | TRACK AND HOLD CIRCUITS FOR AUDIO SYSTEMS AND OEPRATIONAL METHODS THEREOF - A track and hold circuit includes an operational amplifier having first and second input ends and first and second output ends. A first capacitor has a first end and a second end operably coupled with the first input end and the first output end of the operational amplifier, respectively, wherein the second end of the first capacitor is switchably coupled with a first input voltage (V | 05-13-2010 |
| 20100098268 | HIGH-VOLTAGE OUTPUT AMPLIFIER FOR AUDIO SYSTEMS - An amplifier circuit having low-voltage transistors and being configured to operate at a high voltage level is provided. The amplifier circuit includes a driver circuit having a first stage and a second stage connected in series between a power supply and a ground. The driver circuit has a control terminal for receiving a signal for controlling a current flow in the output driver. The amplifier circuit also includes a switch transistor having a drain connected to the power supply, a source connected to the control terminal of the output driver, and a gate. A bias circuit is coupled to the switch transistor. In a first mode of operation, the bias circuit is adapted to turn off the switch transistor, and, in a second mode of operation, the bias circuit is adapted to turn on the switch transistor. The bias circuit is adapted to maintain a gate-to-drain voltage of the switch transistor within a predetermined voltage range. | 04-22-2010 |
| 20100086121 | METHOD AND SYSTEM FOR SUBSCRIBER LINE INTERFACE CIRCUIT HAVING A HIGH-VOLTAGE MOS LINEFEED CIRCUIT - A subscriber line interface circuit apparatus includes a linefeed circuit and a subscriber line control circuit (SLCC). In an embodiment, the linefeed circuit includes a signal conversion circuit having cross-coupled first and second MOSFETs for providing a differential mode signal and a common mode signal in response to at least a tip signal and a ring signal from the subscriber loop. The linefeed circuit includes a tip control circuit and a ring control circuit, each having two or more MOSFETs. In an embodiment, the SLCC is provided in a single integrated circuit chip and is coupled to the linefeed circuit which isolates the SLCC from the tip or ring signals. The SLCC includes a first and a second differential mode inputs for receiving the differential mode signal, and a common-mode input for receiving the common-mode signal. | 04-08-2010 |
| 20100026392 | METHOD AND APPARATUS FOR OUTPUT AMPLIFIER PROTECTION - An amplifier circuit includes a first circuit and a second circuit connected in series. The first circuit has a first terminal coupled to a first power supply terminal, a second terminal coupled to an output node, and a control terminal for receiving a first signal for controlling a current flow. The second circuit has a first terminal coupled to the output node, a second terminal couple to a second power supply terminal, and a control terminal for receiving a second signal controlling a current flow in the first circuit. A bias circuit is coupled to the third terminal of the first circuit and is configured to limit a current flow in the first circuit when a voltage at the output node is outside a predetermined voltage range. In an embodiment, the bias circuit includes a plurality of diode devices connected in series and a switch device coupled to the diode devices. | 02-04-2010 |
| 20100011130 | Non-intrusive debug port interface - A processor having a core configured to control a keyboard and a plurality of pins connected to the core, configured to transfer signals from the processor to the keyboard. A controller is configured to transfer signals from one or more registers through at least one of the pins, intermittently with signals transferred to the keyboard. | 01-14-2010 |
| 20090309880 | DRAWING CONTROL METHOD, DRAWING CONTROL APPARATUS, AND DRAWING CONTROL SYSTEM FOR EMBEDDED SYSTEM - A drawing control method, a drawing control apparatus, and a drawing control system for embedded system are provided. The present invention adopts an independent drawing control apparatus to control a drawing unit to draw a frame, and move the drawn frame to an external frame buffer in advance, and therefore the number of lines that can be drawn is not restricted by the capacity of the memory of the drawing unit. Further, the present invention employs a counter to accumulate a counting number upon each time completion of drawing frame or moving frame. Whenever the counting number is accumulated, the drawing unit is controlled to perform a next stage of frame drawing or frame moving. In this concern, the present invention eliminates the time for external accessing, and thus achieving parallel processing, and instant displaying. | 12-17-2009 |
