| Novelics, LLC Patent applications |
| Patent application number | Title | Published |
|---|
| 20110141840 | NOR-OR DECODER - A decoder for decoding an address having a plurality of bits ranging from a first address bit a | 06-16-2011 |
| 20090190425 | SENSE AMPLIFIER READ LINE SHARING - A memory is provided that practices global read line sharing by including: a global read line, the memory being adapted to be pre-charge the global read line prior to a read operation; an I/O circuit to receive the global read line; and a plurality of sense amplifiers, each sense amplifier being multiplexed with respect to the global read line such that only a selected one of the sense amplifiers in the plurality is activated during a read operation to determine a bit decision, the memory being adapted to discharge the pre-charged global read line if the bit decision from the activated sense amplifier equals one, the pre-charged global read line thereby staying pre-charged if the bit decision from the activated sense amplifier equals zero. | 07-30-2009 |
| 20090190389 | MULTI-PORT SRAM WITH SIX-TRANSISTOR MEMORY CELLS - In one embodiment, a multi-port SRAM is provided that comprises: a single input port and output port 6-T SRAM; and a multi-port control block circuit that includes: a plurality of input registers corresponding to a plurality of input ports to register corresponding input signals; an input multiplexer to select from the input registers to provide a selected input signal to the 6-T SRAM's single input port; a plurality of output registers corresponding to a plurality of output ports to register corresponding output signals; and an output de-multiplexer to select from the output registers to provide an output signal from the | 07-30-2009 |
