| NIKO SEMICONDUCTOR CO., LTD. Patent applications |
| Patent application number | Title | Published |
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| 20120020123 | PREDICTIVE SYNCHRONOUS RECTIFICATION CONTROLLER, SWITCHING POWER CONVERTER WITH PREDICTIVE SYNCHRONOUS RECTIFICATION CONTROLLER AND CONTROLLING METHOD THEREOF - A predictive synchronous rectification controller for controlling at least one synchronous rectification switch is provided. The synchronous rectification controller has a ramp generator, a peak sampling unit, and an output control unit. The ramp generator receives a synchronous signal and generates a ramp signal accordingly. The peak sampling unit generates a predicted reference voltage signal by retrieving a peak voltage of the ramp signal. The output control unit compares the ramp signal with the predicted reference voltage signal to generate a synchronous rectification control signal to control a conducting state of the switch. | 01-26-2012 |
| 20110318895 | FABRICATION METHOD OF TRENCHED POWER MOSFET - A fabrication method of a trenched power MOSFET is provided. A pattern layer having a first opening is formed on a substrate. A portion of the substrate is removed, using the pattern layer as a mask, to form a trench in the substrate. A width of the trench is expanded. A gate oxide layer is formed on a surface of the trench. A portion of the gate oxide layer on a bottom of the trench is removed, using the pattern layer as a mask, to form a second opening in the gate oxide layer. The width of the expanded trench is greater than that of the second opening. A thick oxide layer is formed in the second opening. Heavily doped regions are formed beside the thick oxide layer. A gate is formed in the trench. A body layer surrounding the trench is formed. Sources are formed beside the trench. | 12-29-2011 |
| 20110310639 | FLYBACK POWER CONVERTER WITH MULTIPLE OUTPUTS AND A SECONDARY SIDE POST REGULATOR THEREOF - A flyback power converter with multiple outputs is disclosed. The flyback power converter has a transformer, a first output circuit, a second output circuit, and a secondary side synchronous rectification controller. The transformer has a primary side winding, a first output winding, and a second output winding. The first output circuit has a first output capacitor for storing electric energy from the first output winding. The second output circuit has a second rectifying switch and a second output capacitor. The second output capacitor is utilized for storing the electric energy from the second output winding. The secondary side synchronous rectification controller controls the conduction time of the second rectifying switch according to a detecting signal of a secondary-side conduction period. The electric energy in the first output capacitor may be transferred to the second output capacitor through the second output winding and the second rectifying switch and vice versa. | 12-22-2011 |
| 20110230025 | FABRICATION METHOD OF TRENCHED METAL-OXIDE-SEMICONDUCTOR DEVICE - A fabrication method of a trenched metal-oxide-semiconductor device is provided. Firstly, an epitaxial layer is formed on a substrate. Then, a plurality of gate trenches is formed in the epitaxial layer. Afterward, a spacer is formed on the sidewall of the trench gates. The spacer is utilized as a mask to selectively implant oxygen ion into the bottom of the gate trenches so as to form a bottom oxide layer on the bottom of the gate trenches to reduce capacitance between gate and drain. | 09-22-2011 |
| 20110101939 | DRIVING CONTROLLER, POWER CONVERSION CIRCUIT, AND METHOD FOR MODULATING DRIVING VOLTAGE LEVEL WITH RESPECT TO LOADS - A driving controller, power conversion circuit, and method for modulating driving voltage level with respect to a load are disclosed. In which the method, controller and circuit are applied for modulating the driving voltage of a transistor in a power converter. The driving controller includes a load parameter measurement unit, a voltage modulation unit, and a driving control unit. In which the load parameter measurement unit detects a load parameter which represents the magnitude of the load of the power conversion circuit. The voltage modulation unit then modulates the potential level of the driving voltage of the transistors in response to the load parameter for reducing unnecessary power consumption associated with the transistors in the power converter and enhancing overall power efficiency of the power conversion circuit. | 05-05-2011 |
| 20110057638 | PULSE WIDTH MODULATION REGULATOR IC AND CIRCUIT THEREOF - A pulse width modulation regulator IC is provided for controlling a duty cycle of at least one switch to convert one input voltage signal into an output voltage. An input pin is provided for receiving an input signal different from the input voltage signal. The input signal has a lasting time substantially the same as the time that input voltage signal situated at a high level, but the waveforms of the two signals are different. The input signal is converted into a square wave signal by a conversion unit, and a PWM signal is generated by a PWM controller according to the square wave signal to control the duty cycle of the switch. Therefore, the input pin can be saved by adjusting an internal or external circuit of the IC for the usage of the different kinds of input signals without increasing the number of input pins of the IC. | 03-10-2011 |
| 20110037445 | POWER CONTROL CIRCUIT FOR WIRE COMPENSATION AND COMPENSATION METHOD OF THE SAME - A power control circuit with wire compensation is provided. The power control circuit is applied in a power converter, which has an output coupled to a load through a power wire. The power control circuit has an adaptive sensing circuit and a controller. The adaptive sensing circuit is utilized for detecting an output voltage of the power converter and a current on the power wire and generating a feedback signal according to the output voltage and the current on the power wire. The controller is utilized for adjusting a level of the output voltage according to the feedback signal. | 02-17-2011 |
| 20110037122 | SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF - A semiconductor fabrication process according to the present invention defines an auxiliary structure with a plurality of spaces with a predetermined line-width in the oxide layer to prevent the conductive material in the spaces from being removed by etching or defined an auxiliary structure to rise the conductive structure so as to have the conductive structure being exposed by chemical mechanical polishing. Thus, the transmitting circuit can be defined without requiring an additional mask. Hence, the semiconductor fabrication process can reduce the number of required masks to lower the cost. | 02-17-2011 |
| 20110018071 | HIGH-VOLTAGE METAL OXIDE SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF - A high-voltage metal oxide semiconductor device comprising a main body of a first conductivity type, a conductive structure, a first well of a second conductivity type, a source region of the first conductivity type, and a second well of the second conductivity type is provided. The conductive structure has a first portion and a second portion. The first portion is extended from an upper surface of the main body into the main body. The second portion is extended along the upper surface of the main body. The first well is located in the main body and below the second portion. The first well is kept away from the first portion with a predetermined distance. The source region is located in the first well. The second well is located in the main body and extends from a bottom of the first portion to a place close to a drain region. | 01-27-2011 |
| 20100289074 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device is provided. The semiconductor device includes a semiconductor substrate, at least a doped region, an electrical contact layer and a metal oxide semiconductor cell. The semiconductor substrate includes opposing first and second surfaces and at least a trench extending from the second surface into interior portion thereof. The doped region is located in the semiconductor substrate under the bottom of the trench. The dopant concentration of the doped region is higher than that of the semiconductor substrate. The electrical contact layer is located on the second surface of the semiconductor substrate and connects to the doped region. The metal oxide semiconductor cell is located on the semiconductor substrate adjacent the first surface thereof. | 11-18-2010 |
| 20100276750 | Metal Oxide Semiconductor (MOS) Structure and Manufacturing Method Thereof - The manufacturing method includes the steps of: providing a semiconductor base of a first conduction type; forming a first epitaxial layer with a plurality of epitaxial pillars of therein on a first surface of the semiconductor base, wherein the epitaxial pillars have a conduction type opposite to the first epitaxial layer; forming a plurality of first shallow trenches and a plurality of second shallow trenches alternately on the epitaxial pillars and the first epitaxial layer, wherein the first shallow trench has a width greater than the width of the second shallow trench and the first shallow trench is extended downward to the epitaxial pillar; and forming a plurality of gate regions in the first shallow trenches respectively; forming a plurality of source regions on both sides of the first shallow trench; and forming a source metal conducting wire to connect the source regions. | 11-04-2010 |
| 20100244109 | TRENCHED METAL-OXIDE-SEMICONDUCTOR DEVICE AND FABRICATION THEREOF - A fabrication method of a trenched metal-oxide-semiconductor device is provided. After the formation of the gate dielectric layer, a first poly-silicon layer is deposited along the profile of the gate trench. Then, impurities of first conductivity type are implanted to the first poly-silicon layer at the bottom of the gate trench. Then, a second poly-silicon layer with second conductivity type is deposited over the first poly-silicon layer. The impurities in the first poly-silicon layer and the second poly-silicon layer are then driven by an annealing step to form a first doping region with first conductivity type located at the bottom of the gate trench and a second doping region with second conductivity type. | 09-30-2010 |
| 20100237877 | SYSTEM OPEN-CIRCUIT TESTING METHOD - A system open testing method is provided. Firstly, a system to be tested having at least an ESD protection unit, a signal input pad, a first voltage level end, and a second voltage level end is provided, wherein the first voltage level end and the second voltage level end are utilized for accessing electric power, the ESD protection unit has one end coupled to the signal input pad and the other end coupled to the first voltage level end. Afterward, a diode is connected to the signal input pad, and the conducting direction of the diode is opposite to that of the interior diode in the ESD circuit. Thereafter, a testing signal is send through the diode to the system. | 09-23-2010 |
| 20100176444 | POWER MOSFET AND METHOD OF FABRICATING THE SAME - A power MOSFET including a substrate of first conductivity type, an epitaxial layer of first conductivity type on the substrate, a body layer of second conductivity type in the epitaxial layer, a first insulating layer, a second insulating layer, a first conductive layer and two source regions of first conductivity type is provided. The body layer has a first trench therein. The epitaxial layer has a second trench therein. The second trench is below the first trench, and the width of the second trench is much smaller than that of the first trench. The first insulating layer is at least in the second trench. The first conductive layer is in the first trench. The second insulating layer is at least between the sidewall of the first trench and the first conductive layer. The source regions are disposed in the body layer beside the first trench respectively. | 07-15-2010 |
| 20100151642 | FABRICATION METHOD OF TRENCHED METAL-OXIDE-SEMICONDUCTOR DEVICE - A fabrication method of a trenched metal-oxide-semiconductor device is provided. Firstly, an epitaxial layer is formed on a substrate. Then, a plurality of gate trenches is formed in the epitaxial layer. Afterward, a spacer is formed on the sidewall of the trench gates. The spacer is utilized as a mask to selectively implant oxygen ion into the bottom of the gate trenches so as to form a bottom oxide layer on the bottom of the gate trenches to reduce capacitance between gate and drain. | 06-17-2010 |
| 20100078714 | TRENCH METAL OXIDE-SEMICONDUCTOR TRANSISTOR AND FABRICATION METHOD THEREOF - A fabrication method of a trench metal oxide-semiconductor (MOS) transistor is provided. After the gate trenches are formed in the epitaxial layer, impurities of a first conductive type are implanted into the epitaxial layer by using a blanket implantation process. A polysilicon pattern filling the gate trenches and covering a predetermined range of epitaxial layer surrounding the gate trenches is formed on the epitaxial layer. Impurities of a second conductive type are implanted through the polysilicon pattern into the epitaxial layer to form a well. Impurities of the first conductive type are implanted to form a plurality of first doping regions. A portion of the polysilicon layer above the upper surface of the epitaxial layer is removed by etching to form a plurality of polysilicon gates. Impurities in the first doping regions are driven in to form a plurality of source regions adjacent to the gate trenches. | 04-01-2010 |
| 20100025762 | SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF - A semiconductor fabrication process according to the present invention defines an auxiliary structure with a plurality of spaces with a predetermined line-width in the oxide layer to prevent the conductive material in the spaces from being removed by etching or defined an auxiliary structure to rise the conductive structure so as to have the conductive structure being exposed by chemical mechanical polishing. Thus, the transmitting circuit can be defined without requiring an additional mask. Hence, the semiconductor fabrication process can reduce the number of required masks to lower the cost. | 02-04-2010 |
| 20090302911 | FREQUENCY JITTER GENERATOR AND PWM CONTROLLER - A frequency jitter generator and a frequency jitter PWM controller are provided for overcoming the shortcoming that a conventional PWM controller reduces the electromagnetic interference issue by means of varying the operating frequency of the PWM controller based on an input voltage, while resulting in the uncertainty of the range of frequency jitter and the difficulty circuit design due to the effect of the input voltage and the load. The frequency jitter generator and PWM controller adjust the range of frequency jitter by using a signal within a fixed voltage range. The invention not only gets rid of the effect of the input voltage and the loading, but also simplifies the circuit design by fixing the range of frequency jitter no greater than a predetermined percentage regardless of the operating frequency of the PWM controller. | 12-10-2009 |
| 20090244932 | Synchronous Rectifying Apparatus and Forward Synchronous Converter - A synchronous rectifying apparatus suitable for use in a forward synchronous converter having a transforming unit with a primary and secondary side, and a first and second rectifying switches coupled to the secondary side is provided. The synchronous rectifying apparatus has a condition detecting unit and a synchronous rectifying controller. The condition detecting unit; coupled to the secondary side of the transforming unit, for detecting if the operation condition of the forward synchronous converter is at boundary between discontinuous current mode and continuous current mode or under discontinuous current mode based on the rising slope of the secondary side voltage of the transforming unit. If so, the condition detecting unit outputs a reset signal. The synchronous rectifying controller, coupled to the secondary side of the transforming unit and the condition detecting unit, to turn off the second rectifying switch for a predetermined time period in response to the reset signal. | 10-01-2009 |
| 20090237007 | LIGHT-EMITTING DIODE DRIVING CIRCUIT AND SECONDARY SIDE CONTROLLER FOR CONTROLLING THE SAME - A light-emitting diode (LED) driving circuit and a secondary side controller for controlling the same control an output voltage of the LED driving circuit at a first driving voltage or a second driving voltage. When the output voltage is controlled at the first driving voltage, an LED module driven by the LED driving circuit is in a stably lighting state; and when the output voltage is controlled at the second driving voltage, the output voltage is approximately a threshold voltage of the LED module but higher than zero volt, so that the LED module is close to not emitting light. Therefore, in a dimming operation, the variation of voltage applied across the LED module is smaller than that in the conventional LED driving circuits to thereby protect the LED module against an excessive voltage stress and avoid the problem of inaccurate dimming. | 09-24-2009 |
| 20090085633 | ACTIVE VOLTAGE-CLAMPING GATE DRIVING CIRCUIT - An active voltage-clamping gate driving circuit comprises a difference comparison circuit for receiving a reference voltage, a gate driving signal, and a preset voltage level, and outputting a voltage comparison signal; and a gate driving circuit for receiving an input signal and the voltage comparison signal, and outputting a gate driving signal. The voltage comparison signal controls the gate driving circuit. When a level difference between the gate control signal and the reference voltage is equal to the preset voltage level, the gate driving circuit is turned off, so that the level of the gate control signal is clamped to the preset voltage level, and the gate driving circuit does not output quiescent direct current under the clamped state. | 04-02-2009 |
| 20090027028 | PULSE WIDTH MODULATED CONTROLLER APPLIED TO SWITCH-TYPE VOLTAGE REGULATOR - A PWM controller applied to switch-type voltage regulator includes an error amplifier, a soft-start control circuit, a compensating load and a comparator. The error amplifier receives a reference voltage signal and a feedback voltage signal and outputs an error current signal according to the received feedback voltage signal and the reference voltage signal. The soft-start control circuit outputs a compensating current signal according to at least one soft-start control signal. The compensating load receives the error current signal and the compensating current signal, and outputs a compensating signal. The comparator receives a ramp signal and the compensating signal, and outputs a pulse width modulated (PWM) signal. When a supply voltage rises, the error amplifier is compensated with a preset soft-start compensating current to a circuit common ground VSS, so that the error signal slowly rises during the soft-start control process. Therefore, the function of soft-starting is effectuated. | 01-29-2009 |
| 20090021233 | PWM CONTROLLER WITH OUTPUT CURRENT LIMITATION - A PWM controller with output current limitation makes the over-current limitations almost the same even though the input voltages are different. The designer does not need to use high specification components or add an output current limiting circuit against the over-current condition. Costs are reduced and the layout is simplified. The switch power supply includes a transformer, a power switch, a first detecting circuit for generating a first detecting signal, a second detecting circuit for generating a second detecting signal, and a controller. The transformer converts the power and outputs the power to the secondary side. The power switch has a first terminal, a second terminal, and a controlled terminal. The controller has a control terminal, a first detecting terminal for receiving the first detecting signal, and a second detecting terminal for receiving the second detecting signal. The controller performs a protecting operation according to the received signals. | 01-22-2009 |
